Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* arch/arm/mach-msm7200/include/mach/debug-macro.S |
| 2 | * |
| 3 | * Copyright (C) 2007 Google, Inc. |
| 4 | * Author: Brian Swetland <swetland@google.com> |
| 5 | * |
| 6 | * This software is licensed under the terms of the GNU General Public |
| 7 | * License version 2, as published by the Free Software Foundation, and |
| 8 | * may be copied, distributed, and modified under those terms. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | */ |
| 16 | |
Pavel Machek | 6339f66 | 2009-11-02 11:48:29 +0100 | [diff] [blame] | 17 | |
| 18 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 19 | #include <mach/hardware.h> |
| 20 | #include <mach/msm_iomap.h> |
| 21 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame^] | 22 | #ifdef CONFIG_MSM_DEBUG_UART |
| 23 | .macro addruart, rp, rv |
| 24 | ldr \rp, =MSM_DEBUG_UART_PHYS |
| 25 | ldr \rv, =MSM_DEBUG_UART_BASE |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 26 | .endm |
| 27 | |
| 28 | .macro senduart,rd,rx |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame^] | 29 | #ifdef CONFIG_SERIAL_MSM_HSL |
| 30 | @ Clear TX_READY by writing to the UARTDM_CR register |
| 31 | mov r12, #0x300 |
| 32 | str r12, [\rx, #0x10] |
| 33 | @ Write 0x1 to NCF register |
| 34 | mov r12, #0x1 |
| 35 | str r12, [\rx, #0x40] |
| 36 | @ UARTDM reg. Read to induce delay |
| 37 | ldr r12, [\rx, #0x08] |
| 38 | @ Write the 1 character to UARTDM_TF |
| 39 | str \rd, [\rx, #0x70] |
| 40 | #else |
| 41 | teq \rx, #0 |
| 42 | strne \rd, [\rx, #0x0C] |
| 43 | #endif |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 44 | .endm |
| 45 | |
| 46 | .macro waituart,rd,rx |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame^] | 47 | #ifdef CONFIG_SERIAL_MSM_HSL |
| 48 | @ check for TX_EMT in UARTDM_SR |
| 49 | ldr \rd, [\rx, #0x08] |
| 50 | tst \rd, #0x08 |
| 51 | bne 1002f |
| 52 | @ wait for TXREADY in UARTDM_ISR |
| 53 | 1001: ldreq \rd, [\rx, #0x14] |
| 54 | tst \rd, #0x80 |
| 55 | dsb |
| 56 | beq 1001b |
Daniel Walker | bcd72c3 | 2010-10-27 15:25:59 -0700 | [diff] [blame] | 57 | #else |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame^] | 58 | @ wait for TX_READY |
| 59 | 1001: ldr \rd, [\rx, #0x08] |
| 60 | tst \rd, #0x04 |
| 61 | beq 1001b |
| 62 | #endif |
| 63 | 1002: |
| 64 | .endm |
| 65 | |
| 66 | #else |
| 67 | |
Daniel Walker | bcd72c3 | 2010-10-27 15:25:59 -0700 | [diff] [blame] | 68 | .macro addruart, rp, rv |
Daniel Walker | bcd72c3 | 2010-10-27 15:25:59 -0700 | [diff] [blame] | 69 | .endm |
| 70 | |
| 71 | .macro senduart,rd,rx |
| 72 | .endm |
| 73 | |
| 74 | .macro waituart,rd,rx |
| 75 | .endm |
| 76 | #endif |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 77 | |
| 78 | .macro busyuart,rd,rx |
| 79 | .endm |