Graf Yang | 5be36d2 | 2008-04-25 03:09:15 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Blackfin Infra-red Driver |
| 3 | * |
| 4 | * Copyright 2006-2008 Analog Devices Inc. |
| 5 | * |
| 6 | * Enter bugs at http://blackfin.uclinux.org/ |
| 7 | * |
| 8 | * Licensed under the GPL-2 or later. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #include <linux/serial.h> |
| 13 | #include <asm/dma.h> |
| 14 | #include <asm/portmux.h> |
| 15 | |
| 16 | #define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR) |
| 17 | #define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL) |
| 18 | #define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET) |
| 19 | #define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH) |
| 20 | #define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR) |
| 21 | #define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR) |
| 22 | #define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL) |
| 23 | |
| 24 | #define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v) |
| 25 | #define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v) |
| 26 | #define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v) |
| 27 | #define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v) |
| 28 | #define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v) |
| 29 | #define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v) |
| 30 | #define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v) |
| 31 | #define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1) |
| 32 | #define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v) |
| 33 | |
| 34 | #ifdef CONFIG_SIR_BFIN_DMA |
| 35 | struct dma_rx_buf { |
| 36 | char *buf; |
| 37 | int head; |
| 38 | int tail; |
| 39 | }; |
| 40 | #endif /* CONFIG_SIR_BFIN_DMA */ |
| 41 | |
| 42 | struct bfin_sir_port { |
| 43 | unsigned char __iomem *membase; |
| 44 | unsigned int irq; |
| 45 | unsigned int lsr; |
| 46 | unsigned long clk; |
| 47 | struct net_device *dev; |
| 48 | #ifdef CONFIG_SIR_BFIN_DMA |
| 49 | int tx_done; |
| 50 | struct dma_rx_buf rx_dma_buf; |
| 51 | struct timer_list rx_dma_timer; |
| 52 | int rx_dma_nrows; |
| 53 | #endif /* CONFIG_SIR_BFIN_DMA */ |
| 54 | unsigned int tx_dma_channel; |
| 55 | unsigned int rx_dma_channel; |
| 56 | }; |
| 57 | |
| 58 | struct bfin_sir_port sir_ports[BFIN_UART_NR_PORTS]; |
| 59 | |
| 60 | struct bfin_sir_port_res { |
| 61 | unsigned long base_addr; |
| 62 | int irq; |
| 63 | unsigned int rx_dma_channel; |
| 64 | unsigned int tx_dma_channel; |
| 65 | }; |
| 66 | |
| 67 | struct bfin_sir_port_res bfin_sir_port_resource[] = { |
| 68 | #ifdef CONFIG_BFIN_SIR0 |
| 69 | { |
| 70 | 0xFFC00400, |
| 71 | IRQ_UART0_RX, |
| 72 | CH_UART0_RX, |
| 73 | CH_UART0_TX, |
| 74 | }, |
| 75 | #endif |
| 76 | #ifdef CONFIG_BFIN_SIR1 |
| 77 | { |
| 78 | 0xFFC02000, |
| 79 | IRQ_UART1_RX, |
| 80 | CH_UART1_RX, |
| 81 | CH_UART1_TX, |
| 82 | }, |
| 83 | #endif |
| 84 | #ifdef CONFIG_BFIN_SIR2 |
| 85 | { |
| 86 | 0xFFC02100, |
| 87 | IRQ_UART2_RX, |
| 88 | CH_UART2_RX, |
| 89 | CH_UART2_TX, |
| 90 | }, |
| 91 | #endif |
| 92 | #ifdef CONFIG_BFIN_SIR3 |
| 93 | { |
| 94 | 0xFFC03100, |
| 95 | IRQ_UART3_RX, |
| 96 | CH_UART3_RX, |
| 97 | CH_UART3_TX, |
| 98 | }, |
| 99 | #endif |
| 100 | }; |
| 101 | |
| 102 | int nr_sirs = ARRAY_SIZE(bfin_sir_port_resource); |
| 103 | |
| 104 | struct bfin_sir_self { |
| 105 | struct bfin_sir_port *sir_port; |
| 106 | spinlock_t lock; |
| 107 | unsigned int open; |
| 108 | int speed; |
| 109 | int newspeed; |
| 110 | |
| 111 | struct sk_buff *txskb; |
| 112 | struct sk_buff *rxskb; |
| 113 | struct net_device_stats stats; |
| 114 | struct device *dev; |
| 115 | struct irlap_cb *irlap; |
| 116 | struct qos_info qos; |
| 117 | |
| 118 | iobuff_t tx_buff; |
| 119 | iobuff_t rx_buff; |
| 120 | |
| 121 | struct work_struct work; |
| 122 | int mtt; |
| 123 | }; |
| 124 | |
| 125 | #define DRIVER_NAME "bfin_sir" |
| 126 | |
| 127 | static void bfin_sir_hw_init(void) |
| 128 | { |
| 129 | #ifdef CONFIG_BFIN_SIR0 |
| 130 | peripheral_request(P_UART0_TX, DRIVER_NAME); |
| 131 | peripheral_request(P_UART0_RX, DRIVER_NAME); |
| 132 | #endif |
| 133 | |
| 134 | #ifdef CONFIG_BFIN_SIR1 |
| 135 | peripheral_request(P_UART1_TX, DRIVER_NAME); |
| 136 | peripheral_request(P_UART1_RX, DRIVER_NAME); |
| 137 | #endif |
| 138 | |
| 139 | #ifdef CONFIG_BFIN_SIR2 |
| 140 | peripheral_request(P_UART2_TX, DRIVER_NAME); |
| 141 | peripheral_request(P_UART2_RX, DRIVER_NAME); |
| 142 | #endif |
| 143 | |
| 144 | #ifdef CONFIG_BFIN_SIR3 |
| 145 | peripheral_request(P_UART3_TX, DRIVER_NAME); |
| 146 | peripheral_request(P_UART3_RX, DRIVER_NAME); |
| 147 | #endif |
| 148 | SSYNC(); |
| 149 | } |