Bryan Wu | 1394f03 | 2007-05-06 14:50:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * File: Documentation/blackfin/cachefeatures.txt |
| 3 | * Based on: |
| 4 | * Author: |
| 5 | * |
| 6 | * Created: |
| 7 | * Description: This file contains the simple DMA Implementation for Blackfin |
| 8 | * |
| 9 | * Rev: $Id: cachefeatures.txt 2384 2006-11-01 04:12:43Z magicyang $ |
| 10 | * |
| 11 | * Modified: |
| 12 | * Copyright 2004-2006 Analog Devices Inc. |
| 13 | * |
| 14 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | - Instruction and Data cache initialization. |
| 19 | icache_init(); |
| 20 | dcache_init(); |
| 21 | |
| 22 | - Instruction and Data cache Invalidation Routines, when flushing the |
| 23 | same is not required. |
| 24 | _icache_invalidate(); |
| 25 | _dcache_invalidate(); |
| 26 | |
| 27 | Also, for invalidating the entire instruction and data cache, the below |
| 28 | routines are provided (another method for invalidation, refer page no 267 and 287 of |
| 29 | ADSP-BF533 Hardware Reference manual) |
| 30 | |
| 31 | invalidate_entire_dcache(); |
| 32 | invalidate_entire_icache(); |
| 33 | |
| 34 | -External Flushing of Instruction and data cache routines. |
| 35 | |
| 36 | flush_instruction_cache(); |
| 37 | flush_data_cache(); |
| 38 | |
| 39 | - Internal Flushing of Instruction and Data Cache. |
| 40 | |
| 41 | icplb_flush(); |
| 42 | dcplb_flush(); |
| 43 | |
| 44 | - Locking the cache. |
| 45 | |
| 46 | cache_grab_lock(); |
| 47 | cache_lock(); |
| 48 | |
| 49 | Please refer linux-2.6.x/Documentation/blackfin/cache-lock.txt for how to |
| 50 | lock the cache. |
| 51 | |
| 52 | Locking the cache is optional feature. |
| 53 | |
| 54 | - Miscellaneous cache functions. |
| 55 | |
| 56 | flush_cache_all(); |
| 57 | flush_cache_mm(); |
| 58 | invalidate_dcache_range(); |
| 59 | flush_dcache_range(); |
| 60 | flush_dcache_page(); |
| 61 | flush_cache_range(); |
| 62 | flush_cache_page(); |
| 63 | invalidate_dcache_range(); |
| 64 | flush_page_to_ram(); |
| 65 | |