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Raphael Assenat362600f2006-06-25 05:48:24 -07001/* drivers/rtc/rtc-v3020.c
2 *
3 * Copyright (C) 2006 8D Technologies inc.
4 * Copyright (C) 2004 Compulab Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Driver for the V3020 RTC
11 *
12 * Changelog:
13 *
14 * 10-May-2006: Raphael Assenat <raph@8d.com>
15 * - Converted to platform driver
16 * - Use the generic rtc class
17 *
18 * ??-???-2004: Someone at Compulab
19 * - Initial driver creation.
20 *
21 */
22#include <linux/platform_device.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/rtc.h>
26#include <linux/types.h>
27#include <linux/bcd.h>
28#include <linux/rtc-v3020.h>
Mike Rapoportf3d79b22007-09-11 15:23:45 -070029#include <linux/delay.h>
Mike Rapoport96615842009-04-02 16:57:01 -070030#include <linux/gpio.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Raphael Assenat362600f2006-06-25 05:48:24 -070032
Mike Rapoportc08cf9d2009-03-31 15:24:59 -070033#include <linux/io.h>
Raphael Assenat362600f2006-06-25 05:48:24 -070034
35#undef DEBUG
36
Mike Rapoport96615842009-04-02 16:57:01 -070037struct v3020;
38
39struct v3020_chip_ops {
40 int (*map_io)(struct v3020 *chip, struct platform_device *pdev,
41 struct v3020_platform_data *pdata);
42 void (*unmap_io)(struct v3020 *chip);
43 unsigned char (*read_bit)(struct v3020 *chip);
44 void (*write_bit)(struct v3020 *chip, unsigned char bit);
45};
46
47#define V3020_CS 0
48#define V3020_WR 1
49#define V3020_RD 2
50#define V3020_IO 3
51
52struct v3020_gpio {
53 const char *name;
54 unsigned int gpio;
55};
56
Raphael Assenat362600f2006-06-25 05:48:24 -070057struct v3020 {
Mike Rapoport96615842009-04-02 16:57:01 -070058 /* MMIO access */
Raphael Assenat362600f2006-06-25 05:48:24 -070059 void __iomem *ioaddress;
60 int leftshift;
Mike Rapoport96615842009-04-02 16:57:01 -070061
62 /* GPIO access */
63 struct v3020_gpio *gpio;
64
65 struct v3020_chip_ops *ops;
66
Raphael Assenat362600f2006-06-25 05:48:24 -070067 struct rtc_device *rtc;
68};
69
Mike Rapoport96615842009-04-02 16:57:01 -070070
71static int v3020_mmio_map(struct v3020 *chip, struct platform_device *pdev,
72 struct v3020_platform_data *pdata)
73{
74 if (pdev->num_resources != 1)
75 return -EBUSY;
76
77 if (pdev->resource[0].flags != IORESOURCE_MEM)
78 return -EBUSY;
79
80 chip->leftshift = pdata->leftshift;
81 chip->ioaddress = ioremap(pdev->resource[0].start, 1);
82 if (chip->ioaddress == NULL)
83 return -EBUSY;
84
85 return 0;
86}
87
88static void v3020_mmio_unmap(struct v3020 *chip)
89{
90 iounmap(chip->ioaddress);
91}
92
93static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
94{
95 writel(bit << chip->leftshift, chip->ioaddress);
96}
97
98static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
99{
Scott Valentinebcb3a162009-11-11 14:26:49 -0800100 return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
Mike Rapoport96615842009-04-02 16:57:01 -0700101}
102
103static struct v3020_chip_ops v3020_mmio_ops = {
104 .map_io = v3020_mmio_map,
105 .unmap_io = v3020_mmio_unmap,
106 .read_bit = v3020_mmio_read_bit,
107 .write_bit = v3020_mmio_write_bit,
108};
109
110static struct v3020_gpio v3020_gpio[] = {
111 { "RTC CS", 0 },
112 { "RTC WR", 0 },
113 { "RTC RD", 0 },
114 { "RTC IO", 0 },
115};
116
117static int v3020_gpio_map(struct v3020 *chip, struct platform_device *pdev,
118 struct v3020_platform_data *pdata)
119{
120 int i, err;
121
122 v3020_gpio[V3020_CS].gpio = pdata->gpio_cs;
123 v3020_gpio[V3020_WR].gpio = pdata->gpio_wr;
124 v3020_gpio[V3020_RD].gpio = pdata->gpio_rd;
125 v3020_gpio[V3020_IO].gpio = pdata->gpio_io;
126
127 for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++) {
128 err = gpio_request(v3020_gpio[i].gpio, v3020_gpio[i].name);
129 if (err)
130 goto err_request;
131
132 gpio_direction_output(v3020_gpio[i].gpio, 1);
133 }
134
135 chip->gpio = v3020_gpio;
136
137 return 0;
138
139err_request:
140 while (--i >= 0)
141 gpio_free(v3020_gpio[i].gpio);
142
143 return err;
144}
145
146static void v3020_gpio_unmap(struct v3020 *chip)
147{
148 int i;
149
150 for (i = 0; i < ARRAY_SIZE(v3020_gpio); i++)
151 gpio_free(v3020_gpio[i].gpio);
152}
153
154static void v3020_gpio_write_bit(struct v3020 *chip, unsigned char bit)
155{
156 gpio_direction_output(chip->gpio[V3020_IO].gpio, bit);
157 gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
158 gpio_set_value(chip->gpio[V3020_WR].gpio, 0);
159 udelay(1);
160 gpio_set_value(chip->gpio[V3020_WR].gpio, 1);
161 gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
162}
163
164static unsigned char v3020_gpio_read_bit(struct v3020 *chip)
165{
166 int bit;
167
168 gpio_direction_input(chip->gpio[V3020_IO].gpio);
169 gpio_set_value(chip->gpio[V3020_CS].gpio, 0);
170 gpio_set_value(chip->gpio[V3020_RD].gpio, 0);
171 udelay(1);
172 bit = !!gpio_get_value(chip->gpio[V3020_IO].gpio);
173 udelay(1);
174 gpio_set_value(chip->gpio[V3020_RD].gpio, 1);
175 gpio_set_value(chip->gpio[V3020_CS].gpio, 1);
176
177 return bit;
178}
179
180static struct v3020_chip_ops v3020_gpio_ops = {
181 .map_io = v3020_gpio_map,
182 .unmap_io = v3020_gpio_unmap,
183 .read_bit = v3020_gpio_read_bit,
184 .write_bit = v3020_gpio_write_bit,
185};
186
Raphael Assenat362600f2006-06-25 05:48:24 -0700187static void v3020_set_reg(struct v3020 *chip, unsigned char address,
188 unsigned char data)
189{
190 int i;
191 unsigned char tmp;
192
193 tmp = address;
194 for (i = 0; i < 4; i++) {
Mike Rapoport96615842009-04-02 16:57:01 -0700195 chip->ops->write_bit(chip, (tmp & 1));
Raphael Assenat362600f2006-06-25 05:48:24 -0700196 tmp >>= 1;
Mike Rapoportf3d79b22007-09-11 15:23:45 -0700197 udelay(1);
Raphael Assenat362600f2006-06-25 05:48:24 -0700198 }
199
200 /* Commands dont have data */
201 if (!V3020_IS_COMMAND(address)) {
202 for (i = 0; i < 8; i++) {
Mike Rapoport96615842009-04-02 16:57:01 -0700203 chip->ops->write_bit(chip, (data & 1));
Raphael Assenat362600f2006-06-25 05:48:24 -0700204 data >>= 1;
Mike Rapoportf3d79b22007-09-11 15:23:45 -0700205 udelay(1);
Raphael Assenat362600f2006-06-25 05:48:24 -0700206 }
207 }
208}
209
210static unsigned char v3020_get_reg(struct v3020 *chip, unsigned char address)
211{
Mike Rapoportc08cf9d2009-03-31 15:24:59 -0700212 unsigned int data = 0;
Raphael Assenat362600f2006-06-25 05:48:24 -0700213 int i;
214
215 for (i = 0; i < 4; i++) {
Mike Rapoport96615842009-04-02 16:57:01 -0700216 chip->ops->write_bit(chip, (address & 1));
Raphael Assenat362600f2006-06-25 05:48:24 -0700217 address >>= 1;
Mike Rapoportf3d79b22007-09-11 15:23:45 -0700218 udelay(1);
Raphael Assenat362600f2006-06-25 05:48:24 -0700219 }
220
221 for (i = 0; i < 8; i++) {
222 data >>= 1;
Mike Rapoport96615842009-04-02 16:57:01 -0700223 if (chip->ops->read_bit(chip))
Raphael Assenat362600f2006-06-25 05:48:24 -0700224 data |= 0x80;
Mike Rapoportf3d79b22007-09-11 15:23:45 -0700225 udelay(1);
Raphael Assenat362600f2006-06-25 05:48:24 -0700226 }
227
228 return data;
229}
230
231static int v3020_read_time(struct device *dev, struct rtc_time *dt)
232{
233 struct v3020 *chip = dev_get_drvdata(dev);
234 int tmp;
235
236 /* Copy the current time to ram... */
237 v3020_set_reg(chip, V3020_CMD_CLOCK2RAM, 0);
238
239 /* ...and then read constant values. */
240 tmp = v3020_get_reg(chip, V3020_SECONDS);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700241 dt->tm_sec = bcd2bin(tmp);
Raphael Assenat362600f2006-06-25 05:48:24 -0700242 tmp = v3020_get_reg(chip, V3020_MINUTES);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700243 dt->tm_min = bcd2bin(tmp);
Raphael Assenat362600f2006-06-25 05:48:24 -0700244 tmp = v3020_get_reg(chip, V3020_HOURS);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700245 dt->tm_hour = bcd2bin(tmp);
Raphael Assenat362600f2006-06-25 05:48:24 -0700246 tmp = v3020_get_reg(chip, V3020_MONTH_DAY);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700247 dt->tm_mday = bcd2bin(tmp);
Raphael Assenat362600f2006-06-25 05:48:24 -0700248 tmp = v3020_get_reg(chip, V3020_MONTH);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700249 dt->tm_mon = bcd2bin(tmp) - 1;
Raphael Assenat362600f2006-06-25 05:48:24 -0700250 tmp = v3020_get_reg(chip, V3020_WEEK_DAY);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700251 dt->tm_wday = bcd2bin(tmp);
Raphael Assenat362600f2006-06-25 05:48:24 -0700252 tmp = v3020_get_reg(chip, V3020_YEAR);
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700253 dt->tm_year = bcd2bin(tmp)+100;
Raphael Assenat362600f2006-06-25 05:48:24 -0700254
Mike Rapoportc08cf9d2009-03-31 15:24:59 -0700255 dev_dbg(dev, "\n%s : Read RTC values\n", __func__);
256 dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
257 dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
258 dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
259 dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
260 dev_dbg(dev, "tm_mon : %i\n", dt->tm_mon);
261 dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
262 dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
Raphael Assenat362600f2006-06-25 05:48:24 -0700263
264 return 0;
265}
266
267
268static int v3020_set_time(struct device *dev, struct rtc_time *dt)
269{
270 struct v3020 *chip = dev_get_drvdata(dev);
271
Mike Rapoportc08cf9d2009-03-31 15:24:59 -0700272 dev_dbg(dev, "\n%s : Setting RTC values\n", __func__);
273 dev_dbg(dev, "tm_sec : %i\n", dt->tm_sec);
274 dev_dbg(dev, "tm_min : %i\n", dt->tm_min);
275 dev_dbg(dev, "tm_hour: %i\n", dt->tm_hour);
276 dev_dbg(dev, "tm_mday: %i\n", dt->tm_mday);
277 dev_dbg(dev, "tm_wday: %i\n", dt->tm_wday);
278 dev_dbg(dev, "tm_year: %i\n", dt->tm_year);
Raphael Assenat362600f2006-06-25 05:48:24 -0700279
280 /* Write all the values to ram... */
Adrian Bunkfe20ba72008-10-18 20:28:41 -0700281 v3020_set_reg(chip, V3020_SECONDS, bin2bcd(dt->tm_sec));
282 v3020_set_reg(chip, V3020_MINUTES, bin2bcd(dt->tm_min));
283 v3020_set_reg(chip, V3020_HOURS, bin2bcd(dt->tm_hour));
284 v3020_set_reg(chip, V3020_MONTH_DAY, bin2bcd(dt->tm_mday));
285 v3020_set_reg(chip, V3020_MONTH, bin2bcd(dt->tm_mon + 1));
286 v3020_set_reg(chip, V3020_WEEK_DAY, bin2bcd(dt->tm_wday));
287 v3020_set_reg(chip, V3020_YEAR, bin2bcd(dt->tm_year % 100));
Raphael Assenat362600f2006-06-25 05:48:24 -0700288
289 /* ...and set the clock. */
290 v3020_set_reg(chip, V3020_CMD_RAM2CLOCK, 0);
291
292 /* Compulab used this delay here. I dont know why,
293 * the datasheet does not specify a delay. */
294 /*mdelay(5);*/
295
296 return 0;
297}
298
David Brownellff8371a2006-09-30 23:28:17 -0700299static const struct rtc_class_ops v3020_rtc_ops = {
Raphael Assenat362600f2006-06-25 05:48:24 -0700300 .read_time = v3020_read_time,
301 .set_time = v3020_set_time,
302};
303
304static int rtc_probe(struct platform_device *pdev)
305{
306 struct v3020_platform_data *pdata = pdev->dev.platform_data;
307 struct v3020 *chip;
Raphael Assenat362600f2006-06-25 05:48:24 -0700308 int retval = -EBUSY;
309 int i;
310 int temp;
311
Raphael Assenat362600f2006-06-25 05:48:24 -0700312 chip = kzalloc(sizeof *chip, GFP_KERNEL);
313 if (!chip)
314 return -ENOMEM;
315
Mike Rapoport96615842009-04-02 16:57:01 -0700316 if (pdata->use_gpio)
317 chip->ops = &v3020_gpio_ops;
318 else
319 chip->ops = &v3020_mmio_ops;
320
321 retval = chip->ops->map_io(chip, pdev, pdata);
322 if (retval)
Raphael Assenat362600f2006-06-25 05:48:24 -0700323 goto err_chip;
324
325 /* Make sure the v3020 expects a communication cycle
326 * by reading 8 times */
327 for (i = 0; i < 8; i++)
Mike Rapoport96615842009-04-02 16:57:01 -0700328 temp = chip->ops->read_bit(chip);
Raphael Assenat362600f2006-06-25 05:48:24 -0700329
330 /* Test chip by doing a write/read sequence
331 * to the chip ram */
332 v3020_set_reg(chip, V3020_SECONDS, 0x33);
Mike Rapoportc08cf9d2009-03-31 15:24:59 -0700333 if (v3020_get_reg(chip, V3020_SECONDS) != 0x33) {
Raphael Assenat362600f2006-06-25 05:48:24 -0700334 retval = -ENODEV;
335 goto err_io;
336 }
337
André Goddard Rosaaf901ca2009-11-14 13:09:05 -0200338 /* Make sure frequency measurement mode, test modes, and lock
Raphael Assenat362600f2006-06-25 05:48:24 -0700339 * are all disabled */
340 v3020_set_reg(chip, V3020_STATUS_0, 0x0);
341
Mike Rapoport96615842009-04-02 16:57:01 -0700342 if (pdata->use_gpio)
343 dev_info(&pdev->dev, "Chip available at GPIOs "
344 "%d, %d, %d, %d\n",
345 chip->gpio[V3020_CS].gpio, chip->gpio[V3020_WR].gpio,
346 chip->gpio[V3020_RD].gpio, chip->gpio[V3020_IO].gpio);
347 else
348 dev_info(&pdev->dev, "Chip available at "
349 "physical address 0x%llx,"
350 "data connected to D%d\n",
351 (unsigned long long)pdev->resource[0].start,
352 chip->leftshift);
Raphael Assenat362600f2006-06-25 05:48:24 -0700353
354 platform_set_drvdata(pdev, chip);
355
Alessandro Zummob74d2ca2009-12-15 16:45:53 -0800356 chip->rtc = rtc_device_register("v3020",
Raphael Assenat362600f2006-06-25 05:48:24 -0700357 &pdev->dev, &v3020_rtc_ops, THIS_MODULE);
Alessandro Zummob74d2ca2009-12-15 16:45:53 -0800358 if (IS_ERR(chip->rtc)) {
359 retval = PTR_ERR(chip->rtc);
Raphael Assenat362600f2006-06-25 05:48:24 -0700360 goto err_io;
361 }
Raphael Assenat362600f2006-06-25 05:48:24 -0700362
363 return 0;
364
365err_io:
Mike Rapoport96615842009-04-02 16:57:01 -0700366 chip->ops->unmap_io(chip);
Raphael Assenat362600f2006-06-25 05:48:24 -0700367err_chip:
368 kfree(chip);
369
370 return retval;
371}
372
373static int rtc_remove(struct platform_device *dev)
374{
375 struct v3020 *chip = platform_get_drvdata(dev);
376 struct rtc_device *rtc = chip->rtc;
377
378 if (rtc)
379 rtc_device_unregister(rtc);
380
Mike Rapoport96615842009-04-02 16:57:01 -0700381 chip->ops->unmap_io(chip);
Raphael Assenat362600f2006-06-25 05:48:24 -0700382 kfree(chip);
383
384 return 0;
385}
386
387static struct platform_driver rtc_device_driver = {
388 .probe = rtc_probe,
389 .remove = rtc_remove,
390 .driver = {
391 .name = "v3020",
392 .owner = THIS_MODULE,
393 },
394};
395
Axel Lin0c4eae62012-01-10 15:10:48 -0800396module_platform_driver(rtc_device_driver);
Raphael Assenat362600f2006-06-25 05:48:24 -0700397
398MODULE_DESCRIPTION("V3020 RTC");
399MODULE_AUTHOR("Raphael Assenat");
400MODULE_LICENSE("GPL");
Kay Sieversad28a072008-04-10 21:29:25 -0700401MODULE_ALIAS("platform:v3020");