blob: 8c3e8cf36ec9da78e5dcbe7ba210ad9eb6a3fd37 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Bartlomiej Zolnierkiewicze98d6e52007-08-20 22:42:56 +02002 * linux/drivers/ide/pci/pdc202xx_old.c Version 0.51 Jul 27, 2007
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
Sergei Shtylyovfed21642007-02-17 02:40:22 +01005 * Copyright (C) 2006-2007 MontaVista Software, Inc.
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +02006 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * Promise Ultra33 cards with BIOS v1.20 through 1.28 will need this
9 * compiled into the kernel if you have more than one card installed.
10 * Note that BIOS v1.29 is reported to fix the problem. Since this is
11 * safe chipset tuning, including this support is harmless
12 *
13 * Promise Ultra66 cards with BIOS v1.11 this
14 * compiled into the kernel if you have more than one card installed.
15 *
16 * Promise Ultra100 cards.
17 *
18 * The latest chipset code will support the following ::
19 * Three Ultra33 controllers and 12 drives.
20 * 8 are UDMA supported and 4 are limited to DMA mode 2 multi-word.
21 * The 8/4 ratio is a BIOS code limit by promise.
22 *
23 * UNLESS you enable "CONFIG_PDC202XX_BURST"
24 *
25 */
26
27/*
28 * Portions Copyright (C) 1999 Promise Technology, Inc.
29 * Author: Frank Tiernan (frankt@promise.com)
30 * Released under terms of General Public License
31 */
32
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/types.h>
34#include <linux/module.h>
35#include <linux/kernel.h>
36#include <linux/delay.h>
37#include <linux/timer.h>
38#include <linux/mm.h>
39#include <linux/ioport.h>
40#include <linux/blkdev.h>
41#include <linux/hdreg.h>
42#include <linux/interrupt.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/ide.h>
46
47#include <asm/io.h>
48#include <asm/irq.h>
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#define PDC202XX_DEBUG_DRIVE_INFO 0
51
52static const char *pdc_quirk_drives[] = {
53 "QUANTUM FIREBALLlct08 08",
54 "QUANTUM FIREBALLP KA6.4",
55 "QUANTUM FIREBALLP KA9.1",
56 "QUANTUM FIREBALLP LM20.4",
57 "QUANTUM FIREBALLP KX13.6",
58 "QUANTUM FIREBALLP KX20.5",
59 "QUANTUM FIREBALLP KX27.3",
60 "QUANTUM FIREBALLP LM20.5",
61 NULL
62};
63
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020064static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020066static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -070067{
68 ide_hwif_t *hwif = HWIF(drive);
69 struct pci_dev *dev = hwif->pci_dev;
70 u8 drive_pci = 0x60 + (drive->dn << 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020072 u8 AP = 0, BP = 0, CP = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 u8 TA = 0, TB = 0, TC = 0;
74
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020075#if PDC202XX_DEBUG_DRIVE_INFO
76 u32 drive_conf = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070077 pci_read_config_dword(dev, drive_pci, &drive_conf);
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020078#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020080 /*
81 * TODO: do this once per channel
82 */
83 if (dev->device != PCI_DEVICE_ID_PROMISE_20246)
84 pdc_old_disable_66MHz_clock(hwif);
Linus Torvalds1da177e2005-04-16 15:20:36 -070085
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020086 pci_read_config_byte(dev, drive_pci, &AP);
87 pci_read_config_byte(dev, drive_pci + 1, &BP);
88 pci_read_config_byte(dev, drive_pci + 2, &CP);
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90 switch(speed) {
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 case XFER_UDMA_5:
92 case XFER_UDMA_4: TB = 0x20; TC = 0x01; break;
93 case XFER_UDMA_2: TB = 0x20; TC = 0x01; break;
94 case XFER_UDMA_3:
95 case XFER_UDMA_1: TB = 0x40; TC = 0x02; break;
96 case XFER_UDMA_0:
97 case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break;
98 case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break;
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +020099 case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100 case XFER_SW_DMA_2: TB = 0x60; TC = 0x05; break;
101 case XFER_SW_DMA_1: TB = 0x80; TC = 0x06; break;
102 case XFER_SW_DMA_0: TB = 0xC0; TC = 0x0B; break;
103 case XFER_PIO_4: TA = 0x01; TB = 0x04; break;
104 case XFER_PIO_3: TA = 0x02; TB = 0x06; break;
105 case XFER_PIO_2: TA = 0x03; TB = 0x08; break;
106 case XFER_PIO_1: TA = 0x05; TB = 0x0C; break;
107 case XFER_PIO_0:
108 default: TA = 0x09; TB = 0x13; break;
109 }
110
111 if (speed < XFER_SW_DMA_0) {
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +0200112 /*
113 * preserve SYNC_INT / ERDDY_EN bits while clearing
114 * Prefetch_EN / IORDY_EN / PA[3:0] bits of register A
115 */
116 AP &= ~0x3f;
117 if (drive->id->capability & 4)
118 AP |= 0x20; /* set IORDY_EN bit */
119 if (drive->media == ide_disk)
120 AP |= 0x10; /* set Prefetch_EN bit */
121 /* clear PB[4:0] bits of register B */
122 BP &= ~0x1f;
123 pci_write_config_byte(dev, drive_pci, AP | TA);
124 pci_write_config_byte(dev, drive_pci + 1, BP | TB);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 } else {
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +0200126 /* clear MB[2:0] bits of register B */
127 BP &= ~0xe0;
128 /* clear MC[3:0] bits of register C */
129 CP &= ~0x0f;
130 pci_write_config_byte(dev, drive_pci + 1, BP | TB);
131 pci_write_config_byte(dev, drive_pci + 2, CP | TC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 }
133
134#if PDC202XX_DEBUG_DRIVE_INFO
135 printk(KERN_DEBUG "%s: %s drive%d 0x%08x ",
136 drive->name, ide_xfer_verbose(speed),
137 drive->dn, drive_conf);
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +0200138 pci_read_config_dword(dev, drive_pci, &drive_conf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 printk("0x%08x\n", drive_conf);
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +0200140#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141}
142
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200143static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200145 pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146}
147
148static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
149{
150 u16 CIS = 0, mask = (hwif->channel) ? (1<<11) : (1<<10);
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200151
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 pci_read_config_word(hwif->pci_dev, 0x50, &CIS);
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200153
154 return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155}
156
157/*
158 * Set the control register to use the 66MHz system
159 * clock for UDMA 3/4/5 mode operation when necessary.
160 *
Bartlomiej Zolnierkiewicz4fce3162007-05-16 00:51:41 +0200161 * FIXME: this register is shared by both channels, some locking is needed
162 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163 * It may also be possible to leave the 66MHz clock on
164 * and readjust the timing parameters.
165 */
166static void pdc_old_enable_66MHz_clock(ide_hwif_t *hwif)
167{
168 unsigned long clock_reg = hwif->dma_master + 0x11;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100169 u8 clock = inb(clock_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100171 outb(clock | (hwif->channel ? 0x08 : 0x02), clock_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172}
173
174static void pdc_old_disable_66MHz_clock(ide_hwif_t *hwif)
175{
176 unsigned long clock_reg = hwif->dma_master + 0x11;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100177 u8 clock = inb(clock_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100179 outb(clock & ~(hwif->channel ? 0x08 : 0x02), clock_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180}
181
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
183{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 drive->init_speed = 0;
185
Bartlomiej Zolnierkiewiczbd203b52007-05-16 00:51:43 +0200186 if (ide_tune_dma(drive))
Bartlomiej Zolnierkiewicz3608b5d2007-02-17 02:40:26 +0100187 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188
Bartlomiej Zolnierkiewiczd8f44692007-02-17 02:40:25 +0100189 if (ide_use_fast_pio(drive))
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200190 ide_set_max_pio(drive);
Bartlomiej Zolnierkiewiczd8f44692007-02-17 02:40:25 +0100191
Bartlomiej Zolnierkiewicz3608b5d2007-02-17 02:40:26 +0100192 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193}
194
195static int pdc202xx_quirkproc (ide_drive_t *drive)
196{
Sergei Shtylyovd24ec422007-02-07 18:18:39 +0100197 const char **list, *model = drive->id->model;
198
199 for (list = pdc_quirk_drives; *list != NULL; list++)
200 if (strstr(model, *list) != NULL)
201 return 2;
202 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203}
204
205static void pdc202xx_old_ide_dma_start(ide_drive_t *drive)
206{
207 if (drive->current_speed > XFER_UDMA_2)
208 pdc_old_enable_66MHz_clock(drive->hwif);
Tobias Oedf3d5b342006-10-03 01:14:17 -0700209 if (drive->media != ide_disk || drive->addressing == 1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 struct request *rq = HWGROUP(drive)->rq;
211 ide_hwif_t *hwif = HWIF(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212 unsigned long high_16 = hwif->dma_master;
213 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
214 u32 word_count = 0;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100215 u8 clock = inb(high_16 + 0x11);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100217 outb(clock | (hwif->channel ? 0x08 : 0x02), high_16 + 0x11);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 word_count = (rq->nr_sectors << 8);
219 word_count = (rq_data_dir(rq) == READ) ?
220 word_count | 0x05000000 :
221 word_count | 0x06000000;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100222 outl(word_count, atapi_reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223 }
224 ide_dma_start(drive);
225}
226
227static int pdc202xx_old_ide_dma_end(ide_drive_t *drive)
228{
Tobias Oedf3d5b342006-10-03 01:14:17 -0700229 if (drive->media != ide_disk || drive->addressing == 1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230 ide_hwif_t *hwif = HWIF(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 unsigned long high_16 = hwif->dma_master;
232 unsigned long atapi_reg = high_16 + (hwif->channel ? 0x24 : 0x20);
233 u8 clock = 0;
234
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100235 outl(0, atapi_reg); /* zero out extra */
236 clock = inb(high_16 + 0x11);
237 outb(clock & ~(hwif->channel ? 0x08:0x02), high_16 + 0x11);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 }
239 if (drive->current_speed > XFER_UDMA_2)
240 pdc_old_disable_66MHz_clock(drive->hwif);
241 return __ide_dma_end(drive);
242}
243
244static int pdc202xx_old_ide_dma_test_irq(ide_drive_t *drive)
245{
246 ide_hwif_t *hwif = HWIF(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 unsigned long high_16 = hwif->dma_master;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100248 u8 dma_stat = inb(hwif->dma_status);
249 u8 sc1d = inb(high_16 + 0x001d);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250
251 if (hwif->channel) {
252 /* bit7: Error, bit6: Interrupting, bit5: FIFO Full, bit4: FIFO Empty */
253 if ((sc1d & 0x50) == 0x50)
254 goto somebody_else;
255 else if ((sc1d & 0x40) == 0x40)
256 return (dma_stat & 4) == 4;
257 } else {
258 /* bit3: Error, bit2: Interrupting, bit1: FIFO Full, bit0: FIFO Empty */
259 if ((sc1d & 0x05) == 0x05)
260 goto somebody_else;
261 else if ((sc1d & 0x04) == 0x04)
262 return (dma_stat & 4) == 4;
263 }
264somebody_else:
265 return (dma_stat & 4) == 4; /* return 1 if INTR asserted */
266}
267
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200268static void pdc202xx_dma_lost_irq(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269{
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200270 ide_hwif_t *hwif = HWIF(drive);
271
272 if (hwif->resetproc != NULL)
273 hwif->resetproc(drive);
274
275 ide_dma_lost_irq(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276}
277
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200278static void pdc202xx_dma_timeout(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279{
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200280 ide_hwif_t *hwif = HWIF(drive);
281
282 if (hwif->resetproc != NULL)
283 hwif->resetproc(drive);
284
285 ide_dma_timeout(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286}
287
288static void pdc202xx_reset_host (ide_hwif_t *hwif)
289{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700290 unsigned long high_16 = hwif->dma_master;
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100291 u8 udma_speed_flag = inb(high_16 | 0x001f);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100293 outb(udma_speed_flag | 0x10, high_16 | 0x001f);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294 mdelay(100);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100295 outb(udma_speed_flag & ~0x10, high_16 | 0x001f);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296 mdelay(2000); /* 2 seconds ?! */
297
298 printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
299 hwif->channel ? "Secondary" : "Primary");
300}
301
302static void pdc202xx_reset (ide_drive_t *drive)
303{
304 ide_hwif_t *hwif = HWIF(drive);
305 ide_hwif_t *mate = hwif->mate;
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200306
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 pdc202xx_reset_host(hwif);
308 pdc202xx_reset_host(mate);
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200309
310 ide_set_max_pio(drive);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311}
312
Alan Cox57e834e2006-06-28 04:27:03 -0700313static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
314 const char *name)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 return dev->irq;
317}
318
319static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
320{
321 struct pci_dev *dev = hwif->pci_dev;
322
323 /* PDC20265 has problems with large LBA48 requests */
324 if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
325 (dev->device == PCI_DEVICE_ID_PROMISE_20265))
326 hwif->rqsize = 256;
327
328 hwif->autodma = 0;
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200329
330 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200331 hwif->set_dma_mode = &pdc202xx_set_mode;
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200332
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 hwif->quirkproc = &pdc202xx_quirkproc;
334
Sergei Shtylyov8b6ebe02006-06-26 00:26:16 -0700335 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 hwif->resetproc = &pdc202xx_reset;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337
Bartlomiej Zolnierkiewicze98d6e52007-08-20 22:42:56 +0200338 hwif->err_stops_fifo = 1;
339
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
341
Bartlomiej Zolnierkiewicze98d6e52007-08-20 22:42:56 +0200342 if (hwif->dma_base == 0)
343 return;
344
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200345 hwif->ultra_mask = hwif->cds->udma_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 hwif->mwdma_mask = 0x07;
347 hwif->swdma_mask = 0x07;
Tobias Oedf3d5b342006-10-03 01:14:17 -0700348 hwif->atapi_dma = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
350 hwif->ide_dma_check = &pdc202xx_config_drive_xfer_rate;
Sergei Shtylyov841d2a92007-07-09 23:17:54 +0200351 hwif->dma_lost_irq = &pdc202xx_dma_lost_irq;
Sergei Shtylyovc283f5d2007-07-09 23:17:54 +0200352 hwif->dma_timeout = &pdc202xx_dma_timeout;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
354 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) {
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200355 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
356 hwif->cbl = pdc202xx_old_cable_detect(hwif);
357
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 hwif->dma_start = &pdc202xx_old_ide_dma_start;
359 hwif->ide_dma_end = &pdc202xx_old_ide_dma_end;
360 }
361 hwif->ide_dma_test_irq = &pdc202xx_old_ide_dma_test_irq;
362
363 if (!noautodma)
364 hwif->autodma = 1;
365 hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366}
367
368static void __devinit init_dma_pdc202xx(ide_hwif_t *hwif, unsigned long dmabase)
369{
370 u8 udma_speed_flag = 0, primary_mode = 0, secondary_mode = 0;
371
372 if (hwif->channel) {
373 ide_setup_dma(hwif, dmabase, 8);
374 return;
375 }
376
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100377 udma_speed_flag = inb(dmabase | 0x1f);
378 primary_mode = inb(dmabase | 0x1a);
379 secondary_mode = inb(dmabase | 0x1b);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 printk(KERN_INFO "%s: (U)DMA Burst Bit %sABLED " \
381 "Primary %s Mode " \
382 "Secondary %s Mode.\n", hwif->cds->name,
383 (udma_speed_flag & 1) ? "EN" : "DIS",
384 (primary_mode & 1) ? "MASTER" : "PCI",
385 (secondary_mode & 1) ? "MASTER" : "PCI" );
386
387#ifdef CONFIG_PDC202XX_BURST
388 if (!(udma_speed_flag & 1)) {
389 printk(KERN_INFO "%s: FORCING BURST BIT 0x%02x->0x%02x ",
390 hwif->cds->name, udma_speed_flag,
391 (udma_speed_flag|1));
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100392 outb(udma_speed_flag | 1, dmabase | 0x1f);
393 printk("%sACTIVE\n", (inb(dmabase | 0x1f) & 1) ? "" : "IN");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394 }
395#endif /* CONFIG_PDC202XX_BURST */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
397 ide_setup_dma(hwif, dmabase, 8);
398}
399
400static int __devinit init_setup_pdc202ata4(struct pci_dev *dev,
401 ide_pci_device_t *d)
402{
403 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE) {
404 u8 irq = 0, irq2 = 0;
405 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
406 /* 0xbc */
407 pci_read_config_byte(dev, (PCI_INTERRUPT_LINE)|0x80, &irq2);
408 if (irq != irq2) {
409 pci_write_config_byte(dev,
410 (PCI_INTERRUPT_LINE)|0x80, irq); /* 0xbc */
411 printk(KERN_INFO "%s: pci-config space interrupt "
412 "mirror fixed.\n", d->name);
413 }
414 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 return ide_setup_pci_device(dev, d);
416}
417
418static int __devinit init_setup_pdc20265(struct pci_dev *dev,
419 ide_pci_device_t *d)
420{
421 if ((dev->bus->self) &&
422 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
423 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) ||
424 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
425 printk(KERN_INFO "ide: Skipping Promise PDC20265 "
426 "attached to I2O RAID controller.\n");
427 return -ENODEV;
428 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429 return ide_setup_pci_device(dev, d);
430}
431
432static int __devinit init_setup_pdc202xx(struct pci_dev *dev,
433 ide_pci_device_t *d)
434{
435 return ide_setup_pci_device(dev, d);
436}
437
438static ide_pci_device_t pdc202xx_chipsets[] __devinitdata = {
439 { /* 0 */
440 .name = "PDC20246",
441 .init_setup = init_setup_pdc202ata4,
442 .init_chipset = init_chipset_pdc202xx,
443 .init_hwif = init_hwif_pdc202xx,
444 .init_dma = init_dma_pdc202xx,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 .autodma = AUTODMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 .bootable = OFF_BOARD,
447 .extra = 16,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200448 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200449 .udma_mask = 0x07, /* udma0-2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450 },{ /* 1 */
451 .name = "PDC20262",
452 .init_setup = init_setup_pdc202ata4,
453 .init_chipset = init_chipset_pdc202xx,
454 .init_hwif = init_hwif_pdc202xx,
455 .init_dma = init_dma_pdc202xx,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 .autodma = AUTODMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 .bootable = OFF_BOARD,
458 .extra = 48,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200459 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200460 .udma_mask = 0x1f, /* udma0-4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 },{ /* 2 */
462 .name = "PDC20263",
463 .init_setup = init_setup_pdc202ata4,
464 .init_chipset = init_chipset_pdc202xx,
465 .init_hwif = init_hwif_pdc202xx,
466 .init_dma = init_dma_pdc202xx,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700467 .autodma = AUTODMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468 .bootable = OFF_BOARD,
469 .extra = 48,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200470 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200471 .udma_mask = 0x1f, /* udma0-4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472 },{ /* 3 */
473 .name = "PDC20265",
474 .init_setup = init_setup_pdc20265,
475 .init_chipset = init_chipset_pdc202xx,
476 .init_hwif = init_hwif_pdc202xx,
477 .init_dma = init_dma_pdc202xx,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 .autodma = AUTODMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 .bootable = OFF_BOARD,
480 .extra = 48,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200481 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200482 .udma_mask = 0x3f, /* udma0-5 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 },{ /* 4 */
484 .name = "PDC20267",
485 .init_setup = init_setup_pdc202xx,
486 .init_chipset = init_chipset_pdc202xx,
487 .init_hwif = init_hwif_pdc202xx,
488 .init_dma = init_dma_pdc202xx,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 .autodma = AUTODMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 .bootable = OFF_BOARD,
491 .extra = 48,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200492 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz18137202007-05-10 00:01:07 +0200493 .udma_mask = 0x3f, /* udma0-5 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494 }
495};
496
497/**
498 * pdc202xx_init_one - called when a PDC202xx is found
499 * @dev: the pdc202xx device
500 * @id: the matching pci id
501 *
502 * Called when the PCI registration layer (or the IDE initialization)
503 * finds a device matching our IDE device tables.
504 */
505
506static int __devinit pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
507{
508 ide_pci_device_t *d = &pdc202xx_chipsets[id->driver_data];
509
510 return d->init_setup(dev, d);
511}
512
513static struct pci_device_id pdc202xx_pci_tbl[] = {
514 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20246, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
515 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20262, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
516 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
517 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20265, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
518 { PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20267, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
519 { 0, },
520};
521MODULE_DEVICE_TABLE(pci, pdc202xx_pci_tbl);
522
523static struct pci_driver driver = {
524 .name = "Promise_Old_IDE",
525 .id_table = pdc202xx_pci_tbl,
526 .probe = pdc202xx_init_one,
527};
528
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100529static int __init pdc202xx_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530{
531 return ide_pci_register_driver(&driver);
532}
533
534module_init(pdc202xx_ide_init);
535
536MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
537MODULE_DESCRIPTION("PCI driver module for older Promise IDE");
538MODULE_LICENSE("GPL");