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Ben Dooks431107e2010-01-26 10:11:04 +09001/* linux/arch/arm/mach-s3c64xx/cpu.c
Ben Dooksa6925c12009-03-24 17:25:40 +00002 *
3 * Copyright 2009 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21#include <linux/serial_core.h>
22#include <linux/platform_device.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
28#include <mach/hardware.h>
29#include <asm/irq.h>
30
31#include <plat/cpu-freq.h>
32#include <plat/regs-serial.h>
Ben Dooks496a3f02009-05-02 13:48:53 +010033#include <plat/regs-clock.h>
Ben Dooksa6925c12009-03-24 17:25:40 +000034
35#include <plat/cpu.h>
36#include <plat/devs.h>
37#include <plat/clock.h>
38#include <plat/sdhci.h>
39#include <plat/iic-core.h>
40#include <plat/s3c6400.h>
41
42void __init s3c6400_map_io(void)
43{
Ben Dooks4faf68672009-03-25 11:01:24 +000044 /* setup SDHCI */
45
46 s3c6400_default_sdhci0();
47 s3c6400_default_sdhci1();
Maurus Cuelenaere92b118f2009-11-23 13:34:46 +010048 s3c6400_default_sdhci2();
Ben Dooks4faf68672009-03-25 11:01:24 +000049
50 /* the i2c devices are directly compatible with s3c2440 */
Ben Dooksa6925c12009-03-24 17:25:40 +000051 s3c_i2c0_setname("s3c2440-i2c");
Peter Korsgaard14077ea2009-07-01 17:47:06 +020052
53 s3c_device_nand.name = "s3c6400-nand";
Ben Dooksa6925c12009-03-24 17:25:40 +000054}
55
56void __init s3c6400_init_clocks(int xtal)
57{
58 printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
59 s3c24xx_register_baseclocks(xtal);
60 s3c64xx_register_clocks();
Ben Dooks496a3f02009-05-02 13:48:53 +010061 s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK);
Ben Dooksa6925c12009-03-24 17:25:40 +000062 s3c6400_setup_clocks();
63}
64
65void __init s3c6400_init_irq(void)
66{
67 /* VIC0 does not have IRQS 5..7,
68 * VIC1 is fully populated. */
69 s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
70}
71
72struct sysdev_class s3c6400_sysclass = {
73 .name = "s3c6400-core",
74};
75
76static struct sys_device s3c6400_sysdev = {
77 .cls = &s3c6400_sysclass,
78};
79
80static int __init s3c6400_core_init(void)
81{
82 return sysdev_class_register(&s3c6400_sysclass);
83}
84
85core_initcall(s3c6400_core_init);
86
87int __init s3c6400_init(void)
88{
89 printk("S3C6400: Initialising architecture\n");
90
91 return sysdev_register(&s3c6400_sysdev);
92}