Ben Dooks | 431107e | 2010-01-26 10:11:04 +0900 | [diff] [blame^] | 1 | /* linux/arch/arm/mach-s3c64xx/cpu.c |
Ben Dooks | a6925c1 | 2009-03-24 17:25:40 +0000 | [diff] [blame] | 2 | * |
| 3 | * Copyright 2009 Simtec Electronics |
| 4 | * Ben Dooks <ben@simtec.co.uk> |
| 5 | * http://armlinux.simtec.co.uk/ |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/list.h> |
| 16 | #include <linux/timer.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/clk.h> |
| 19 | #include <linux/io.h> |
| 20 | #include <linux/sysdev.h> |
| 21 | #include <linux/serial_core.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | |
| 24 | #include <asm/mach/arch.h> |
| 25 | #include <asm/mach/map.h> |
| 26 | #include <asm/mach/irq.h> |
| 27 | |
| 28 | #include <mach/hardware.h> |
| 29 | #include <asm/irq.h> |
| 30 | |
| 31 | #include <plat/cpu-freq.h> |
| 32 | #include <plat/regs-serial.h> |
Ben Dooks | 496a3f0 | 2009-05-02 13:48:53 +0100 | [diff] [blame] | 33 | #include <plat/regs-clock.h> |
Ben Dooks | a6925c1 | 2009-03-24 17:25:40 +0000 | [diff] [blame] | 34 | |
| 35 | #include <plat/cpu.h> |
| 36 | #include <plat/devs.h> |
| 37 | #include <plat/clock.h> |
| 38 | #include <plat/sdhci.h> |
| 39 | #include <plat/iic-core.h> |
| 40 | #include <plat/s3c6400.h> |
| 41 | |
| 42 | void __init s3c6400_map_io(void) |
| 43 | { |
Ben Dooks | 4faf6867 | 2009-03-25 11:01:24 +0000 | [diff] [blame] | 44 | /* setup SDHCI */ |
| 45 | |
| 46 | s3c6400_default_sdhci0(); |
| 47 | s3c6400_default_sdhci1(); |
Maurus Cuelenaere | 92b118f | 2009-11-23 13:34:46 +0100 | [diff] [blame] | 48 | s3c6400_default_sdhci2(); |
Ben Dooks | 4faf6867 | 2009-03-25 11:01:24 +0000 | [diff] [blame] | 49 | |
| 50 | /* the i2c devices are directly compatible with s3c2440 */ |
Ben Dooks | a6925c1 | 2009-03-24 17:25:40 +0000 | [diff] [blame] | 51 | s3c_i2c0_setname("s3c2440-i2c"); |
Peter Korsgaard | 14077ea | 2009-07-01 17:47:06 +0200 | [diff] [blame] | 52 | |
| 53 | s3c_device_nand.name = "s3c6400-nand"; |
Ben Dooks | a6925c1 | 2009-03-24 17:25:40 +0000 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | void __init s3c6400_init_clocks(int xtal) |
| 57 | { |
| 58 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
| 59 | s3c24xx_register_baseclocks(xtal); |
| 60 | s3c64xx_register_clocks(); |
Ben Dooks | 496a3f0 | 2009-05-02 13:48:53 +0100 | [diff] [blame] | 61 | s3c6400_register_clocks(S3C6400_CLKDIV0_ARM_MASK); |
Ben Dooks | a6925c1 | 2009-03-24 17:25:40 +0000 | [diff] [blame] | 62 | s3c6400_setup_clocks(); |
| 63 | } |
| 64 | |
| 65 | void __init s3c6400_init_irq(void) |
| 66 | { |
| 67 | /* VIC0 does not have IRQS 5..7, |
| 68 | * VIC1 is fully populated. */ |
| 69 | s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); |
| 70 | } |
| 71 | |
| 72 | struct sysdev_class s3c6400_sysclass = { |
| 73 | .name = "s3c6400-core", |
| 74 | }; |
| 75 | |
| 76 | static struct sys_device s3c6400_sysdev = { |
| 77 | .cls = &s3c6400_sysclass, |
| 78 | }; |
| 79 | |
| 80 | static int __init s3c6400_core_init(void) |
| 81 | { |
| 82 | return sysdev_class_register(&s3c6400_sysclass); |
| 83 | } |
| 84 | |
| 85 | core_initcall(s3c6400_core_init); |
| 86 | |
| 87 | int __init s3c6400_init(void) |
| 88 | { |
| 89 | printk("S3C6400: Initialising architecture\n"); |
| 90 | |
| 91 | return sysdev_register(&s3c6400_sysdev); |
| 92 | } |