blob: cec01f15e5791d3dd934982da5a48a0bc24be61f [file] [log] [blame]
Kiran Kandi3426e512011-09-13 22:50:10 -07001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#include <linux/module.h>
13#include <linux/init.h>
Bradley Rubin229c6a52011-07-12 16:18:48 -070014#include <linux/firmware.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070015#include <linux/slab.h>
16#include <linux/platform_device.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053017#include <linux/device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/printk.h>
19#include <linux/ratelimit.h>
Bradley Rubincb3950a2011-08-18 13:07:26 -070020#include <linux/debugfs.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070021#include <linux/mfd/wcd9310/core.h>
22#include <linux/mfd/wcd9310/registers.h>
Patrick Lai3043fba2011-08-01 14:15:57 -070023#include <linux/mfd/wcd9310/pdata.h>
Santosh Mardie15e2302011-11-15 10:39:23 +053024#include <sound/pcm.h>
25#include <sound/pcm_params.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <sound/jack.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/tlv.h>
30#include <linux/bitops.h>
31#include <linux/delay.h>
32#include "wcd9310.h"
33
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070034#define WCD9310_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
35 SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
36
37#define NUM_DECIMATORS 10
38#define NUM_INTERPOLATORS 7
39#define BITS_PER_REG 8
40#define TABLA_RX_DAI_ID 1
41#define TABLA_TX_DAI_ID 2
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080042#define TABLA_CFILT_FAST_MODE 0x00
43#define TABLA_CFILT_SLOW_MODE 0x40
Patrick Lai64b43262011-12-06 17:29:15 -080044#define MBHC_FW_READ_ATTEMPTS 15
45#define MBHC_FW_READ_TIMEOUT 2000000
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -070046
Patrick Lai49efeac2011-11-03 11:01:12 -070047#define TABLA_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
48
Santosh Mardie15e2302011-11-15 10:39:23 +053049#define TABLA_I2S_MASTER_MODE_MASK 0x08
50
Patrick Laic7cae882011-11-18 11:52:49 -080051#define TABLA_OCP_ATTEMPT 1
52
Joonwoo Park0976d012011-12-22 11:48:18 -080053#define TABLA_MCLK_RATE_12288KHZ 12288000
54#define TABLA_MCLK_RATE_9600KHZ 9600000
55
Joonwoo Parkf4267c22012-01-10 13:25:24 -080056#define TABLA_FAKE_INS_THRESHOLD_MS 2500
57
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
59static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
60static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
61
62enum tabla_bandgap_type {
63 TABLA_BANDGAP_OFF = 0,
64 TABLA_BANDGAP_AUDIO_MODE,
65 TABLA_BANDGAP_MBHC_MODE,
66};
67
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070068struct mbhc_micbias_regs {
69 u16 cfilt_val;
70 u16 cfilt_ctl;
71 u16 mbhc_reg;
72 u16 int_rbias;
73 u16 ctl_reg;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -080074 u8 cfilt_sel;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -070075};
76
Ben Romberger1f045a72011-11-04 10:14:57 -070077/* Codec supports 2 IIR filters */
78enum {
79 IIR1 = 0,
80 IIR2,
81 IIR_MAX,
82};
83/* Codec supports 5 bands */
84enum {
85 BAND1 = 0,
86 BAND2,
87 BAND3,
88 BAND4,
89 BAND5,
90 BAND_MAX,
91};
92
Joonwoo Parka9444452011-12-08 18:48:27 -080093/* Flags to track of PA and DAC state.
94 * PA and DAC should be tracked separately as AUXPGA loopback requires
95 * only PA to be turned on without DAC being on. */
96enum tabla_priv_ack_flags {
97 TABLA_HPHL_PA_OFF_ACK = 0,
98 TABLA_HPHR_PA_OFF_ACK,
99 TABLA_HPHL_DAC_OFF_ACK,
100 TABLA_HPHR_DAC_OFF_ACK
101};
102
Joonwoo Park0976d012011-12-22 11:48:18 -0800103/* Data used by MBHC */
104struct mbhc_internal_cal_data {
105 u16 dce_z;
106 u16 dce_mb;
107 u16 sta_z;
108 u16 sta_mb;
Joonwoo Park433149a2012-01-11 09:53:54 -0800109 u32 t_sta_dce;
Joonwoo Park0976d012011-12-22 11:48:18 -0800110 u32 t_dce;
111 u32 t_sta;
112 u32 micb_mv;
113 u16 v_ins_hu;
114 u16 v_ins_h;
115 u16 v_b1_hu;
116 u16 v_b1_h;
117 u16 v_b1_huc;
118 u16 v_brh;
119 u16 v_brl;
120 u16 v_no_mic;
121 u8 nready;
122 u8 npoll;
123 u8 nbounce_wait;
124};
125
Bradley Rubin229c6a52011-07-12 16:18:48 -0700126struct tabla_priv {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700127 struct snd_soc_codec *codec;
Joonwoo Park0976d012011-12-22 11:48:18 -0800128 u32 mclk_freq;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129 u32 adc_count;
Patrick Lai3043fba2011-08-01 14:15:57 -0700130 u32 cfilt1_cnt;
131 u32 cfilt2_cnt;
132 u32 cfilt3_cnt;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700133 u32 rx_bias_count;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700134 enum tabla_bandgap_type bandgap_type;
Kiran Kandi6fae8bf2011-08-15 10:36:42 -0700135 bool mclk_enabled;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136 bool clock_active;
137 bool config_mode_active;
138 bool mbhc_polling_active;
Joonwoo Parkf4267c22012-01-10 13:25:24 -0800139 unsigned long mbhc_fake_ins_start;
Bradley Rubincb1e2732011-06-23 16:49:20 -0700140 int buttons_pressed;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700141
Joonwoo Park0976d012011-12-22 11:48:18 -0800142 enum tabla_micbias_num micbias;
143 /* void* calibration contains:
144 * struct tabla_mbhc_general_cfg generic;
145 * struct tabla_mbhc_plug_detect_cfg plug_det;
146 * struct tabla_mbhc_plug_type_cfg plug_type;
147 * struct tabla_mbhc_btn_detect_cfg btn_det;
148 * struct tabla_mbhc_imped_detect_cfg imped_det;
149 * Note: various size depends on btn_det->num_btn
150 */
151 void *calibration;
152 struct mbhc_internal_cal_data mbhc_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700153
Bradley Rubincb1e2732011-06-23 16:49:20 -0700154 struct snd_soc_jack *headset_jack;
155 struct snd_soc_jack *button_jack;
Bradley Rubin229c6a52011-07-12 16:18:48 -0700156
Patrick Lai3043fba2011-08-01 14:15:57 -0700157 struct tabla_pdata *pdata;
Bradley Rubina7096d02011-08-03 18:29:02 -0700158 u32 anc_slot;
Bradley Rubincb3950a2011-08-18 13:07:26 -0700159
160 bool no_mic_headset_override;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -0700161 /* Delayed work to report long button press */
162 struct delayed_work btn0_dwork;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -0700163
164 struct mbhc_micbias_regs mbhc_bias_regs;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -0700165 u8 cfilt_k_value;
166 bool mbhc_micbias_switched;
Patrick Lai49efeac2011-11-03 11:01:12 -0700167
Joonwoo Parka9444452011-12-08 18:48:27 -0800168 /* track PA/DAC state */
169 unsigned long hph_pa_dac_state;
170
Santosh Mardie15e2302011-11-15 10:39:23 +0530171 /*track tabla interface type*/
172 u8 intf_type;
173
Patrick Lai49efeac2011-11-03 11:01:12 -0700174 u32 hph_status; /* track headhpone status */
175 /* define separate work for left and right headphone OCP to avoid
176 * additional checking on which OCP event to report so no locking
177 * to ensure synchronization is required
178 */
179 struct work_struct hphlocp_work; /* reporting left hph ocp off */
180 struct work_struct hphrocp_work; /* reporting right hph ocp off */
Joonwoo Park8b1f0982011-12-08 17:12:45 -0800181
182 /* pm_cnt holds number of sleep lock holders + 1
183 * so if pm_cnt is 1 system is sleep-able. */
184 atomic_t pm_cnt;
185 wait_queue_head_t pm_wq;
Patrick Laic7cae882011-11-18 11:52:49 -0800186
187 u8 hphlocp_cnt; /* headphone left ocp retry */
188 u8 hphrocp_cnt; /* headphone right ocp retry */
Joonwoo Park0976d012011-12-22 11:48:18 -0800189
190 /* Callback function to enable MCLK */
191 int (*mclk_cb) (struct snd_soc_codec*, int);
Patrick Lai64b43262011-12-06 17:29:15 -0800192
193 /* Work to perform MBHC Firmware Read */
194 struct delayed_work mbhc_firmware_dwork;
195 const struct firmware *mbhc_fw;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700196};
197
Bradley Rubincb3950a2011-08-18 13:07:26 -0700198#ifdef CONFIG_DEBUG_FS
199struct tabla_priv *debug_tabla_priv;
200#endif
201
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700202static int tabla_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
203 struct snd_kcontrol *kcontrol, int event)
204{
205 struct snd_soc_codec *codec = w->codec;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700206
207 pr_debug("%s %d\n", __func__, event);
208 switch (event) {
209 case SND_SOC_DAPM_POST_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700210 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
211 0x01);
212 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x08);
213 usleep_range(200, 200);
214 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x00);
215 break;
216 case SND_SOC_DAPM_PRE_PMD:
217 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_RESET_CTL, 0x10,
218 0x10);
219 usleep_range(20, 20);
220 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x08);
221 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x10, 0x10);
222 snd_soc_update_bits(codec, TABLA_A_CDC_CLSG_CTL, 0x08, 0x00);
223 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x01,
224 0x00);
225 snd_soc_update_bits(codec, TABLA_A_CP_STATIC, 0x08, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700226 break;
227 }
228 return 0;
229}
230
Bradley Rubina7096d02011-08-03 18:29:02 -0700231static int tabla_get_anc_slot(struct snd_kcontrol *kcontrol,
232 struct snd_ctl_elem_value *ucontrol)
233{
234 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
235 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
236 ucontrol->value.integer.value[0] = tabla->anc_slot;
237 return 0;
238}
239
240static int tabla_put_anc_slot(struct snd_kcontrol *kcontrol,
241 struct snd_ctl_elem_value *ucontrol)
242{
243 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
244 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
245 tabla->anc_slot = ucontrol->value.integer.value[0];
246 return 0;
247}
248
Kiran Kandid2d86b52011-09-09 17:44:28 -0700249static int tabla_pa_gain_get(struct snd_kcontrol *kcontrol,
250 struct snd_ctl_elem_value *ucontrol)
251{
252 u8 ear_pa_gain;
253 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
254
255 ear_pa_gain = snd_soc_read(codec, TABLA_A_RX_EAR_GAIN);
256
257 ear_pa_gain = ear_pa_gain >> 5;
258
259 if (ear_pa_gain == 0x00) {
260 ucontrol->value.integer.value[0] = 0;
261 } else if (ear_pa_gain == 0x04) {
262 ucontrol->value.integer.value[0] = 1;
263 } else {
264 pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
265 __func__, ear_pa_gain);
266 return -EINVAL;
267 }
268
269 pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
270
271 return 0;
272}
273
274static int tabla_pa_gain_put(struct snd_kcontrol *kcontrol,
275 struct snd_ctl_elem_value *ucontrol)
276{
277 u8 ear_pa_gain;
278 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
279
280 pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
281 ucontrol->value.integer.value[0]);
282
283 switch (ucontrol->value.integer.value[0]) {
284 case 0:
285 ear_pa_gain = 0x00;
286 break;
287 case 1:
288 ear_pa_gain = 0x80;
289 break;
290 default:
291 return -EINVAL;
292 }
293
294 snd_soc_update_bits(codec, TABLA_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
295 return 0;
296}
297
Ben Romberger1f045a72011-11-04 10:14:57 -0700298static int tabla_get_iir_enable_audio_mixer(
299 struct snd_kcontrol *kcontrol,
300 struct snd_ctl_elem_value *ucontrol)
301{
302 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
303 int iir_idx = ((struct soc_multi_mixer_control *)
304 kcontrol->private_value)->reg;
305 int band_idx = ((struct soc_multi_mixer_control *)
306 kcontrol->private_value)->shift;
307
308 ucontrol->value.integer.value[0] =
309 snd_soc_read(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx)) &
310 (1 << band_idx);
311
312 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
313 iir_idx, band_idx,
314 (uint32_t)ucontrol->value.integer.value[0]);
315 return 0;
316}
317
318static int tabla_put_iir_enable_audio_mixer(
319 struct snd_kcontrol *kcontrol,
320 struct snd_ctl_elem_value *ucontrol)
321{
322 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
323 int iir_idx = ((struct soc_multi_mixer_control *)
324 kcontrol->private_value)->reg;
325 int band_idx = ((struct soc_multi_mixer_control *)
326 kcontrol->private_value)->shift;
327 int value = ucontrol->value.integer.value[0];
328
329 /* Mask first 5 bits, 6-8 are reserved */
330 snd_soc_update_bits(codec, (TABLA_A_CDC_IIR1_CTL + 16 * iir_idx),
331 (1 << band_idx), (value << band_idx));
332
333 pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
334 iir_idx, band_idx, value);
335 return 0;
336}
337static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
338 int iir_idx, int band_idx,
339 int coeff_idx)
340{
341 /* Address does not automatically update if reading */
342 snd_soc_update_bits(codec,
343 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
344 0x1F, band_idx * BAND_MAX + coeff_idx);
345
346 /* Mask bits top 2 bits since they are reserved */
347 return ((snd_soc_read(codec,
348 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
349 (snd_soc_read(codec,
350 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
351 (snd_soc_read(codec,
352 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
353 (snd_soc_read(codec,
354 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
355 0x3FFFFFFF;
356}
357
358static int tabla_get_iir_band_audio_mixer(
359 struct snd_kcontrol *kcontrol,
360 struct snd_ctl_elem_value *ucontrol)
361{
362 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
363 int iir_idx = ((struct soc_multi_mixer_control *)
364 kcontrol->private_value)->reg;
365 int band_idx = ((struct soc_multi_mixer_control *)
366 kcontrol->private_value)->shift;
367
368 ucontrol->value.integer.value[0] =
369 get_iir_band_coeff(codec, iir_idx, band_idx, 0);
370 ucontrol->value.integer.value[1] =
371 get_iir_band_coeff(codec, iir_idx, band_idx, 1);
372 ucontrol->value.integer.value[2] =
373 get_iir_band_coeff(codec, iir_idx, band_idx, 2);
374 ucontrol->value.integer.value[3] =
375 get_iir_band_coeff(codec, iir_idx, band_idx, 3);
376 ucontrol->value.integer.value[4] =
377 get_iir_band_coeff(codec, iir_idx, band_idx, 4);
378
379 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
380 "%s: IIR #%d band #%d b1 = 0x%x\n"
381 "%s: IIR #%d band #%d b2 = 0x%x\n"
382 "%s: IIR #%d band #%d a1 = 0x%x\n"
383 "%s: IIR #%d band #%d a2 = 0x%x\n",
384 __func__, iir_idx, band_idx,
385 (uint32_t)ucontrol->value.integer.value[0],
386 __func__, iir_idx, band_idx,
387 (uint32_t)ucontrol->value.integer.value[1],
388 __func__, iir_idx, band_idx,
389 (uint32_t)ucontrol->value.integer.value[2],
390 __func__, iir_idx, band_idx,
391 (uint32_t)ucontrol->value.integer.value[3],
392 __func__, iir_idx, band_idx,
393 (uint32_t)ucontrol->value.integer.value[4]);
394 return 0;
395}
396
397static void set_iir_band_coeff(struct snd_soc_codec *codec,
398 int iir_idx, int band_idx,
399 int coeff_idx, uint32_t value)
400{
401 /* Mask top 3 bits, 6-8 are reserved */
402 /* Update address manually each time */
403 snd_soc_update_bits(codec,
404 (TABLA_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
405 0x1F, band_idx * BAND_MAX + coeff_idx);
406
407 /* Mask top 2 bits, 7-8 are reserved */
408 snd_soc_update_bits(codec,
409 (TABLA_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
410 0x3F, (value >> 24) & 0x3F);
411
412 /* Isolate 8bits at a time */
413 snd_soc_update_bits(codec,
414 (TABLA_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
415 0xFF, (value >> 16) & 0xFF);
416
417 snd_soc_update_bits(codec,
418 (TABLA_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
419 0xFF, (value >> 8) & 0xFF);
420
421 snd_soc_update_bits(codec,
422 (TABLA_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
423 0xFF, value & 0xFF);
424}
425
426static int tabla_put_iir_band_audio_mixer(
427 struct snd_kcontrol *kcontrol,
428 struct snd_ctl_elem_value *ucontrol)
429{
430 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
431 int iir_idx = ((struct soc_multi_mixer_control *)
432 kcontrol->private_value)->reg;
433 int band_idx = ((struct soc_multi_mixer_control *)
434 kcontrol->private_value)->shift;
435
436 set_iir_band_coeff(codec, iir_idx, band_idx, 0,
437 ucontrol->value.integer.value[0]);
438 set_iir_band_coeff(codec, iir_idx, band_idx, 1,
439 ucontrol->value.integer.value[1]);
440 set_iir_band_coeff(codec, iir_idx, band_idx, 2,
441 ucontrol->value.integer.value[2]);
442 set_iir_band_coeff(codec, iir_idx, band_idx, 3,
443 ucontrol->value.integer.value[3]);
444 set_iir_band_coeff(codec, iir_idx, band_idx, 4,
445 ucontrol->value.integer.value[4]);
446
447 pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
448 "%s: IIR #%d band #%d b1 = 0x%x\n"
449 "%s: IIR #%d band #%d b2 = 0x%x\n"
450 "%s: IIR #%d band #%d a1 = 0x%x\n"
451 "%s: IIR #%d band #%d a2 = 0x%x\n",
452 __func__, iir_idx, band_idx,
453 get_iir_band_coeff(codec, iir_idx, band_idx, 0),
454 __func__, iir_idx, band_idx,
455 get_iir_band_coeff(codec, iir_idx, band_idx, 1),
456 __func__, iir_idx, band_idx,
457 get_iir_band_coeff(codec, iir_idx, band_idx, 2),
458 __func__, iir_idx, band_idx,
459 get_iir_band_coeff(codec, iir_idx, band_idx, 3),
460 __func__, iir_idx, band_idx,
461 get_iir_band_coeff(codec, iir_idx, band_idx, 4));
462 return 0;
463}
464
Kiran Kandid2d86b52011-09-09 17:44:28 -0700465static const char *tabla_ear_pa_gain_text[] = {"POS_6_DB", "POS_2_DB"};
466static const struct soc_enum tabla_ear_pa_gain_enum[] = {
467 SOC_ENUM_SINGLE_EXT(2, tabla_ear_pa_gain_text),
468};
469
Santosh Mardi024010f2011-10-18 06:27:21 +0530470/*cut of frequency for high pass filter*/
471static const char *cf_text[] = {
472 "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
473};
474
475static const struct soc_enum cf_dec1_enum =
476 SOC_ENUM_SINGLE(TABLA_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
477
478static const struct soc_enum cf_dec2_enum =
479 SOC_ENUM_SINGLE(TABLA_A_CDC_TX2_MUX_CTL, 4, 3, cf_text);
480
481static const struct soc_enum cf_dec3_enum =
482 SOC_ENUM_SINGLE(TABLA_A_CDC_TX3_MUX_CTL, 4, 3, cf_text);
483
484static const struct soc_enum cf_dec4_enum =
485 SOC_ENUM_SINGLE(TABLA_A_CDC_TX4_MUX_CTL, 4, 3, cf_text);
486
487static const struct soc_enum cf_dec5_enum =
488 SOC_ENUM_SINGLE(TABLA_A_CDC_TX5_MUX_CTL, 4, 3, cf_text);
489
490static const struct soc_enum cf_dec6_enum =
491 SOC_ENUM_SINGLE(TABLA_A_CDC_TX6_MUX_CTL, 4, 3, cf_text);
492
493static const struct soc_enum cf_dec7_enum =
494 SOC_ENUM_SINGLE(TABLA_A_CDC_TX7_MUX_CTL, 4, 3, cf_text);
495
496static const struct soc_enum cf_dec8_enum =
497 SOC_ENUM_SINGLE(TABLA_A_CDC_TX8_MUX_CTL, 4, 3, cf_text);
498
499static const struct soc_enum cf_dec9_enum =
500 SOC_ENUM_SINGLE(TABLA_A_CDC_TX9_MUX_CTL, 4, 3, cf_text);
501
502static const struct soc_enum cf_dec10_enum =
503 SOC_ENUM_SINGLE(TABLA_A_CDC_TX10_MUX_CTL, 4, 3, cf_text);
504
505static const struct soc_enum cf_rxmix1_enum =
506 SOC_ENUM_SINGLE(TABLA_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
507
508static const struct soc_enum cf_rxmix2_enum =
509 SOC_ENUM_SINGLE(TABLA_A_CDC_RX2_B4_CTL, 1, 3, cf_text);
510
511static const struct soc_enum cf_rxmix3_enum =
512 SOC_ENUM_SINGLE(TABLA_A_CDC_RX3_B4_CTL, 1, 3, cf_text);
513
514static const struct soc_enum cf_rxmix4_enum =
515 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B4_CTL, 1, 3, cf_text);
516
517static const struct soc_enum cf_rxmix5_enum =
518 SOC_ENUM_SINGLE(TABLA_A_CDC_RX5_B4_CTL, 1, 3, cf_text)
519;
520static const struct soc_enum cf_rxmix6_enum =
521 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B4_CTL, 1, 3, cf_text);
522
523static const struct soc_enum cf_rxmix7_enum =
524 SOC_ENUM_SINGLE(TABLA_A_CDC_RX7_B4_CTL, 1, 3, cf_text);
525
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700526static const struct snd_kcontrol_new tabla_snd_controls[] = {
Kiran Kandid2d86b52011-09-09 17:44:28 -0700527
528 SOC_ENUM_EXT("EAR PA Gain", tabla_ear_pa_gain_enum[0],
529 tabla_pa_gain_get, tabla_pa_gain_put),
530
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700531 SOC_SINGLE_TLV("LINEOUT1 Volume", TABLA_A_RX_LINE_1_GAIN, 0, 12, 1,
532 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700533 SOC_SINGLE_TLV("LINEOUT2 Volume", TABLA_A_RX_LINE_2_GAIN, 0, 12, 1,
534 line_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700535 SOC_SINGLE_TLV("LINEOUT3 Volume", TABLA_A_RX_LINE_3_GAIN, 0, 12, 1,
536 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700537 SOC_SINGLE_TLV("LINEOUT4 Volume", TABLA_A_RX_LINE_4_GAIN, 0, 12, 1,
538 line_gain),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700539 SOC_SINGLE_TLV("LINEOUT5 Volume", TABLA_A_RX_LINE_5_GAIN, 0, 12, 1,
540 line_gain),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700541
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700542 SOC_SINGLE_TLV("HPHL Volume", TABLA_A_RX_HPH_L_GAIN, 0, 12, 1,
543 line_gain),
544 SOC_SINGLE_TLV("HPHR Volume", TABLA_A_RX_HPH_R_GAIN, 0, 12, 1,
545 line_gain),
546
Bradley Rubin410383f2011-07-22 13:44:23 -0700547 SOC_SINGLE_S8_TLV("RX1 Digital Volume", TABLA_A_CDC_RX1_VOL_CTL_B2_CTL,
548 -84, 40, digital_gain),
549 SOC_SINGLE_S8_TLV("RX2 Digital Volume", TABLA_A_CDC_RX2_VOL_CTL_B2_CTL,
550 -84, 40, digital_gain),
551 SOC_SINGLE_S8_TLV("RX3 Digital Volume", TABLA_A_CDC_RX3_VOL_CTL_B2_CTL,
552 -84, 40, digital_gain),
553 SOC_SINGLE_S8_TLV("RX4 Digital Volume", TABLA_A_CDC_RX4_VOL_CTL_B2_CTL,
554 -84, 40, digital_gain),
555 SOC_SINGLE_S8_TLV("RX5 Digital Volume", TABLA_A_CDC_RX5_VOL_CTL_B2_CTL,
556 -84, 40, digital_gain),
557 SOC_SINGLE_S8_TLV("RX6 Digital Volume", TABLA_A_CDC_RX6_VOL_CTL_B2_CTL,
558 -84, 40, digital_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700559
Bradley Rubin410383f2011-07-22 13:44:23 -0700560 SOC_SINGLE_S8_TLV("DEC1 Volume", TABLA_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700561 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700562 SOC_SINGLE_S8_TLV("DEC2 Volume", TABLA_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700563 digital_gain),
Bradley Rubin410383f2011-07-22 13:44:23 -0700564 SOC_SINGLE_S8_TLV("DEC3 Volume", TABLA_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
565 digital_gain),
566 SOC_SINGLE_S8_TLV("DEC4 Volume", TABLA_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
567 digital_gain),
568 SOC_SINGLE_S8_TLV("DEC5 Volume", TABLA_A_CDC_TX5_VOL_CTL_GAIN, -84, 40,
569 digital_gain),
570 SOC_SINGLE_S8_TLV("DEC6 Volume", TABLA_A_CDC_TX6_VOL_CTL_GAIN, -84, 40,
571 digital_gain),
572 SOC_SINGLE_S8_TLV("DEC7 Volume", TABLA_A_CDC_TX7_VOL_CTL_GAIN, -84, 40,
573 digital_gain),
574 SOC_SINGLE_S8_TLV("DEC8 Volume", TABLA_A_CDC_TX8_VOL_CTL_GAIN, -84, 40,
575 digital_gain),
576 SOC_SINGLE_S8_TLV("DEC9 Volume", TABLA_A_CDC_TX9_VOL_CTL_GAIN, -84, 40,
577 digital_gain),
578 SOC_SINGLE_S8_TLV("DEC10 Volume", TABLA_A_CDC_TX10_VOL_CTL_GAIN, -84,
579 40, digital_gain),
Patrick Lai29006372011-09-28 17:57:42 -0700580 SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", TABLA_A_CDC_IIR1_GAIN_B1_CTL, -84,
581 40, digital_gain),
582 SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", TABLA_A_CDC_IIR1_GAIN_B2_CTL, -84,
583 40, digital_gain),
584 SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", TABLA_A_CDC_IIR1_GAIN_B3_CTL, -84,
585 40, digital_gain),
586 SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", TABLA_A_CDC_IIR1_GAIN_B4_CTL, -84,
587 40, digital_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700588 SOC_SINGLE_TLV("ADC1 Volume", TABLA_A_TX_1_2_EN, 5, 3, 0, analog_gain),
589 SOC_SINGLE_TLV("ADC2 Volume", TABLA_A_TX_1_2_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700590 SOC_SINGLE_TLV("ADC3 Volume", TABLA_A_TX_3_4_EN, 5, 3, 0, analog_gain),
591 SOC_SINGLE_TLV("ADC4 Volume", TABLA_A_TX_3_4_EN, 1, 3, 0, analog_gain),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700592 SOC_SINGLE_TLV("ADC5 Volume", TABLA_A_TX_5_6_EN, 5, 3, 0, analog_gain),
593 SOC_SINGLE_TLV("ADC6 Volume", TABLA_A_TX_5_6_EN, 1, 3, 0, analog_gain),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700594
595 SOC_SINGLE("MICBIAS1 CAPLESS Switch", TABLA_A_MICB_1_CTL, 4, 1, 1),
Santosh Mardi680b41e2011-11-22 16:51:16 -0800596 SOC_SINGLE("MICBIAS2 CAPLESS Switch", TABLA_A_MICB_2_CTL, 4, 1, 1),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700597 SOC_SINGLE("MICBIAS3 CAPLESS Switch", TABLA_A_MICB_3_CTL, 4, 1, 1),
598 SOC_SINGLE("MICBIAS4 CAPLESS Switch", TABLA_A_MICB_4_CTL, 4, 1, 1),
Bradley Rubina7096d02011-08-03 18:29:02 -0700599
600 SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, tabla_get_anc_slot,
601 tabla_put_anc_slot),
Santosh Mardi024010f2011-10-18 06:27:21 +0530602 SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
603 SOC_ENUM("TX2 HPF cut off", cf_dec2_enum),
604 SOC_ENUM("TX3 HPF cut off", cf_dec3_enum),
605 SOC_ENUM("TX4 HPF cut off", cf_dec4_enum),
606 SOC_ENUM("TX5 HPF cut off", cf_dec5_enum),
607 SOC_ENUM("TX6 HPF cut off", cf_dec6_enum),
608 SOC_ENUM("TX7 HPF cut off", cf_dec7_enum),
609 SOC_ENUM("TX8 HPF cut off", cf_dec8_enum),
610 SOC_ENUM("TX9 HPF cut off", cf_dec9_enum),
611 SOC_ENUM("TX10 HPF cut off", cf_dec10_enum),
612
613 SOC_SINGLE("TX1 HPF Switch", TABLA_A_CDC_TX1_MUX_CTL, 3, 1, 0),
614 SOC_SINGLE("TX2 HPF Switch", TABLA_A_CDC_TX2_MUX_CTL, 3, 1, 0),
615 SOC_SINGLE("TX3 HPF Switch", TABLA_A_CDC_TX3_MUX_CTL, 3, 1, 0),
616 SOC_SINGLE("TX4 HPF Switch", TABLA_A_CDC_TX4_MUX_CTL, 3, 1, 0),
617 SOC_SINGLE("TX5 HPF Switch", TABLA_A_CDC_TX5_MUX_CTL, 3, 1, 0),
618 SOC_SINGLE("TX6 HPF Switch", TABLA_A_CDC_TX6_MUX_CTL, 3, 1, 0),
619 SOC_SINGLE("TX7 HPF Switch", TABLA_A_CDC_TX7_MUX_CTL, 3, 1, 0),
620 SOC_SINGLE("TX8 HPF Switch", TABLA_A_CDC_TX8_MUX_CTL, 3, 1, 0),
621 SOC_SINGLE("TX9 HPF Switch", TABLA_A_CDC_TX9_MUX_CTL, 3, 1, 0),
622 SOC_SINGLE("TX10 HPF Switch", TABLA_A_CDC_TX10_MUX_CTL, 3, 1, 0),
623
624 SOC_SINGLE("RX1 HPF Switch", TABLA_A_CDC_RX1_B5_CTL, 2, 1, 0),
625 SOC_SINGLE("RX2 HPF Switch", TABLA_A_CDC_RX2_B5_CTL, 2, 1, 0),
626 SOC_SINGLE("RX3 HPF Switch", TABLA_A_CDC_RX3_B5_CTL, 2, 1, 0),
627 SOC_SINGLE("RX4 HPF Switch", TABLA_A_CDC_RX4_B5_CTL, 2, 1, 0),
628 SOC_SINGLE("RX5 HPF Switch", TABLA_A_CDC_RX5_B5_CTL, 2, 1, 0),
629 SOC_SINGLE("RX6 HPF Switch", TABLA_A_CDC_RX6_B5_CTL, 2, 1, 0),
630 SOC_SINGLE("RX7 HPF Switch", TABLA_A_CDC_RX7_B5_CTL, 2, 1, 0),
631
632 SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
633 SOC_ENUM("RX2 HPF cut off", cf_rxmix2_enum),
634 SOC_ENUM("RX3 HPF cut off", cf_rxmix3_enum),
635 SOC_ENUM("RX4 HPF cut off", cf_rxmix4_enum),
636 SOC_ENUM("RX5 HPF cut off", cf_rxmix5_enum),
637 SOC_ENUM("RX6 HPF cut off", cf_rxmix6_enum),
638 SOC_ENUM("RX7 HPF cut off", cf_rxmix7_enum),
Ben Romberger1f045a72011-11-04 10:14:57 -0700639
640 SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
641 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
642 SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
643 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
644 SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
645 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
646 SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
647 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
648 SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
649 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
650 SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
651 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
652 SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
653 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
654 SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
655 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
656 SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
657 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
658 SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
659 tabla_get_iir_enable_audio_mixer, tabla_put_iir_enable_audio_mixer),
660
661 SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
662 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
663 SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
664 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
665 SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
666 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
667 SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
668 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
669 SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
670 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
671 SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
672 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
673 SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
674 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
675 SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
676 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
677 SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
678 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
679 SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
680 tabla_get_iir_band_audio_mixer, tabla_put_iir_band_audio_mixer),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700681};
682
683static const char *rx_mix1_text[] = {
684 "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
685 "RX5", "RX6", "RX7"
686};
687
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700688static const char *rx_dsm_text[] = {
689 "CIC_OUT", "DSM_INV"
690};
691
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692static const char *sb_tx1_mux_text[] = {
693 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
694 "DEC1"
695};
696
697static const char *sb_tx5_mux_text[] = {
698 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
699 "DEC5"
700};
701
702static const char *sb_tx6_mux_text[] = {
703 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
704 "DEC6"
705};
706
707static const char const *sb_tx7_to_tx10_mux_text[] = {
708 "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
709 "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
710 "DEC9", "DEC10"
711};
712
713static const char *dec1_mux_text[] = {
714 "ZERO", "DMIC1", "ADC6",
715};
716
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700717static const char *dec2_mux_text[] = {
718 "ZERO", "DMIC2", "ADC5",
719};
720
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700721static const char *dec3_mux_text[] = {
722 "ZERO", "DMIC3", "ADC4",
723};
724
725static const char *dec4_mux_text[] = {
726 "ZERO", "DMIC4", "ADC3",
727};
728
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700729static const char *dec5_mux_text[] = {
730 "ZERO", "DMIC5", "ADC2",
731};
732
733static const char *dec6_mux_text[] = {
734 "ZERO", "DMIC6", "ADC1",
735};
736
737static const char const *dec7_mux_text[] = {
738 "ZERO", "DMIC1", "DMIC6", "ADC1", "ADC6", "ANC1_FB", "ANC2_FB",
739};
740
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700741static const char *dec8_mux_text[] = {
742 "ZERO", "DMIC2", "DMIC5", "ADC2", "ADC5",
743};
744
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700745static const char *dec9_mux_text[] = {
746 "ZERO", "DMIC4", "DMIC5", "ADC2", "ADC3", "ADCMB", "ANC1_FB", "ANC2_FB",
747};
748
749static const char *dec10_mux_text[] = {
750 "ZERO", "DMIC3", "DMIC6", "ADC1", "ADC4", "ADCMB", "ANC1_FB", "ANC2_FB",
751};
752
Bradley Rubin229c6a52011-07-12 16:18:48 -0700753static const char const *anc_mux_text[] = {
754 "ZERO", "ADC1", "ADC2", "ADC3", "ADC4", "ADC5", "ADC6", "ADC_MB",
755 "RSVD_1", "DMIC1", "DMIC2", "DMIC3", "DMIC4", "DMIC5", "DMIC6"
756};
757
758static const char const *anc1_fb_mux_text[] = {
759 "ZERO", "EAR_HPH_L", "EAR_LINE_1",
760};
761
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700762static const char *iir1_inp1_text[] = {
763 "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "DEC5", "DEC6", "DEC7", "DEC8",
764 "DEC9", "DEC10", "RX1", "RX2", "RX3", "RX4", "RX5", "RX6", "RX7"
765};
766
767static const struct soc_enum rx_mix1_inp1_chain_enum =
768 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 0, 12, rx_mix1_text);
769
Bradley Rubin229c6a52011-07-12 16:18:48 -0700770static const struct soc_enum rx_mix1_inp2_chain_enum =
771 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX1_B1_CTL, 4, 12, rx_mix1_text);
772
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700773static const struct soc_enum rx2_mix1_inp1_chain_enum =
774 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 0, 12, rx_mix1_text);
775
Bradley Rubin229c6a52011-07-12 16:18:48 -0700776static const struct soc_enum rx2_mix1_inp2_chain_enum =
777 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX2_B1_CTL, 4, 12, rx_mix1_text);
778
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700779static const struct soc_enum rx3_mix1_inp1_chain_enum =
780 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 0, 12, rx_mix1_text);
781
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700782static const struct soc_enum rx3_mix1_inp2_chain_enum =
783 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX3_B1_CTL, 4, 12, rx_mix1_text);
784
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700785static const struct soc_enum rx4_mix1_inp1_chain_enum =
786 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 0, 12, rx_mix1_text);
787
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700788static const struct soc_enum rx4_mix1_inp2_chain_enum =
789 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX4_B1_CTL, 4, 12, rx_mix1_text);
790
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700791static const struct soc_enum rx5_mix1_inp1_chain_enum =
792 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 0, 12, rx_mix1_text);
793
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700794static const struct soc_enum rx5_mix1_inp2_chain_enum =
795 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX5_B1_CTL, 4, 12, rx_mix1_text);
796
797static const struct soc_enum rx6_mix1_inp1_chain_enum =
798 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 0, 12, rx_mix1_text);
799
800static const struct soc_enum rx6_mix1_inp2_chain_enum =
801 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX6_B1_CTL, 4, 12, rx_mix1_text);
802
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700803static const struct soc_enum rx7_mix1_inp1_chain_enum =
804 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 0, 12, rx_mix1_text);
805
806static const struct soc_enum rx7_mix1_inp2_chain_enum =
807 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_RX7_B1_CTL, 4, 12, rx_mix1_text);
808
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700809static const struct soc_enum rx4_dsm_enum =
810 SOC_ENUM_SINGLE(TABLA_A_CDC_RX4_B6_CTL, 4, 2, rx_dsm_text);
811
812static const struct soc_enum rx6_dsm_enum =
813 SOC_ENUM_SINGLE(TABLA_A_CDC_RX6_B6_CTL, 4, 2, rx_dsm_text);
814
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815static const struct soc_enum sb_tx5_mux_enum =
816 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
817
818static const struct soc_enum sb_tx6_mux_enum =
819 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0, 9, sb_tx6_mux_text);
820
821static const struct soc_enum sb_tx7_mux_enum =
822 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0, 18,
823 sb_tx7_to_tx10_mux_text);
824
825static const struct soc_enum sb_tx8_mux_enum =
826 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0, 18,
827 sb_tx7_to_tx10_mux_text);
828
Kiran Kandi3426e512011-09-13 22:50:10 -0700829static const struct soc_enum sb_tx9_mux_enum =
830 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0, 18,
831 sb_tx7_to_tx10_mux_text);
832
833static const struct soc_enum sb_tx10_mux_enum =
834 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0, 18,
835 sb_tx7_to_tx10_mux_text);
836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837static const struct soc_enum sb_tx1_mux_enum =
838 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
839
840static const struct soc_enum dec1_mux_enum =
841 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 0, 3, dec1_mux_text);
842
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700843static const struct soc_enum dec2_mux_enum =
844 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 2, 3, dec2_mux_text);
845
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700846static const struct soc_enum dec3_mux_enum =
847 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 4, 3, dec3_mux_text);
848
849static const struct soc_enum dec4_mux_enum =
850 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B1_CTL, 6, 3, dec4_mux_text);
851
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700852static const struct soc_enum dec5_mux_enum =
853 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 0, 3, dec5_mux_text);
854
855static const struct soc_enum dec6_mux_enum =
856 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 2, 3, dec6_mux_text);
857
858static const struct soc_enum dec7_mux_enum =
859 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B2_CTL, 4, 7, dec7_mux_text);
860
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700861static const struct soc_enum dec8_mux_enum =
862 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 0, 7, dec8_mux_text);
863
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700864static const struct soc_enum dec9_mux_enum =
865 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B3_CTL, 3, 8, dec9_mux_text);
866
867static const struct soc_enum dec10_mux_enum =
868 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_TX_B4_CTL, 0, 8, dec10_mux_text);
869
Bradley Rubin229c6a52011-07-12 16:18:48 -0700870static const struct soc_enum anc1_mux_enum =
871 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 0, 16, anc_mux_text);
872
873static const struct soc_enum anc2_mux_enum =
874 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B1_CTL, 4, 16, anc_mux_text);
875
876static const struct soc_enum anc1_fb_mux_enum =
877 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
878
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700879static const struct soc_enum iir1_inp1_mux_enum =
880 SOC_ENUM_SINGLE(TABLA_A_CDC_CONN_EQ1_B1_CTL, 0, 18, iir1_inp1_text);
881
882static const struct snd_kcontrol_new rx_mix1_inp1_mux =
883 SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
884
Bradley Rubin229c6a52011-07-12 16:18:48 -0700885static const struct snd_kcontrol_new rx_mix1_inp2_mux =
886 SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
887
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700888static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
889 SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
890
Bradley Rubin229c6a52011-07-12 16:18:48 -0700891static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
892 SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
893
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700894static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
895 SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
896
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700897static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
898 SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
899
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700900static const struct snd_kcontrol_new rx4_mix1_inp1_mux =
901 SOC_DAPM_ENUM("RX4 MIX1 INP1 Mux", rx4_mix1_inp1_chain_enum);
902
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700903static const struct snd_kcontrol_new rx4_mix1_inp2_mux =
904 SOC_DAPM_ENUM("RX4 MIX1 INP2 Mux", rx4_mix1_inp2_chain_enum);
905
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700906static const struct snd_kcontrol_new rx5_mix1_inp1_mux =
907 SOC_DAPM_ENUM("RX5 MIX1 INP1 Mux", rx5_mix1_inp1_chain_enum);
908
Bradley Rubin74a9b4a2011-06-13 15:03:43 -0700909static const struct snd_kcontrol_new rx5_mix1_inp2_mux =
910 SOC_DAPM_ENUM("RX5 MIX1 INP2 Mux", rx5_mix1_inp2_chain_enum);
911
912static const struct snd_kcontrol_new rx6_mix1_inp1_mux =
913 SOC_DAPM_ENUM("RX6 MIX1 INP1 Mux", rx6_mix1_inp1_chain_enum);
914
915static const struct snd_kcontrol_new rx6_mix1_inp2_mux =
916 SOC_DAPM_ENUM("RX6 MIX1 INP2 Mux", rx6_mix1_inp2_chain_enum);
917
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -0700918static const struct snd_kcontrol_new rx7_mix1_inp1_mux =
919 SOC_DAPM_ENUM("RX7 MIX1 INP1 Mux", rx7_mix1_inp1_chain_enum);
920
921static const struct snd_kcontrol_new rx7_mix1_inp2_mux =
922 SOC_DAPM_ENUM("RX7 MIX1 INP2 Mux", rx7_mix1_inp2_chain_enum);
923
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700924static const struct snd_kcontrol_new rx4_dsm_mux =
925 SOC_DAPM_ENUM("RX4 DSM MUX Mux", rx4_dsm_enum);
926
927static const struct snd_kcontrol_new rx6_dsm_mux =
928 SOC_DAPM_ENUM("RX6 DSM MUX Mux", rx6_dsm_enum);
929
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700930static const struct snd_kcontrol_new sb_tx5_mux =
931 SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
932
933static const struct snd_kcontrol_new sb_tx6_mux =
934 SOC_DAPM_ENUM("SLIM TX6 MUX Mux", sb_tx6_mux_enum);
935
936static const struct snd_kcontrol_new sb_tx7_mux =
937 SOC_DAPM_ENUM("SLIM TX7 MUX Mux", sb_tx7_mux_enum);
938
939static const struct snd_kcontrol_new sb_tx8_mux =
940 SOC_DAPM_ENUM("SLIM TX8 MUX Mux", sb_tx8_mux_enum);
941
Kiran Kandi3426e512011-09-13 22:50:10 -0700942static const struct snd_kcontrol_new sb_tx9_mux =
943 SOC_DAPM_ENUM("SLIM TX9 MUX Mux", sb_tx9_mux_enum);
944
945static const struct snd_kcontrol_new sb_tx10_mux =
946 SOC_DAPM_ENUM("SLIM TX10 MUX Mux", sb_tx10_mux_enum);
947
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700948static const struct snd_kcontrol_new sb_tx1_mux =
949 SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
950
951static const struct snd_kcontrol_new dec1_mux =
952 SOC_DAPM_ENUM("DEC1 MUX Mux", dec1_mux_enum);
953
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700954static const struct snd_kcontrol_new dec2_mux =
955 SOC_DAPM_ENUM("DEC2 MUX Mux", dec2_mux_enum);
956
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700957static const struct snd_kcontrol_new dec3_mux =
958 SOC_DAPM_ENUM("DEC3 MUX Mux", dec3_mux_enum);
959
960static const struct snd_kcontrol_new dec4_mux =
961 SOC_DAPM_ENUM("DEC4 MUX Mux", dec4_mux_enum);
962
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700963static const struct snd_kcontrol_new dec5_mux =
964 SOC_DAPM_ENUM("DEC5 MUX Mux", dec5_mux_enum);
965
966static const struct snd_kcontrol_new dec6_mux =
967 SOC_DAPM_ENUM("DEC6 MUX Mux", dec6_mux_enum);
968
969static const struct snd_kcontrol_new dec7_mux =
970 SOC_DAPM_ENUM("DEC7 MUX Mux", dec7_mux_enum);
971
Bradley Rubin229c6a52011-07-12 16:18:48 -0700972static const struct snd_kcontrol_new anc1_mux =
973 SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -0700974static const struct snd_kcontrol_new dec8_mux =
975 SOC_DAPM_ENUM("DEC8 MUX Mux", dec8_mux_enum);
976
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -0700977static const struct snd_kcontrol_new dec9_mux =
978 SOC_DAPM_ENUM("DEC9 MUX Mux", dec9_mux_enum);
979
980static const struct snd_kcontrol_new dec10_mux =
981 SOC_DAPM_ENUM("DEC10 MUX Mux", dec10_mux_enum);
982
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700983static const struct snd_kcontrol_new iir1_inp1_mux =
984 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
985
Bradley Rubin229c6a52011-07-12 16:18:48 -0700986static const struct snd_kcontrol_new anc2_mux =
987 SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700988
Bradley Rubin229c6a52011-07-12 16:18:48 -0700989static const struct snd_kcontrol_new anc1_fb_mux =
990 SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700991
Bradley Rubin229c6a52011-07-12 16:18:48 -0700992static const struct snd_kcontrol_new dac1_switch[] = {
993 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_EAR_EN, 5, 1, 0)
994};
995static const struct snd_kcontrol_new hphl_switch[] = {
996 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_HPH_L_DAC_CTL, 6, 1, 0)
997};
Kiran Kandi8b3a8302011-09-27 16:13:28 -0700998
999static const struct snd_kcontrol_new lineout3_ground_switch =
1000 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_3_DAC_CTL, 6, 1, 0);
1001
1002static const struct snd_kcontrol_new lineout4_ground_switch =
1003 SOC_DAPM_SINGLE("Switch", TABLA_A_RX_LINE_4_DAC_CTL, 6, 1, 0);
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001004
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001005static void tabla_codec_enable_adc_block(struct snd_soc_codec *codec,
1006 int enable)
1007{
1008 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1009
1010 pr_debug("%s %d\n", __func__, enable);
1011
1012 if (enable) {
1013 tabla->adc_count++;
1014 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
1015 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL, 0x2, 0x2);
1016 } else {
1017 tabla->adc_count--;
1018 if (!tabla->adc_count) {
1019 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_OTHR_CTL,
1020 0x2, 0x0);
1021 if (!tabla->mbhc_polling_active)
1022 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS,
1023 0xE0, 0x0);
1024 }
1025 }
1026}
1027
1028static int tabla_codec_enable_adc(struct snd_soc_dapm_widget *w,
1029 struct snd_kcontrol *kcontrol, int event)
1030{
1031 struct snd_soc_codec *codec = w->codec;
1032 u16 adc_reg;
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001033 u8 init_bit_shift;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001034
1035 pr_debug("%s %d\n", __func__, event);
1036
1037 if (w->reg == TABLA_A_TX_1_2_EN)
1038 adc_reg = TABLA_A_TX_1_2_TEST_CTL;
1039 else if (w->reg == TABLA_A_TX_3_4_EN)
1040 adc_reg = TABLA_A_TX_3_4_TEST_CTL;
1041 else if (w->reg == TABLA_A_TX_5_6_EN)
1042 adc_reg = TABLA_A_TX_5_6_TEST_CTL;
1043 else {
1044 pr_err("%s: Error, invalid adc register\n", __func__);
1045 return -EINVAL;
1046 }
1047
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001048 if (w->shift == 3)
1049 init_bit_shift = 6;
1050 else if (w->shift == 7)
1051 init_bit_shift = 7;
1052 else {
1053 pr_err("%s: Error, invalid init bit postion adc register\n",
1054 __func__);
1055 return -EINVAL;
1056 }
1057
1058
1059
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001060 switch (event) {
1061 case SND_SOC_DAPM_PRE_PMU:
1062 tabla_codec_enable_adc_block(codec, 1);
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001063 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
1064 1 << init_bit_shift);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001065 break;
1066 case SND_SOC_DAPM_POST_PMU:
Kiran Kandi9a2c62a82011-12-07 13:13:26 -08001067
1068 snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070 break;
1071 case SND_SOC_DAPM_POST_PMD:
1072 tabla_codec_enable_adc_block(codec, 0);
1073 break;
1074 }
1075 return 0;
1076}
1077
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001078static int tabla_codec_enable_lineout(struct snd_soc_dapm_widget *w,
1079 struct snd_kcontrol *kcontrol, int event)
1080{
1081 struct snd_soc_codec *codec = w->codec;
1082 u16 lineout_gain_reg;
1083
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001084 pr_debug("%s %d %s\n", __func__, event, w->name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001085
1086 switch (w->shift) {
1087 case 0:
1088 lineout_gain_reg = TABLA_A_RX_LINE_1_GAIN;
1089 break;
1090 case 1:
1091 lineout_gain_reg = TABLA_A_RX_LINE_2_GAIN;
1092 break;
1093 case 2:
1094 lineout_gain_reg = TABLA_A_RX_LINE_3_GAIN;
1095 break;
1096 case 3:
1097 lineout_gain_reg = TABLA_A_RX_LINE_4_GAIN;
1098 break;
1099 case 4:
1100 lineout_gain_reg = TABLA_A_RX_LINE_5_GAIN;
1101 break;
1102 default:
1103 pr_err("%s: Error, incorrect lineout register value\n",
1104 __func__);
1105 return -EINVAL;
1106 }
1107
1108 switch (event) {
1109 case SND_SOC_DAPM_PRE_PMU:
1110 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x40);
1111 break;
1112 case SND_SOC_DAPM_POST_PMU:
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001113 pr_debug("%s: sleeping 16 ms after %s PA turn on\n",
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001114 __func__, w->name);
Krishnankutty Kolathappilly31169f42011-11-17 10:33:11 -08001115 usleep_range(16000, 16000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001116 break;
1117 case SND_SOC_DAPM_POST_PMD:
1118 snd_soc_update_bits(codec, lineout_gain_reg, 0x40, 0x00);
1119 break;
1120 }
1121 return 0;
1122}
1123
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001124
1125static int tabla_codec_enable_dmic(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001126 struct snd_kcontrol *kcontrol, int event)
1127{
1128 struct snd_soc_codec *codec = w->codec;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001129 u16 tx_mux_ctl_reg, tx_dmic_ctl_reg;
1130 u8 dmic_clk_sel, dmic_clk_en;
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001131 unsigned int dmic;
1132 int ret;
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001133
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001134 ret = kstrtouint(strpbrk(w->name, "123456"), 10, &dmic);
1135 if (ret < 0) {
1136 pr_err("%s: Invalid DMIC line on the codec\n", __func__);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001137 return -EINVAL;
1138 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001139
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07001140 switch (dmic) {
1141 case 1:
1142 case 2:
1143 dmic_clk_sel = 0x02;
1144 dmic_clk_en = 0x01;
1145 break;
1146
1147 case 3:
1148 case 4:
1149 dmic_clk_sel = 0x08;
1150 dmic_clk_en = 0x04;
1151 break;
1152
1153 case 5:
1154 case 6:
1155 dmic_clk_sel = 0x20;
1156 dmic_clk_en = 0x10;
1157 break;
1158
1159 default:
1160 pr_err("%s: Invalid DMIC Selection\n", __func__);
1161 return -EINVAL;
1162 }
1163
1164 tx_mux_ctl_reg = TABLA_A_CDC_TX1_MUX_CTL + 8 * (dmic - 1);
1165 tx_dmic_ctl_reg = TABLA_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
1166
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001167 pr_debug("%s %d\n", __func__, event);
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001168
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001169 switch (event) {
1170 case SND_SOC_DAPM_PRE_PMU:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001171 snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, 0x1);
1172
1173 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1174 dmic_clk_sel, dmic_clk_sel);
1175
1176 snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
1177
1178 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1179 dmic_clk_en, dmic_clk_en);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001180 break;
1181 case SND_SOC_DAPM_POST_PMD:
Kiran Kandicf45f6a2011-07-17 21:10:19 -07001182 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_DMIC_CTL,
1183 dmic_clk_en, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001184 break;
1185 }
1186 return 0;
1187}
1188
Bradley Rubin229c6a52011-07-12 16:18:48 -07001189static int tabla_codec_enable_anc(struct snd_soc_dapm_widget *w,
1190 struct snd_kcontrol *kcontrol, int event)
1191{
1192 struct snd_soc_codec *codec = w->codec;
1193 const char *filename;
1194 const struct firmware *fw;
1195 int i;
1196 int ret;
Bradley Rubina7096d02011-08-03 18:29:02 -07001197 int num_anc_slots;
1198 struct anc_header *anc_head;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001199 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubina7096d02011-08-03 18:29:02 -07001200 u32 anc_writes_size = 0;
1201 int anc_size_remaining;
1202 u32 *anc_ptr;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001203 u16 reg;
1204 u8 mask, val, old_val;
1205
1206 pr_debug("%s %d\n", __func__, event);
1207 switch (event) {
1208 case SND_SOC_DAPM_PRE_PMU:
1209
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001210 filename = "wcd9310/wcd9310_anc.bin";
Bradley Rubin229c6a52011-07-12 16:18:48 -07001211
1212 ret = request_firmware(&fw, filename, codec->dev);
1213 if (ret != 0) {
1214 dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
1215 ret);
1216 return -ENODEV;
1217 }
1218
Bradley Rubina7096d02011-08-03 18:29:02 -07001219 if (fw->size < sizeof(struct anc_header)) {
Bradley Rubin229c6a52011-07-12 16:18:48 -07001220 dev_err(codec->dev, "Not enough data\n");
1221 release_firmware(fw);
1222 return -ENOMEM;
1223 }
1224
1225 /* First number is the number of register writes */
Bradley Rubina7096d02011-08-03 18:29:02 -07001226 anc_head = (struct anc_header *)(fw->data);
1227 anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
1228 anc_size_remaining = fw->size - sizeof(struct anc_header);
1229 num_anc_slots = anc_head->num_anc_slots;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001230
Bradley Rubina7096d02011-08-03 18:29:02 -07001231 if (tabla->anc_slot >= num_anc_slots) {
1232 dev_err(codec->dev, "Invalid ANC slot selected\n");
1233 release_firmware(fw);
1234 return -EINVAL;
1235 }
1236
1237 for (i = 0; i < num_anc_slots; i++) {
1238
1239 if (anc_size_remaining < TABLA_PACKED_REG_SIZE) {
1240 dev_err(codec->dev, "Invalid register format\n");
1241 release_firmware(fw);
1242 return -EINVAL;
1243 }
1244 anc_writes_size = (u32)(*anc_ptr);
1245 anc_size_remaining -= sizeof(u32);
1246 anc_ptr += 1;
1247
1248 if (anc_writes_size * TABLA_PACKED_REG_SIZE
1249 > anc_size_remaining) {
1250 dev_err(codec->dev, "Invalid register format\n");
1251 release_firmware(fw);
1252 return -ENOMEM;
1253 }
1254
1255 if (tabla->anc_slot == i)
1256 break;
1257
1258 anc_size_remaining -= (anc_writes_size *
1259 TABLA_PACKED_REG_SIZE);
Bradley Rubin939ff3f2011-08-26 17:19:34 -07001260 anc_ptr += anc_writes_size;
Bradley Rubina7096d02011-08-03 18:29:02 -07001261 }
1262 if (i == num_anc_slots) {
1263 dev_err(codec->dev, "Selected ANC slot not present\n");
Bradley Rubin229c6a52011-07-12 16:18:48 -07001264 release_firmware(fw);
1265 return -ENOMEM;
1266 }
1267
Bradley Rubina7096d02011-08-03 18:29:02 -07001268 for (i = 0; i < anc_writes_size; i++) {
1269 TABLA_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
Bradley Rubin229c6a52011-07-12 16:18:48 -07001270 mask, val);
1271 old_val = snd_soc_read(codec, reg);
Bradley Rubin4283a4c2011-07-29 16:18:54 -07001272 snd_soc_write(codec, reg, (old_val & ~mask) |
1273 (val & mask));
Bradley Rubin229c6a52011-07-12 16:18:48 -07001274 }
1275 release_firmware(fw);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001276
1277 break;
1278 case SND_SOC_DAPM_POST_PMD:
1279 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
1280 snd_soc_write(codec, TABLA_A_CDC_CLK_ANC_CLK_EN_CTL, 0);
1281 break;
1282 }
1283 return 0;
1284}
1285
1286
Bradley Rubincb3950a2011-08-18 13:07:26 -07001287static void tabla_codec_disable_button_presses(struct snd_soc_codec *codec)
1288{
1289 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL, 0x80);
1290 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL, 0x00);
1291}
1292
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001293static void tabla_codec_start_hs_polling(struct snd_soc_codec *codec)
1294{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001295 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1296
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001297 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001298 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001299 if (!tabla->no_mic_headset_override) {
1300 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
1301 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1302 } else {
1303 tabla_codec_disable_button_presses(codec);
1304 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001305 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1306 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
1307 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x1);
1308}
1309
1310static void tabla_codec_pause_hs_polling(struct snd_soc_codec *codec)
1311{
Bradley Rubincb3950a2011-08-18 13:07:26 -07001312 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1313
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001314 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
1315 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
Bradley Rubincb3950a2011-08-18 13:07:26 -07001316 if (!tabla->no_mic_headset_override) {
1317 tabla_disable_irq(codec->control_data,
1318 TABLA_IRQ_MBHC_POTENTIAL);
1319 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
1320 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001321}
1322
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001323static void tabla_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
1324 int mode)
1325{
1326 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1327 u8 reg_mode_val, cur_mode_val;
1328 bool mbhc_was_polling = false;
1329
1330 if (mode)
1331 reg_mode_val = TABLA_CFILT_FAST_MODE;
1332 else
1333 reg_mode_val = TABLA_CFILT_SLOW_MODE;
1334
1335 cur_mode_val = snd_soc_read(codec,
1336 tabla->mbhc_bias_regs.cfilt_ctl) & 0x40;
1337
1338 if (cur_mode_val != reg_mode_val) {
1339 if (tabla->mbhc_polling_active) {
1340 tabla_codec_pause_hs_polling(codec);
1341 mbhc_was_polling = true;
1342 }
1343 snd_soc_update_bits(codec,
1344 tabla->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
1345 if (mbhc_was_polling)
1346 tabla_codec_start_hs_polling(codec);
1347 pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
1348 cur_mode_val, reg_mode_val);
1349 } else {
1350 pr_debug("%s: CFILT Value is already %x\n",
1351 __func__, cur_mode_val);
1352 }
1353}
1354
1355static void tabla_codec_update_cfilt_usage(struct snd_soc_codec *codec,
1356 u8 cfilt_sel, int inc)
1357{
1358 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1359 u32 *cfilt_cnt_ptr = NULL;
1360 u16 micb_cfilt_reg;
1361
1362 switch (cfilt_sel) {
1363 case TABLA_CFILT1_SEL:
1364 cfilt_cnt_ptr = &tabla->cfilt1_cnt;
1365 micb_cfilt_reg = TABLA_A_MICB_CFILT_1_CTL;
1366 break;
1367 case TABLA_CFILT2_SEL:
1368 cfilt_cnt_ptr = &tabla->cfilt2_cnt;
1369 micb_cfilt_reg = TABLA_A_MICB_CFILT_2_CTL;
1370 break;
1371 case TABLA_CFILT3_SEL:
1372 cfilt_cnt_ptr = &tabla->cfilt3_cnt;
1373 micb_cfilt_reg = TABLA_A_MICB_CFILT_3_CTL;
1374 break;
1375 default:
1376 return; /* should not happen */
1377 }
1378
1379 if (inc) {
1380 if (!(*cfilt_cnt_ptr)++) {
1381 /* Switch CFILT to slow mode if MBHC CFILT being used */
1382 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1383 tabla_codec_switch_cfilt_mode(codec, 0);
1384
1385 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
1386 }
1387 } else {
1388 /* check if count not zero, decrement
1389 * then check if zero, go ahead disable cfilter
1390 */
1391 if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
1392 snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
1393
1394 /* Switch CFILT to fast mode if MBHC CFILT being used */
1395 if (cfilt_sel == tabla->mbhc_bias_regs.cfilt_sel)
1396 tabla_codec_switch_cfilt_mode(codec, 1);
1397 }
1398 }
1399}
1400
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001401static int tabla_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
1402{
1403 int rc = -EINVAL;
1404 unsigned min_mv, max_mv;
1405
1406 switch (ldoh_v) {
1407 case TABLA_LDOH_1P95_V:
1408 min_mv = 160;
1409 max_mv = 1800;
1410 break;
1411 case TABLA_LDOH_2P35_V:
1412 min_mv = 200;
1413 max_mv = 2200;
1414 break;
1415 case TABLA_LDOH_2P75_V:
1416 min_mv = 240;
1417 max_mv = 2600;
1418 break;
1419 case TABLA_LDOH_2P85_V:
1420 min_mv = 250;
1421 max_mv = 2700;
1422 break;
1423 default:
1424 goto done;
1425 }
1426
1427 if (cfilt_mv < min_mv || cfilt_mv > max_mv)
1428 goto done;
1429
1430 for (rc = 4; rc <= 44; rc++) {
1431 min_mv = max_mv * (rc) / 44;
1432 if (min_mv >= cfilt_mv) {
1433 rc -= 4;
1434 break;
1435 }
1436 }
1437done:
1438 return rc;
1439}
1440
1441static bool tabla_is_hph_pa_on(struct snd_soc_codec *codec)
1442{
1443 u8 hph_reg_val = 0;
1444 hph_reg_val = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_EN);
1445
1446 return (hph_reg_val & 0x30) ? true : false;
1447}
1448
Joonwoo Parka9444452011-12-08 18:48:27 -08001449static bool tabla_is_hph_dac_on(struct snd_soc_codec *codec, int left)
1450{
1451 u8 hph_reg_val = 0;
1452 if (left)
1453 hph_reg_val = snd_soc_read(codec,
1454 TABLA_A_RX_HPH_L_DAC_CTL);
1455 else
1456 hph_reg_val = snd_soc_read(codec,
1457 TABLA_A_RX_HPH_R_DAC_CTL);
1458
1459 return (hph_reg_val & 0xC0) ? true : false;
1460}
1461
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001462static void tabla_codec_switch_micbias(struct snd_soc_codec *codec,
1463 int vddio_switch)
1464{
1465 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1466 int cfilt_k_val;
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001467 bool mbhc_was_polling = false;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001468
1469 switch (vddio_switch) {
1470 case 1:
1471 if (tabla->mbhc_polling_active) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001472
1473 tabla_codec_pause_hs_polling(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08001474 /* VDDIO switch enabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001475 tabla->cfilt_k_value = snd_soc_read(codec,
1476 tabla->mbhc_bias_regs.cfilt_val);
1477 cfilt_k_val = tabla_find_k_value(
1478 tabla->pdata->micbias.ldoh_v, 1800);
1479 snd_soc_update_bits(codec,
1480 tabla->mbhc_bias_regs.cfilt_val,
1481 0xFC, (cfilt_k_val << 2));
1482
1483 snd_soc_update_bits(codec,
1484 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
1485 snd_soc_update_bits(codec,
1486 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001487 tabla_codec_start_hs_polling(codec);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001488
1489 tabla->mbhc_micbias_switched = true;
Joonwoo Park0976d012011-12-22 11:48:18 -08001490 pr_debug("%s: VDDIO switch enabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001491 }
1492 break;
1493
1494 case 0:
1495 if (tabla->mbhc_micbias_switched) {
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001496 if (tabla->mbhc_polling_active) {
1497 tabla_codec_pause_hs_polling(codec);
1498 mbhc_was_polling = true;
1499 }
Joonwoo Park0976d012011-12-22 11:48:18 -08001500 /* VDDIO switch disabled */
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001501 if (tabla->cfilt_k_value != 0)
1502 snd_soc_update_bits(codec,
1503 tabla->mbhc_bias_regs.cfilt_val, 0XFC,
1504 tabla->cfilt_k_value);
1505 snd_soc_update_bits(codec,
1506 tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
1507 snd_soc_update_bits(codec,
1508 tabla->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
1509
Bhalchandra Gajarec1e19c42011-11-18 11:22:56 -08001510 if (mbhc_was_polling)
1511 tabla_codec_start_hs_polling(codec);
1512
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001513 tabla->mbhc_micbias_switched = false;
Joonwoo Park0976d012011-12-22 11:48:18 -08001514 pr_debug("%s: VDDIO switch disabled\n", __func__);
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001515 }
1516 break;
1517 }
1518}
1519
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001520static int tabla_codec_enable_micbias(struct snd_soc_dapm_widget *w,
1521 struct snd_kcontrol *kcontrol, int event)
1522{
1523 struct snd_soc_codec *codec = w->codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07001524 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1525 u16 micb_int_reg;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001526 int micb_line;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001527 u8 cfilt_sel_val = 0;
Bradley Rubin229c6a52011-07-12 16:18:48 -07001528 char *internal1_text = "Internal1";
1529 char *internal2_text = "Internal2";
1530 char *internal3_text = "Internal3";
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001531
1532 pr_debug("%s %d\n", __func__, event);
1533 switch (w->reg) {
1534 case TABLA_A_MICB_1_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001535 micb_int_reg = TABLA_A_MICB_1_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001536 cfilt_sel_val = tabla->pdata->micbias.bias1_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001537 micb_line = TABLA_MICBIAS1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538 break;
1539 case TABLA_A_MICB_2_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001540 micb_int_reg = TABLA_A_MICB_2_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001541 cfilt_sel_val = tabla->pdata->micbias.bias2_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001542 micb_line = TABLA_MICBIAS2;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001543 break;
1544 case TABLA_A_MICB_3_CTL:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001545 micb_int_reg = TABLA_A_MICB_3_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001546 cfilt_sel_val = tabla->pdata->micbias.bias3_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001547 micb_line = TABLA_MICBIAS3;
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001548 break;
1549 case TABLA_A_MICB_4_CTL:
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001550 micb_int_reg = TABLA_A_MICB_4_INT_RBIAS;
Patrick Lai3043fba2011-08-01 14:15:57 -07001551 cfilt_sel_val = tabla->pdata->micbias.bias4_cfilt_sel;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001552 micb_line = TABLA_MICBIAS4;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001553 break;
1554 default:
1555 pr_err("%s: Error, invalid micbias register\n", __func__);
1556 return -EINVAL;
1557 }
1558
1559 switch (event) {
1560 case SND_SOC_DAPM_PRE_PMU:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001561 /* Decide whether to switch the micbias for MBHC */
1562 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1563 && tabla->mbhc_micbias_switched)
1564 tabla_codec_switch_micbias(codec, 0);
1565
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07001566 snd_soc_update_bits(codec, w->reg, 0x0E, 0x0A);
Patrick Lai3043fba2011-08-01 14:15:57 -07001567 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001568
1569 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001570 snd_soc_update_bits(codec, micb_int_reg, 0xE0, 0xE0);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001571 else if (strnstr(w->name, internal2_text, 30))
1572 snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
1573 else if (strnstr(w->name, internal3_text, 30))
1574 snd_soc_update_bits(codec, micb_int_reg, 0x3, 0x3);
1575
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001576 break;
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001577 case SND_SOC_DAPM_POST_PMU:
1578 if (tabla->mbhc_polling_active &&
Joonwoo Park0976d012011-12-22 11:48:18 -08001579 tabla->micbias == micb_line) {
Bradley Rubin4d09cf42011-08-17 17:59:16 -07001580 tabla_codec_pause_hs_polling(codec);
1581 tabla_codec_start_hs_polling(codec);
1582 }
1583 break;
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001584
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001585 case SND_SOC_DAPM_POST_PMD:
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001586
1587 if ((w->reg == tabla->mbhc_bias_regs.ctl_reg)
1588 && tabla_is_hph_pa_on(codec))
1589 tabla_codec_switch_micbias(codec, 1);
1590
Bradley Rubin229c6a52011-07-12 16:18:48 -07001591 if (strnstr(w->name, internal1_text, 30))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001592 snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
Bradley Rubin229c6a52011-07-12 16:18:48 -07001593 else if (strnstr(w->name, internal2_text, 30))
1594 snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
1595 else if (strnstr(w->name, internal3_text, 30))
1596 snd_soc_update_bits(codec, micb_int_reg, 0x2, 0x0);
1597
Patrick Lai3043fba2011-08-01 14:15:57 -07001598 tabla_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001599 break;
1600 }
1601
1602 return 0;
1603}
1604
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001605static int tabla_codec_enable_dec(struct snd_soc_dapm_widget *w,
1606 struct snd_kcontrol *kcontrol, int event)
1607{
1608 struct snd_soc_codec *codec = w->codec;
1609 u16 dec_reset_reg;
1610
1611 pr_debug("%s %d\n", __func__, event);
1612
1613 if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL)
1614 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B1_CTL;
1615 else if (w->reg == TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL)
1616 dec_reset_reg = TABLA_A_CDC_CLK_TX_RESET_B2_CTL;
1617 else {
1618 pr_err("%s: Error, incorrect dec\n", __func__);
1619 return -EINVAL;
1620 }
1621
1622 switch (event) {
1623 case SND_SOC_DAPM_PRE_PMU:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001624 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
1625 1 << w->shift);
1626 snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
1627 break;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001628 }
1629 return 0;
1630}
1631
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001632static int tabla_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001633 struct snd_kcontrol *kcontrol, int event)
1634{
1635 struct snd_soc_codec *codec = w->codec;
1636
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001637 pr_debug("%s %d %s\n", __func__, event, w->name);
1638
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001639 switch (event) {
1640 case SND_SOC_DAPM_PRE_PMU:
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001641 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1642 1 << w->shift, 1 << w->shift);
1643 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_RESET_CTL,
1644 1 << w->shift, 0x0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001645 break;
1646 }
1647 return 0;
1648}
1649
Bradley Rubin229c6a52011-07-12 16:18:48 -07001650static int tabla_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
1651 struct snd_kcontrol *kcontrol, int event)
1652{
1653 switch (event) {
1654 case SND_SOC_DAPM_POST_PMU:
1655 case SND_SOC_DAPM_POST_PMD:
1656 usleep_range(1000, 1000);
1657 break;
1658 }
1659 return 0;
1660}
1661
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001662
1663static void tabla_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
1664{
1665 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1666
1667 if (enable) {
1668 tabla->rx_bias_count++;
1669 if (tabla->rx_bias_count == 1)
1670 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1671 0x80, 0x80);
1672 } else {
1673 tabla->rx_bias_count--;
1674 if (!tabla->rx_bias_count)
1675 snd_soc_update_bits(codec, TABLA_A_RX_COM_BIAS,
1676 0x80, 0x00);
1677 }
1678}
1679
1680static int tabla_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
1681 struct snd_kcontrol *kcontrol, int event)
1682{
1683 struct snd_soc_codec *codec = w->codec;
1684
1685 pr_debug("%s %d\n", __func__, event);
1686
1687 switch (event) {
1688 case SND_SOC_DAPM_PRE_PMU:
1689 tabla_enable_rx_bias(codec, 1);
1690 break;
1691 case SND_SOC_DAPM_POST_PMD:
1692 tabla_enable_rx_bias(codec, 0);
1693 break;
1694 }
1695 return 0;
1696}
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001697static int tabla_hphr_dac_event(struct snd_soc_dapm_widget *w,
1698 struct snd_kcontrol *kcontrol, int event)
1699{
1700 struct snd_soc_codec *codec = w->codec;
1701
1702 pr_debug("%s %s %d\n", __func__, w->name, event);
1703
1704 switch (event) {
1705 case SND_SOC_DAPM_PRE_PMU:
1706 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1707 break;
1708 case SND_SOC_DAPM_POST_PMD:
1709 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1710 break;
1711 }
1712 return 0;
1713}
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07001714
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001715static void tabla_snd_soc_jack_report(struct tabla_priv *tabla,
1716 struct snd_soc_jack *jack, int status,
1717 int mask)
1718{
1719 /* XXX: wake_lock_timeout()? */
1720 snd_soc_jack_report(jack, status, mask);
1721}
1722
Patrick Lai49efeac2011-11-03 11:01:12 -07001723static void hphocp_off_report(struct tabla_priv *tabla,
1724 u32 jack_status, int irq)
1725{
1726 struct snd_soc_codec *codec;
1727
1728 if (tabla) {
1729 pr_info("%s: clear ocp status %x\n", __func__, jack_status);
1730 codec = tabla->codec;
1731 tabla->hph_status &= ~jack_status;
1732 if (tabla->headset_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08001733 tabla_snd_soc_jack_report(tabla, tabla->headset_jack,
1734 tabla->hph_status,
1735 TABLA_JACK_MASK);
Joonwoo Park0976d012011-12-22 11:48:18 -08001736 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x00);
1737 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10, 0x10);
Patrick Laic7cae882011-11-18 11:52:49 -08001738 /* reset retry counter as PA is turned off signifying
1739 * start of new OCP detection session
1740 */
1741 if (TABLA_IRQ_HPH_PA_OCPL_FAULT)
1742 tabla->hphlocp_cnt = 0;
1743 else
1744 tabla->hphrocp_cnt = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07001745 tabla_enable_irq(codec->control_data, irq);
1746 } else {
1747 pr_err("%s: Bad tabla private data\n", __func__);
1748 }
1749}
1750
1751static void hphlocp_off_report(struct work_struct *work)
1752{
1753 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1754 hphlocp_work);
1755 hphocp_off_report(tabla, SND_JACK_OC_HPHL, TABLA_IRQ_HPH_PA_OCPL_FAULT);
1756}
1757
1758static void hphrocp_off_report(struct work_struct *work)
1759{
1760 struct tabla_priv *tabla = container_of(work, struct tabla_priv,
1761 hphrocp_work);
1762 hphocp_off_report(tabla, SND_JACK_OC_HPHR, TABLA_IRQ_HPH_PA_OCPR_FAULT);
1763}
1764
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001765static int tabla_hph_pa_event(struct snd_soc_dapm_widget *w,
1766 struct snd_kcontrol *kcontrol, int event)
1767{
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001768 struct snd_soc_codec *codec = w->codec;
1769 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
1770 u8 mbhc_micb_ctl_val;
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001771 pr_debug("%s: event = %d\n", __func__, event);
1772
1773 switch (event) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001774 case SND_SOC_DAPM_PRE_PMU:
1775 mbhc_micb_ctl_val = snd_soc_read(codec,
1776 tabla->mbhc_bias_regs.ctl_reg);
1777
1778 if (!(mbhc_micb_ctl_val & 0x80)
1779 && !tabla->mbhc_micbias_switched)
1780 tabla_codec_switch_micbias(codec, 1);
1781
1782 break;
1783
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001784 case SND_SOC_DAPM_POST_PMD:
Patrick Lai49efeac2011-11-03 11:01:12 -07001785 /* schedule work is required because at the time HPH PA DAPM
1786 * event callback is called by DAPM framework, CODEC dapm mutex
1787 * would have been locked while snd_soc_jack_report also
1788 * attempts to acquire same lock.
1789 */
Joonwoo Parka9444452011-12-08 18:48:27 -08001790 if (w->shift == 5) {
1791 clear_bit(TABLA_HPHL_PA_OFF_ACK,
1792 &tabla->hph_pa_dac_state);
1793 clear_bit(TABLA_HPHL_DAC_OFF_ACK,
1794 &tabla->hph_pa_dac_state);
1795 if (tabla->hph_status & SND_JACK_OC_HPHL)
1796 schedule_work(&tabla->hphlocp_work);
1797 } else if (w->shift == 4) {
1798 clear_bit(TABLA_HPHR_PA_OFF_ACK,
1799 &tabla->hph_pa_dac_state);
1800 clear_bit(TABLA_HPHR_DAC_OFF_ACK,
1801 &tabla->hph_pa_dac_state);
1802 if (tabla->hph_status & SND_JACK_OC_HPHR)
1803 schedule_work(&tabla->hphrocp_work);
1804 }
1805
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001806 if (tabla->mbhc_micbias_switched)
1807 tabla_codec_switch_micbias(codec, 0);
1808
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001809 pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
1810 w->name);
1811 usleep_range(10000, 10000);
1812
1813 break;
1814 }
1815 return 0;
1816}
1817
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001818static void tabla_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
1819 struct mbhc_micbias_regs *micbias_regs)
1820{
1821 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001822 unsigned int cfilt;
1823
Joonwoo Park0976d012011-12-22 11:48:18 -08001824 switch (tabla->micbias) {
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001825 case TABLA_MICBIAS1:
1826 cfilt = tabla->pdata->micbias.bias1_cfilt_sel;
1827 micbias_regs->mbhc_reg = TABLA_A_MICB_1_MBHC;
1828 micbias_regs->int_rbias = TABLA_A_MICB_1_INT_RBIAS;
1829 micbias_regs->ctl_reg = TABLA_A_MICB_1_CTL;
1830 break;
1831 case TABLA_MICBIAS2:
1832 cfilt = tabla->pdata->micbias.bias2_cfilt_sel;
1833 micbias_regs->mbhc_reg = TABLA_A_MICB_2_MBHC;
1834 micbias_regs->int_rbias = TABLA_A_MICB_2_INT_RBIAS;
1835 micbias_regs->ctl_reg = TABLA_A_MICB_2_CTL;
1836 break;
1837 case TABLA_MICBIAS3:
1838 cfilt = tabla->pdata->micbias.bias3_cfilt_sel;
1839 micbias_regs->mbhc_reg = TABLA_A_MICB_3_MBHC;
1840 micbias_regs->int_rbias = TABLA_A_MICB_3_INT_RBIAS;
1841 micbias_regs->ctl_reg = TABLA_A_MICB_3_CTL;
1842 break;
1843 case TABLA_MICBIAS4:
1844 cfilt = tabla->pdata->micbias.bias4_cfilt_sel;
1845 micbias_regs->mbhc_reg = TABLA_A_MICB_4_MBHC;
1846 micbias_regs->int_rbias = TABLA_A_MICB_4_INT_RBIAS;
1847 micbias_regs->ctl_reg = TABLA_A_MICB_4_CTL;
1848 break;
1849 default:
1850 /* Should never reach here */
1851 pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
Jordan Crouse239d8412011-11-23 11:47:02 -07001852 return;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001853 }
1854
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08001855 micbias_regs->cfilt_sel = cfilt;
1856
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001857 switch (cfilt) {
1858 case TABLA_CFILT1_SEL:
1859 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_1_VAL;
1860 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_1_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001861 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt1_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001862 break;
1863 case TABLA_CFILT2_SEL:
1864 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_2_VAL;
1865 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_2_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001866 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt2_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001867 break;
1868 case TABLA_CFILT3_SEL:
1869 micbias_regs->cfilt_val = TABLA_A_MICB_CFILT_3_VAL;
1870 micbias_regs->cfilt_ctl = TABLA_A_MICB_CFILT_3_CTL;
Joonwoo Park0976d012011-12-22 11:48:18 -08001871 tabla->mbhc_data.micb_mv = tabla->pdata->micbias.cfilt3_mv;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001872 break;
1873 }
1874}
Santosh Mardie15e2302011-11-15 10:39:23 +05301875static const struct snd_soc_dapm_widget tabla_dapm_i2s_widgets[] = {
1876 SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", TABLA_A_CDC_CLK_RX_I2S_CTL,
1877 4, 0, NULL, 0),
1878 SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", TABLA_A_CDC_CLK_TX_I2S_CTL, 4,
1879 0, NULL, 0),
1880};
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07001881
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001882static int tabla_lineout_dac_event(struct snd_soc_dapm_widget *w,
1883 struct snd_kcontrol *kcontrol, int event)
1884{
1885 struct snd_soc_codec *codec = w->codec;
1886
1887 pr_debug("%s %s %d\n", __func__, w->name, event);
1888
1889 switch (event) {
1890 case SND_SOC_DAPM_PRE_PMU:
1891 snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
1892 break;
1893
1894 case SND_SOC_DAPM_POST_PMD:
1895 snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
1896 break;
1897 }
1898 return 0;
1899}
1900
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001901static const struct snd_soc_dapm_widget tabla_dapm_widgets[] = {
1902 /*RX stuff */
1903 SND_SOC_DAPM_OUTPUT("EAR"),
1904
Kiran Kandid2d86b52011-09-09 17:44:28 -07001905 SND_SOC_DAPM_PGA("EAR PA", TABLA_A_RX_EAR_EN, 4, 0, NULL, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001906
Bradley Rubin229c6a52011-07-12 16:18:48 -07001907 SND_SOC_DAPM_MIXER("DAC1", TABLA_A_RX_EAR_EN, 6, 0, dac1_switch,
1908 ARRAY_SIZE(dac1_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001909
Bradley Rubin229c6a52011-07-12 16:18:48 -07001910 SND_SOC_DAPM_AIF_IN("SLIM RX1", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1911 SND_SOC_DAPM_AIF_IN("SLIM RX2", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Santosh Mardie15e2302011-11-15 10:39:23 +05301912 SND_SOC_DAPM_AIF_IN("SLIM RX3", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1913 SND_SOC_DAPM_AIF_IN("SLIM RX4", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001914
1915 /* Headphone */
1916 SND_SOC_DAPM_OUTPUT("HEADPHONE"),
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001917 SND_SOC_DAPM_PGA_E("HPHL", TABLA_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001918 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1919 SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07001920 SND_SOC_DAPM_MIXER("HPHL DAC", TABLA_A_RX_HPH_L_DAC_CTL, 7, 0,
1921 hphl_switch, ARRAY_SIZE(hphl_switch)),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001922
Kiran Kandibf0b1ff2011-09-15 13:55:21 -07001923 SND_SOC_DAPM_PGA_E("HPHR", TABLA_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07001924 tabla_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
1925 SND_SOC_DAPM_POST_PMD),
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001926
1927 SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, TABLA_A_RX_HPH_R_DAC_CTL, 7, 0,
1928 tabla_hphr_dac_event,
1929 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001930
1931 /* Speaker */
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001932 SND_SOC_DAPM_OUTPUT("LINEOUT1"),
1933 SND_SOC_DAPM_OUTPUT("LINEOUT2"),
1934 SND_SOC_DAPM_OUTPUT("LINEOUT3"),
1935 SND_SOC_DAPM_OUTPUT("LINEOUT4"),
1936 SND_SOC_DAPM_OUTPUT("LINEOUT5"),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001937
Kiran Kandidb0a4b02011-08-23 09:32:09 -07001938 SND_SOC_DAPM_PGA_E("LINEOUT1 PA", TABLA_A_RX_LINE_CNP_EN, 0, 0, NULL,
1939 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1940 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1941 SND_SOC_DAPM_PGA_E("LINEOUT2 PA", TABLA_A_RX_LINE_CNP_EN, 1, 0, NULL,
1942 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1943 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1944 SND_SOC_DAPM_PGA_E("LINEOUT3 PA", TABLA_A_RX_LINE_CNP_EN, 2, 0, NULL,
1945 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1946 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1947 SND_SOC_DAPM_PGA_E("LINEOUT4 PA", TABLA_A_RX_LINE_CNP_EN, 3, 0, NULL,
1948 0, tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1949 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
1950 SND_SOC_DAPM_PGA_E("LINEOUT5 PA", TABLA_A_RX_LINE_CNP_EN, 4, 0, NULL, 0,
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001951 tabla_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
1952 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001953
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001954 SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, TABLA_A_RX_LINE_1_DAC_CTL, 7, 0
1955 , tabla_lineout_dac_event,
1956 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1957 SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, TABLA_A_RX_LINE_2_DAC_CTL, 7, 0
1958 , tabla_lineout_dac_event,
1959 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1960 SND_SOC_DAPM_DAC_E("LINEOUT3 DAC", NULL, TABLA_A_RX_LINE_3_DAC_CTL, 7, 0
1961 , tabla_lineout_dac_event,
1962 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1963 SND_SOC_DAPM_SWITCH("LINEOUT3 DAC GROUND", SND_SOC_NOPM, 0, 0,
1964 &lineout3_ground_switch),
1965 SND_SOC_DAPM_DAC_E("LINEOUT4 DAC", NULL, TABLA_A_RX_LINE_4_DAC_CTL, 7, 0
1966 , tabla_lineout_dac_event,
1967 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
1968 SND_SOC_DAPM_SWITCH("LINEOUT4 DAC GROUND", SND_SOC_NOPM, 0, 0,
1969 &lineout4_ground_switch),
1970 SND_SOC_DAPM_DAC_E("LINEOUT5 DAC", NULL, TABLA_A_RX_LINE_5_DAC_CTL, 7, 0
1971 , tabla_lineout_dac_event,
1972 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001973
Bradley Rubin229c6a52011-07-12 16:18:48 -07001974 SND_SOC_DAPM_MIXER_E("RX1 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
1975 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1976 SND_SOC_DAPM_MIXER_E("RX2 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
1977 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1978 SND_SOC_DAPM_MIXER_E("RX3 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
1979 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1980 SND_SOC_DAPM_MIXER_E("RX4 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0, NULL,
1981 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1982 SND_SOC_DAPM_MIXER_E("RX5 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 4, 0, NULL,
1983 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
1984 SND_SOC_DAPM_MIXER_E("RX6 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0, NULL,
1985 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07001986 SND_SOC_DAPM_MIXER_E("RX7 MIX1", TABLA_A_CDC_CLK_RX_B1_CTL, 6, 0, NULL,
1987 0, tabla_codec_reset_interpolator, SND_SOC_DAPM_PRE_PMU),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07001988
Kiran Kandi8b3a8302011-09-27 16:13:28 -07001989
1990 SND_SOC_DAPM_MUX_E("RX4 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 3, 0,
1991 &rx4_dsm_mux, tabla_codec_reset_interpolator,
1992 SND_SOC_DAPM_PRE_PMU),
1993
1994 SND_SOC_DAPM_MUX_E("RX6 DSM MUX", TABLA_A_CDC_CLK_RX_B1_CTL, 5, 0,
1995 &rx6_dsm_mux, tabla_codec_reset_interpolator,
1996 SND_SOC_DAPM_PRE_PMU),
1997
Bradley Rubin229c6a52011-07-12 16:18:48 -07001998 SND_SOC_DAPM_MIXER("RX1 CHAIN", TABLA_A_CDC_RX1_B6_CTL, 5, 0, NULL, 0),
1999 SND_SOC_DAPM_MIXER("RX2 CHAIN", TABLA_A_CDC_RX2_B6_CTL, 5, 0, NULL, 0),
2000
2001 SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2002 &rx_mix1_inp1_mux),
2003 SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2004 &rx_mix1_inp2_mux),
2005 SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2006 &rx2_mix1_inp1_mux),
2007 SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2008 &rx2_mix1_inp2_mux),
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002009 SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2010 &rx3_mix1_inp1_mux),
2011 SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2012 &rx3_mix1_inp2_mux),
2013 SND_SOC_DAPM_MUX("RX4 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2014 &rx4_mix1_inp1_mux),
2015 SND_SOC_DAPM_MUX("RX4 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2016 &rx4_mix1_inp2_mux),
2017 SND_SOC_DAPM_MUX("RX5 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2018 &rx5_mix1_inp1_mux),
2019 SND_SOC_DAPM_MUX("RX5 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2020 &rx5_mix1_inp2_mux),
2021 SND_SOC_DAPM_MUX("RX6 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2022 &rx6_mix1_inp1_mux),
2023 SND_SOC_DAPM_MUX("RX6 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2024 &rx6_mix1_inp2_mux),
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002025 SND_SOC_DAPM_MUX("RX7 MIX1 INP1", SND_SOC_NOPM, 0, 0,
2026 &rx7_mix1_inp1_mux),
2027 SND_SOC_DAPM_MUX("RX7 MIX1 INP2", SND_SOC_NOPM, 0, 0,
2028 &rx7_mix1_inp2_mux),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002029
Bradley Rubin229c6a52011-07-12 16:18:48 -07002030 SND_SOC_DAPM_SUPPLY("CP", TABLA_A_CP_EN, 0, 0,
2031 tabla_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
2032 SND_SOC_DAPM_PRE_PMD),
2033
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002034 SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
2035 tabla_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
2036 SND_SOC_DAPM_POST_PMD),
2037
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002038 /* TX */
Bradley Rubin229c6a52011-07-12 16:18:48 -07002039
Bradley Rubine1d08622011-07-20 18:01:35 -07002040 SND_SOC_DAPM_SUPPLY("CDC_CONN", TABLA_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
2041 0),
2042
Bradley Rubin229c6a52011-07-12 16:18:48 -07002043 SND_SOC_DAPM_SUPPLY("LDO_H", TABLA_A_LDO_H_MODE_1, 7, 0,
2044 tabla_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
2045
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002046 SND_SOC_DAPM_INPUT("AMIC1"),
2047 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", TABLA_A_MICB_1_CTL, 7, 0,
2048 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002049 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002050 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", TABLA_A_MICB_1_CTL, 7, 0,
2051 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002052 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002053 SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal2", TABLA_A_MICB_1_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002054 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002055 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002056 SND_SOC_DAPM_ADC_E("ADC1", NULL, TABLA_A_TX_1_2_EN, 7, 0,
2057 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2058 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2059
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002060 SND_SOC_DAPM_INPUT("AMIC3"),
2061 SND_SOC_DAPM_ADC_E("ADC3", NULL, TABLA_A_TX_3_4_EN, 7, 0,
2062 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2063 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2064
2065 SND_SOC_DAPM_INPUT("AMIC4"),
2066 SND_SOC_DAPM_ADC_E("ADC4", NULL, TABLA_A_TX_3_4_EN, 3, 0,
2067 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2068 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2069
2070 SND_SOC_DAPM_MICBIAS_E("MIC BIAS4 External", TABLA_A_MICB_4_CTL, 7, 0,
2071 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002072 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002073
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002074 SND_SOC_DAPM_INPUT("AMIC5"),
2075 SND_SOC_DAPM_ADC_E("ADC5", NULL, TABLA_A_TX_5_6_EN, 7, 0,
2076 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
2077
2078 SND_SOC_DAPM_INPUT("AMIC6"),
2079 SND_SOC_DAPM_ADC_E("ADC6", NULL, TABLA_A_TX_5_6_EN, 3, 0,
2080 tabla_codec_enable_adc, SND_SOC_DAPM_POST_PMU),
2081
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002082 SND_SOC_DAPM_MUX_E("DEC1 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002083 &dec1_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002084
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002085 SND_SOC_DAPM_MUX_E("DEC2 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002086 &dec2_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002087
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002088 SND_SOC_DAPM_MUX_E("DEC3 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002089 &dec3_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002090
2091 SND_SOC_DAPM_MUX_E("DEC4 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002092 &dec4_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002093
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002094 SND_SOC_DAPM_MUX_E("DEC5 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 4, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002095 &dec5_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002096
2097 SND_SOC_DAPM_MUX_E("DEC6 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 5, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002098 &dec6_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002099
2100 SND_SOC_DAPM_MUX_E("DEC7 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 6, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002101 &dec7_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002102
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002103 SND_SOC_DAPM_MUX_E("DEC8 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL, 7, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002104 &dec8_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002105
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002106 SND_SOC_DAPM_MUX_E("DEC9 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 0, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002107 &dec9_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002108
2109 SND_SOC_DAPM_MUX_E("DEC10 MUX", TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL, 1, 0,
Bradley Rubine1d08622011-07-20 18:01:35 -07002110 &dec10_mux, tabla_codec_enable_dec, SND_SOC_DAPM_PRE_PMU),
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002111
Bradley Rubin229c6a52011-07-12 16:18:48 -07002112 SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
2113 SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
2114
2115 SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
2116 tabla_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
2117 SND_SOC_DAPM_POST_PMD),
2118
2119 SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
2120
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002121 SND_SOC_DAPM_INPUT("AMIC2"),
2122 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", TABLA_A_MICB_2_CTL, 7, 0,
2123 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002124 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002125 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", TABLA_A_MICB_2_CTL, 7, 0,
2126 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002127 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002128 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", TABLA_A_MICB_2_CTL, 7, 0,
2129 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002130 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002131 SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal3", TABLA_A_MICB_2_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002132 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002133 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002134 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 External", TABLA_A_MICB_3_CTL, 7, 0,
2135 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002136 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002137 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal1", TABLA_A_MICB_3_CTL, 7, 0,
2138 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002139 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bradley Rubin229c6a52011-07-12 16:18:48 -07002140 SND_SOC_DAPM_MICBIAS_E("MIC BIAS3 Internal2", TABLA_A_MICB_3_CTL, 7, 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002141 tabla_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
Bradley Rubin4d09cf42011-08-17 17:59:16 -07002142 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002143 SND_SOC_DAPM_ADC_E("ADC2", NULL, TABLA_A_TX_1_2_EN, 3, 0,
2144 tabla_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
2145 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
2146
2147 SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, 0, 0, &sb_tx1_mux),
2148 SND_SOC_DAPM_AIF_OUT("SLIM TX1", "AIF1 Capture", NULL, SND_SOC_NOPM,
2149 0, 0),
2150
2151 SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, 0, 0, &sb_tx5_mux),
2152 SND_SOC_DAPM_AIF_OUT("SLIM TX5", "AIF1 Capture", NULL, SND_SOC_NOPM,
2153 4, 0),
2154
2155 SND_SOC_DAPM_MUX("SLIM TX6 MUX", SND_SOC_NOPM, 0, 0, &sb_tx6_mux),
2156 SND_SOC_DAPM_AIF_OUT("SLIM TX6", "AIF1 Capture", NULL, SND_SOC_NOPM,
2157 5, 0),
2158
2159 SND_SOC_DAPM_MUX("SLIM TX7 MUX", SND_SOC_NOPM, 0, 0, &sb_tx7_mux),
2160 SND_SOC_DAPM_AIF_OUT("SLIM TX7", "AIF1 Capture", NULL, SND_SOC_NOPM,
2161 0, 0),
2162
2163 SND_SOC_DAPM_MUX("SLIM TX8 MUX", SND_SOC_NOPM, 0, 0, &sb_tx8_mux),
2164 SND_SOC_DAPM_AIF_OUT("SLIM TX8", "AIF1 Capture", NULL, SND_SOC_NOPM,
2165 0, 0),
2166
Kiran Kandi3426e512011-09-13 22:50:10 -07002167 SND_SOC_DAPM_MUX("SLIM TX9 MUX", SND_SOC_NOPM, 0, 0, &sb_tx9_mux),
2168 SND_SOC_DAPM_AIF_OUT("SLIM TX9", "AIF1 Capture", NULL, SND_SOC_NOPM,
2169 0, 0),
2170
2171 SND_SOC_DAPM_MUX("SLIM TX10 MUX", SND_SOC_NOPM, 0, 0, &sb_tx10_mux),
2172 SND_SOC_DAPM_AIF_OUT("SLIM TX10", "AIF1 Capture", NULL, SND_SOC_NOPM,
2173 0, 0),
2174
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002175 /* Digital Mic Inputs */
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002176 SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
2177 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2178 SND_SOC_DAPM_POST_PMD),
2179
2180 SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
2181 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2182 SND_SOC_DAPM_POST_PMD),
2183
2184 SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
2185 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2186 SND_SOC_DAPM_POST_PMD),
2187
2188 SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
2189 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2190 SND_SOC_DAPM_POST_PMD),
2191
2192 SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
2193 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2194 SND_SOC_DAPM_POST_PMD),
2195
2196 SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
2197 tabla_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
2198 SND_SOC_DAPM_POST_PMD),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002199
2200 /* Sidetone */
2201 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
2202 SND_SOC_DAPM_PGA("IIR1", TABLA_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
2203};
2204
Santosh Mardie15e2302011-11-15 10:39:23 +05302205static const struct snd_soc_dapm_route audio_i2s_map[] = {
2206 {"RX_I2S_CLK", NULL, "CDC_CONN"},
2207 {"SLIM RX1", NULL, "RX_I2S_CLK"},
2208 {"SLIM RX2", NULL, "RX_I2S_CLK"},
2209 {"SLIM RX3", NULL, "RX_I2S_CLK"},
2210 {"SLIM RX4", NULL, "RX_I2S_CLK"},
2211
2212 {"SLIM TX7", NULL, "TX_I2S_CLK"},
2213 {"SLIM TX8", NULL, "TX_I2S_CLK"},
2214 {"SLIM TX9", NULL, "TX_I2S_CLK"},
2215 {"SLIM TX10", NULL, "TX_I2S_CLK"},
2216};
2217
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002218static const struct snd_soc_dapm_route audio_map[] = {
2219 /* SLIMBUS Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002220
2221 {"SLIM TX1", NULL, "SLIM TX1 MUX"},
2222 {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
2223
2224 {"SLIM TX5", NULL, "SLIM TX5 MUX"},
2225 {"SLIM TX5 MUX", "DEC5", "DEC5 MUX"},
2226
2227 {"SLIM TX6", NULL, "SLIM TX6 MUX"},
2228 {"SLIM TX6 MUX", "DEC6", "DEC6 MUX"},
2229
2230 {"SLIM TX7", NULL, "SLIM TX7 MUX"},
2231 {"SLIM TX7 MUX", "DEC1", "DEC1 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002232 {"SLIM TX7 MUX", "DEC2", "DEC2 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002233 {"SLIM TX7 MUX", "DEC3", "DEC3 MUX"},
2234 {"SLIM TX7 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002235 {"SLIM TX7 MUX", "DEC5", "DEC5 MUX"},
2236 {"SLIM TX7 MUX", "DEC6", "DEC6 MUX"},
Bhalchandra Gajare0d77e1b2011-07-08 10:54:14 -07002237 {"SLIM TX7 MUX", "DEC7", "DEC7 MUX"},
2238 {"SLIM TX7 MUX", "DEC8", "DEC8 MUX"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002239 {"SLIM TX7 MUX", "DEC9", "DEC9 MUX"},
2240 {"SLIM TX7 MUX", "DEC10", "DEC10 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002241
2242 {"SLIM TX8", NULL, "SLIM TX8 MUX"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002243 {"SLIM TX8 MUX", "DEC1", "DEC1 MUX"},
2244 {"SLIM TX8 MUX", "DEC2", "DEC2 MUX"},
2245 {"SLIM TX8 MUX", "DEC3", "DEC3 MUX"},
Bhalchandra Gajare9ec83cd2011-09-23 17:25:07 -07002246 {"SLIM TX8 MUX", "DEC4", "DEC4 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002247 {"SLIM TX8 MUX", "DEC5", "DEC5 MUX"},
2248 {"SLIM TX8 MUX", "DEC6", "DEC6 MUX"},
2249
Kiran Kandi3426e512011-09-13 22:50:10 -07002250 {"SLIM TX9", NULL, "SLIM TX9 MUX"},
2251 {"SLIM TX9 MUX", "DEC1", "DEC1 MUX"},
2252 {"SLIM TX9 MUX", "DEC2", "DEC2 MUX"},
2253 {"SLIM TX9 MUX", "DEC3", "DEC3 MUX"},
2254 {"SLIM TX9 MUX", "DEC4", "DEC4 MUX"},
2255 {"SLIM TX9 MUX", "DEC5", "DEC5 MUX"},
2256 {"SLIM TX9 MUX", "DEC6", "DEC6 MUX"},
2257 {"SLIM TX9 MUX", "DEC7", "DEC7 MUX"},
2258 {"SLIM TX9 MUX", "DEC8", "DEC8 MUX"},
2259 {"SLIM TX9 MUX", "DEC9", "DEC9 MUX"},
2260 {"SLIM TX9 MUX", "DEC10", "DEC10 MUX"},
2261
2262 {"SLIM TX10", NULL, "SLIM TX10 MUX"},
2263 {"SLIM TX10 MUX", "DEC1", "DEC1 MUX"},
2264 {"SLIM TX10 MUX", "DEC2", "DEC2 MUX"},
2265 {"SLIM TX10 MUX", "DEC3", "DEC3 MUX"},
2266 {"SLIM TX10 MUX", "DEC4", "DEC4 MUX"},
2267 {"SLIM TX10 MUX", "DEC5", "DEC5 MUX"},
2268 {"SLIM TX10 MUX", "DEC6", "DEC6 MUX"},
2269 {"SLIM TX10 MUX", "DEC7", "DEC7 MUX"},
2270 {"SLIM TX10 MUX", "DEC8", "DEC8 MUX"},
2271 {"SLIM TX10 MUX", "DEC9", "DEC9 MUX"},
2272 {"SLIM TX10 MUX", "DEC10", "DEC10 MUX"},
2273
2274
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002275 /* Earpiece (RX MIX1) */
2276 {"EAR", NULL, "EAR PA"},
Kiran Kandiac034ac2011-07-29 16:39:08 -07002277 {"EAR PA", NULL, "DAC1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002278 {"DAC1", NULL, "CP"},
2279
2280 {"ANC1 FB MUX", "EAR_HPH_L", "RX1 MIX1"},
2281 {"ANC1 FB MUX", "EAR_LINE_1", "RX2 MIX1"},
2282 {"ANC", NULL, "ANC1 FB MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002283
2284 /* Headset (RX MIX1 and RX MIX2) */
2285 {"HEADPHONE", NULL, "HPHL"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002286 {"HEADPHONE", NULL, "HPHR"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002287
2288 {"HPHL", NULL, "HPHL DAC"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 {"HPHR", NULL, "HPHR DAC"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002290
2291 {"HPHL DAC", NULL, "CP"},
2292 {"HPHR DAC", NULL, "CP"},
2293
2294 {"ANC", NULL, "ANC1 MUX"},
2295 {"ANC", NULL, "ANC2 MUX"},
2296 {"ANC1 MUX", "ADC1", "ADC1"},
2297 {"ANC1 MUX", "ADC2", "ADC2"},
2298 {"ANC1 MUX", "ADC3", "ADC3"},
2299 {"ANC1 MUX", "ADC4", "ADC4"},
2300 {"ANC2 MUX", "ADC1", "ADC1"},
2301 {"ANC2 MUX", "ADC2", "ADC2"},
2302 {"ANC2 MUX", "ADC3", "ADC3"},
2303 {"ANC2 MUX", "ADC4", "ADC4"},
2304
Bradley Rubine1d08622011-07-20 18:01:35 -07002305 {"ANC", NULL, "CDC_CONN"},
2306
Bradley Rubin229c6a52011-07-12 16:18:48 -07002307 {"DAC1", "Switch", "RX1 CHAIN"},
2308 {"HPHL DAC", "Switch", "RX1 CHAIN"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002309 {"HPHR DAC", NULL, "RX2 CHAIN"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002310
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002311 {"LINEOUT1", NULL, "LINEOUT1 PA"},
2312 {"LINEOUT2", NULL, "LINEOUT2 PA"},
2313 {"LINEOUT3", NULL, "LINEOUT3 PA"},
2314 {"LINEOUT4", NULL, "LINEOUT4 PA"},
2315 {"LINEOUT5", NULL, "LINEOUT5 PA"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002316
Kiran Kandidb0a4b02011-08-23 09:32:09 -07002317 {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
2318 {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
2319 {"LINEOUT3 PA", NULL, "LINEOUT3 DAC"},
2320 {"LINEOUT4 PA", NULL, "LINEOUT4 DAC"},
2321 {"LINEOUT5 PA", NULL, "LINEOUT5 DAC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002322
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002323 {"LINEOUT1 DAC", NULL, "RX3 MIX1"},
2324 {"LINEOUT5 DAC", NULL, "RX7 MIX1"},
2325
Bradley Rubin229c6a52011-07-12 16:18:48 -07002326 {"RX1 CHAIN", NULL, "RX1 MIX1"},
2327 {"RX2 CHAIN", NULL, "RX2 MIX1"},
2328 {"RX1 CHAIN", NULL, "ANC"},
2329 {"RX2 CHAIN", NULL, "ANC"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002330
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002331 {"CP", NULL, "RX_BIAS"},
2332 {"LINEOUT1 DAC", NULL, "RX_BIAS"},
2333 {"LINEOUT2 DAC", NULL, "RX_BIAS"},
2334 {"LINEOUT3 DAC", NULL, "RX_BIAS"},
2335 {"LINEOUT4 DAC", NULL, "RX_BIAS"},
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002336 {"LINEOUT5 DAC", NULL, "RX_BIAS"},
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002337
Bradley Rubin229c6a52011-07-12 16:18:48 -07002338 {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
2339 {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
2340 {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
2341 {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002342 {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
2343 {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
2344 {"RX4 MIX1", NULL, "RX4 MIX1 INP1"},
2345 {"RX4 MIX1", NULL, "RX4 MIX1 INP2"},
2346 {"RX5 MIX1", NULL, "RX5 MIX1 INP1"},
2347 {"RX5 MIX1", NULL, "RX5 MIX1 INP2"},
2348 {"RX6 MIX1", NULL, "RX6 MIX1 INP1"},
2349 {"RX6 MIX1", NULL, "RX6 MIX1 INP2"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002350 {"RX7 MIX1", NULL, "RX7 MIX1 INP1"},
2351 {"RX7 MIX1", NULL, "RX7 MIX1 INP2"},
Bradley Rubin74a9b4a2011-06-13 15:03:43 -07002352
Bradley Rubin229c6a52011-07-12 16:18:48 -07002353 {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
2354 {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302355 {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
2356 {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002357 {"RX1 MIX1 INP1", "IIR1", "IIR1"},
2358 {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
2359 {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302360 {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
2361 {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002362 {"RX1 MIX1 INP2", "IIR1", "IIR1"},
2363 {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
2364 {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302365 {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
2366 {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002367 {"RX2 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002368 {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
2369 {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302370 {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
2371 {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002372 {"RX2 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002373 {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
2374 {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302375 {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
2376 {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002377 {"RX3 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002378 {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
2379 {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302380 {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
2381 {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002382 {"RX3 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002383 {"RX4 MIX1 INP1", "RX1", "SLIM RX1"},
2384 {"RX4 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302385 {"RX4 MIX1 INP1", "RX3", "SLIM RX3"},
2386 {"RX4 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002387 {"RX4 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002388 {"RX4 MIX1 INP2", "RX1", "SLIM RX1"},
2389 {"RX4 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302390 {"RX4 MIX1 INP2", "RX3", "SLIM RX3"},
2391 {"RX4 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002392 {"RX4 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002393 {"RX5 MIX1 INP1", "RX1", "SLIM RX1"},
2394 {"RX5 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302395 {"RX5 MIX1 INP1", "RX3", "SLIM RX3"},
2396 {"RX5 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002397 {"RX5 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002398 {"RX5 MIX1 INP2", "RX1", "SLIM RX1"},
2399 {"RX5 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302400 {"RX5 MIX1 INP2", "RX3", "SLIM RX3"},
2401 {"RX5 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002402 {"RX5 MIX1 INP2", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002403 {"RX6 MIX1 INP1", "RX1", "SLIM RX1"},
2404 {"RX6 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302405 {"RX6 MIX1 INP1", "RX3", "SLIM RX3"},
2406 {"RX6 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002407 {"RX6 MIX1 INP1", "IIR1", "IIR1"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002408 {"RX6 MIX1 INP2", "RX1", "SLIM RX1"},
2409 {"RX6 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302410 {"RX6 MIX1 INP2", "RX3", "SLIM RX3"},
2411 {"RX6 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002412 {"RX6 MIX1 INP2", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002413 {"RX7 MIX1 INP1", "RX1", "SLIM RX1"},
2414 {"RX7 MIX1 INP1", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302415 {"RX7 MIX1 INP1", "RX3", "SLIM RX3"},
2416 {"RX7 MIX1 INP1", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002417 {"RX7 MIX1 INP1", "IIR1", "IIR1"},
Bhalchandra Gajare0a8ad172011-08-12 13:32:22 -07002418 {"RX7 MIX1 INP2", "RX1", "SLIM RX1"},
2419 {"RX7 MIX1 INP2", "RX2", "SLIM RX2"},
Santosh Mardie15e2302011-11-15 10:39:23 +05302420 {"RX7 MIX1 INP2", "RX3", "SLIM RX3"},
2421 {"RX7 MIX1 INP2", "RX4", "SLIM RX4"},
Patrick Lai16261e82011-09-30 13:25:52 -07002422 {"RX7 MIX1 INP2", "IIR1", "IIR1"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002423
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002424 /* Decimator Inputs */
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002425 {"DEC1 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002426 {"DEC1 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002427 {"DEC1 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002428 {"DEC2 MUX", "DMIC2", "DMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002429 {"DEC2 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002430 {"DEC2 MUX", NULL, "CDC_CONN"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002431 {"DEC3 MUX", "DMIC3", "DMIC3"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002432 {"DEC3 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002433 {"DEC3 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002434 {"DEC4 MUX", "DMIC4", "DMIC4"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002435 {"DEC4 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002436 {"DEC4 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002437 {"DEC5 MUX", "DMIC5", "DMIC5"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002438 {"DEC5 MUX", "ADC2", "ADC2"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002439 {"DEC5 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajare7cf018e2011-08-11 18:58:32 -07002440 {"DEC6 MUX", "DMIC6", "DMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002441 {"DEC6 MUX", "ADC1", "ADC1"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002442 {"DEC6 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002443 {"DEC7 MUX", "DMIC1", "DMIC1"},
Kiran Kandicf45f6a2011-07-17 21:10:19 -07002444 {"DEC7 MUX", "ADC6", "ADC6"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002445 {"DEC7 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002446 {"DEC8 MUX", "ADC5", "ADC5"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002447 {"DEC8 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002448 {"DEC9 MUX", "ADC3", "ADC3"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002449 {"DEC9 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002450 {"DEC10 MUX", "ADC4", "ADC4"},
Bradley Rubine1d08622011-07-20 18:01:35 -07002451 {"DEC10 MUX", NULL, "CDC_CONN"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002452
2453 /* ADC Connections */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002454 {"ADC1", NULL, "AMIC1"},
2455 {"ADC2", NULL, "AMIC2"},
Bhalchandra Gajarecc6ffa02011-07-14 18:35:41 -07002456 {"ADC3", NULL, "AMIC3"},
2457 {"ADC4", NULL, "AMIC4"},
2458 {"ADC5", NULL, "AMIC5"},
2459 {"ADC6", NULL, "AMIC6"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002460
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002461 {"IIR1", NULL, "IIR1 INP1 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002462 {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
2463 {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
2464 {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
2465 {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
2466 {"IIR1 INP1 MUX", "DEC5", "DEC5 MUX"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002467 {"IIR1 INP1 MUX", "DEC6", "DEC6 MUX"},
Patrick Lai16261e82011-09-30 13:25:52 -07002468 {"IIR1 INP1 MUX", "DEC7", "DEC7 MUX"},
2469 {"IIR1 INP1 MUX", "DEC8", "DEC8 MUX"},
2470 {"IIR1 INP1 MUX", "DEC9", "DEC9 MUX"},
2471 {"IIR1 INP1 MUX", "DEC10", "DEC10 MUX"},
Bradley Rubin229c6a52011-07-12 16:18:48 -07002472
2473 {"MIC BIAS1 Internal1", NULL, "LDO_H"},
2474 {"MIC BIAS1 Internal2", NULL, "LDO_H"},
2475 {"MIC BIAS1 External", NULL, "LDO_H"},
2476 {"MIC BIAS2 Internal1", NULL, "LDO_H"},
2477 {"MIC BIAS2 Internal2", NULL, "LDO_H"},
2478 {"MIC BIAS2 Internal3", NULL, "LDO_H"},
2479 {"MIC BIAS2 External", NULL, "LDO_H"},
2480 {"MIC BIAS3 Internal1", NULL, "LDO_H"},
2481 {"MIC BIAS3 Internal2", NULL, "LDO_H"},
2482 {"MIC BIAS3 External", NULL, "LDO_H"},
2483 {"MIC BIAS4 External", NULL, "LDO_H"},
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002484};
2485
Kiran Kandi8b3a8302011-09-27 16:13:28 -07002486static const struct snd_soc_dapm_route tabla_1_x_lineout_2_to_4_map[] = {
2487
2488 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2489 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2490
2491 {"LINEOUT2 DAC", NULL, "RX4 DSM MUX"},
2492
2493 {"LINEOUT3 DAC", NULL, "RX5 MIX1"},
2494 {"LINEOUT3 DAC GROUND", "Switch", "RX3 MIX1"},
2495 {"LINEOUT3 DAC", NULL, "LINEOUT3 DAC GROUND"},
2496
2497 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2498 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2499
2500 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2501 {"LINEOUT4 DAC GROUND", "Switch", "RX4 DSM MUX"},
2502 {"LINEOUT4 DAC", NULL, "LINEOUT4 DAC GROUND"},
2503};
2504
Kiran Kandi7a9fd902011-11-14 13:51:45 -08002505
2506static const struct snd_soc_dapm_route tabla_2_x_lineout_2_to_4_map[] = {
2507
2508 {"RX4 DSM MUX", "DSM_INV", "RX3 MIX1"},
2509 {"RX4 DSM MUX", "CIC_OUT", "RX4 MIX1"},
2510
2511 {"LINEOUT3 DAC", NULL, "RX4 DSM MUX"},
2512
2513 {"LINEOUT2 DAC", NULL, "RX5 MIX1"},
2514
2515 {"RX6 DSM MUX", "DSM_INV", "RX5 MIX1"},
2516 {"RX6 DSM MUX", "CIC_OUT", "RX6 MIX1"},
2517
2518 {"LINEOUT4 DAC", NULL, "RX6 DSM MUX"},
2519};
2520
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002521static int tabla_readable(struct snd_soc_codec *ssc, unsigned int reg)
2522{
2523 return tabla_reg_readable[reg];
2524}
2525
2526static int tabla_volatile(struct snd_soc_codec *ssc, unsigned int reg)
2527{
2528 /* Registers lower than 0x100 are top level registers which can be
2529 * written by the Tabla core driver.
2530 */
2531
2532 if ((reg >= TABLA_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
2533 return 1;
2534
Ben Romberger1f045a72011-11-04 10:14:57 -07002535 /* IIR Coeff registers are not cacheable */
2536 if ((reg >= TABLA_A_CDC_IIR1_COEF_B1_CTL) &&
2537 (reg <= TABLA_A_CDC_IIR2_COEF_B5_CTL))
2538 return 1;
2539
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002540 return 0;
2541}
2542
2543#define TABLA_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
2544static int tabla_write(struct snd_soc_codec *codec, unsigned int reg,
2545 unsigned int value)
2546{
2547 int ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002548
2549 BUG_ON(reg > TABLA_MAX_REGISTER);
2550
2551 if (!tabla_volatile(codec, reg)) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002552 ret = snd_soc_cache_write(codec, reg, value);
2553 if (ret != 0)
2554 dev_err(codec->dev, "Cache write to %x failed: %d\n",
2555 reg, ret);
2556 }
2557
2558 return tabla_reg_write(codec->control_data, reg, value);
2559}
2560static unsigned int tabla_read(struct snd_soc_codec *codec,
2561 unsigned int reg)
2562{
2563 unsigned int val;
2564 int ret;
2565
2566 BUG_ON(reg > TABLA_MAX_REGISTER);
2567
2568 if (!tabla_volatile(codec, reg) && tabla_readable(codec, reg) &&
2569 reg < codec->driver->reg_cache_size) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002570 ret = snd_soc_cache_read(codec, reg, &val);
2571 if (ret >= 0) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002572 return val;
2573 } else
2574 dev_err(codec->dev, "Cache read from %x failed: %d\n",
2575 reg, ret);
2576 }
2577
2578 val = tabla_reg_read(codec->control_data, reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002579 return val;
2580}
2581
2582static void tabla_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
2583{
2584 snd_soc_write(codec, TABLA_A_BIAS_REF_CTL, 0x1C);
2585 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2586 0x80);
2587 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x04,
2588 0x04);
2589 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x01,
2590 0x01);
2591 usleep_range(1000, 1000);
2592 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2593 0x00);
2594}
2595
2596static void tabla_codec_enable_bandgap(struct snd_soc_codec *codec,
2597 enum tabla_bandgap_type choice)
2598{
2599 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2600
2601 /* TODO lock resources accessed by audio streams and threaded
2602 * interrupt handlers
2603 */
2604
2605 pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
2606 tabla->bandgap_type);
2607
2608 if (tabla->bandgap_type == choice)
2609 return;
2610
2611 if ((tabla->bandgap_type == TABLA_BANDGAP_OFF) &&
2612 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2613 tabla_codec_enable_audio_mode_bandgap(codec);
2614 } else if ((tabla->bandgap_type == TABLA_BANDGAP_AUDIO_MODE) &&
2615 (choice == TABLA_BANDGAP_MBHC_MODE)) {
2616 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x2,
2617 0x2);
2618 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2619 0x80);
2620 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x4,
2621 0x4);
2622 usleep_range(1000, 1000);
2623 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x80,
2624 0x00);
2625 } else if ((tabla->bandgap_type == TABLA_BANDGAP_MBHC_MODE) &&
2626 (choice == TABLA_BANDGAP_AUDIO_MODE)) {
2627 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2628 usleep_range(100, 100);
2629 tabla_codec_enable_audio_mode_bandgap(codec);
2630 } else if (choice == TABLA_BANDGAP_OFF) {
2631 snd_soc_write(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x00);
2632 } else {
2633 pr_err("%s: Error, Invalid bandgap settings\n", __func__);
2634 }
2635 tabla->bandgap_type = choice;
2636}
2637
2638static int tabla_codec_enable_config_mode(struct snd_soc_codec *codec,
2639 int enable)
2640{
2641 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2642
2643 if (enable) {
2644 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x10, 0);
2645 snd_soc_write(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x17);
2646 usleep_range(5, 5);
2647 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80,
2648 0x80);
2649 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80,
2650 0x80);
2651 usleep_range(10, 10);
2652 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_TEST, 0x80, 0);
2653 usleep_range(20, 20);
2654 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x08);
2655 } else {
2656 snd_soc_update_bits(codec, TABLA_A_BIAS_CONFIG_MODE_BG_CTL, 0x1,
2657 0);
2658 snd_soc_update_bits(codec, TABLA_A_CONFIG_MODE_FREQ, 0x80, 0);
2659 }
2660 tabla->config_mode_active = enable ? true : false;
2661
2662 return 0;
2663}
2664
2665static int tabla_codec_enable_clock_block(struct snd_soc_codec *codec,
2666 int config_mode)
2667{
2668 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2669
2670 pr_debug("%s\n", __func__);
2671
2672 if (config_mode) {
2673 tabla_codec_enable_config_mode(codec, 1);
2674 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x00);
2675 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2676 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN1, 0x0D);
2677 usleep_range(1000, 1000);
2678 } else
2679 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x08, 0x00);
2680
2681 if (!config_mode && tabla->mbhc_polling_active) {
2682 snd_soc_write(codec, TABLA_A_CLK_BUFF_EN2, 0x02);
2683 tabla_codec_enable_config_mode(codec, 0);
2684
2685 }
2686
2687 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x05);
2688 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x00);
2689 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x04);
2690 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_MCLK_CTL, 0x01, 0x01);
2691 usleep_range(50, 50);
2692 tabla->clock_active = true;
2693 return 0;
2694}
2695static void tabla_codec_disable_clock_block(struct snd_soc_codec *codec)
2696{
2697 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2698 pr_debug("%s\n", __func__);
2699 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x04, 0x00);
2700 ndelay(160);
2701 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN2, 0x02, 0x02);
2702 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x00);
2703 tabla->clock_active = false;
2704}
2705
Bradley Rubincb1e2732011-06-23 16:49:20 -07002706static void tabla_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
2707{
Joonwoo Park0976d012011-12-22 11:48:18 -08002708 u8 *n_cic;
2709 struct tabla_mbhc_btn_detect_cfg *btn_det;
2710 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002711
Joonwoo Park0976d012011-12-22 11:48:18 -08002712 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002713
Joonwoo Park0976d012011-12-22 11:48:18 -08002714 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B1_CTL,
2715 tabla->mbhc_data.v_ins_hu & 0xFF);
2716 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B2_CTL,
2717 (tabla->mbhc_data.v_ins_hu >> 8) & 0xFF);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002718
Joonwoo Park0976d012011-12-22 11:48:18 -08002719 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B3_CTL,
2720 tabla->mbhc_data.v_b1_hu & 0xFF);
2721 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B4_CTL,
2722 (tabla->mbhc_data.v_b1_hu >> 8) & 0xFF);
2723
2724 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B5_CTL,
2725 tabla->mbhc_data.v_b1_h & 0xFF);
2726 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B6_CTL,
2727 (tabla->mbhc_data.v_b1_h >> 8) & 0xFF);
2728
2729 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B9_CTL,
2730 tabla->mbhc_data.v_brh & 0xFF);
2731 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B10_CTL,
2732 (tabla->mbhc_data.v_brh >> 8) & 0xFF);
2733
2734 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B11_CTL,
2735 tabla->mbhc_data.v_brl & 0xFF);
2736 snd_soc_write(codec, TABLA_A_CDC_MBHC_VOLT_B12_CTL,
2737 (tabla->mbhc_data.v_brl >> 8) & 0xFF);
2738
2739 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B1_CTL,
2740 tabla->mbhc_data.nready);
2741 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B2_CTL,
2742 tabla->mbhc_data.npoll);
2743 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B3_CTL,
2744 tabla->mbhc_data.nbounce_wait);
2745
2746 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
2747 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, n_cic[0]);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002748}
2749
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002750static int tabla_startup(struct snd_pcm_substream *substream,
2751 struct snd_soc_dai *dai)
2752{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002753 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2754 substream->name, substream->stream);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002755
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002756 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002757}
2758
2759static void tabla_shutdown(struct snd_pcm_substream *substream,
2760 struct snd_soc_dai *dai)
2761{
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002762 pr_debug("%s(): substream = %s stream = %d\n" , __func__,
2763 substream->name, substream->stream);
2764}
2765
2766int tabla_mclk_enable(struct snd_soc_codec *codec, int mclk_enable)
2767{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002768 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
2769
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002770 pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002771
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002772 if (mclk_enable) {
2773 tabla->mclk_enabled = true;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002774
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002775 if (tabla->mbhc_polling_active && (tabla->mclk_enabled)) {
Bradley Rubincb1e2732011-06-23 16:49:20 -07002776 tabla_codec_pause_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002777 tabla_codec_enable_bandgap(codec,
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002778 TABLA_BANDGAP_AUDIO_MODE);
2779 tabla_codec_enable_clock_block(codec, 0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07002780 tabla_codec_calibrate_hs_polling(codec);
2781 tabla_codec_start_hs_polling(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002782 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002783 } else {
2784
2785 if (!tabla->mclk_enabled) {
2786 pr_err("Error, MCLK already diabled\n");
2787 return -EINVAL;
2788 }
2789 tabla->mclk_enabled = false;
2790
2791 if (tabla->mbhc_polling_active) {
2792 if (!tabla->mclk_enabled) {
2793 tabla_codec_pause_hs_polling(codec);
2794 tabla_codec_enable_bandgap(codec,
2795 TABLA_BANDGAP_MBHC_MODE);
2796 tabla_enable_rx_bias(codec, 1);
2797 tabla_codec_enable_clock_block(codec, 1);
2798 tabla_codec_calibrate_hs_polling(codec);
2799 tabla_codec_start_hs_polling(codec);
2800 }
2801 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1,
2802 0x05, 0x01);
2803 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804 }
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07002805 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002806}
2807
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002808static int tabla_set_dai_sysclk(struct snd_soc_dai *dai,
2809 int clk_id, unsigned int freq, int dir)
2810{
2811 pr_debug("%s\n", __func__);
2812 return 0;
2813}
2814
2815static int tabla_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2816{
Santosh Mardie15e2302011-11-15 10:39:23 +05302817 u8 val = 0;
2818 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
2819
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002820 pr_debug("%s\n", __func__);
Santosh Mardie15e2302011-11-15 10:39:23 +05302821 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2822 case SND_SOC_DAIFMT_CBS_CFS:
2823 /* CPU is master */
2824 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2825 if (dai->id == TABLA_TX_DAI_ID)
2826 snd_soc_update_bits(dai->codec,
2827 TABLA_A_CDC_CLK_TX_I2S_CTL,
2828 TABLA_I2S_MASTER_MODE_MASK, 0);
2829 else if (dai->id == TABLA_RX_DAI_ID)
2830 snd_soc_update_bits(dai->codec,
2831 TABLA_A_CDC_CLK_RX_I2S_CTL,
2832 TABLA_I2S_MASTER_MODE_MASK, 0);
2833 }
2834 break;
2835 case SND_SOC_DAIFMT_CBM_CFM:
2836 /* CPU is slave */
2837 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2838 val = TABLA_I2S_MASTER_MODE_MASK;
2839 if (dai->id == TABLA_TX_DAI_ID)
2840 snd_soc_update_bits(dai->codec,
2841 TABLA_A_CDC_CLK_TX_I2S_CTL, val, val);
2842 else if (dai->id == TABLA_RX_DAI_ID)
2843 snd_soc_update_bits(dai->codec,
2844 TABLA_A_CDC_CLK_RX_I2S_CTL, val, val);
2845 }
2846 break;
2847 default:
2848 return -EINVAL;
2849 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002850 return 0;
2851}
2852
2853static int tabla_hw_params(struct snd_pcm_substream *substream,
2854 struct snd_pcm_hw_params *params,
2855 struct snd_soc_dai *dai)
2856{
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002857 struct snd_soc_codec *codec = dai->codec;
Santosh Mardie15e2302011-11-15 10:39:23 +05302858 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(dai->codec);
Bhalchandra Gajare038bf3a2011-09-02 15:32:30 -07002859 u8 path, shift;
2860 u16 tx_fs_reg, rx_fs_reg;
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002861 u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
2862
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002863 pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002864
2865 switch (params_rate(params)) {
2866 case 8000:
2867 tx_fs_rate = 0x00;
2868 rx_fs_rate = 0x00;
2869 break;
2870 case 16000:
2871 tx_fs_rate = 0x01;
2872 rx_fs_rate = 0x20;
2873 break;
2874 case 32000:
2875 tx_fs_rate = 0x02;
2876 rx_fs_rate = 0x40;
2877 break;
2878 case 48000:
2879 tx_fs_rate = 0x03;
2880 rx_fs_rate = 0x60;
2881 break;
2882 default:
2883 pr_err("%s: Invalid sampling rate %d\n", __func__,
2884 params_rate(params));
2885 return -EINVAL;
2886 }
2887
2888
2889 /**
2890 * If current dai is a tx dai, set sample rate to
2891 * all the txfe paths that are currently not active
2892 */
2893 if (dai->id == TABLA_TX_DAI_ID) {
2894
2895 tx_state = snd_soc_read(codec,
2896 TABLA_A_CDC_CLK_TX_CLK_EN_B1_CTL);
2897
2898 for (path = 1, shift = 0;
2899 path <= NUM_DECIMATORS; path++, shift++) {
2900
2901 if (path == BITS_PER_REG + 1) {
2902 shift = 0;
2903 tx_state = snd_soc_read(codec,
2904 TABLA_A_CDC_CLK_TX_CLK_EN_B2_CTL);
2905 }
2906
2907 if (!(tx_state & (1 << shift))) {
2908 tx_fs_reg = TABLA_A_CDC_TX1_CLK_FS_CTL
2909 + (BITS_PER_REG*(path-1));
2910 snd_soc_update_bits(codec, tx_fs_reg,
2911 0x03, tx_fs_rate);
2912 }
2913 }
Santosh Mardie15e2302011-11-15 10:39:23 +05302914 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2915 switch (params_format(params)) {
2916 case SNDRV_PCM_FORMAT_S16_LE:
2917 snd_soc_update_bits(codec,
2918 TABLA_A_CDC_CLK_TX_I2S_CTL,
2919 0x20, 0x20);
2920 break;
2921 case SNDRV_PCM_FORMAT_S32_LE:
2922 snd_soc_update_bits(codec,
2923 TABLA_A_CDC_CLK_TX_I2S_CTL,
2924 0x20, 0x00);
2925 break;
2926 default:
2927 pr_err("invalid format\n");
2928 break;
2929 }
2930 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_TX_I2S_CTL,
2931 0x03, tx_fs_rate);
2932 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002933 }
2934
2935 /**
2936 * TODO: Need to handle case where same RX chain takes 2 or more inputs
2937 * with varying sample rates
2938 */
2939
2940 /**
2941 * If current dai is a rx dai, set sample rate to
2942 * all the rx paths that are currently not active
2943 */
2944 if (dai->id == TABLA_RX_DAI_ID) {
2945
2946 rx_state = snd_soc_read(codec,
2947 TABLA_A_CDC_CLK_RX_B1_CTL);
2948
2949 for (path = 1, shift = 0;
2950 path <= NUM_INTERPOLATORS; path++, shift++) {
2951
2952 if (!(rx_state & (1 << shift))) {
2953 rx_fs_reg = TABLA_A_CDC_RX1_B5_CTL
2954 + (BITS_PER_REG*(path-1));
2955 snd_soc_update_bits(codec, rx_fs_reg,
2956 0xE0, rx_fs_rate);
2957 }
2958 }
Santosh Mardie15e2302011-11-15 10:39:23 +05302959 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
2960 switch (params_format(params)) {
2961 case SNDRV_PCM_FORMAT_S16_LE:
2962 snd_soc_update_bits(codec,
2963 TABLA_A_CDC_CLK_RX_I2S_CTL,
2964 0x20, 0x20);
2965 break;
2966 case SNDRV_PCM_FORMAT_S32_LE:
2967 snd_soc_update_bits(codec,
2968 TABLA_A_CDC_CLK_RX_I2S_CTL,
2969 0x20, 0x00);
2970 break;
2971 default:
2972 pr_err("invalid format\n");
2973 break;
2974 }
2975 snd_soc_update_bits(codec, TABLA_A_CDC_CLK_RX_I2S_CTL,
2976 0x03, (rx_fs_rate >> 0x05));
2977 }
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002978 }
2979
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002980 return 0;
2981}
2982
2983static struct snd_soc_dai_ops tabla_dai_ops = {
2984 .startup = tabla_startup,
2985 .shutdown = tabla_shutdown,
2986 .hw_params = tabla_hw_params,
2987 .set_sysclk = tabla_set_dai_sysclk,
2988 .set_fmt = tabla_set_dai_fmt,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002989};
2990
2991static struct snd_soc_dai_driver tabla_dai[] = {
2992 {
2993 .name = "tabla_rx1",
2994 .id = 1,
2995 .playback = {
2996 .stream_name = "AIF1 Playback",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07002997 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002998 .formats = TABLA_FORMATS,
2999 .rate_max = 48000,
3000 .rate_min = 8000,
3001 .channels_min = 1,
Kiran Kandi3426e512011-09-13 22:50:10 -07003002 .channels_max = 4,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003003 },
3004 .ops = &tabla_dai_ops,
3005 },
3006 {
3007 .name = "tabla_tx1",
3008 .id = 2,
3009 .capture = {
3010 .stream_name = "AIF1 Capture",
Bhalchandra Gajare9a901fd2011-08-01 10:07:15 -07003011 .rates = WCD9310_RATES,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003012 .formats = TABLA_FORMATS,
3013 .rate_max = 48000,
3014 .rate_min = 8000,
3015 .channels_min = 1,
3016 .channels_max = 2,
3017 },
3018 .ops = &tabla_dai_ops,
3019 },
3020};
Santosh Mardie15e2302011-11-15 10:39:23 +05303021
3022static struct snd_soc_dai_driver tabla_i2s_dai[] = {
3023 {
3024 .name = "tabla_i2s_rx1",
3025 .id = 1,
3026 .playback = {
3027 .stream_name = "AIF1 Playback",
3028 .rates = WCD9310_RATES,
3029 .formats = TABLA_FORMATS,
3030 .rate_max = 48000,
3031 .rate_min = 8000,
3032 .channels_min = 1,
3033 .channels_max = 4,
3034 },
3035 .ops = &tabla_dai_ops,
3036 },
3037 {
3038 .name = "tabla_i2s_tx1",
3039 .id = 2,
3040 .capture = {
3041 .stream_name = "AIF1 Capture",
3042 .rates = WCD9310_RATES,
3043 .formats = TABLA_FORMATS,
3044 .rate_max = 48000,
3045 .rate_min = 8000,
3046 .channels_min = 1,
3047 .channels_max = 4,
3048 },
3049 .ops = &tabla_dai_ops,
3050 },
3051};
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003052static short tabla_codec_read_sta_result(struct snd_soc_codec *codec)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003053{
3054 u8 bias_msb, bias_lsb;
3055 short bias_value;
3056
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003057 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B3_STATUS);
3058 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B2_STATUS);
3059 bias_value = (bias_msb << 8) | bias_lsb;
3060 return bias_value;
3061}
3062
3063static short tabla_codec_read_dce_result(struct snd_soc_codec *codec)
3064{
3065 u8 bias_msb, bias_lsb;
3066 short bias_value;
3067
3068 bias_msb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B5_STATUS);
3069 bias_lsb = snd_soc_read(codec, TABLA_A_CDC_MBHC_B4_STATUS);
3070 bias_value = (bias_msb << 8) | bias_lsb;
3071 return bias_value;
3072}
3073
Joonwoo Park0976d012011-12-22 11:48:18 -08003074static short tabla_codec_sta_dce(struct snd_soc_codec *codec, int dce)
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003075{
Joonwoo Park0976d012011-12-22 11:48:18 -08003076 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003077 short bias_value;
3078
Joonwoo Park925914c2012-01-05 13:35:18 -08003079 /* Turn on the override */
3080 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003081 if (dce) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003082 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3083 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
3084 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003085 usleep_range(tabla->mbhc_data.t_sta_dce,
3086 tabla->mbhc_data.t_sta_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003087 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x4);
Joonwoo Park0976d012011-12-22 11:48:18 -08003088 usleep_range(tabla->mbhc_data.t_dce,
3089 tabla->mbhc_data.t_dce);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003090 bias_value = tabla_codec_read_dce_result(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003091 } else {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003092 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003093 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3094 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
Joonwoo Park433149a2012-01-11 09:53:54 -08003095 usleep_range(tabla->mbhc_data.t_sta_dce,
3096 tabla->mbhc_data.t_sta_dce);
Joonwoo Park0976d012011-12-22 11:48:18 -08003097 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x2);
3098 usleep_range(tabla->mbhc_data.t_sta,
3099 tabla->mbhc_data.t_sta);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003100 bias_value = tabla_codec_read_sta_result(codec);
3101 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3102 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003103 }
Joonwoo Park925914c2012-01-05 13:35:18 -08003104 /* Turn off the override after measuring mic voltage */
3105 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003106
Joonwoo Park0976d012011-12-22 11:48:18 -08003107 pr_debug("read microphone bias value %04x\n", bias_value);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003108 return bias_value;
3109}
3110
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003111static short tabla_codec_setup_hs_polling(struct snd_soc_codec *codec)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003112{
3113 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003114 short bias_value;
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003115 u8 cfilt_mode;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003116
Joonwoo Park0976d012011-12-22 11:48:18 -08003117 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003118 pr_err("Error, no tabla calibration\n");
Bradley Rubincb1e2732011-06-23 16:49:20 -07003119 return -ENODEV;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003120 }
3121
3122 tabla->mbhc_polling_active = true;
3123
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003124 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003125 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_MBHC_MODE);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003126 tabla_enable_rx_bias(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003127 tabla_codec_enable_clock_block(codec, 1);
3128 }
3129
3130 snd_soc_update_bits(codec, TABLA_A_CLK_BUFF_EN1, 0x05, 0x01);
3131
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003132 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0xE0);
3133
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003134 /* Make sure CFILT is in fast mode, save current mode */
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003135 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3136 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
Patrick Lai3043fba2011-08-01 14:15:57 -07003137
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003138 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003139
3140 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003141 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003142
3143 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x80);
3144 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x1F, 0x1C);
3145 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x40, 0x40);
3146
3147 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN, 0x80, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003148 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3149 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003150
Joonwoo Park925914c2012-01-05 13:35:18 -08003151 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003152 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
3153
Bradley Rubincb1e2732011-06-23 16:49:20 -07003154 tabla_codec_calibrate_hs_polling(codec);
3155
Joonwoo Park0976d012011-12-22 11:48:18 -08003156 bias_value = tabla_codec_sta_dce(codec, 0);
3157 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3158 cfilt_mode);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003159 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003160
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003161 return bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003162}
3163
3164static int tabla_codec_enable_hs_detect(struct snd_soc_codec *codec,
3165 int insertion)
3166{
3167 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003168 int central_bias_enabled = 0;
Joonwoo Park0976d012011-12-22 11:48:18 -08003169 const struct tabla_mbhc_general_cfg *generic =
3170 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3171 const struct tabla_mbhc_plug_detect_cfg *plug_det =
3172 TABLA_MBHC_CAL_PLUG_DET_PTR(tabla->calibration);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003173 u8 wg_time;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003174
Joonwoo Park0976d012011-12-22 11:48:18 -08003175 if (!tabla->calibration) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003176 pr_err("Error, no tabla calibration\n");
3177 return -EINVAL;
3178 }
3179
3180 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0);
3181
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003182 if (insertion) {
3183 /* Make sure mic bias and Mic line schmitt trigger
3184 * are turned OFF
3185 */
3186 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg,
3187 0x81, 0x01);
3188 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3189 0x90, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003190 wg_time = snd_soc_read(codec, TABLA_A_RX_HPH_CNP_WG_TIME) ;
3191 wg_time += 1;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003192
3193 /* Enable HPH Schmitt Trigger */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003194 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x11, 0x11);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003195 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x0C,
Joonwoo Park0976d012011-12-22 11:48:18 -08003196 plug_det->hph_current << 2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003197
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003198 /* Turn off HPH PAs and DAC's during insertion detection to
3199 * avoid false insertion interrupts
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003200 */
3201 if (tabla->mbhc_micbias_switched)
3202 tabla_codec_switch_micbias(codec, 0);
3203 snd_soc_update_bits(codec, TABLA_A_RX_HPH_CNP_EN, 0x30, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003204 snd_soc_update_bits(codec, TABLA_A_RX_HPH_L_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003205 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003206 snd_soc_update_bits(codec, TABLA_A_RX_HPH_R_DAC_CTL,
Joonwoo Park0976d012011-12-22 11:48:18 -08003207 0xC0, 0x00);
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003208 usleep_range(wg_time * 1000, wg_time * 1000);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003209
3210 /* setup for insetion detection */
Bhalchandra Gajare5ea376d2011-11-30 14:21:20 -08003211 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x02, 0x02);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003212 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003213 } else {
3214 /* Make sure the HPH schmitt trigger is OFF */
3215 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12, 0x00);
3216
3217 /* enable the mic line schmitt trigger */
3218 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x60,
Joonwoo Park0976d012011-12-22 11:48:18 -08003219 plug_det->mic_current << 5);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003220 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3221 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003222 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003223 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg,
3224 0x10, 0x10);
3225
3226 /* Setup for low power removal detection */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003227 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0x2);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003228 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003229
3230 if (snd_soc_read(codec, TABLA_A_CDC_MBHC_B1_CTL) & 0x4) {
3231 if (!(tabla->clock_active)) {
3232 tabla_codec_enable_config_mode(codec, 1);
3233 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003234 0x06, 0);
Joonwoo Park0976d012011-12-22 11:48:18 -08003235 usleep_range(generic->t_shutdown_plug_rem,
3236 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003237 tabla_codec_enable_config_mode(codec, 0);
3238 } else
3239 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07003240 0x06, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003241 }
3242
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003243 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.int_rbias, 0x80, 0);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003244
3245 /* If central bandgap disabled */
3246 if (!(snd_soc_read(codec, TABLA_A_PIN_CTL_OE1) & 1)) {
3247 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x3, 0x3);
Joonwoo Park0976d012011-12-22 11:48:18 -08003248 usleep_range(generic->t_bg_fast_settle,
3249 generic->t_bg_fast_settle);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003250 central_bias_enabled = 1;
3251 }
3252
3253 /* If LDO_H disabled */
3254 if (snd_soc_read(codec, TABLA_A_PIN_CTL_OE0) & 0x80) {
3255 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x10, 0);
3256 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0x80);
Joonwoo Park0976d012011-12-22 11:48:18 -08003257 usleep_range(generic->t_ldoh, generic->t_ldoh);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003258 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE0, 0x80, 0);
3259
3260 if (central_bias_enabled)
3261 snd_soc_update_bits(codec, TABLA_A_PIN_CTL_OE1, 0x1, 0);
3262 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003263
Joonwoo Park0976d012011-12-22 11:48:18 -08003264 snd_soc_update_bits(codec, TABLA_A_MICB_4_MBHC, 0x3, tabla->micbias);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003265
3266 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
3267 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
3268 return 0;
3269}
3270
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003271static void tabla_lock_sleep(struct tabla_priv *tabla)
3272{
3273 int ret;
3274 while (!(ret = wait_event_timeout(tabla->pm_wq,
3275 atomic_inc_not_zero(&tabla->pm_cnt),
3276 2 * HZ))) {
3277 pr_err("%s: didn't wake up for 2000ms (%d), pm_cnt %d\n",
3278 __func__, ret, atomic_read(&tabla->pm_cnt));
3279 WARN_ON_ONCE(1);
3280 }
3281}
3282
3283static void tabla_unlock_sleep(struct tabla_priv *tabla)
3284{
3285 atomic_dec(&tabla->pm_cnt);
3286 wake_up(&tabla->pm_wq);
3287}
3288
Joonwoo Park0976d012011-12-22 11:48:18 -08003289static u16 tabla_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
3290 s16 vin_mv)
3291{
3292 short diff, zero;
3293 struct tabla_priv *tabla;
3294 u32 mb_mv, in;
3295
3296 tabla = snd_soc_codec_get_drvdata(codec);
3297 mb_mv = tabla->mbhc_data.micb_mv;
3298
3299 if (mb_mv == 0) {
3300 pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
3301 return -EINVAL;
3302 }
3303
3304 if (dce) {
3305 diff = tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z;
3306 zero = tabla->mbhc_data.dce_z;
3307 } else {
3308 diff = tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z;
3309 zero = tabla->mbhc_data.sta_z;
3310 }
3311 in = (u32) diff * vin_mv;
3312
3313 return (u16) (in / mb_mv) + zero;
3314}
3315
3316static s32 tabla_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
3317 u16 bias_value)
3318{
3319 struct tabla_priv *tabla;
3320 s32 mv;
3321
3322 tabla = snd_soc_codec_get_drvdata(codec);
3323
3324 if (dce) {
3325 mv = ((s32)bias_value - (s32)tabla->mbhc_data.dce_z) *
3326 (s32)tabla->mbhc_data.micb_mv /
3327 (s32)(tabla->mbhc_data.dce_mb - tabla->mbhc_data.dce_z);
3328 } else {
3329 mv = ((s32)bias_value - (s32)tabla->mbhc_data.sta_z) *
3330 (s32)tabla->mbhc_data.micb_mv /
3331 (s32)(tabla->mbhc_data.sta_mb - tabla->mbhc_data.sta_z);
3332 }
3333
3334 return mv;
3335}
3336
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003337static void btn0_lpress_fn(struct work_struct *work)
3338{
3339 struct delayed_work *delayed_work;
3340 struct tabla_priv *tabla;
Joonwoo Park0976d012011-12-22 11:48:18 -08003341 short bias_value;
3342 int dce_mv, sta_mv;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003343
3344 pr_debug("%s:\n", __func__);
3345
3346 delayed_work = to_delayed_work(work);
3347 tabla = container_of(delayed_work, struct tabla_priv, btn0_dwork);
3348
3349 if (tabla) {
3350 if (tabla->button_jack) {
Joonwoo Park0976d012011-12-22 11:48:18 -08003351 bias_value = tabla_codec_read_sta_result(tabla->codec);
3352 sta_mv = tabla_codec_sta_dce_v(tabla->codec, 0,
3353 bias_value);
3354 bias_value = tabla_codec_read_dce_result(tabla->codec);
3355 dce_mv = tabla_codec_sta_dce_v(tabla->codec, 1,
3356 bias_value);
3357 pr_debug("%s: Reporting long button press event"
3358 " STA: %d, DCE: %d\n", __func__,
3359 sta_mv, dce_mv);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003360 tabla_snd_soc_jack_report(tabla, tabla->button_jack,
3361 SND_JACK_BTN_0,
3362 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003363 }
3364 } else {
3365 pr_err("%s: Bad tabla private data\n", __func__);
3366 }
3367
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003368 tabla_unlock_sleep(tabla);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003369}
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07003370
Joonwoo Park0976d012011-12-22 11:48:18 -08003371void tabla_mbhc_cal(struct snd_soc_codec *codec)
3372{
3373 struct tabla_priv *tabla;
3374 struct tabla_mbhc_btn_detect_cfg *btn_det;
3375 u8 cfilt_mode, bg_mode;
3376 u8 ncic, nmeas, navg;
3377 u32 mclk_rate;
3378 u32 dce_wait, sta_wait;
3379 u8 *n_cic;
3380
3381 tabla = snd_soc_codec_get_drvdata(codec);
3382
3383 /* First compute the DCE / STA wait times
3384 * depending on tunable parameters.
3385 * The value is computed in microseconds
3386 */
3387 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3388 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
3389 ncic = n_cic[0];
3390 nmeas = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration)->n_meas;
3391 navg = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration)->mbhc_navg;
3392 mclk_rate = tabla->mclk_freq;
Joonwoo Park433149a2012-01-11 09:53:54 -08003393 dce_wait = (1000 * 512 * ncic * (nmeas + 1)) / (mclk_rate / 1000);
3394 sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
Joonwoo Park0976d012011-12-22 11:48:18 -08003395
3396 tabla->mbhc_data.t_dce = dce_wait;
3397 tabla->mbhc_data.t_sta = sta_wait;
3398
3399 /* LDOH and CFILT are already configured during pdata handling.
3400 * Only need to make sure CFILT and bandgap are in Fast mode.
3401 * Need to restore defaults once calculation is done.
3402 */
3403 cfilt_mode = snd_soc_read(codec, tabla->mbhc_bias_regs.cfilt_ctl);
3404 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
3405 bg_mode = snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02,
3406 0x02);
3407
3408 /* Micbias, CFILT, LDOH, MBHC MUX mode settings
3409 * to perform ADC calibration
3410 */
3411 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x60,
3412 tabla->micbias << 5);
3413 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
3414 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x60, 0x60);
3415 snd_soc_write(codec, TABLA_A_TX_7_MBHC_TEST_CTL, 0x78);
3416 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
3417
3418 /* DCE measurement for 0 volts */
3419 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3420 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3421 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
3422 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3423 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3424 usleep_range(100, 100);
3425 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3426 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3427 tabla->mbhc_data.dce_z = tabla_codec_read_dce_result(codec);
3428
3429 /* DCE measurment for MB voltage */
3430 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3431 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
3432 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3433 usleep_range(100, 100);
3434 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x04);
3435 usleep_range(tabla->mbhc_data.t_dce, tabla->mbhc_data.t_dce);
3436 tabla->mbhc_data.dce_mb = tabla_codec_read_dce_result(codec);
3437
3438 /* Sta measuremnt for 0 volts */
3439 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x0A);
3440 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3441 snd_soc_write(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x02);
3442 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3443 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x81);
3444 usleep_range(100, 100);
3445 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3446 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3447 tabla->mbhc_data.sta_z = tabla_codec_read_sta_result(codec);
3448
3449 /* STA Measurement for MB Voltage */
3450 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x82);
3451 usleep_range(100, 100);
3452 snd_soc_write(codec, TABLA_A_CDC_MBHC_EN_CTL, 0x02);
3453 usleep_range(tabla->mbhc_data.t_sta, tabla->mbhc_data.t_sta);
3454 tabla->mbhc_data.sta_mb = tabla_codec_read_sta_result(codec);
3455
3456 /* Restore default settings. */
3457 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
3458 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl, 0x40,
3459 cfilt_mode);
3460 snd_soc_update_bits(codec, TABLA_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
3461
3462 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x84);
3463 usleep_range(100, 100);
3464}
3465
3466void *tabla_mbhc_cal_btn_det_mp(const struct tabla_mbhc_btn_detect_cfg* btn_det,
3467 const enum tabla_mbhc_btn_det_mem mem)
3468{
3469 void *ret = &btn_det->_v_btn_low;
3470
3471 switch (mem) {
3472 case TABLA_BTN_DET_GAIN:
3473 ret += sizeof(btn_det->_n_cic);
3474 case TABLA_BTN_DET_N_CIC:
3475 ret += sizeof(btn_det->_n_ready);
3476 case TABLA_BTN_DET_V_N_READY:
3477 ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
3478 case TABLA_BTN_DET_V_BTN_HIGH:
3479 ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
3480 case TABLA_BTN_DET_V_BTN_LOW:
3481 /* do nothing */
3482 break;
3483 default:
3484 ret = NULL;
3485 }
3486
3487 return ret;
3488}
3489
3490static void tabla_mbhc_calc_thres(struct snd_soc_codec *codec)
3491{
3492 struct tabla_priv *tabla;
3493 s16 btn_mv = 0, btn_delta_mv;
3494 struct tabla_mbhc_btn_detect_cfg *btn_det;
3495 struct tabla_mbhc_plug_type_cfg *plug_type;
3496 u16 *btn_high;
3497 int i;
3498
3499 tabla = snd_soc_codec_get_drvdata(codec);
3500 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3501 plug_type = TABLA_MBHC_CAL_PLUG_TYPE_PTR(tabla->calibration);
3502
3503 if (tabla->mclk_freq == TABLA_MCLK_RATE_12288KHZ) {
3504 tabla->mbhc_data.nready = 3;
3505 tabla->mbhc_data.npoll = 9;
3506 tabla->mbhc_data.nbounce_wait = 30;
3507 } else if (tabla->mclk_freq == TABLA_MCLK_RATE_9600KHZ) {
3508 tabla->mbhc_data.nready = 2;
3509 tabla->mbhc_data.npoll = 7;
3510 tabla->mbhc_data.nbounce_wait = 23;
Joonwoo Park433149a2012-01-11 09:53:54 -08003511 } else
3512 WARN(1, "Unsupported mclk freq %d\n", tabla->mclk_freq);
Joonwoo Park0976d012011-12-22 11:48:18 -08003513
Joonwoo Park433149a2012-01-11 09:53:54 -08003514 tabla->mbhc_data.t_sta_dce = ((1000 * 256) / (tabla->mclk_freq / 1000) *
3515 tabla->mbhc_data.nready) + 10;
Joonwoo Park0976d012011-12-22 11:48:18 -08003516 tabla->mbhc_data.v_ins_hu =
3517 tabla_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
3518 tabla->mbhc_data.v_ins_h =
3519 tabla_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
3520
3521 btn_high = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_V_BTN_HIGH);
3522 for (i = 0; i < btn_det->num_btn; i++)
3523 btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
3524
3525 tabla->mbhc_data.v_b1_h = tabla_codec_v_sta_dce(codec, DCE, btn_mv);
3526 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
3527
3528 tabla->mbhc_data.v_b1_hu =
3529 tabla_codec_v_sta_dce(codec, STA, btn_delta_mv);
3530
3531 btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
3532
3533 tabla->mbhc_data.v_b1_huc =
3534 tabla_codec_v_sta_dce(codec, DCE, btn_delta_mv);
3535
3536 tabla->mbhc_data.v_brh = tabla->mbhc_data.v_b1_h;
3537 tabla->mbhc_data.v_brl = 0xFA55;
3538
3539 tabla->mbhc_data.v_no_mic =
3540 tabla_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
3541}
3542
3543void tabla_mbhc_init(struct snd_soc_codec *codec)
3544{
3545 struct tabla_priv *tabla;
3546 struct tabla_mbhc_general_cfg *generic;
3547 struct tabla_mbhc_btn_detect_cfg *btn_det;
3548 int n;
3549 u8 tabla_ver;
3550 u8 *n_cic, *gain;
3551
3552 tabla = snd_soc_codec_get_drvdata(codec);
3553 generic = TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
3554 btn_det = TABLA_MBHC_CAL_BTN_DET_PTR(tabla->calibration);
3555
3556 tabla_ver = snd_soc_read(codec, TABLA_A_CHIP_VERSION);
3557 tabla_ver &= 0x1F;
3558
3559 for (n = 0; n < 8; n++) {
3560 if ((tabla_ver != TABLA_VERSION_1_0 &&
3561 tabla_ver != TABLA_VERSION_1_1) || n != 7) {
3562 snd_soc_update_bits(codec,
3563 TABLA_A_CDC_MBHC_FEATURE_B1_CFG,
3564 0x07, n);
3565 snd_soc_write(codec, TABLA_A_CDC_MBHC_FEATURE_B2_CFG,
3566 btn_det->c[n]);
3567 }
3568 }
3569 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x07,
3570 btn_det->nc);
3571
3572 n_cic = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_N_CIC);
3573 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
3574 n_cic[0]);
3575
3576 gain = tabla_mbhc_cal_btn_det_mp(btn_det, TABLA_BTN_DET_GAIN);
3577 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B2_CTL, 0x78, gain[0] << 3);
3578
3579 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
3580 generic->mbhc_nsa << 4);
3581
3582 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
3583 btn_det->n_meas);
3584
3585 snd_soc_write(codec, TABLA_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
3586
3587 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
3588
3589 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x78,
3590 btn_det->mbhc_nsc << 3);
3591
3592 snd_soc_update_bits(codec, TABLA_A_MICB_4_MBHC, 0x03, TABLA_MICBIAS2);
3593
3594 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
3595}
3596
Patrick Lai64b43262011-12-06 17:29:15 -08003597static bool tabla_mbhc_fw_validate(const struct firmware *fw)
3598{
3599 u32 cfg_offset;
3600 struct tabla_mbhc_imped_detect_cfg *imped_cfg;
3601 struct tabla_mbhc_btn_detect_cfg *btn_cfg;
3602
3603 if (fw->size < TABLA_MBHC_CAL_MIN_SIZE)
3604 return false;
3605
3606 /* previous check guarantees that there is enough fw data up
3607 * to num_btn
3608 */
3609 btn_cfg = TABLA_MBHC_CAL_BTN_DET_PTR(fw->data);
3610 cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
3611 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_BTN_SZ(btn_cfg)))
3612 return false;
3613
3614 /* previous check guarantees that there is enough fw data up
3615 * to start of impedance detection configuration
3616 */
3617 imped_cfg = TABLA_MBHC_CAL_IMPED_DET_PTR(fw->data);
3618 cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
3619
3620 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_MIN_SZ))
3621 return false;
3622
3623 if (fw->size < (cfg_offset + TABLA_MBHC_CAL_IMPED_SZ(imped_cfg)))
3624 return false;
3625
3626 return true;
3627}
3628static void mbhc_fw_read(struct work_struct *work)
3629{
3630 struct delayed_work *dwork;
3631 struct tabla_priv *tabla;
3632 struct snd_soc_codec *codec;
3633 const struct firmware *fw;
3634 int ret = -1, retry = 0, rc;
3635
3636 dwork = to_delayed_work(work);
3637 tabla = container_of(dwork, struct tabla_priv,
3638 mbhc_firmware_dwork);
3639 codec = tabla->codec;
3640
3641 while (retry < MBHC_FW_READ_ATTEMPTS) {
3642 retry++;
3643 pr_info("%s:Attempt %d to request MBHC firmware\n",
3644 __func__, retry);
3645 ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
3646 codec->dev);
3647
3648 if (ret != 0) {
3649 usleep_range(MBHC_FW_READ_TIMEOUT,
3650 MBHC_FW_READ_TIMEOUT);
3651 } else {
3652 pr_info("%s: MBHC Firmware read succesful\n", __func__);
3653 break;
3654 }
3655 }
3656
3657 if (ret != 0) {
3658 pr_err("%s: Cannot load MBHC firmware use default cal\n",
3659 __func__);
3660 } else if (tabla_mbhc_fw_validate(fw) == false) {
3661 pr_err("%s: Invalid MBHC cal data size use default cal\n",
3662 __func__);
3663 release_firmware(fw);
3664 } else {
3665 tabla->calibration = (void *)fw->data;
3666 tabla->mbhc_fw = fw;
3667 }
3668
3669 tabla->mclk_cb(codec, 1);
3670 tabla_mbhc_init(codec);
3671 tabla_mbhc_cal(codec);
3672 tabla_mbhc_calc_thres(codec);
3673 tabla->mclk_cb(codec, 0);
3674 tabla_codec_calibrate_hs_polling(codec);
3675 rc = tabla_codec_enable_hs_detect(codec, 1);
3676
3677 if (IS_ERR_VALUE(rc))
3678 pr_err("%s: Failed to setup MBHC detection\n", __func__);
3679
3680}
3681
Bradley Rubincb1e2732011-06-23 16:49:20 -07003682int tabla_hs_detect(struct snd_soc_codec *codec,
Joonwoo Park0976d012011-12-22 11:48:18 -08003683 struct snd_soc_jack *headset_jack,
3684 struct snd_soc_jack *button_jack,
3685 void *calibration, enum tabla_micbias_num micbias,
3686 int (*mclk_cb_fn) (struct snd_soc_codec*, int),
3687 int read_fw_bin, u32 mclk_rate)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003688{
3689 struct tabla_priv *tabla;
Patrick Lai64b43262011-12-06 17:29:15 -08003690 int rc = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07003691
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003692 if (!codec || !calibration) {
3693 pr_err("Error: no codec or calibration\n");
3694 return -EINVAL;
3695 }
3696 tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003697 tabla->headset_jack = headset_jack;
3698 tabla->button_jack = button_jack;
Joonwoo Park0976d012011-12-22 11:48:18 -08003699 tabla->micbias = micbias;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003700 tabla->calibration = calibration;
Joonwoo Park0976d012011-12-22 11:48:18 -08003701 tabla->mclk_cb = mclk_cb_fn;
3702 tabla->mclk_freq = mclk_rate;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07003703 tabla_get_mbhc_micbias_regs(codec, &tabla->mbhc_bias_regs);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003704
Bhalchandra Gajare19d9c132011-11-18 14:57:08 -08003705 /* Put CFILT in fast mode by default */
3706 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.cfilt_ctl,
3707 0x40, TABLA_CFILT_FAST_MODE);
Patrick Lai64b43262011-12-06 17:29:15 -08003708 INIT_DELAYED_WORK(&tabla->mbhc_firmware_dwork, mbhc_fw_read);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003709 INIT_DELAYED_WORK(&tabla->btn0_dwork, btn0_lpress_fn);
Patrick Lai49efeac2011-11-03 11:01:12 -07003710 INIT_WORK(&tabla->hphlocp_work, hphlocp_off_report);
3711 INIT_WORK(&tabla->hphrocp_work, hphrocp_off_report);
Joonwoo Park0976d012011-12-22 11:48:18 -08003712
3713 if (!read_fw_bin) {
3714 tabla->mclk_cb(codec, 1);
3715 tabla_mbhc_init(codec);
3716 tabla_mbhc_cal(codec);
3717 tabla_mbhc_calc_thres(codec);
3718 tabla->mclk_cb(codec, 0);
3719 tabla_codec_calibrate_hs_polling(codec);
3720 rc = tabla_codec_enable_hs_detect(codec, 1);
3721 } else {
Patrick Lai64b43262011-12-06 17:29:15 -08003722 schedule_delayed_work(&tabla->mbhc_firmware_dwork,
3723 usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
Joonwoo Park0976d012011-12-22 11:48:18 -08003724 }
Patrick Lai49efeac2011-11-03 11:01:12 -07003725
3726 if (!IS_ERR_VALUE(rc)) {
3727 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3728 0x10);
3729 tabla_enable_irq(codec->control_data,
3730 TABLA_IRQ_HPH_PA_OCPL_FAULT);
3731 tabla_enable_irq(codec->control_data,
3732 TABLA_IRQ_HPH_PA_OCPR_FAULT);
3733 }
3734
3735 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003736}
3737EXPORT_SYMBOL_GPL(tabla_hs_detect);
3738
Bradley Rubincb1e2732011-06-23 16:49:20 -07003739static irqreturn_t tabla_dce_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003740{
3741 struct tabla_priv *priv = data;
3742 struct snd_soc_codec *codec = priv->codec;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003743 short bias_value;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003744
3745 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
3746 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003747 tabla_lock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003748
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003749 bias_value = tabla_codec_read_dce_result(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003750 pr_debug("%s: button press interrupt, DCE: %d,%d\n",
3751 __func__, bias_value,
3752 tabla_codec_sta_dce_v(codec, 1, bias_value));
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07003753
Bhalchandra Gajare30cf4842011-10-17 18:12:52 -07003754 bias_value = tabla_codec_read_sta_result(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003755 pr_debug("%s: button press interrupt, STA: %d,%d\n",
3756 __func__, bias_value,
3757 tabla_codec_sta_dce_v(codec, 0, bias_value));
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003758 /*
3759 * TODO: If button pressed is not button 0,
3760 * report the button press event immediately.
3761 */
3762 priv->buttons_pressed |= SND_JACK_BTN_0;
Bradley Rubincb1e2732011-06-23 16:49:20 -07003763
Bradley Rubin688c66a2011-08-16 12:25:13 -07003764 msleep(100);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003765
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003766 if (schedule_delayed_work(&priv->btn0_dwork,
3767 msecs_to_jiffies(400)) == 0) {
3768 WARN(1, "Button pressed twice without release event\n");
3769 tabla_unlock_sleep(priv);
3770 }
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003771
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003772 return IRQ_HANDLED;
3773}
3774
Bradley Rubincb1e2732011-06-23 16:49:20 -07003775static irqreturn_t tabla_release_handler(int irq, void *data)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003776{
3777 struct tabla_priv *priv = data;
3778 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08003779 int ret, mb_v;
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003780
Bradley Rubin4d09cf42011-08-17 17:59:16 -07003781 pr_debug("%s\n", __func__);
3782 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003783 tabla_lock_sleep(priv);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003784
Bradley Rubincb1e2732011-06-23 16:49:20 -07003785 if (priv->buttons_pressed & SND_JACK_BTN_0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003786 ret = cancel_delayed_work(&priv->btn0_dwork);
3787
3788 if (ret == 0) {
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003789 pr_debug("%s: Reporting long button release event\n",
3790 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08003791 if (priv->button_jack)
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003792 tabla_snd_soc_jack_report(priv,
3793 priv->button_jack, 0,
3794 SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003795 } else {
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003796 /* if scheduled btn0_dwork is canceled from here,
3797 * we have to unlock from here instead btn0_work */
3798 tabla_unlock_sleep(priv);
Joonwoo Park0976d012011-12-22 11:48:18 -08003799 mb_v = tabla_codec_sta_dce(codec, 0);
3800 pr_debug("%s: Mic Voltage on release STA: %d,%d\n",
3801 __func__, mb_v,
3802 tabla_codec_sta_dce_v(codec, 0, mb_v));
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003803
Joonwoo Park0976d012011-12-22 11:48:18 -08003804 if (mb_v < -2000 || mb_v > -670)
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003805 pr_debug("%s: Fake buttton press interrupt\n",
3806 __func__);
Joonwoo Park0976d012011-12-22 11:48:18 -08003807 else if (priv->button_jack) {
3808 pr_debug("%s:reporting short button "
3809 "press and release\n", __func__);
3810 tabla_snd_soc_jack_report(priv,
3811 priv->button_jack,
3812 SND_JACK_BTN_0,
3813 SND_JACK_BTN_0);
3814 tabla_snd_soc_jack_report(priv,
3815 priv->button_jack,
3816 0, SND_JACK_BTN_0);
Bhalchandra Gajare0a792b12011-09-06 16:36:58 -07003817 }
3818 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003819
Bradley Rubincb1e2732011-06-23 16:49:20 -07003820 priv->buttons_pressed &= ~SND_JACK_BTN_0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003821 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003822
Bradley Rubin688c66a2011-08-16 12:25:13 -07003823 tabla_codec_start_hs_polling(codec);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003824 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003825 return IRQ_HANDLED;
3826}
3827
Bradley Rubincb1e2732011-06-23 16:49:20 -07003828static void tabla_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
3829{
3830 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Joonwoo Park0976d012011-12-22 11:48:18 -08003831 const struct tabla_mbhc_general_cfg *generic =
3832 TABLA_MBHC_CAL_GENERAL_PTR(tabla->calibration);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003833
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003834 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003835 tabla_codec_enable_config_mode(codec, 1);
3836
3837 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
3838 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003839
Joonwoo Park0976d012011-12-22 11:48:18 -08003840 snd_soc_update_bits(codec, tabla->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
3841
3842 usleep_range(generic->t_shutdown_plug_rem,
3843 generic->t_shutdown_plug_rem);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003844
3845 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003846 if (!tabla->mclk_enabled && !tabla->mbhc_polling_active)
Bradley Rubincb1e2732011-06-23 16:49:20 -07003847 tabla_codec_enable_config_mode(codec, 0);
3848
3849 snd_soc_write(codec, TABLA_A_MBHC_SCALING_MUX_1, 0x00);
3850}
3851
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003852static void tabla_codec_shutdown_hs_polling(struct snd_soc_codec *codec)
3853{
3854 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003855
3856 tabla_codec_shutdown_hs_removal_detect(codec);
3857
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07003858 if (!tabla->mclk_enabled) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003859 snd_soc_update_bits(codec, TABLA_A_TX_COM_BIAS, 0xE0, 0x00);
3860 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
3861 tabla_codec_enable_clock_block(codec, 0);
3862 }
3863
3864 tabla->mbhc_polling_active = false;
3865}
3866
Patrick Lai49efeac2011-11-03 11:01:12 -07003867static irqreturn_t tabla_hphl_ocp_irq(int irq, void *data)
3868{
3869 struct tabla_priv *tabla = data;
3870 struct snd_soc_codec *codec;
3871
3872 pr_info("%s: received HPHL OCP irq\n", __func__);
3873
3874 if (tabla) {
3875 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08003876 if (tabla->hphlocp_cnt++ < TABLA_OCP_ATTEMPT) {
3877 pr_info("%s: retry\n", __func__);
3878 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3879 0x00);
3880 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3881 0x10);
3882 } else {
3883 tabla_disable_irq(codec->control_data,
3884 TABLA_IRQ_HPH_PA_OCPL_FAULT);
3885 tabla->hphlocp_cnt = 0;
3886 tabla->hph_status |= SND_JACK_OC_HPHL;
3887 if (tabla->headset_jack)
3888 tabla_snd_soc_jack_report(tabla,
3889 tabla->headset_jack,
3890 tabla->hph_status,
3891 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07003892 }
3893 } else {
3894 pr_err("%s: Bad tabla private data\n", __func__);
3895 }
3896
3897 return IRQ_HANDLED;
3898}
3899
3900static irqreturn_t tabla_hphr_ocp_irq(int irq, void *data)
3901{
3902 struct tabla_priv *tabla = data;
3903 struct snd_soc_codec *codec;
3904
3905 pr_info("%s: received HPHR OCP irq\n", __func__);
3906
3907 if (tabla) {
3908 codec = tabla->codec;
Patrick Laic7cae882011-11-18 11:52:49 -08003909 if (tabla->hphrocp_cnt++ < TABLA_OCP_ATTEMPT) {
3910 pr_info("%s: retry\n", __func__);
3911 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3912 0x00);
3913 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL, 0x10,
3914 0x10);
3915 } else {
3916 tabla_disable_irq(codec->control_data,
3917 TABLA_IRQ_HPH_PA_OCPR_FAULT);
3918 tabla->hphrocp_cnt = 0;
3919 tabla->hph_status |= SND_JACK_OC_HPHR;
3920 if (tabla->headset_jack)
3921 tabla_snd_soc_jack_report(tabla,
3922 tabla->headset_jack,
3923 tabla->hph_status,
3924 TABLA_JACK_MASK);
Patrick Lai49efeac2011-11-03 11:01:12 -07003925 }
3926 } else {
3927 pr_err("%s: Bad tabla private data\n", __func__);
3928 }
3929
3930 return IRQ_HANDLED;
3931}
3932
Joonwoo Parka9444452011-12-08 18:48:27 -08003933static void tabla_sync_hph_state(struct tabla_priv *tabla)
3934{
3935 if (test_and_clear_bit(TABLA_HPHR_PA_OFF_ACK,
3936 &tabla->hph_pa_dac_state)) {
3937 pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
3938 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x10,
3939 1 << 4);
3940 }
3941 if (test_and_clear_bit(TABLA_HPHL_PA_OFF_ACK,
3942 &tabla->hph_pa_dac_state)) {
3943 pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
3944 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_CNP_EN, 0x20,
3945 1 << 5);
3946 }
3947
3948 if (test_and_clear_bit(TABLA_HPHR_DAC_OFF_ACK,
3949 &tabla->hph_pa_dac_state)) {
3950 pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
3951 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_R_DAC_CTL,
3952 0xC0, 0xC0);
3953 }
3954 if (test_and_clear_bit(TABLA_HPHL_DAC_OFF_ACK,
3955 &tabla->hph_pa_dac_state)) {
3956 pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
3957 snd_soc_update_bits(tabla->codec, TABLA_A_RX_HPH_L_DAC_CTL,
3958 0xC0, 0xC0);
3959 }
3960}
3961
Bradley Rubincb1e2732011-06-23 16:49:20 -07003962static irqreturn_t tabla_hs_insert_irq(int irq, void *data)
3963{
3964 struct tabla_priv *priv = data;
3965 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08003966 const struct tabla_mbhc_plug_detect_cfg *plug_det =
3967 TABLA_MBHC_CAL_PLUG_DET_PTR(priv->calibration);
Bradley Rubin355611a2011-08-24 14:01:18 -07003968 int ldo_h_on, micb_cfilt_on;
Joonwoo Park0976d012011-12-22 11:48:18 -08003969 short mb_v;
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003970 u8 is_removal;
Joonwoo Park0976d012011-12-22 11:48:18 -08003971 int mic_mv;
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07003972
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003973 pr_debug("%s: enter\n", __func__);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003974 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08003975 tabla_lock_sleep(priv);
3976
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003977 is_removal = snd_soc_read(codec, TABLA_A_CDC_MBHC_INT_CTL) & 0x02;
3978 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
3979
3980 /* Turn off both HPH and MIC line schmitt triggers */
Joonwoo Park0976d012011-12-22 11:48:18 -08003981 snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07003982 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x13, 0x00);
Bradley Rubincb1e2732011-06-23 16:49:20 -07003983
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003984 if (priv->mbhc_fake_ins_start &&
3985 time_after(jiffies, priv->mbhc_fake_ins_start +
3986 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08003987 pr_debug("%s: fake context interrupt, reset insertion\n",
Joonwoo Parkf4267c22012-01-10 13:25:24 -08003988 __func__);
3989 priv->mbhc_fake_ins_start = 0;
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08003990 tabla_codec_shutdown_hs_polling(codec);
3991 tabla_codec_enable_hs_detect(codec, 1);
3992 return IRQ_HANDLED;
3993 }
3994
Bradley Rubin355611a2011-08-24 14:01:18 -07003995 ldo_h_on = snd_soc_read(codec, TABLA_A_LDO_H_MODE_1) & 0x80;
Joonwoo Park0976d012011-12-22 11:48:18 -08003996 micb_cfilt_on = snd_soc_read(codec, priv->mbhc_bias_regs.cfilt_ctl)
3997 & 0x80;
Bradley Rubin355611a2011-08-24 14:01:18 -07003998
3999 if (!ldo_h_on)
4000 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x80);
4001 if (!micb_cfilt_on)
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004002 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004003 0x80, 0x80);
4004 if (plug_det->t_ins_complete > 20)
4005 msleep(plug_det->t_ins_complete);
4006 else
4007 usleep_range(plug_det->t_ins_complete * 1000,
4008 plug_det->t_ins_complete * 1000);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004009
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004010 if (!ldo_h_on)
4011 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x80, 0x0);
4012 if (!micb_cfilt_on)
4013 snd_soc_update_bits(codec, priv->mbhc_bias_regs.cfilt_ctl,
Joonwoo Park0976d012011-12-22 11:48:18 -08004014 0x80, 0x0);
Bhalchandra Gajare7fc72332011-10-13 19:01:55 -07004015
4016 if (is_removal) {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004017 /*
4018 * If headphone is removed while playback is in progress,
4019 * it is possible that micbias will be switched to VDDIO.
4020 */
4021 if (priv->mbhc_micbias_switched)
4022 tabla_codec_switch_micbias(codec, 0);
Patrick Lai72aa4da2011-12-08 12:38:18 -08004023 priv->hph_status &= ~SND_JACK_HEADPHONE;
Joonwoo Parka9444452011-12-08 18:48:27 -08004024
4025 /* If headphone PA is on, check if userspace receives
4026 * removal event to sync-up PA's state */
4027 if (tabla_is_hph_pa_on(codec)) {
4028 set_bit(TABLA_HPHL_PA_OFF_ACK, &priv->hph_pa_dac_state);
4029 set_bit(TABLA_HPHR_PA_OFF_ACK, &priv->hph_pa_dac_state);
4030 }
4031
4032 if (tabla_is_hph_dac_on(codec, 1))
4033 set_bit(TABLA_HPHL_DAC_OFF_ACK,
4034 &priv->hph_pa_dac_state);
4035 if (tabla_is_hph_dac_on(codec, 0))
4036 set_bit(TABLA_HPHR_DAC_OFF_ACK,
4037 &priv->hph_pa_dac_state);
4038
Bradley Rubincb1e2732011-06-23 16:49:20 -07004039 if (priv->headset_jack) {
4040 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004041 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4042 priv->hph_status,
4043 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004044 }
4045 tabla_codec_shutdown_hs_removal_detect(codec);
4046 tabla_codec_enable_hs_detect(codec, 1);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004047 tabla_unlock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004048 return IRQ_HANDLED;
4049 }
4050
Joonwoo Park0976d012011-12-22 11:48:18 -08004051 mb_v = tabla_codec_setup_hs_polling(codec);
4052 mic_mv = tabla_codec_sta_dce_v(codec, 0, mb_v);
Bradley Rubin355611a2011-08-24 14:01:18 -07004053
Joonwoo Park0976d012011-12-22 11:48:18 -08004054 if (mb_v > (short) priv->mbhc_data.v_ins_hu) {
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004055 pr_debug("%s: Fake insertion interrupt since %dmsec ago, "
4056 "STA : %d,%d\n", __func__,
4057 (priv->mbhc_fake_ins_start ?
4058 jiffies_to_msecs(jiffies -
4059 priv->mbhc_fake_ins_start) :
4060 0),
4061 mb_v, mic_mv);
4062 if (time_after(jiffies,
4063 priv->mbhc_fake_ins_start +
4064 msecs_to_jiffies(TABLA_FAKE_INS_THRESHOLD_MS))) {
4065 /* Disable HPH trigger and enable MIC line trigger */
4066 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH, 0x12,
4067 0x00);
4068 snd_soc_update_bits(codec,
4069 priv->mbhc_bias_regs.mbhc_reg, 0x60,
4070 plug_det->mic_current << 5);
4071 snd_soc_update_bits(codec,
4072 priv->mbhc_bias_regs.mbhc_reg,
4073 0x80, 0x80);
4074 usleep_range(plug_det->t_mic_pid, plug_det->t_mic_pid);
4075 snd_soc_update_bits(codec,
4076 priv->mbhc_bias_regs.mbhc_reg,
4077 0x10, 0x10);
4078 } else {
4079 if (priv->mbhc_fake_ins_start == 0)
4080 priv->mbhc_fake_ins_start = jiffies;
4081 /* Setup normal insert detection
4082 * Enable HPH Schmitt Trigger
4083 */
4084 snd_soc_update_bits(codec, TABLA_A_MBHC_HPH,
4085 0x13 | 0x0C,
4086 0x13 | plug_det->hph_current << 2);
4087 }
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004088 /* Setup for insertion detection */
4089 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x2, 0);
Bhalchandra Gajare9494fa262011-11-10 19:25:59 -08004090 tabla_enable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
4091 snd_soc_update_bits(codec, TABLA_A_CDC_MBHC_INT_CTL, 0x1, 0x1);
4092
Joonwoo Park0976d012011-12-22 11:48:18 -08004093 } else if (mb_v < (short) priv->mbhc_data.v_no_mic) {
4094 pr_debug("%s: Headphone Detected, mb_v: %d,%d\n",
4095 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004096 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004097 priv->hph_status |= SND_JACK_HEADPHONE;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004098 if (priv->headset_jack) {
4099 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004100 SND_JACK_HEADPHONE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004101 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4102 priv->hph_status,
4103 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004104 }
4105 tabla_codec_shutdown_hs_polling(codec);
4106 tabla_codec_enable_hs_detect(codec, 0);
Joonwoo Parka9444452011-12-08 18:48:27 -08004107 tabla_sync_hph_state(priv);
Bhalchandra Gajare343cbb02011-09-07 18:58:19 -07004108 } else {
Joonwoo Park0976d012011-12-22 11:48:18 -08004109 pr_debug("%s: Headset detected, mb_v: %d,%d\n",
4110 __func__, mb_v, mic_mv);
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004111 priv->mbhc_fake_ins_start = 0;
Patrick Lai49efeac2011-11-03 11:01:12 -07004112 priv->hph_status |= SND_JACK_HEADSET;
Bradley Rubincb1e2732011-06-23 16:49:20 -07004113 if (priv->headset_jack) {
4114 pr_debug("%s: Reporting insertion %d\n", __func__,
Joonwoo Park0976d012011-12-22 11:48:18 -08004115 SND_JACK_HEADSET);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004116 tabla_snd_soc_jack_report(priv, priv->headset_jack,
4117 priv->hph_status,
4118 TABLA_JACK_MASK);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004119 }
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004120 /* avoid false button press detect */
4121 msleep(50);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004122 tabla_codec_start_hs_polling(codec);
Joonwoo Parka9444452011-12-08 18:48:27 -08004123 tabla_sync_hph_state(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004124 }
4125
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004126 tabla_unlock_sleep(priv);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004127 return IRQ_HANDLED;
4128}
4129
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004130static irqreturn_t tabla_hs_remove_irq(int irq, void *data)
4131{
4132 struct tabla_priv *priv = data;
4133 struct snd_soc_codec *codec = priv->codec;
Joonwoo Park0976d012011-12-22 11:48:18 -08004134 const struct tabla_mbhc_general_cfg *generic =
4135 TABLA_MBHC_CAL_GENERAL_PTR(priv->calibration);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004136 short bias_value;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004137
4138 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4139 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
Bradley Rubin4d09cf42011-08-17 17:59:16 -07004140 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004141 tabla_lock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004142
Joonwoo Park0976d012011-12-22 11:48:18 -08004143 usleep_range(generic->t_shutdown_plug_rem,
4144 generic->t_shutdown_plug_rem);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004145
Joonwoo Park0976d012011-12-22 11:48:18 -08004146 bias_value = tabla_codec_sta_dce(codec, 1);
4147 pr_debug("removal interrupt, DCE: %d,%d\n",
4148 bias_value, tabla_codec_sta_dce_v(codec, 1, bias_value));
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004149
Joonwoo Park0976d012011-12-22 11:48:18 -08004150 if (bias_value < (short) priv->mbhc_data.v_ins_h) {
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004151 pr_debug("False alarm, headset not actually removed\n");
4152 tabla_codec_start_hs_polling(codec);
4153 } else {
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004154 /*
4155 * If this removal is not false, first check the micbias
4156 * switch status and switch it to LDOH if it is already
4157 * switched to VDDIO.
4158 */
4159 if (priv->mbhc_micbias_switched)
4160 tabla_codec_switch_micbias(codec, 0);
Patrick Lai49efeac2011-11-03 11:01:12 -07004161 priv->hph_status &= ~SND_JACK_HEADSET;
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004162 if (priv->headset_jack) {
4163 pr_debug("%s: Reporting removal\n", __func__);
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004164 tabla_snd_soc_jack_report(priv, priv->headset_jack, 0,
4165 TABLA_JACK_MASK);
Bradley Rubin89ffd0a2011-07-21 16:04:06 -07004166 }
4167 tabla_codec_shutdown_hs_polling(codec);
4168
4169 tabla_codec_enable_hs_detect(codec, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004170 }
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004171
4172 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004173 return IRQ_HANDLED;
4174}
4175
4176static unsigned long slimbus_value;
4177
4178static irqreturn_t tabla_slimbus_irq(int irq, void *data)
4179{
4180 struct tabla_priv *priv = data;
4181 struct snd_soc_codec *codec = priv->codec;
4182 int i, j;
4183 u8 val;
4184
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004185 tabla_lock_sleep(priv);
4186
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004187 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++) {
4188 slimbus_value = tabla_interface_reg_read(codec->control_data,
4189 TABLA_SLIM_PGD_PORT_INT_STATUS0 + i);
4190 for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
4191 val = tabla_interface_reg_read(codec->control_data,
4192 TABLA_SLIM_PGD_PORT_INT_SOURCE0 + i*8 + j);
4193 if (val & 0x1)
4194 pr_err_ratelimited("overflow error on port %x,"
4195 " value %x\n", i*8 + j, val);
4196 if (val & 0x2)
4197 pr_err_ratelimited("underflow error on port %x,"
4198 " value %x\n", i*8 + j, val);
4199 }
4200 tabla_interface_reg_write(codec->control_data,
4201 TABLA_SLIM_PGD_PORT_INT_CLR0 + i, 0xFF);
4202 }
4203
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004204 tabla_unlock_sleep(priv);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205 return IRQ_HANDLED;
4206}
4207
Patrick Lai3043fba2011-08-01 14:15:57 -07004208
4209static int tabla_handle_pdata(struct tabla_priv *tabla)
4210{
4211 struct snd_soc_codec *codec = tabla->codec;
4212 struct tabla_pdata *pdata = tabla->pdata;
4213 int k1, k2, k3, rc = 0;
Santosh Mardi22920282011-10-26 02:38:40 +05304214 u8 leg_mode = pdata->amic_settings.legacy_mode;
4215 u8 txfe_bypass = pdata->amic_settings.txfe_enable;
4216 u8 txfe_buff = pdata->amic_settings.txfe_buff;
4217 u8 flag = pdata->amic_settings.use_pdata;
4218 u8 i = 0, j = 0;
4219 u8 val_txfe = 0, value = 0;
Patrick Lai3043fba2011-08-01 14:15:57 -07004220
4221 if (!pdata) {
4222 rc = -ENODEV;
4223 goto done;
4224 }
4225
4226 /* Make sure settings are correct */
4227 if ((pdata->micbias.ldoh_v > TABLA_LDOH_2P85_V) ||
4228 (pdata->micbias.bias1_cfilt_sel > TABLA_CFILT3_SEL) ||
4229 (pdata->micbias.bias2_cfilt_sel > TABLA_CFILT3_SEL) ||
4230 (pdata->micbias.bias3_cfilt_sel > TABLA_CFILT3_SEL) ||
4231 (pdata->micbias.bias4_cfilt_sel > TABLA_CFILT3_SEL)) {
4232 rc = -EINVAL;
4233 goto done;
4234 }
4235
4236 /* figure out k value */
4237 k1 = tabla_find_k_value(pdata->micbias.ldoh_v,
4238 pdata->micbias.cfilt1_mv);
4239 k2 = tabla_find_k_value(pdata->micbias.ldoh_v,
4240 pdata->micbias.cfilt2_mv);
4241 k3 = tabla_find_k_value(pdata->micbias.ldoh_v,
4242 pdata->micbias.cfilt3_mv);
4243
4244 if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2) || IS_ERR_VALUE(k3)) {
4245 rc = -EINVAL;
4246 goto done;
4247 }
4248
4249 /* Set voltage level and always use LDO */
4250 snd_soc_update_bits(codec, TABLA_A_LDO_H_MODE_1, 0x0C,
4251 (pdata->micbias.ldoh_v << 2));
4252
4253 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_1_VAL, 0xFC,
4254 (k1 << 2));
4255 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_2_VAL, 0xFC,
4256 (k2 << 2));
4257 snd_soc_update_bits(codec, TABLA_A_MICB_CFILT_3_VAL, 0xFC,
4258 (k3 << 2));
4259
4260 snd_soc_update_bits(codec, TABLA_A_MICB_1_CTL, 0x60,
4261 (pdata->micbias.bias1_cfilt_sel << 5));
4262 snd_soc_update_bits(codec, TABLA_A_MICB_2_CTL, 0x60,
4263 (pdata->micbias.bias2_cfilt_sel << 5));
4264 snd_soc_update_bits(codec, TABLA_A_MICB_3_CTL, 0x60,
4265 (pdata->micbias.bias3_cfilt_sel << 5));
4266 snd_soc_update_bits(codec, TABLA_A_MICB_4_CTL, 0x60,
4267 (pdata->micbias.bias4_cfilt_sel << 5));
4268
Santosh Mardi22920282011-10-26 02:38:40 +05304269 for (i = 0; i < 6; j++, i += 2) {
4270 if (flag & (0x01 << i)) {
4271 value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
4272 val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
4273 val_txfe = val_txfe |
4274 ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
4275 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4276 0x10, value);
4277 snd_soc_update_bits(codec,
4278 TABLA_A_TX_1_2_TEST_EN + j * 10,
4279 0x30, val_txfe);
4280 }
4281 if (flag & (0x01 << (i + 1))) {
4282 value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
4283 val_txfe = (txfe_bypass &
4284 (0x01 << (i + 1))) ? 0x02 : 0x00;
4285 val_txfe |= (txfe_buff &
4286 (0x01 << (i + 1))) ? 0x01 : 0x00;
4287 snd_soc_update_bits(codec, TABLA_A_TX_1_2_EN + j * 10,
4288 0x01, value);
4289 snd_soc_update_bits(codec,
4290 TABLA_A_TX_1_2_TEST_EN + j * 10,
4291 0x03, val_txfe);
4292 }
4293 }
4294 if (flag & 0x40) {
4295 value = (leg_mode & 0x40) ? 0x10 : 0x00;
4296 value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
4297 value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
4298 snd_soc_update_bits(codec, TABLA_A_TX_7_MBHC_EN,
4299 0x13, value);
4300 }
Patrick Lai49efeac2011-11-03 11:01:12 -07004301
4302 if (pdata->ocp.use_pdata) {
4303 /* not defined in CODEC specification */
4304 if (pdata->ocp.hph_ocp_limit == 1 ||
4305 pdata->ocp.hph_ocp_limit == 5) {
4306 rc = -EINVAL;
4307 goto done;
4308 }
4309 snd_soc_update_bits(codec, TABLA_A_RX_COM_OCP_CTL,
4310 0x0F, pdata->ocp.num_attempts);
4311 snd_soc_write(codec, TABLA_A_RX_COM_OCP_COUNT,
4312 ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
4313 snd_soc_update_bits(codec, TABLA_A_RX_HPH_OCP_CTL,
4314 0xE0, (pdata->ocp.hph_ocp_limit << 5));
4315 }
Patrick Lai3043fba2011-08-01 14:15:57 -07004316done:
4317 return rc;
4318}
4319
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004320static const struct tabla_reg_mask_val tabla_1_1_reg_defaults[] = {
4321
4322 /* Tabla 1.1 MICBIAS changes */
4323 TABLA_REG_VAL(TABLA_A_MICB_1_INT_RBIAS, 0x24),
4324 TABLA_REG_VAL(TABLA_A_MICB_2_INT_RBIAS, 0x24),
4325 TABLA_REG_VAL(TABLA_A_MICB_3_INT_RBIAS, 0x24),
4326 TABLA_REG_VAL(TABLA_A_MICB_4_INT_RBIAS, 0x24),
4327
4328 /* Tabla 1.1 HPH changes */
4329 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_PA, 0x57),
4330 TABLA_REG_VAL(TABLA_A_RX_HPH_BIAS_LDO, 0x56),
4331
4332 /* Tabla 1.1 EAR PA changes */
4333 TABLA_REG_VAL(TABLA_A_RX_EAR_BIAS_PA, 0xA6),
4334 TABLA_REG_VAL(TABLA_A_RX_EAR_GAIN, 0x02),
4335 TABLA_REG_VAL(TABLA_A_RX_EAR_VCM, 0x03),
4336
4337 /* Tabla 1.1 Lineout_5 Changes */
4338 TABLA_REG_VAL(TABLA_A_RX_LINE_5_GAIN, 0x10),
4339
4340 /* Tabla 1.1 RX Changes */
4341 TABLA_REG_VAL(TABLA_A_CDC_RX1_B5_CTL, 0x78),
4342 TABLA_REG_VAL(TABLA_A_CDC_RX2_B5_CTL, 0x78),
4343 TABLA_REG_VAL(TABLA_A_CDC_RX3_B5_CTL, 0x78),
4344 TABLA_REG_VAL(TABLA_A_CDC_RX4_B5_CTL, 0x78),
4345 TABLA_REG_VAL(TABLA_A_CDC_RX5_B5_CTL, 0x78),
4346 TABLA_REG_VAL(TABLA_A_CDC_RX6_B5_CTL, 0x78),
4347 TABLA_REG_VAL(TABLA_A_CDC_RX7_B5_CTL, 0x78),
4348
4349 /* Tabla 1.1 RX1 and RX2 Changes */
4350 TABLA_REG_VAL(TABLA_A_CDC_RX1_B6_CTL, 0xA0),
4351 TABLA_REG_VAL(TABLA_A_CDC_RX2_B6_CTL, 0xA0),
4352
4353 /* Tabla 1.1 RX3 to RX7 Changes */
4354 TABLA_REG_VAL(TABLA_A_CDC_RX3_B6_CTL, 0x80),
4355 TABLA_REG_VAL(TABLA_A_CDC_RX4_B6_CTL, 0x80),
4356 TABLA_REG_VAL(TABLA_A_CDC_RX5_B6_CTL, 0x80),
4357 TABLA_REG_VAL(TABLA_A_CDC_RX6_B6_CTL, 0x80),
4358 TABLA_REG_VAL(TABLA_A_CDC_RX7_B6_CTL, 0x80),
4359
4360 /* Tabla 1.1 CLASSG Changes */
4361 TABLA_REG_VAL(TABLA_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
4362};
4363
4364static const struct tabla_reg_mask_val tabla_2_0_reg_defaults[] = {
4365
4366 /* Tabla 2.0 MICBIAS changes */
4367 TABLA_REG_VAL(TABLA_A_MICB_2_MBHC, 0x02),
4368};
4369
4370static void tabla_update_reg_defaults(struct snd_soc_codec *codec)
4371{
4372 u32 i;
4373
4374 for (i = 0; i < ARRAY_SIZE(tabla_1_1_reg_defaults); i++)
4375 snd_soc_write(codec, tabla_1_1_reg_defaults[i].reg,
4376 tabla_1_1_reg_defaults[i].val);
4377
4378 for (i = 0; i < ARRAY_SIZE(tabla_2_0_reg_defaults); i++)
4379 snd_soc_write(codec, tabla_2_0_reg_defaults[i].reg,
4380 tabla_2_0_reg_defaults[i].val);
4381}
4382
4383static const struct tabla_reg_mask_val tabla_codec_reg_init_val[] = {
Patrick Laic7cae882011-11-18 11:52:49 -08004384 /* Initialize current threshold to 350MA
4385 * number of wait and run cycles to 4096
4386 */
Patrick Lai49efeac2011-11-03 11:01:12 -07004387 {TABLA_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
Patrick Laic7cae882011-11-18 11:52:49 -08004388 {TABLA_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004389
Santosh Mardi32171012011-10-28 23:32:06 +05304390 {TABLA_A_QFUSE_CTL, 0xFF, 0x03},
4391
Kiran Kandi1f6fd722011-08-11 10:36:11 -07004392 /* Initialize gain registers to use register gain */
4393 {TABLA_A_RX_HPH_L_GAIN, 0x10, 0x10},
4394 {TABLA_A_RX_HPH_R_GAIN, 0x10, 0x10},
4395 {TABLA_A_RX_LINE_1_GAIN, 0x10, 0x10},
4396 {TABLA_A_RX_LINE_2_GAIN, 0x10, 0x10},
4397 {TABLA_A_RX_LINE_3_GAIN, 0x10, 0x10},
4398 {TABLA_A_RX_LINE_4_GAIN, 0x10, 0x10},
4399
4400 /* Initialize mic biases to differential mode */
4401 {TABLA_A_MICB_1_INT_RBIAS, 0x24, 0x24},
4402 {TABLA_A_MICB_2_INT_RBIAS, 0x24, 0x24},
4403 {TABLA_A_MICB_3_INT_RBIAS, 0x24, 0x24},
4404 {TABLA_A_MICB_4_INT_RBIAS, 0x24, 0x24},
4405
4406 {TABLA_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
4407
4408 /* Use 16 bit sample size for TX1 to TX6 */
4409 {TABLA_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
4410 {TABLA_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
4411 {TABLA_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
4412 {TABLA_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
4413 {TABLA_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
4414 {TABLA_A_CDC_CONN_TX_SB_B6_CTL, 0x30, 0x20},
4415
4416 /* Use 16 bit sample size for TX7 to TX10 */
4417 {TABLA_A_CDC_CONN_TX_SB_B7_CTL, 0x60, 0x40},
4418 {TABLA_A_CDC_CONN_TX_SB_B8_CTL, 0x60, 0x40},
4419 {TABLA_A_CDC_CONN_TX_SB_B9_CTL, 0x60, 0x40},
4420 {TABLA_A_CDC_CONN_TX_SB_B10_CTL, 0x60, 0x40},
4421
4422 /* Use 16 bit sample size for RX */
4423 {TABLA_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
4424 {TABLA_A_CDC_CONN_RX_SB_B2_CTL, 0xFF, 0xAA},
4425
4426 /*enable HPF filter for TX paths */
4427 {TABLA_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
4428 {TABLA_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
4429 {TABLA_A_CDC_TX3_MUX_CTL, 0x8, 0x0},
4430 {TABLA_A_CDC_TX4_MUX_CTL, 0x8, 0x0},
4431 {TABLA_A_CDC_TX5_MUX_CTL, 0x8, 0x0},
4432 {TABLA_A_CDC_TX6_MUX_CTL, 0x8, 0x0},
4433 {TABLA_A_CDC_TX7_MUX_CTL, 0x8, 0x0},
4434 {TABLA_A_CDC_TX8_MUX_CTL, 0x8, 0x0},
4435 {TABLA_A_CDC_TX9_MUX_CTL, 0x8, 0x0},
4436 {TABLA_A_CDC_TX10_MUX_CTL, 0x8, 0x0},
4437};
4438
4439static void tabla_codec_init_reg(struct snd_soc_codec *codec)
4440{
4441 u32 i;
4442
4443 for (i = 0; i < ARRAY_SIZE(tabla_codec_reg_init_val); i++)
4444 snd_soc_update_bits(codec, tabla_codec_reg_init_val[i].reg,
4445 tabla_codec_reg_init_val[i].mask,
4446 tabla_codec_reg_init_val[i].val);
4447}
4448
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004449static int tabla_codec_probe(struct snd_soc_codec *codec)
4450{
4451 struct tabla *control;
4452 struct tabla_priv *tabla;
4453 struct snd_soc_dapm_context *dapm = &codec->dapm;
4454 int ret = 0;
4455 int i;
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004456 u8 tabla_version;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004457
4458 codec->control_data = dev_get_drvdata(codec->dev->parent);
4459 control = codec->control_data;
4460
4461 tabla = kzalloc(sizeof(struct tabla_priv), GFP_KERNEL);
4462 if (!tabla) {
4463 dev_err(codec->dev, "Failed to allocate private data\n");
4464 return -ENOMEM;
4465 }
4466
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004467 /* Make sure mbhc micbias register addresses are zeroed out */
4468 memset(&tabla->mbhc_bias_regs, 0,
4469 sizeof(struct mbhc_micbias_regs));
Bhalchandra Gajared9ebb6c2011-10-03 19:54:41 -07004470 tabla->cfilt_k_value = 0;
4471 tabla->mbhc_micbias_switched = false;
Bhalchandra Gajare02d90cd2011-09-30 16:14:00 -07004472
Joonwoo Park0976d012011-12-22 11:48:18 -08004473 /* Make sure mbhc intenal calibration data is zeroed out */
4474 memset(&tabla->mbhc_data, 0,
4475 sizeof(struct mbhc_internal_cal_data));
Joonwoo Park433149a2012-01-11 09:53:54 -08004476 tabla->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
Joonwoo Park0976d012011-12-22 11:48:18 -08004477 tabla->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
4478 tabla->mbhc_data.t_sta = DEFAULT_STA_WAIT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004479 snd_soc_codec_set_drvdata(codec, tabla);
4480
Kiran Kandi6fae8bf2011-08-15 10:36:42 -07004481 tabla->mclk_enabled = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004482 tabla->bandgap_type = TABLA_BANDGAP_OFF;
4483 tabla->clock_active = false;
4484 tabla->config_mode_active = false;
4485 tabla->mbhc_polling_active = false;
Joonwoo Parkf4267c22012-01-10 13:25:24 -08004486 tabla->mbhc_fake_ins_start = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004487 tabla->no_mic_headset_override = false;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004488 tabla->codec = codec;
Patrick Lai3043fba2011-08-01 14:15:57 -07004489 tabla->pdata = dev_get_platdata(codec->dev->parent);
Santosh Mardie15e2302011-11-15 10:39:23 +05304490 tabla->intf_type = tabla_get_intf_type();
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004491 atomic_set(&tabla->pm_cnt, 1);
4492 init_waitqueue_head(&tabla->pm_wq);
Patrick Lai3043fba2011-08-01 14:15:57 -07004493
Santosh Mardi22920282011-10-26 02:38:40 +05304494 tabla_update_reg_defaults(codec);
4495 tabla_codec_init_reg(codec);
Patrick Lai3043fba2011-08-01 14:15:57 -07004496
Santosh Mardi22920282011-10-26 02:38:40 +05304497 ret = tabla_handle_pdata(tabla);
Patrick Lai3043fba2011-08-01 14:15:57 -07004498 if (IS_ERR_VALUE(ret)) {
4499 pr_err("%s: bad pdata\n", __func__);
4500 goto err_pdata;
4501 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004502
4503 /* TODO only enable bandgap when necessary in order to save power */
4504 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_AUDIO_MODE);
4505 tabla_codec_enable_clock_block(codec, 0);
4506
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004507 snd_soc_add_controls(codec, tabla_snd_controls,
4508 ARRAY_SIZE(tabla_snd_controls));
4509 snd_soc_dapm_new_controls(dapm, tabla_dapm_widgets,
4510 ARRAY_SIZE(tabla_dapm_widgets));
Santosh Mardie15e2302011-11-15 10:39:23 +05304511 if (tabla->intf_type == TABLA_INTERFACE_TYPE_I2C) {
4512 snd_soc_dapm_new_controls(dapm, tabla_dapm_i2s_widgets,
4513 ARRAY_SIZE(tabla_dapm_i2s_widgets));
4514 snd_soc_dapm_add_routes(dapm, audio_i2s_map,
4515 ARRAY_SIZE(audio_i2s_map));
4516 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004517 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004518
4519 tabla_version = snd_soc_read(codec, TABLA_A_CHIP_VERSION);
Joonwoo Park0976d012011-12-22 11:48:18 -08004520 pr_info("%s : Tabla version reg 0x%2x\n", __func__,
4521 (u32)tabla_version);
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004522
4523 tabla_version &= 0x1F;
4524 pr_info("%s : Tabla version %u\n", __func__, (u32)tabla_version);
4525
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004526 if ((tabla_version == TABLA_VERSION_1_0) ||
4527 (tabla_version == TABLA_VERSION_1_1)) {
4528 snd_soc_dapm_add_routes(dapm, tabla_1_x_lineout_2_to_4_map,
Kiran Kandi8b3a8302011-09-27 16:13:28 -07004529 ARRAY_SIZE(tabla_1_x_lineout_2_to_4_map));
4530
Kiran Kandi7a9fd902011-11-14 13:51:45 -08004531 } else if (tabla_version == TABLA_VERSION_2_0) {
4532 snd_soc_dapm_add_routes(dapm, tabla_2_x_lineout_2_to_4_map,
4533 ARRAY_SIZE(tabla_2_x_lineout_2_to_4_map));
4534 } else {
4535 pr_err("%s : ERROR. Unsupported Tabla version 0x%2x\n",
4536 __func__, (u32)tabla_version);
4537 goto err_pdata;
4538 }
4539
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004540 snd_soc_dapm_sync(dapm);
4541
4542 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION,
4543 tabla_hs_insert_irq, "Headset insert detect", tabla);
4544 if (ret) {
4545 pr_err("%s: Failed to request irq %d\n", __func__,
4546 TABLA_IRQ_MBHC_INSERTION);
4547 goto err_insert_irq;
4548 }
4549 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION);
4550
4551 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL,
4552 tabla_hs_remove_irq, "Headset remove detect", tabla);
4553 if (ret) {
4554 pr_err("%s: Failed to request irq %d\n", __func__,
4555 TABLA_IRQ_MBHC_REMOVAL);
4556 goto err_remove_irq;
4557 }
4558 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL);
4559
4560 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL,
Bradley Rubincb1e2732011-06-23 16:49:20 -07004561 tabla_dce_handler, "DC Estimation detect", tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004562 if (ret) {
4563 pr_err("%s: Failed to request irq %d\n", __func__,
4564 TABLA_IRQ_MBHC_POTENTIAL);
4565 goto err_potential_irq;
4566 }
4567 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL);
4568
Bradley Rubincb1e2732011-06-23 16:49:20 -07004569 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE,
4570 tabla_release_handler, "Button Release detect", tabla);
4571 if (ret) {
4572 pr_err("%s: Failed to request irq %d\n", __func__,
4573 TABLA_IRQ_MBHC_RELEASE);
4574 goto err_release_irq;
4575 }
Bradley Rubin4d09cf42011-08-17 17:59:16 -07004576 tabla_disable_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004577
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004578 ret = tabla_request_irq(codec->control_data, TABLA_IRQ_SLIMBUS,
4579 tabla_slimbus_irq, "SLIMBUS Slave", tabla);
4580 if (ret) {
4581 pr_err("%s: Failed to request irq %d\n", __func__,
4582 TABLA_IRQ_SLIMBUS);
4583 goto err_slimbus_irq;
4584 }
4585
4586 for (i = 0; i < TABLA_SLIM_NUM_PORT_REG; i++)
4587 tabla_interface_reg_write(codec->control_data,
4588 TABLA_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
4589
Patrick Lai49efeac2011-11-03 11:01:12 -07004590 ret = tabla_request_irq(codec->control_data,
4591 TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla_hphl_ocp_irq,
4592 "HPH_L OCP detect", tabla);
4593 if (ret) {
4594 pr_err("%s: Failed to request irq %d\n", __func__,
4595 TABLA_IRQ_HPH_PA_OCPL_FAULT);
4596 goto err_hphl_ocp_irq;
4597 }
Patrick Lai92032be2011-12-19 14:14:25 -08004598 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004599
4600 ret = tabla_request_irq(codec->control_data,
4601 TABLA_IRQ_HPH_PA_OCPR_FAULT, tabla_hphr_ocp_irq,
4602 "HPH_R OCP detect", tabla);
4603 if (ret) {
4604 pr_err("%s: Failed to request irq %d\n", __func__,
4605 TABLA_IRQ_HPH_PA_OCPR_FAULT);
4606 goto err_hphr_ocp_irq;
4607 }
Patrick Lai92032be2011-12-19 14:14:25 -08004608 tabla_disable_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPR_FAULT);
Patrick Lai49efeac2011-11-03 11:01:12 -07004609
Bradley Rubincb3950a2011-08-18 13:07:26 -07004610#ifdef CONFIG_DEBUG_FS
4611 debug_tabla_priv = tabla;
4612#endif
4613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004614 return ret;
4615
Patrick Lai49efeac2011-11-03 11:01:12 -07004616err_hphr_ocp_irq:
4617 tabla_free_irq(codec->control_data, TABLA_IRQ_HPH_PA_OCPL_FAULT, tabla);
4618err_hphl_ocp_irq:
4619 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004620err_slimbus_irq:
Bradley Rubincb1e2732011-06-23 16:49:20 -07004621 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
4622err_release_irq:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004623 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4624err_potential_irq:
4625 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4626err_remove_irq:
4627 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4628err_insert_irq:
Patrick Lai3043fba2011-08-01 14:15:57 -07004629err_pdata:
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004630 kfree(tabla);
4631 return ret;
4632}
4633static int tabla_codec_remove(struct snd_soc_codec *codec)
4634{
4635 struct tabla_priv *tabla = snd_soc_codec_get_drvdata(codec);
4636 tabla_free_irq(codec->control_data, TABLA_IRQ_SLIMBUS, tabla);
Bradley Rubincb1e2732011-06-23 16:49:20 -07004637 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_RELEASE, tabla);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004638 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_POTENTIAL, tabla);
4639 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_REMOVAL, tabla);
4640 tabla_free_irq(codec->control_data, TABLA_IRQ_MBHC_INSERTION, tabla);
4641 tabla_codec_disable_clock_block(codec);
4642 tabla_codec_enable_bandgap(codec, TABLA_BANDGAP_OFF);
Patrick Lai64b43262011-12-06 17:29:15 -08004643 if (tabla->mbhc_fw)
4644 release_firmware(tabla->mbhc_fw);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004645 kfree(tabla);
4646 return 0;
4647}
4648static struct snd_soc_codec_driver soc_codec_dev_tabla = {
4649 .probe = tabla_codec_probe,
4650 .remove = tabla_codec_remove,
4651 .read = tabla_read,
4652 .write = tabla_write,
4653
4654 .readable_register = tabla_readable,
4655 .volatile_register = tabla_volatile,
4656
4657 .reg_cache_size = TABLA_CACHE_SIZE,
4658 .reg_cache_default = tabla_reg_defaults,
4659 .reg_word_size = 1,
4660};
Bradley Rubincb3950a2011-08-18 13:07:26 -07004661
4662#ifdef CONFIG_DEBUG_FS
4663static struct dentry *debugfs_poke;
4664
4665static int codec_debug_open(struct inode *inode, struct file *file)
4666{
4667 file->private_data = inode->i_private;
4668 return 0;
4669}
4670
4671static ssize_t codec_debug_write(struct file *filp,
4672 const char __user *ubuf, size_t cnt, loff_t *ppos)
4673{
4674 char lbuf[32];
4675 char *buf;
4676 int rc;
4677
4678 if (cnt > sizeof(lbuf) - 1)
4679 return -EINVAL;
4680
4681 rc = copy_from_user(lbuf, ubuf, cnt);
4682 if (rc)
4683 return -EFAULT;
4684
4685 lbuf[cnt] = '\0';
4686 buf = (char *)lbuf;
4687 debug_tabla_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
4688 ? false : true;
4689
4690 return rc;
4691}
4692
4693static const struct file_operations codec_debug_ops = {
4694 .open = codec_debug_open,
4695 .write = codec_debug_write,
4696};
4697#endif
4698
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004699#ifdef CONFIG_PM
4700static int tabla_suspend(struct device *dev)
4701{
4702 int ret = 0, cnt;
4703 struct platform_device *pdev = to_platform_device(dev);
4704 struct tabla_priv *tabla = platform_get_drvdata(pdev);
4705
4706 cnt = atomic_read(&tabla->pm_cnt);
4707 if (cnt > 0) {
4708 if (wait_event_timeout(tabla->pm_wq,
4709 (atomic_cmpxchg(&tabla->pm_cnt, 1, 0)
4710 == 1), 5 * HZ)) {
4711 dev_dbg(dev, "system suspend pm_cnt %d\n",
4712 atomic_read(&tabla->pm_cnt));
4713 } else {
4714 dev_err(dev, "%s timed out pm_cnt = %d\n",
4715 __func__, atomic_read(&tabla->pm_cnt));
4716 WARN_ON_ONCE(1);
4717 ret = -EBUSY;
4718 }
4719 } else if (cnt == 0)
4720 dev_warn(dev, "system is already in suspend, pm_cnt %d\n",
4721 atomic_read(&tabla->pm_cnt));
4722 else {
4723 WARN(1, "unexpected pm_cnt %d\n", cnt);
4724 ret = -EFAULT;
4725 }
4726
4727 return ret;
4728}
4729
4730static int tabla_resume(struct device *dev)
4731{
4732 int ret = 0, cnt;
4733 struct platform_device *pdev = to_platform_device(dev);
4734 struct tabla_priv *tabla = platform_get_drvdata(pdev);
4735
4736 cnt = atomic_cmpxchg(&tabla->pm_cnt, 0, 1);
4737 if (cnt == 0) {
4738 dev_dbg(dev, "system resume, pm_cnt %d\n",
4739 atomic_read(&tabla->pm_cnt));
4740 wake_up_all(&tabla->pm_wq);
4741 } else if (cnt > 0)
4742 dev_warn(dev, "system is already awake, pm_cnt %d\n", cnt);
4743 else {
4744 WARN(1, "unexpected pm_cnt %d\n", cnt);
4745 ret = -EFAULT;
4746 }
4747
4748 return ret;
4749}
4750
4751static const struct dev_pm_ops tabla_pm_ops = {
4752 .suspend = tabla_suspend,
4753 .resume = tabla_resume,
4754};
4755#endif
4756
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004757static int __devinit tabla_probe(struct platform_device *pdev)
4758{
Santosh Mardie15e2302011-11-15 10:39:23 +05304759 int ret = 0;
Bradley Rubincb3950a2011-08-18 13:07:26 -07004760#ifdef CONFIG_DEBUG_FS
4761 debugfs_poke = debugfs_create_file("TRRS",
4762 S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
4763
4764#endif
Santosh Mardie15e2302011-11-15 10:39:23 +05304765 if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_SLIMBUS)
4766 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4767 tabla_dai, ARRAY_SIZE(tabla_dai));
4768 else if (tabla_get_intf_type() == TABLA_INTERFACE_TYPE_I2C)
4769 ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_tabla,
4770 tabla_i2s_dai, ARRAY_SIZE(tabla_i2s_dai));
4771 return ret;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004772}
4773static int __devexit tabla_remove(struct platform_device *pdev)
4774{
4775 snd_soc_unregister_codec(&pdev->dev);
Bradley Rubincb3950a2011-08-18 13:07:26 -07004776
4777#ifdef CONFIG_DEBUG_FS
4778 debugfs_remove(debugfs_poke);
4779#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004780 return 0;
4781}
4782static struct platform_driver tabla_codec_driver = {
4783 .probe = tabla_probe,
4784 .remove = tabla_remove,
4785 .driver = {
4786 .name = "tabla_codec",
4787 .owner = THIS_MODULE,
Joonwoo Park8b1f0982011-12-08 17:12:45 -08004788#ifdef CONFIG_PM
4789 .pm = &tabla_pm_ops,
4790#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004791 },
4792};
4793
4794static int __init tabla_codec_init(void)
4795{
4796 return platform_driver_register(&tabla_codec_driver);
4797}
4798
4799static void __exit tabla_codec_exit(void)
4800{
4801 platform_driver_unregister(&tabla_codec_driver);
4802}
4803
4804module_init(tabla_codec_init);
4805module_exit(tabla_codec_exit);
4806
4807MODULE_DESCRIPTION("Tabla codec driver");
4808MODULE_VERSION("1.0");
4809MODULE_LICENSE("GPL v2");