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Akira Takeuchi368dd5a2010-10-27 17:28:55 +01001/* ASB2364 initialisation
2 *
3 * Copyright (C) 2002 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/param.h>
14#include <linux/init.h>
15#include <linux/device.h>
16#include <linux/delay.h>
17
18#include <asm/io.h>
19#include <asm/setup.h>
20#include <asm/processor.h>
21#include <asm/irq.h>
22#include <asm/intctl-regs.h>
David Howellsddb7d1e2011-03-18 16:52:54 +000023#include <asm/serial-regs.h>
David Howells6044cf12010-10-27 17:28:58 +010024#include <unit/fpga-regs.h>
David Howellsddb7d1e2011-03-18 16:52:54 +000025#include <unit/serial.h>
26#include <unit/smsc911x.h>
27
28#define TTYS0_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 2, u8)
29#define LAN_IRQ_CFG __SYSREG(SMSC911X_BASE + 0x54, u32)
30#define LAN_INT_EN __SYSREG(SMSC911X_BASE + 0x5c, u32)
Akira Takeuchi368dd5a2010-10-27 17:28:55 +010031
32/*
33 * initialise some of the unit hardware before gdbstub is set up
34 */
35asmlinkage void __init unit_init(void)
36{
David Howellsddb7d1e2011-03-18 16:52:54 +000037 /* Make sure we aren't going to get unexpected interrupts */
38 TTYS0_SERIAL_IER = 0;
39 SC0RXICR = 0;
40 SC0TXICR = 0;
41 SC1RXICR = 0;
42 SC1TXICR = 0;
43 SC2RXICR = 0;
44 SC2TXICR = 0;
45
46 /* Attempt to reset the FPGA attached peripherals */
47 ASB2364_FPGA_REG_RESET_LAN = 0x0000;
48 SyncExBus();
49 ASB2364_FPGA_REG_RESET_UART = 0x0000;
50 SyncExBus();
51 ASB2364_FPGA_REG_RESET_I2C = 0x0000;
52 SyncExBus();
53 ASB2364_FPGA_REG_RESET_USB = 0x0000;
54 SyncExBus();
55 ASB2364_FPGA_REG_RESET_AV = 0x0000;
56 SyncExBus();
57
Akira Takeuchi368dd5a2010-10-27 17:28:55 +010058 /* set up the external interrupts */
59
60 /* XIRQ[0]: NAND RXBY */
61 /* SET_XIRQ_TRIGGER(0, XIRQ_TRIGGER_LOWLEVEL); */
62
63 /* XIRQ[1]: LAN, UART, I2C, USB, PCI, FPGA */
64 SET_XIRQ_TRIGGER(1, XIRQ_TRIGGER_LOWLEVEL);
65
66 /* XIRQ[2]: Extend Slot 1-9 */
67 /* SET_XIRQ_TRIGGER(2, XIRQ_TRIGGER_LOWLEVEL); */
68
69#if defined(CONFIG_EXT_SERIAL_IRQ_LEVEL) && \
70 defined(CONFIG_ETHERNET_IRQ_LEVEL) && \
71 (CONFIG_EXT_SERIAL_IRQ_LEVEL != CONFIG_ETHERNET_IRQ_LEVEL)
72# error CONFIG_EXT_SERIAL_IRQ_LEVEL != CONFIG_ETHERNET_IRQ_LEVEL
73#endif
74
75#if defined(CONFIG_EXT_SERIAL_IRQ_LEVEL)
76 set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_EXT_SERIAL_IRQ_LEVEL));
77#elif defined(CONFIG_ETHERNET_IRQ_LEVEL)
78 set_intr_level(XIRQ1, NUM2GxICR_LEVEL(CONFIG_ETHERNET_IRQ_LEVEL));
79#endif
80}
81
82/*
83 * initialise the rest of the unit hardware after gdbstub is ready
84 */
85asmlinkage void __init unit_setup(void)
86{
David Howellsddb7d1e2011-03-18 16:52:54 +000087 /* Release the reset on the SMSC911X so that it is ready by the time we
88 * need it */
89 ASB2364_FPGA_REG_RESET_LAN = 0x0001;
90 SyncExBus();
91 ASB2364_FPGA_REG_RESET_UART = 0x0001;
92 SyncExBus();
93 ASB2364_FPGA_REG_RESET_I2C = 0x0001;
94 SyncExBus();
95 ASB2364_FPGA_REG_RESET_USB = 0x0001;
96 SyncExBus();
97 ASB2364_FPGA_REG_RESET_AV = 0x0001;
98 SyncExBus();
Akira Takeuchi368dd5a2010-10-27 17:28:55 +010099
David Howellsddb7d1e2011-03-18 16:52:54 +0000100 /* Make sure the ethernet chipset isn't going to give us an interrupt
101 * storm from stuff it was doing pre-reset */
102 LAN_IRQ_CFG = 0;
103 LAN_INT_EN = 0;
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100104}
105
106/*
107 * initialise the external interrupts used by a unit of this type
108 */
109void __init unit_init_IRQ(void)
110{
111 unsigned int extnum;
112
113 for (extnum = 0 ; extnum < NR_XIRQS ; extnum++) {
114 switch (GET_XIRQ_TRIGGER(extnum)) {
115 /* LEVEL triggered interrupts should be made
116 * post-ACK'able as they hold their lines until
117 * serviced
118 */
119 case XIRQ_TRIGGER_HILEVEL:
120 case XIRQ_TRIGGER_LOWLEVEL:
121 mn10300_set_lateack_irq_type(XIRQ2IRQ(extnum));
122 break;
123 default:
124 break;
125 }
126 }
127
128#define IRQCTL __SYSREG(0xd5000090, u32)
129 IRQCTL |= 0x02;
David Howells6044cf12010-10-27 17:28:58 +0100130
131 irq_fpga_init();
Akira Takeuchi368dd5a2010-10-27 17:28:55 +0100132}