Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2010 ST-Ericsson |
| 3 | * License terms: GNU General Public License (GPL) version 2 |
| 4 | * Low-level core for exclusive access to the AB3550 IC on the I2C bus |
| 5 | * and some basic chip-configuration. |
| 6 | * Author: Bengt Jonsson <bengt.g.jonsson@stericsson.com> |
| 7 | * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> |
| 8 | * Author: Mattias Wallin <mattias.wallin@stericsson.com> |
| 9 | * Author: Rickard Andersson <rickard.andersson@stericsson.com> |
| 10 | */ |
| 11 | |
| 12 | #include <linux/i2c.h> |
| 13 | #include <linux/mutex.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/device.h> |
| 18 | #include <linux/irq.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/random.h> |
| 21 | #include <linux/workqueue.h> |
| 22 | #include <linux/debugfs.h> |
| 23 | #include <linux/seq_file.h> |
| 24 | #include <linux/uaccess.h> |
| 25 | #include <linux/mfd/abx500.h> |
| 26 | #include <linux/list.h> |
| 27 | #include <linux/bitops.h> |
| 28 | #include <linux/spinlock.h> |
| 29 | #include <linux/mfd/core.h> |
| 30 | |
| 31 | #define AB3550_NAME_STRING "ab3550" |
| 32 | #define AB3550_ID_FORMAT_STRING "AB3550 %s" |
| 33 | #define AB3550_NUM_BANKS 2 |
| 34 | #define AB3550_NUM_EVENT_REG 5 |
| 35 | |
| 36 | /* These are the only registers inside AB3550 used in this main file */ |
| 37 | |
| 38 | /* Chip ID register */ |
| 39 | #define AB3550_CID_REG 0x20 |
| 40 | |
| 41 | /* Interrupt event registers */ |
| 42 | #define AB3550_EVENT_BANK 0 |
| 43 | #define AB3550_EVENT_REG 0x22 |
| 44 | |
| 45 | /* Read/write operation values. */ |
| 46 | #define AB3550_PERM_RD (0x01) |
| 47 | #define AB3550_PERM_WR (0x02) |
| 48 | |
| 49 | /* Read/write permissions. */ |
| 50 | #define AB3550_PERM_RO (AB3550_PERM_RD) |
| 51 | #define AB3550_PERM_RW (AB3550_PERM_RD | AB3550_PERM_WR) |
| 52 | |
| 53 | /** |
| 54 | * struct ab3550 |
| 55 | * @access_mutex: lock out concurrent accesses to the AB registers |
| 56 | * @i2c_client: I2C client for this chip |
| 57 | * @chip_name: name of this chip variant |
| 58 | * @chip_id: 8 bit chip ID for this chip variant |
| 59 | * @mask_work: a worker for writing to mask registers |
| 60 | * @event_lock: a lock to protect the event_mask |
| 61 | * @event_mask: a local copy of the mask event registers |
| 62 | * @startup_events: a copy of the first reading of the event registers |
| 63 | * @startup_events_read: whether the first events have been read |
| 64 | */ |
| 65 | struct ab3550 { |
| 66 | struct mutex access_mutex; |
| 67 | struct i2c_client *i2c_client[AB3550_NUM_BANKS]; |
| 68 | char chip_name[32]; |
| 69 | u8 chip_id; |
| 70 | struct work_struct mask_work; |
| 71 | spinlock_t event_lock; |
| 72 | u8 event_mask[AB3550_NUM_EVENT_REG]; |
| 73 | u8 startup_events[AB3550_NUM_EVENT_REG]; |
| 74 | bool startup_events_read; |
| 75 | #ifdef CONFIG_DEBUG_FS |
| 76 | unsigned int debug_bank; |
| 77 | unsigned int debug_address; |
| 78 | #endif |
| 79 | }; |
| 80 | |
| 81 | /** |
| 82 | * struct ab3550_reg_range |
| 83 | * @first: the first address of the range |
| 84 | * @last: the last address of the range |
| 85 | * @perm: access permissions for the range |
| 86 | */ |
| 87 | struct ab3550_reg_range { |
| 88 | u8 first; |
| 89 | u8 last; |
| 90 | u8 perm; |
| 91 | }; |
| 92 | |
| 93 | /** |
| 94 | * struct ab3550_reg_ranges |
| 95 | * @count: the number of ranges in the list |
| 96 | * @range: the list of register ranges |
| 97 | */ |
| 98 | struct ab3550_reg_ranges { |
| 99 | u8 count; |
| 100 | const struct ab3550_reg_range *range; |
| 101 | }; |
| 102 | |
| 103 | /* |
| 104 | * Permissible register ranges for reading and writing per device and bank. |
| 105 | * |
| 106 | * The ranges must be listed in increasing address order, and no overlaps are |
| 107 | * allowed. It is assumed that write permission implies read permission |
| 108 | * (i.e. only RO and RW permissions should be used). Ranges with write |
| 109 | * permission must not be split up. |
| 110 | */ |
| 111 | |
| 112 | #define NO_RANGE {.count = 0, .range = NULL,} |
| 113 | |
| 114 | static struct |
| 115 | ab3550_reg_ranges ab3550_reg_ranges[AB3550_NUM_DEVICES][AB3550_NUM_BANKS] = { |
| 116 | [AB3550_DEVID_DAC] = { |
| 117 | NO_RANGE, |
| 118 | { |
| 119 | .count = 2, |
| 120 | .range = (struct ab3550_reg_range[]) { |
| 121 | { |
| 122 | .first = 0xb0, |
| 123 | .last = 0xba, |
| 124 | .perm = AB3550_PERM_RW, |
| 125 | }, |
| 126 | { |
| 127 | .first = 0xbc, |
| 128 | .last = 0xc3, |
| 129 | .perm = AB3550_PERM_RW, |
| 130 | }, |
| 131 | }, |
| 132 | }, |
| 133 | }, |
| 134 | [AB3550_DEVID_LEDS] = { |
| 135 | NO_RANGE, |
| 136 | { |
| 137 | .count = 2, |
| 138 | .range = (struct ab3550_reg_range[]) { |
| 139 | { |
| 140 | .first = 0x5a, |
| 141 | .last = 0x88, |
| 142 | .perm = AB3550_PERM_RW, |
| 143 | }, |
| 144 | { |
| 145 | .first = 0x8a, |
| 146 | .last = 0xad, |
| 147 | .perm = AB3550_PERM_RW, |
| 148 | }, |
| 149 | } |
| 150 | }, |
| 151 | }, |
| 152 | [AB3550_DEVID_POWER] = { |
| 153 | { |
| 154 | .count = 1, |
| 155 | .range = (struct ab3550_reg_range[]) { |
| 156 | { |
| 157 | .first = 0x21, |
| 158 | .last = 0x21, |
| 159 | .perm = AB3550_PERM_RO, |
| 160 | }, |
| 161 | } |
| 162 | }, |
| 163 | NO_RANGE, |
| 164 | }, |
| 165 | [AB3550_DEVID_REGULATORS] = { |
| 166 | { |
| 167 | .count = 1, |
| 168 | .range = (struct ab3550_reg_range[]) { |
| 169 | { |
| 170 | .first = 0x69, |
| 171 | .last = 0xa3, |
| 172 | .perm = AB3550_PERM_RW, |
| 173 | }, |
| 174 | } |
| 175 | }, |
| 176 | { |
| 177 | .count = 1, |
| 178 | .range = (struct ab3550_reg_range[]) { |
| 179 | { |
| 180 | .first = 0x14, |
| 181 | .last = 0x16, |
| 182 | .perm = AB3550_PERM_RW, |
| 183 | }, |
| 184 | } |
| 185 | }, |
| 186 | }, |
| 187 | [AB3550_DEVID_SIM] = { |
| 188 | { |
| 189 | .count = 1, |
| 190 | .range = (struct ab3550_reg_range[]) { |
| 191 | { |
| 192 | .first = 0x21, |
| 193 | .last = 0x21, |
| 194 | .perm = AB3550_PERM_RO, |
| 195 | }, |
| 196 | } |
| 197 | }, |
| 198 | { |
| 199 | .count = 1, |
| 200 | .range = (struct ab3550_reg_range[]) { |
| 201 | { |
| 202 | .first = 0x14, |
| 203 | .last = 0x17, |
| 204 | .perm = AB3550_PERM_RW, |
| 205 | }, |
| 206 | } |
| 207 | |
| 208 | }, |
| 209 | }, |
| 210 | [AB3550_DEVID_UART] = { |
| 211 | NO_RANGE, |
| 212 | NO_RANGE, |
| 213 | }, |
| 214 | [AB3550_DEVID_RTC] = { |
| 215 | { |
| 216 | .count = 1, |
| 217 | .range = (struct ab3550_reg_range[]) { |
| 218 | { |
| 219 | .first = 0x00, |
| 220 | .last = 0x0c, |
| 221 | .perm = AB3550_PERM_RW, |
| 222 | }, |
| 223 | } |
| 224 | }, |
| 225 | NO_RANGE, |
| 226 | }, |
| 227 | [AB3550_DEVID_CHARGER] = { |
| 228 | { |
| 229 | .count = 2, |
| 230 | .range = (struct ab3550_reg_range[]) { |
| 231 | { |
| 232 | .first = 0x10, |
| 233 | .last = 0x1a, |
| 234 | .perm = AB3550_PERM_RW, |
| 235 | }, |
| 236 | { |
| 237 | .first = 0x21, |
| 238 | .last = 0x21, |
| 239 | .perm = AB3550_PERM_RO, |
| 240 | }, |
| 241 | } |
| 242 | }, |
| 243 | NO_RANGE, |
| 244 | }, |
| 245 | [AB3550_DEVID_ADC] = { |
| 246 | NO_RANGE, |
| 247 | { |
| 248 | .count = 1, |
| 249 | .range = (struct ab3550_reg_range[]) { |
| 250 | { |
| 251 | .first = 0x20, |
| 252 | .last = 0x56, |
| 253 | .perm = AB3550_PERM_RW, |
| 254 | }, |
| 255 | |
| 256 | } |
| 257 | }, |
| 258 | }, |
| 259 | [AB3550_DEVID_FUELGAUGE] = { |
| 260 | { |
| 261 | .count = 1, |
| 262 | .range = (struct ab3550_reg_range[]) { |
| 263 | { |
| 264 | .first = 0x21, |
| 265 | .last = 0x21, |
| 266 | .perm = AB3550_PERM_RO, |
| 267 | }, |
| 268 | } |
| 269 | }, |
| 270 | { |
| 271 | .count = 1, |
| 272 | .range = (struct ab3550_reg_range[]) { |
| 273 | { |
| 274 | .first = 0x00, |
| 275 | .last = 0x0e, |
| 276 | .perm = AB3550_PERM_RW, |
| 277 | }, |
| 278 | } |
| 279 | }, |
| 280 | }, |
| 281 | [AB3550_DEVID_VIBRATOR] = { |
| 282 | NO_RANGE, |
| 283 | { |
| 284 | .count = 1, |
| 285 | .range = (struct ab3550_reg_range[]) { |
| 286 | { |
| 287 | .first = 0x10, |
| 288 | .last = 0x13, |
| 289 | .perm = AB3550_PERM_RW, |
| 290 | }, |
| 291 | |
| 292 | } |
| 293 | }, |
| 294 | }, |
| 295 | [AB3550_DEVID_CODEC] = { |
| 296 | { |
| 297 | .count = 2, |
| 298 | .range = (struct ab3550_reg_range[]) { |
| 299 | { |
| 300 | .first = 0x31, |
| 301 | .last = 0x63, |
| 302 | .perm = AB3550_PERM_RW, |
| 303 | }, |
| 304 | { |
| 305 | .first = 0x65, |
| 306 | .last = 0x68, |
| 307 | .perm = AB3550_PERM_RW, |
| 308 | }, |
| 309 | } |
| 310 | }, |
| 311 | NO_RANGE, |
| 312 | }, |
| 313 | }; |
| 314 | |
| 315 | static struct mfd_cell ab3550_devs[AB3550_NUM_DEVICES] = { |
| 316 | [AB3550_DEVID_DAC] = { |
| 317 | .name = "ab3550-dac", |
| 318 | .id = AB3550_DEVID_DAC, |
| 319 | .num_resources = 0, |
| 320 | }, |
| 321 | [AB3550_DEVID_LEDS] = { |
| 322 | .name = "ab3550-leds", |
| 323 | .id = AB3550_DEVID_LEDS, |
| 324 | }, |
| 325 | [AB3550_DEVID_POWER] = { |
| 326 | .name = "ab3550-power", |
| 327 | .id = AB3550_DEVID_POWER, |
| 328 | }, |
| 329 | [AB3550_DEVID_REGULATORS] = { |
| 330 | .name = "ab3550-regulators", |
| 331 | .id = AB3550_DEVID_REGULATORS, |
| 332 | }, |
| 333 | [AB3550_DEVID_SIM] = { |
| 334 | .name = "ab3550-sim", |
| 335 | .id = AB3550_DEVID_SIM, |
| 336 | }, |
| 337 | [AB3550_DEVID_UART] = { |
| 338 | .name = "ab3550-uart", |
| 339 | .id = AB3550_DEVID_UART, |
| 340 | }, |
| 341 | [AB3550_DEVID_RTC] = { |
| 342 | .name = "ab3550-rtc", |
| 343 | .id = AB3550_DEVID_RTC, |
| 344 | }, |
| 345 | [AB3550_DEVID_CHARGER] = { |
| 346 | .name = "ab3550-charger", |
| 347 | .id = AB3550_DEVID_CHARGER, |
| 348 | }, |
| 349 | [AB3550_DEVID_ADC] = { |
| 350 | .name = "ab3550-adc", |
| 351 | .id = AB3550_DEVID_ADC, |
| 352 | .num_resources = 10, |
| 353 | .resources = (struct resource[]) { |
| 354 | { |
| 355 | .name = "TRIGGER-0", |
| 356 | .flags = IORESOURCE_IRQ, |
| 357 | .start = 16, |
| 358 | .end = 16, |
| 359 | }, |
| 360 | { |
| 361 | .name = "TRIGGER-1", |
| 362 | .flags = IORESOURCE_IRQ, |
| 363 | .start = 17, |
| 364 | .end = 17, |
| 365 | }, |
| 366 | { |
| 367 | .name = "TRIGGER-2", |
| 368 | .flags = IORESOURCE_IRQ, |
| 369 | .start = 18, |
| 370 | .end = 18, |
| 371 | }, |
| 372 | { |
| 373 | .name = "TRIGGER-3", |
| 374 | .flags = IORESOURCE_IRQ, |
| 375 | .start = 19, |
| 376 | .end = 19, |
| 377 | }, |
| 378 | { |
| 379 | .name = "TRIGGER-4", |
| 380 | .flags = IORESOURCE_IRQ, |
| 381 | .start = 20, |
| 382 | .end = 20, |
| 383 | }, |
| 384 | { |
| 385 | .name = "TRIGGER-5", |
| 386 | .flags = IORESOURCE_IRQ, |
| 387 | .start = 21, |
| 388 | .end = 21, |
| 389 | }, |
| 390 | { |
| 391 | .name = "TRIGGER-6", |
| 392 | .flags = IORESOURCE_IRQ, |
| 393 | .start = 22, |
| 394 | .end = 22, |
| 395 | }, |
| 396 | { |
| 397 | .name = "TRIGGER-7", |
| 398 | .flags = IORESOURCE_IRQ, |
| 399 | .start = 23, |
| 400 | .end = 23, |
| 401 | }, |
| 402 | { |
| 403 | .name = "TRIGGER-VBAT-TXON", |
| 404 | .flags = IORESOURCE_IRQ, |
| 405 | .start = 13, |
| 406 | .end = 13, |
| 407 | }, |
| 408 | { |
| 409 | .name = "TRIGGER-VBAT", |
| 410 | .flags = IORESOURCE_IRQ, |
| 411 | .start = 12, |
| 412 | .end = 12, |
| 413 | }, |
| 414 | }, |
| 415 | }, |
| 416 | [AB3550_DEVID_FUELGAUGE] = { |
| 417 | .name = "ab3550-fuelgauge", |
| 418 | .id = AB3550_DEVID_FUELGAUGE, |
| 419 | }, |
| 420 | [AB3550_DEVID_VIBRATOR] = { |
| 421 | .name = "ab3550-vibrator", |
| 422 | .id = AB3550_DEVID_VIBRATOR, |
| 423 | }, |
| 424 | [AB3550_DEVID_CODEC] = { |
| 425 | .name = "ab3550-codec", |
| 426 | .id = AB3550_DEVID_CODEC, |
| 427 | }, |
| 428 | }; |
| 429 | |
| 430 | /* |
| 431 | * I2C transactions with error messages. |
| 432 | */ |
| 433 | static int ab3550_i2c_master_send(struct ab3550 *ab, u8 bank, u8 *data, |
| 434 | u8 count) |
| 435 | { |
| 436 | int err; |
| 437 | |
| 438 | err = i2c_master_send(ab->i2c_client[bank], data, count); |
| 439 | if (err < 0) { |
| 440 | dev_err(&ab->i2c_client[0]->dev, "send error: %d\n", err); |
| 441 | return err; |
| 442 | } |
| 443 | return 0; |
| 444 | } |
| 445 | |
| 446 | static int ab3550_i2c_master_recv(struct ab3550 *ab, u8 bank, u8 *data, |
| 447 | u8 count) |
| 448 | { |
| 449 | int err; |
| 450 | |
| 451 | err = i2c_master_recv(ab->i2c_client[bank], data, count); |
| 452 | if (err < 0) { |
| 453 | dev_err(&ab->i2c_client[0]->dev, "receive error: %d\n", err); |
| 454 | return err; |
| 455 | } |
| 456 | return 0; |
| 457 | } |
| 458 | |
| 459 | /* |
| 460 | * Functionality for getting/setting register values. |
| 461 | */ |
| 462 | static int get_register_interruptible(struct ab3550 *ab, u8 bank, u8 reg, |
| 463 | u8 *value) |
| 464 | { |
| 465 | int err; |
| 466 | |
| 467 | err = mutex_lock_interruptible(&ab->access_mutex); |
| 468 | if (err) |
| 469 | return err; |
| 470 | |
| 471 | err = ab3550_i2c_master_send(ab, bank, ®, 1); |
| 472 | if (!err) |
| 473 | err = ab3550_i2c_master_recv(ab, bank, value, 1); |
| 474 | |
| 475 | mutex_unlock(&ab->access_mutex); |
| 476 | return err; |
| 477 | } |
| 478 | |
| 479 | static int get_register_page_interruptible(struct ab3550 *ab, u8 bank, |
| 480 | u8 first_reg, u8 *regvals, u8 numregs) |
| 481 | { |
| 482 | int err; |
| 483 | |
| 484 | err = mutex_lock_interruptible(&ab->access_mutex); |
| 485 | if (err) |
| 486 | return err; |
| 487 | |
| 488 | err = ab3550_i2c_master_send(ab, bank, &first_reg, 1); |
| 489 | if (!err) |
| 490 | err = ab3550_i2c_master_recv(ab, bank, regvals, numregs); |
| 491 | |
| 492 | mutex_unlock(&ab->access_mutex); |
| 493 | return err; |
| 494 | } |
| 495 | |
| 496 | static int mask_and_set_register_interruptible(struct ab3550 *ab, u8 bank, |
| 497 | u8 reg, u8 bitmask, u8 bitvalues) |
| 498 | { |
| 499 | int err = 0; |
| 500 | |
| 501 | if (likely(bitmask)) { |
| 502 | u8 reg_bits[2] = {reg, 0}; |
| 503 | |
| 504 | err = mutex_lock_interruptible(&ab->access_mutex); |
| 505 | if (err) |
| 506 | return err; |
| 507 | |
| 508 | if (bitmask == 0xFF) /* No need to read in this case. */ |
| 509 | reg_bits[1] = bitvalues; |
| 510 | else { /* Read and modify the register value. */ |
| 511 | u8 bits; |
| 512 | |
| 513 | err = ab3550_i2c_master_send(ab, bank, ®, 1); |
| 514 | if (err) |
| 515 | goto unlock_and_return; |
| 516 | err = ab3550_i2c_master_recv(ab, bank, &bits, 1); |
| 517 | if (err) |
| 518 | goto unlock_and_return; |
| 519 | reg_bits[1] = ((~bitmask & bits) | |
| 520 | (bitmask & bitvalues)); |
| 521 | } |
| 522 | /* Write the new value. */ |
| 523 | err = ab3550_i2c_master_send(ab, bank, reg_bits, 2); |
| 524 | unlock_and_return: |
| 525 | mutex_unlock(&ab->access_mutex); |
| 526 | } |
| 527 | return err; |
| 528 | } |
| 529 | |
| 530 | /* |
| 531 | * Read/write permission checking functions. |
| 532 | */ |
| 533 | static bool page_write_allowed(const struct ab3550_reg_ranges *ranges, |
| 534 | u8 first_reg, u8 last_reg) |
| 535 | { |
| 536 | u8 i; |
| 537 | |
| 538 | if (last_reg < first_reg) |
| 539 | return false; |
| 540 | |
| 541 | for (i = 0; i < ranges->count; i++) { |
| 542 | if (first_reg < ranges->range[i].first) |
| 543 | break; |
| 544 | if ((last_reg <= ranges->range[i].last) && |
| 545 | (ranges->range[i].perm & AB3550_PERM_WR)) |
| 546 | return true; |
| 547 | } |
| 548 | return false; |
| 549 | } |
| 550 | |
| 551 | static bool reg_write_allowed(const struct ab3550_reg_ranges *ranges, u8 reg) |
| 552 | { |
| 553 | return page_write_allowed(ranges, reg, reg); |
| 554 | } |
| 555 | |
| 556 | static bool page_read_allowed(const struct ab3550_reg_ranges *ranges, |
| 557 | u8 first_reg, u8 last_reg) |
| 558 | { |
| 559 | u8 i; |
| 560 | |
| 561 | if (last_reg < first_reg) |
| 562 | return false; |
| 563 | /* Find the range (if it exists in the list) that includes first_reg. */ |
| 564 | for (i = 0; i < ranges->count; i++) { |
| 565 | if (first_reg < ranges->range[i].first) |
| 566 | return false; |
| 567 | if (first_reg <= ranges->range[i].last) |
| 568 | break; |
| 569 | } |
| 570 | /* Make sure that the entire range up to and including last_reg is |
| 571 | * readable. This may span several of the ranges in the list. |
| 572 | */ |
| 573 | while ((i < ranges->count) && |
| 574 | (ranges->range[i].perm & AB3550_PERM_RD)) { |
| 575 | if (last_reg <= ranges->range[i].last) |
| 576 | return true; |
| 577 | if ((++i >= ranges->count) || |
| 578 | (ranges->range[i].first != |
| 579 | (ranges->range[i - 1].last + 1))) { |
| 580 | break; |
| 581 | } |
| 582 | } |
| 583 | return false; |
| 584 | } |
| 585 | |
| 586 | static bool reg_read_allowed(const struct ab3550_reg_ranges *ranges, u8 reg) |
| 587 | { |
| 588 | return page_read_allowed(ranges, reg, reg); |
| 589 | } |
| 590 | |
| 591 | /* |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 592 | * The register access functionality. |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 593 | */ |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 594 | static int ab3550_get_chip_id(struct device *dev) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 595 | { |
| 596 | struct ab3550 *ab = dev_get_drvdata(dev->parent); |
| 597 | return (int)ab->chip_id; |
| 598 | } |
| 599 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 600 | static int ab3550_mask_and_set_register_interruptible(struct device *dev, |
| 601 | u8 bank, u8 reg, u8 bitmask, u8 bitvalues) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 602 | { |
| 603 | struct ab3550 *ab; |
| 604 | struct platform_device *pdev = to_platform_device(dev); |
| 605 | |
| 606 | if ((AB3550_NUM_BANKS <= bank) || |
| 607 | !reg_write_allowed(&ab3550_reg_ranges[pdev->id][bank], reg)) |
| 608 | return -EINVAL; |
| 609 | |
| 610 | ab = dev_get_drvdata(dev->parent); |
| 611 | return mask_and_set_register_interruptible(ab, bank, reg, |
| 612 | bitmask, bitvalues); |
| 613 | } |
| 614 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 615 | static int ab3550_set_register_interruptible(struct device *dev, u8 bank, |
| 616 | u8 reg, u8 value) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 617 | { |
| 618 | return ab3550_mask_and_set_register_interruptible(dev, bank, reg, 0xFF, |
| 619 | value); |
| 620 | } |
| 621 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 622 | static int ab3550_get_register_interruptible(struct device *dev, u8 bank, |
| 623 | u8 reg, u8 *value) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 624 | { |
| 625 | struct ab3550 *ab; |
| 626 | struct platform_device *pdev = to_platform_device(dev); |
| 627 | |
| 628 | if ((AB3550_NUM_BANKS <= bank) || |
| 629 | !reg_read_allowed(&ab3550_reg_ranges[pdev->id][bank], reg)) |
| 630 | return -EINVAL; |
| 631 | |
| 632 | ab = dev_get_drvdata(dev->parent); |
| 633 | return get_register_interruptible(ab, bank, reg, value); |
| 634 | } |
| 635 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 636 | static int ab3550_get_register_page_interruptible(struct device *dev, u8 bank, |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 637 | u8 first_reg, u8 *regvals, u8 numregs) |
| 638 | { |
| 639 | struct ab3550 *ab; |
| 640 | struct platform_device *pdev = to_platform_device(dev); |
| 641 | |
| 642 | if ((AB3550_NUM_BANKS <= bank) || |
| 643 | !page_read_allowed(&ab3550_reg_ranges[pdev->id][bank], |
| 644 | first_reg, (first_reg + numregs - 1))) |
| 645 | return -EINVAL; |
| 646 | |
| 647 | ab = dev_get_drvdata(dev->parent); |
| 648 | return get_register_page_interruptible(ab, bank, first_reg, regvals, |
| 649 | numregs); |
| 650 | } |
| 651 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 652 | static int ab3550_event_registers_startup_state_get(struct device *dev, |
| 653 | u8 *event) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 654 | { |
| 655 | struct ab3550 *ab; |
| 656 | |
| 657 | ab = dev_get_drvdata(dev->parent); |
| 658 | if (!ab->startup_events_read) |
| 659 | return -EAGAIN; /* Try again later */ |
| 660 | |
| 661 | memcpy(event, ab->startup_events, AB3550_NUM_EVENT_REG); |
| 662 | return 0; |
| 663 | } |
| 664 | |
Mark Brown | 3cb46ac | 2010-06-09 14:54:54 +0100 | [diff] [blame] | 665 | static int ab3550_startup_irq_enabled(struct device *dev, unsigned int irq) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 666 | { |
| 667 | struct ab3550 *ab; |
| 668 | struct ab3550_platform_data *plf_data; |
| 669 | bool val; |
| 670 | |
| 671 | ab = get_irq_chip_data(irq); |
| 672 | plf_data = ab->i2c_client[0]->dev.platform_data; |
| 673 | irq -= plf_data->irq.base; |
| 674 | val = ((ab->startup_events[irq / 8] & BIT(irq % 8)) != 0); |
| 675 | |
| 676 | return val; |
| 677 | } |
| 678 | |
| 679 | static struct abx500_ops ab3550_ops = { |
| 680 | .get_chip_id = ab3550_get_chip_id, |
| 681 | .get_register = ab3550_get_register_interruptible, |
| 682 | .set_register = ab3550_set_register_interruptible, |
| 683 | .get_register_page = ab3550_get_register_page_interruptible, |
| 684 | .set_register_page = NULL, |
| 685 | .mask_and_set_register = ab3550_mask_and_set_register_interruptible, |
| 686 | .event_registers_startup_state_get = |
| 687 | ab3550_event_registers_startup_state_get, |
| 688 | .startup_irq_enabled = ab3550_startup_irq_enabled, |
| 689 | }; |
| 690 | |
| 691 | static irqreturn_t ab3550_irq_handler(int irq, void *data) |
| 692 | { |
| 693 | struct ab3550 *ab = data; |
| 694 | int err; |
| 695 | unsigned int i; |
| 696 | u8 e[AB3550_NUM_EVENT_REG]; |
| 697 | u8 *events; |
| 698 | unsigned long flags; |
| 699 | |
| 700 | events = (ab->startup_events_read ? e : ab->startup_events); |
| 701 | |
| 702 | err = get_register_page_interruptible(ab, AB3550_EVENT_BANK, |
| 703 | AB3550_EVENT_REG, events, AB3550_NUM_EVENT_REG); |
| 704 | if (err) |
| 705 | goto err_event_rd; |
| 706 | |
| 707 | if (!ab->startup_events_read) { |
| 708 | dev_info(&ab->i2c_client[0]->dev, |
| 709 | "startup events 0x%x,0x%x,0x%x,0x%x,0x%x\n", |
| 710 | ab->startup_events[0], ab->startup_events[1], |
| 711 | ab->startup_events[2], ab->startup_events[3], |
| 712 | ab->startup_events[4]); |
| 713 | ab->startup_events_read = true; |
| 714 | goto out; |
| 715 | } |
| 716 | |
| 717 | /* The two highest bits in event[4] are not used. */ |
| 718 | events[4] &= 0x3f; |
| 719 | |
| 720 | spin_lock_irqsave(&ab->event_lock, flags); |
| 721 | for (i = 0; i < AB3550_NUM_EVENT_REG; i++) |
| 722 | events[i] &= ~ab->event_mask[i]; |
| 723 | spin_unlock_irqrestore(&ab->event_lock, flags); |
| 724 | |
| 725 | for (i = 0; i < AB3550_NUM_EVENT_REG; i++) { |
| 726 | u8 bit; |
| 727 | u8 event_reg; |
| 728 | |
| 729 | dev_dbg(&ab->i2c_client[0]->dev, "IRQ Event[%d]: 0x%2x\n", |
| 730 | i, events[i]); |
| 731 | |
| 732 | event_reg = events[i]; |
| 733 | for (bit = 0; event_reg; bit++, event_reg /= 2) { |
| 734 | if (event_reg % 2) { |
| 735 | unsigned int irq; |
| 736 | struct ab3550_platform_data *plf_data; |
| 737 | |
| 738 | plf_data = ab->i2c_client[0]->dev.platform_data; |
| 739 | irq = plf_data->irq.base + (i * 8) + bit; |
| 740 | handle_nested_irq(irq); |
| 741 | } |
| 742 | } |
| 743 | } |
| 744 | out: |
| 745 | return IRQ_HANDLED; |
| 746 | |
| 747 | err_event_rd: |
| 748 | dev_dbg(&ab->i2c_client[0]->dev, "error reading event registers\n"); |
| 749 | return IRQ_HANDLED; |
| 750 | } |
| 751 | |
| 752 | #ifdef CONFIG_DEBUG_FS |
| 753 | static struct ab3550_reg_ranges debug_ranges[AB3550_NUM_BANKS] = { |
| 754 | { |
| 755 | .count = 6, |
| 756 | .range = (struct ab3550_reg_range[]) { |
| 757 | { |
| 758 | .first = 0x00, |
| 759 | .last = 0x0e, |
| 760 | }, |
| 761 | { |
| 762 | .first = 0x10, |
| 763 | .last = 0x1a, |
| 764 | }, |
| 765 | { |
| 766 | .first = 0x1e, |
| 767 | .last = 0x4f, |
| 768 | }, |
| 769 | { |
| 770 | .first = 0x51, |
| 771 | .last = 0x63, |
| 772 | }, |
| 773 | { |
| 774 | .first = 0x65, |
| 775 | .last = 0xa3, |
| 776 | }, |
| 777 | { |
| 778 | .first = 0xa5, |
| 779 | .last = 0xa8, |
| 780 | }, |
| 781 | } |
| 782 | }, |
| 783 | { |
| 784 | .count = 8, |
| 785 | .range = (struct ab3550_reg_range[]) { |
| 786 | { |
| 787 | .first = 0x00, |
| 788 | .last = 0x0e, |
| 789 | }, |
| 790 | { |
| 791 | .first = 0x10, |
| 792 | .last = 0x17, |
| 793 | }, |
| 794 | { |
| 795 | .first = 0x1a, |
| 796 | .last = 0x1c, |
| 797 | }, |
| 798 | { |
| 799 | .first = 0x20, |
| 800 | .last = 0x56, |
| 801 | }, |
| 802 | { |
| 803 | .first = 0x5a, |
| 804 | .last = 0x88, |
| 805 | }, |
| 806 | { |
| 807 | .first = 0x8a, |
| 808 | .last = 0xad, |
| 809 | }, |
| 810 | { |
| 811 | .first = 0xb0, |
| 812 | .last = 0xba, |
| 813 | }, |
| 814 | { |
| 815 | .first = 0xbc, |
| 816 | .last = 0xc3, |
| 817 | }, |
| 818 | } |
| 819 | }, |
| 820 | }; |
| 821 | |
| 822 | static int ab3550_registers_print(struct seq_file *s, void *p) |
| 823 | { |
| 824 | struct ab3550 *ab = s->private; |
| 825 | int bank; |
| 826 | |
| 827 | seq_printf(s, AB3550_NAME_STRING " register values:\n"); |
| 828 | |
| 829 | for (bank = 0; bank < AB3550_NUM_BANKS; bank++) { |
| 830 | unsigned int i; |
| 831 | |
| 832 | seq_printf(s, " bank %d:\n", bank); |
| 833 | for (i = 0; i < debug_ranges[bank].count; i++) { |
| 834 | u8 reg; |
| 835 | |
| 836 | for (reg = debug_ranges[bank].range[i].first; |
| 837 | reg <= debug_ranges[bank].range[i].last; |
| 838 | reg++) { |
| 839 | u8 value; |
| 840 | |
| 841 | get_register_interruptible(ab, bank, reg, |
| 842 | &value); |
| 843 | seq_printf(s, " [%d/0x%02X]: 0x%02X\n", bank, |
| 844 | reg, value); |
| 845 | } |
| 846 | } |
| 847 | } |
| 848 | return 0; |
| 849 | } |
| 850 | |
| 851 | static int ab3550_registers_open(struct inode *inode, struct file *file) |
| 852 | { |
| 853 | return single_open(file, ab3550_registers_print, inode->i_private); |
| 854 | } |
| 855 | |
| 856 | static const struct file_operations ab3550_registers_fops = { |
| 857 | .open = ab3550_registers_open, |
| 858 | .read = seq_read, |
| 859 | .llseek = seq_lseek, |
| 860 | .release = single_release, |
| 861 | .owner = THIS_MODULE, |
| 862 | }; |
| 863 | |
| 864 | static int ab3550_bank_print(struct seq_file *s, void *p) |
| 865 | { |
| 866 | struct ab3550 *ab = s->private; |
| 867 | |
| 868 | seq_printf(s, "%d\n", ab->debug_bank); |
| 869 | return 0; |
| 870 | } |
| 871 | |
| 872 | static int ab3550_bank_open(struct inode *inode, struct file *file) |
| 873 | { |
| 874 | return single_open(file, ab3550_bank_print, inode->i_private); |
| 875 | } |
| 876 | |
| 877 | static ssize_t ab3550_bank_write(struct file *file, |
| 878 | const char __user *user_buf, |
| 879 | size_t count, loff_t *ppos) |
| 880 | { |
| 881 | struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; |
| 882 | char buf[32]; |
| 883 | int buf_size; |
| 884 | unsigned long user_bank; |
| 885 | int err; |
| 886 | |
| 887 | /* Get userspace string and assure termination */ |
| 888 | buf_size = min(count, (sizeof(buf) - 1)); |
| 889 | if (copy_from_user(buf, user_buf, buf_size)) |
| 890 | return -EFAULT; |
| 891 | buf[buf_size] = 0; |
| 892 | |
| 893 | err = strict_strtoul(buf, 0, &user_bank); |
| 894 | if (err) |
| 895 | return -EINVAL; |
| 896 | |
| 897 | if (user_bank >= AB3550_NUM_BANKS) { |
| 898 | dev_err(&ab->i2c_client[0]->dev, |
| 899 | "debugfs error input > number of banks\n"); |
| 900 | return -EINVAL; |
| 901 | } |
| 902 | |
| 903 | ab->debug_bank = user_bank; |
| 904 | |
| 905 | return buf_size; |
| 906 | } |
| 907 | |
| 908 | static int ab3550_address_print(struct seq_file *s, void *p) |
| 909 | { |
| 910 | struct ab3550 *ab = s->private; |
| 911 | |
| 912 | seq_printf(s, "0x%02X\n", ab->debug_address); |
| 913 | return 0; |
| 914 | } |
| 915 | |
| 916 | static int ab3550_address_open(struct inode *inode, struct file *file) |
| 917 | { |
| 918 | return single_open(file, ab3550_address_print, inode->i_private); |
| 919 | } |
| 920 | |
| 921 | static ssize_t ab3550_address_write(struct file *file, |
| 922 | const char __user *user_buf, |
| 923 | size_t count, loff_t *ppos) |
| 924 | { |
| 925 | struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; |
| 926 | char buf[32]; |
| 927 | int buf_size; |
| 928 | unsigned long user_address; |
| 929 | int err; |
| 930 | |
| 931 | /* Get userspace string and assure termination */ |
| 932 | buf_size = min(count, (sizeof(buf) - 1)); |
| 933 | if (copy_from_user(buf, user_buf, buf_size)) |
| 934 | return -EFAULT; |
| 935 | buf[buf_size] = 0; |
| 936 | |
| 937 | err = strict_strtoul(buf, 0, &user_address); |
| 938 | if (err) |
| 939 | return -EINVAL; |
| 940 | if (user_address > 0xff) { |
| 941 | dev_err(&ab->i2c_client[0]->dev, |
| 942 | "debugfs error input > 0xff\n"); |
| 943 | return -EINVAL; |
| 944 | } |
| 945 | ab->debug_address = user_address; |
| 946 | return buf_size; |
| 947 | } |
| 948 | |
| 949 | static int ab3550_val_print(struct seq_file *s, void *p) |
| 950 | { |
| 951 | struct ab3550 *ab = s->private; |
| 952 | int err; |
| 953 | u8 regvalue; |
| 954 | |
| 955 | err = get_register_interruptible(ab, (u8)ab->debug_bank, |
| 956 | (u8)ab->debug_address, ®value); |
| 957 | if (err) |
| 958 | return -EINVAL; |
| 959 | seq_printf(s, "0x%02X\n", regvalue); |
| 960 | |
| 961 | return 0; |
| 962 | } |
| 963 | |
| 964 | static int ab3550_val_open(struct inode *inode, struct file *file) |
| 965 | { |
| 966 | return single_open(file, ab3550_val_print, inode->i_private); |
| 967 | } |
| 968 | |
| 969 | static ssize_t ab3550_val_write(struct file *file, |
| 970 | const char __user *user_buf, |
| 971 | size_t count, loff_t *ppos) |
| 972 | { |
| 973 | struct ab3550 *ab = ((struct seq_file *)(file->private_data))->private; |
| 974 | char buf[32]; |
| 975 | int buf_size; |
| 976 | unsigned long user_val; |
| 977 | int err; |
| 978 | u8 regvalue; |
| 979 | |
| 980 | /* Get userspace string and assure termination */ |
| 981 | buf_size = min(count, (sizeof(buf)-1)); |
| 982 | if (copy_from_user(buf, user_buf, buf_size)) |
| 983 | return -EFAULT; |
| 984 | buf[buf_size] = 0; |
| 985 | |
| 986 | err = strict_strtoul(buf, 0, &user_val); |
| 987 | if (err) |
| 988 | return -EINVAL; |
| 989 | if (user_val > 0xff) { |
| 990 | dev_err(&ab->i2c_client[0]->dev, |
| 991 | "debugfs error input > 0xff\n"); |
| 992 | return -EINVAL; |
| 993 | } |
| 994 | err = mask_and_set_register_interruptible( |
| 995 | ab, (u8)ab->debug_bank, |
| 996 | (u8)ab->debug_address, 0xFF, (u8)user_val); |
| 997 | if (err) |
| 998 | return -EINVAL; |
| 999 | |
| 1000 | get_register_interruptible(ab, (u8)ab->debug_bank, |
| 1001 | (u8)ab->debug_address, ®value); |
| 1002 | if (err) |
| 1003 | return -EINVAL; |
| 1004 | |
| 1005 | return buf_size; |
| 1006 | } |
| 1007 | |
| 1008 | static const struct file_operations ab3550_bank_fops = { |
| 1009 | .open = ab3550_bank_open, |
| 1010 | .write = ab3550_bank_write, |
| 1011 | .read = seq_read, |
| 1012 | .llseek = seq_lseek, |
| 1013 | .release = single_release, |
| 1014 | .owner = THIS_MODULE, |
| 1015 | }; |
| 1016 | |
| 1017 | static const struct file_operations ab3550_address_fops = { |
| 1018 | .open = ab3550_address_open, |
| 1019 | .write = ab3550_address_write, |
| 1020 | .read = seq_read, |
| 1021 | .llseek = seq_lseek, |
| 1022 | .release = single_release, |
| 1023 | .owner = THIS_MODULE, |
| 1024 | }; |
| 1025 | |
| 1026 | static const struct file_operations ab3550_val_fops = { |
| 1027 | .open = ab3550_val_open, |
| 1028 | .write = ab3550_val_write, |
| 1029 | .read = seq_read, |
| 1030 | .llseek = seq_lseek, |
| 1031 | .release = single_release, |
| 1032 | .owner = THIS_MODULE, |
| 1033 | }; |
| 1034 | |
| 1035 | static struct dentry *ab3550_dir; |
| 1036 | static struct dentry *ab3550_reg_file; |
| 1037 | static struct dentry *ab3550_bank_file; |
| 1038 | static struct dentry *ab3550_address_file; |
| 1039 | static struct dentry *ab3550_val_file; |
| 1040 | |
| 1041 | static inline void ab3550_setup_debugfs(struct ab3550 *ab) |
| 1042 | { |
| 1043 | ab->debug_bank = 0; |
| 1044 | ab->debug_address = 0x00; |
| 1045 | |
| 1046 | ab3550_dir = debugfs_create_dir(AB3550_NAME_STRING, NULL); |
| 1047 | if (!ab3550_dir) |
| 1048 | goto exit_no_debugfs; |
| 1049 | |
| 1050 | ab3550_reg_file = debugfs_create_file("all-registers", |
| 1051 | S_IRUGO, ab3550_dir, ab, &ab3550_registers_fops); |
| 1052 | if (!ab3550_reg_file) |
| 1053 | goto exit_destroy_dir; |
| 1054 | |
| 1055 | ab3550_bank_file = debugfs_create_file("register-bank", |
| 1056 | (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_bank_fops); |
| 1057 | if (!ab3550_bank_file) |
| 1058 | goto exit_destroy_reg; |
| 1059 | |
| 1060 | ab3550_address_file = debugfs_create_file("register-address", |
| 1061 | (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_address_fops); |
| 1062 | if (!ab3550_address_file) |
| 1063 | goto exit_destroy_bank; |
| 1064 | |
| 1065 | ab3550_val_file = debugfs_create_file("register-value", |
| 1066 | (S_IRUGO | S_IWUGO), ab3550_dir, ab, &ab3550_val_fops); |
| 1067 | if (!ab3550_val_file) |
| 1068 | goto exit_destroy_address; |
| 1069 | |
| 1070 | return; |
| 1071 | |
| 1072 | exit_destroy_address: |
| 1073 | debugfs_remove(ab3550_address_file); |
| 1074 | exit_destroy_bank: |
| 1075 | debugfs_remove(ab3550_bank_file); |
| 1076 | exit_destroy_reg: |
| 1077 | debugfs_remove(ab3550_reg_file); |
| 1078 | exit_destroy_dir: |
| 1079 | debugfs_remove(ab3550_dir); |
| 1080 | exit_no_debugfs: |
| 1081 | dev_err(&ab->i2c_client[0]->dev, "failed to create debugfs entries.\n"); |
| 1082 | return; |
| 1083 | } |
| 1084 | |
| 1085 | static inline void ab3550_remove_debugfs(void) |
| 1086 | { |
| 1087 | debugfs_remove(ab3550_val_file); |
| 1088 | debugfs_remove(ab3550_address_file); |
| 1089 | debugfs_remove(ab3550_bank_file); |
| 1090 | debugfs_remove(ab3550_reg_file); |
| 1091 | debugfs_remove(ab3550_dir); |
| 1092 | } |
| 1093 | |
| 1094 | #else /* !CONFIG_DEBUG_FS */ |
| 1095 | static inline void ab3550_setup_debugfs(struct ab3550 *ab) |
| 1096 | { |
| 1097 | } |
| 1098 | static inline void ab3550_remove_debugfs(void) |
| 1099 | { |
| 1100 | } |
| 1101 | #endif |
| 1102 | |
| 1103 | /* |
| 1104 | * Basic set-up, datastructure creation/destruction and I2C interface. |
| 1105 | * This sets up a default config in the AB3550 chip so that it |
| 1106 | * will work as expected. |
| 1107 | */ |
| 1108 | static int __init ab3550_setup(struct ab3550 *ab) |
| 1109 | { |
| 1110 | int err = 0; |
| 1111 | int i; |
| 1112 | struct ab3550_platform_data *plf_data; |
| 1113 | struct abx500_init_settings *settings; |
| 1114 | |
| 1115 | plf_data = ab->i2c_client[0]->dev.platform_data; |
| 1116 | settings = plf_data->init_settings; |
| 1117 | |
| 1118 | for (i = 0; i < plf_data->init_settings_sz; i++) { |
| 1119 | err = mask_and_set_register_interruptible(ab, |
| 1120 | settings[i].bank, |
| 1121 | settings[i].reg, |
| 1122 | 0xFF, settings[i].setting); |
| 1123 | if (err) |
| 1124 | goto exit_no_setup; |
| 1125 | |
| 1126 | /* If event mask register update the event mask in ab3550 */ |
| 1127 | if ((settings[i].bank == 0) && |
| 1128 | (AB3550_IMR1 <= settings[i].reg) && |
| 1129 | (settings[i].reg <= AB3550_IMR5)) { |
| 1130 | ab->event_mask[settings[i].reg - AB3550_IMR1] = |
| 1131 | settings[i].setting; |
| 1132 | } |
| 1133 | } |
| 1134 | exit_no_setup: |
| 1135 | return err; |
| 1136 | } |
| 1137 | |
| 1138 | static void ab3550_mask_work(struct work_struct *work) |
| 1139 | { |
| 1140 | struct ab3550 *ab = container_of(work, struct ab3550, mask_work); |
| 1141 | int i; |
| 1142 | unsigned long flags; |
| 1143 | u8 mask[AB3550_NUM_EVENT_REG]; |
| 1144 | |
| 1145 | spin_lock_irqsave(&ab->event_lock, flags); |
| 1146 | for (i = 0; i < AB3550_NUM_EVENT_REG; i++) |
| 1147 | mask[i] = ab->event_mask[i]; |
| 1148 | spin_unlock_irqrestore(&ab->event_lock, flags); |
| 1149 | |
| 1150 | for (i = 0; i < AB3550_NUM_EVENT_REG; i++) { |
| 1151 | int err; |
| 1152 | |
| 1153 | err = mask_and_set_register_interruptible(ab, 0, |
| 1154 | (AB3550_IMR1 + i), ~0, mask[i]); |
| 1155 | if (err) |
| 1156 | dev_err(&ab->i2c_client[0]->dev, |
| 1157 | "ab3550_mask_work failed 0x%x,0x%x\n", |
| 1158 | (AB3550_IMR1 + i), mask[i]); |
| 1159 | } |
| 1160 | } |
| 1161 | |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1162 | static void ab3550_mask(struct irq_data *data) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1163 | { |
| 1164 | unsigned long flags; |
| 1165 | struct ab3550 *ab; |
| 1166 | struct ab3550_platform_data *plf_data; |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1167 | int irq; |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1168 | |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1169 | ab = irq_data_get_irq_chip_data(data); |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1170 | plf_data = ab->i2c_client[0]->dev.platform_data; |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1171 | irq = data->irq - plf_data->irq.base; |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1172 | |
| 1173 | spin_lock_irqsave(&ab->event_lock, flags); |
| 1174 | ab->event_mask[irq / 8] |= BIT(irq % 8); |
| 1175 | spin_unlock_irqrestore(&ab->event_lock, flags); |
| 1176 | |
| 1177 | schedule_work(&ab->mask_work); |
| 1178 | } |
| 1179 | |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1180 | static void ab3550_unmask(struct irq_data *data) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1181 | { |
| 1182 | unsigned long flags; |
| 1183 | struct ab3550 *ab; |
| 1184 | struct ab3550_platform_data *plf_data; |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1185 | int irq; |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1186 | |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1187 | ab = irq_data_get_irq_chip_data(data); |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1188 | plf_data = ab->i2c_client[0]->dev.platform_data; |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1189 | irq = data->irq - plf_data->irq.base; |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1190 | |
| 1191 | spin_lock_irqsave(&ab->event_lock, flags); |
| 1192 | ab->event_mask[irq / 8] &= ~BIT(irq % 8); |
| 1193 | spin_unlock_irqrestore(&ab->event_lock, flags); |
| 1194 | |
| 1195 | schedule_work(&ab->mask_work); |
| 1196 | } |
| 1197 | |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1198 | static void noop(struct irq_data *data) |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1199 | { |
| 1200 | } |
| 1201 | |
| 1202 | static struct irq_chip ab3550_irq_chip = { |
| 1203 | .name = "ab3550-core", /* Keep the same name as the request */ |
Mark Brown | c91ad34 | 2010-12-11 13:14:12 +0000 | [diff] [blame] | 1204 | .irq_disable = ab3550_mask, /* No default to mask in chip.c */ |
| 1205 | .irq_ack = noop, |
| 1206 | .irq_mask = ab3550_mask, |
| 1207 | .irq_unmask = ab3550_unmask, |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1208 | }; |
| 1209 | |
| 1210 | struct ab_family_id { |
| 1211 | u8 id; |
| 1212 | char *name; |
| 1213 | }; |
| 1214 | |
| 1215 | static const struct ab_family_id ids[] __initdata = { |
| 1216 | /* AB3550 */ |
| 1217 | { |
| 1218 | .id = AB3550_P1A, |
| 1219 | .name = "P1A" |
| 1220 | }, |
| 1221 | /* Terminator */ |
| 1222 | { |
| 1223 | .id = 0x00, |
| 1224 | } |
| 1225 | }; |
| 1226 | |
| 1227 | static int __init ab3550_probe(struct i2c_client *client, |
| 1228 | const struct i2c_device_id *id) |
| 1229 | { |
| 1230 | struct ab3550 *ab; |
| 1231 | struct ab3550_platform_data *ab3550_plf_data = |
| 1232 | client->dev.platform_data; |
| 1233 | int err; |
| 1234 | int i; |
| 1235 | int num_i2c_clients = 0; |
| 1236 | |
| 1237 | ab = kzalloc(sizeof(struct ab3550), GFP_KERNEL); |
| 1238 | if (!ab) { |
| 1239 | dev_err(&client->dev, |
| 1240 | "could not allocate " AB3550_NAME_STRING " device\n"); |
| 1241 | return -ENOMEM; |
| 1242 | } |
| 1243 | |
| 1244 | /* Initialize data structure */ |
| 1245 | mutex_init(&ab->access_mutex); |
| 1246 | spin_lock_init(&ab->event_lock); |
| 1247 | ab->i2c_client[0] = client; |
| 1248 | |
| 1249 | i2c_set_clientdata(client, ab); |
| 1250 | |
| 1251 | /* Read chip ID register */ |
| 1252 | err = get_register_interruptible(ab, 0, AB3550_CID_REG, &ab->chip_id); |
| 1253 | if (err) { |
| 1254 | dev_err(&client->dev, "could not communicate with the analog " |
| 1255 | "baseband chip\n"); |
| 1256 | goto exit_no_detect; |
| 1257 | } |
| 1258 | |
| 1259 | for (i = 0; ids[i].id != 0x0; i++) { |
| 1260 | if (ids[i].id == ab->chip_id) { |
| 1261 | snprintf(&ab->chip_name[0], sizeof(ab->chip_name) - 1, |
| 1262 | AB3550_ID_FORMAT_STRING, ids[i].name); |
| 1263 | break; |
| 1264 | } |
| 1265 | } |
| 1266 | |
| 1267 | if (ids[i].id == 0x0) { |
| 1268 | dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n", |
| 1269 | ab->chip_id); |
| 1270 | dev_err(&client->dev, "driver not started!\n"); |
| 1271 | goto exit_no_detect; |
| 1272 | } |
| 1273 | |
| 1274 | dev_info(&client->dev, "detected AB chip: %s\n", &ab->chip_name[0]); |
| 1275 | |
| 1276 | /* Attach other dummy I2C clients. */ |
| 1277 | while (++num_i2c_clients < AB3550_NUM_BANKS) { |
| 1278 | ab->i2c_client[num_i2c_clients] = |
| 1279 | i2c_new_dummy(client->adapter, |
| 1280 | (client->addr + num_i2c_clients)); |
| 1281 | if (!ab->i2c_client[num_i2c_clients]) { |
| 1282 | err = -ENOMEM; |
| 1283 | goto exit_no_dummy_client; |
| 1284 | } |
| 1285 | strlcpy(ab->i2c_client[num_i2c_clients]->name, id->name, |
| 1286 | sizeof(ab->i2c_client[num_i2c_clients]->name)); |
| 1287 | } |
| 1288 | |
| 1289 | err = ab3550_setup(ab); |
| 1290 | if (err) |
| 1291 | goto exit_no_setup; |
| 1292 | |
| 1293 | INIT_WORK(&ab->mask_work, ab3550_mask_work); |
| 1294 | |
| 1295 | for (i = 0; i < ab3550_plf_data->irq.count; i++) { |
| 1296 | unsigned int irq; |
| 1297 | |
| 1298 | irq = ab3550_plf_data->irq.base + i; |
| 1299 | set_irq_chip_data(irq, ab); |
| 1300 | set_irq_chip_and_handler(irq, &ab3550_irq_chip, |
| 1301 | handle_simple_irq); |
| 1302 | set_irq_nested_thread(irq, 1); |
| 1303 | #ifdef CONFIG_ARM |
| 1304 | set_irq_flags(irq, IRQF_VALID); |
| 1305 | #else |
| 1306 | set_irq_noprobe(irq); |
| 1307 | #endif |
| 1308 | } |
| 1309 | |
| 1310 | err = request_threaded_irq(client->irq, NULL, ab3550_irq_handler, |
| 1311 | IRQF_ONESHOT, "ab3550-core", ab); |
| 1312 | /* This real unpredictable IRQ is of course sampled for entropy */ |
| 1313 | rand_initialize_irq(client->irq); |
| 1314 | |
| 1315 | if (err) |
| 1316 | goto exit_no_irq; |
| 1317 | |
| 1318 | err = abx500_register_ops(&client->dev, &ab3550_ops); |
| 1319 | if (err) |
| 1320 | goto exit_no_ops; |
| 1321 | |
| 1322 | /* Set up and register the platform devices. */ |
| 1323 | for (i = 0; i < AB3550_NUM_DEVICES; i++) { |
| 1324 | ab3550_devs[i].platform_data = ab3550_plf_data->dev_data[i]; |
| 1325 | ab3550_devs[i].data_size = ab3550_plf_data->dev_data_sz[i]; |
| 1326 | } |
| 1327 | |
| 1328 | err = mfd_add_devices(&client->dev, 0, ab3550_devs, |
| 1329 | ARRAY_SIZE(ab3550_devs), NULL, |
| 1330 | ab3550_plf_data->irq.base); |
| 1331 | |
| 1332 | ab3550_setup_debugfs(ab); |
| 1333 | |
| 1334 | return 0; |
| 1335 | |
| 1336 | exit_no_ops: |
| 1337 | exit_no_irq: |
| 1338 | exit_no_setup: |
| 1339 | exit_no_dummy_client: |
| 1340 | /* Unregister the dummy i2c clients. */ |
| 1341 | while (--num_i2c_clients) |
| 1342 | i2c_unregister_device(ab->i2c_client[num_i2c_clients]); |
| 1343 | exit_no_detect: |
| 1344 | kfree(ab); |
| 1345 | return err; |
| 1346 | } |
| 1347 | |
| 1348 | static int __exit ab3550_remove(struct i2c_client *client) |
| 1349 | { |
| 1350 | struct ab3550 *ab = i2c_get_clientdata(client); |
| 1351 | int num_i2c_clients = AB3550_NUM_BANKS; |
| 1352 | |
| 1353 | mfd_remove_devices(&client->dev); |
| 1354 | ab3550_remove_debugfs(); |
| 1355 | |
| 1356 | while (--num_i2c_clients) |
| 1357 | i2c_unregister_device(ab->i2c_client[num_i2c_clients]); |
| 1358 | |
| 1359 | /* |
| 1360 | * At this point, all subscribers should have unregistered |
| 1361 | * their notifiers so deactivate IRQ |
| 1362 | */ |
| 1363 | free_irq(client->irq, ab); |
Mattias Wallin | 09bcb3f | 2010-05-11 00:25:29 +0200 | [diff] [blame] | 1364 | kfree(ab); |
| 1365 | return 0; |
| 1366 | } |
| 1367 | |
| 1368 | static const struct i2c_device_id ab3550_id[] = { |
| 1369 | {AB3550_NAME_STRING, 0}, |
| 1370 | {} |
| 1371 | }; |
| 1372 | MODULE_DEVICE_TABLE(i2c, ab3550_id); |
| 1373 | |
| 1374 | static struct i2c_driver ab3550_driver = { |
| 1375 | .driver = { |
| 1376 | .name = AB3550_NAME_STRING, |
| 1377 | .owner = THIS_MODULE, |
| 1378 | }, |
| 1379 | .id_table = ab3550_id, |
| 1380 | .probe = ab3550_probe, |
| 1381 | .remove = __exit_p(ab3550_remove), |
| 1382 | }; |
| 1383 | |
| 1384 | static int __init ab3550_i2c_init(void) |
| 1385 | { |
| 1386 | return i2c_add_driver(&ab3550_driver); |
| 1387 | } |
| 1388 | |
| 1389 | static void __exit ab3550_i2c_exit(void) |
| 1390 | { |
| 1391 | i2c_del_driver(&ab3550_driver); |
| 1392 | } |
| 1393 | |
| 1394 | subsys_initcall(ab3550_i2c_init); |
| 1395 | module_exit(ab3550_i2c_exit); |
| 1396 | |
| 1397 | MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>"); |
| 1398 | MODULE_DESCRIPTION("AB3550 core driver"); |
| 1399 | MODULE_LICENSE("GPL"); |