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Stephen Rothwellf9ff0f32007-08-22 13:46:44 +10001#ifndef _ASM_POWERPC_EXCEPTION_H
2#define _ASM_POWERPC_EXCEPTION_H
3/*
4 * Extracted from head_64.S
5 *
6 * PowerPC version
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 *
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
15 *
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
18 *
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 */
27/*
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
32 *
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
36 */
37
38#define EX_R9 0
39#define EX_R10 8
40#define EX_R11 16
41#define EX_R12 24
42#define EX_R13 32
43#define EX_SRR0 40
44#define EX_DAR 48
45#define EX_DSISR 56
46#define EX_CCR 60
47#define EX_R3 64
48#define EX_LR 72
Paul Mackerras48404f22011-05-01 19:48:20 +000049#define EX_CFAR 80
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100050
51/*
52 * We're short on space and time in the exception prolog, so we can't
53 * use the normal SET_REG_IMMEDIATE macro. Normally we just need the
54 * low halfword of the address, but for Kdump we need the whole low
55 * word.
56 */
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100057#define LOAD_HANDLER(reg, label) \
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100058 addi reg,reg,(label)-_stext; /* virt addr of handler ... */
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100059
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100060/* Exception register prefixes */
61#define EXC_HV H
62#define EXC_STD
63
Paul Mackerras673b1892011-04-05 13:59:58 +100064#define EXCEPTION_PROLOG_1(area) \
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +110065 GET_PACA(r13); \
Stephen Rothwell7180e3e2007-08-22 13:48:37 +100066 std r9,area+EX_R9(r13); /* save r9 - r12 */ \
67 std r10,area+EX_R10(r13); \
68 std r11,area+EX_R11(r13); \
69 std r12,area+EX_R12(r13); \
Paul Mackerras48404f22011-05-01 19:48:20 +000070 BEGIN_FTR_SECTION_NESTED(66); \
71 mfspr r10,SPRN_CFAR; \
72 std r10,area+EX_CFAR(r13); \
73 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
Paul Mackerras673b1892011-04-05 13:59:58 +100074 GET_SCRATCH0(r9); \
Stephen Rothwell7180e3e2007-08-22 13:48:37 +100075 std r9,area+EX_R13(r13); \
76 mfcr r9
77
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100078#define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
Paul Mackerras1f6a93e2008-08-30 11:40:24 +100079 ld r12,PACAKBASE(r13); /* get high part of &label */ \
80 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100081 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100082 LOAD_HANDLER(r12,label) \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100083 mtspr SPRN_##h##SRR0,r12; \
84 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
85 mtspr SPRN_##h##SRR1,r10; \
86 h##rfid; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100087 b . /* prevent speculative execution */
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100088#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
89 __EXCEPTION_PROLOG_PSERIES_1(label, h)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100090
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100091#define EXCEPTION_PROLOG_PSERIES(area, label, h) \
Paul Mackerras673b1892011-04-05 13:59:58 +100092 EXCEPTION_PROLOG_1(area); \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +100093 EXCEPTION_PROLOG_PSERIES_1(label, h);
Benjamin Herrenschmidtc5a8c0c2009-07-16 19:36:57 +000094
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100095/*
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +100096 * The common exception prolog is used for all except a few exceptions
97 * such as a segment miss on a kernel address. We have to be prepared
98 * to take another exception from the point where we first touch the
99 * kernel stack onwards.
100 *
101 * On entry r13 points to the paca, r9-r13 are saved in the paca,
102 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
103 * SRR1, and relocation is on.
104 */
105#define EXCEPTION_PROLOG_COMMON(n, area) \
106 andi. r10,r12,MSR_PR; /* See if coming from user */ \
107 mr r10,r1; /* Save r1 */ \
108 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
109 beq- 1f; \
110 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
1111: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \
Paul Mackerras1977b502011-05-01 19:46:44 +0000112 blt+ cr1,3f; /* abort if it is */ \
113 li r1,(n); /* will be reloaded later */ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000114 sth r1,PACA_TRAP_SAVE(r13); \
Paul Mackerras1977b502011-05-01 19:46:44 +0000115 std r3,area+EX_R3(r13); \
116 addi r3,r13,area; /* r3 -> where regs are saved*/ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000117 b bad_stack; \
1183: std r9,_CCR(r1); /* save CR in stackframe */ \
119 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
120 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
121 std r10,0(r1); /* make stack chain pointer */ \
122 std r0,GPR0(r1); /* save r0 in stackframe */ \
123 std r10,GPR1(r1); /* save r1 in stackframe */ \
124 ACCOUNT_CPU_USER_ENTRY(r9, r10); \
125 std r2,GPR2(r1); /* save r2 in stackframe */ \
126 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
127 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
128 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
129 ld r10,area+EX_R10(r13); \
130 std r9,GPR9(r1); \
131 std r10,GPR10(r1); \
132 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
133 ld r10,area+EX_R12(r13); \
134 ld r11,area+EX_R13(r13); \
135 std r9,GPR11(r1); \
136 std r10,GPR12(r1); \
137 std r11,GPR13(r1); \
Paul Mackerras48404f22011-05-01 19:48:20 +0000138 BEGIN_FTR_SECTION_NESTED(66); \
139 ld r10,area+EX_CFAR(r13); \
140 std r10,ORIG_GPR3(r1); \
141 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000142 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
143 mflr r9; /* save LR in stackframe */ \
144 std r9,_LINK(r1); \
145 mfctr r10; /* save CTR in stackframe */ \
146 std r10,_CTR(r1); \
147 lbz r10,PACASOFTIRQEN(r13); \
148 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
149 std r10,SOFTE(r1); \
150 std r11,_XER(r1); \
151 li r9,(n)+1; \
152 std r9,_TRAP(r1); /* set trap number */ \
153 li r10,0; \
154 ld r11,exception_marker@toc(r2); \
155 std r10,RESULT(r1); /* clear regs->result */ \
Paul Mackerrascf9efce2010-08-26 19:56:43 +0000156 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ \
157 ACCOUNT_STOLEN_TIME
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000158
159/*
160 * Exception vectors.
161 */
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000162#define STD_EXCEPTION_PSERIES(loc, vec, label) \
163 . = loc; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000164 .globl label##_pSeries; \
165label##_pSeries: \
166 HMT_MEDIUM; \
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000167 DO_KVM vec; \
Paul Mackerras673b1892011-04-05 13:59:58 +1000168 SET_SCRATCH0(r13); /* save r13 */ \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +1000169 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000170
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000171#define STD_EXCEPTION_HV(loc, vec, label) \
172 . = loc; \
173 .globl label##_hv; \
174label##_hv: \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000175 HMT_MEDIUM; \
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000176 DO_KVM vec; \
Paul Mackerras673b1892011-04-05 13:59:58 +1000177 SET_SCRATCH0(r13); /* save r13 */ \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +1000178 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000179
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000180#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000181 HMT_MEDIUM; \
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000182 DO_KVM vec; \
Paul Mackerras673b1892011-04-05 13:59:58 +1000183 SET_SCRATCH0(r13); /* save r13 */ \
Benjamin Herrenschmidt2dd60d72011-01-20 17:50:21 +1100184 GET_PACA(r13); \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000185 std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \
186 std r10,PACA_EXGEN+EX_R10(r13); \
187 lbz r10,PACASOFTIRQEN(r13); \
188 mfcr r9; \
189 cmpwi r10,0; \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +1000190 beq masked_##h##interrupt; \
Paul Mackerras673b1892011-04-05 13:59:58 +1000191 GET_SCRATCH0(r10); \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000192 std r10,PACA_EXGEN+EX_R13(r13); \
193 std r11,PACA_EXGEN+EX_R11(r13); \
194 std r12,PACA_EXGEN+EX_R12(r13); \
Paul Mackerras1f6a93e2008-08-30 11:40:24 +1000195 ld r12,PACAKBASE(r13); /* get high part of &label */ \
196 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +1000197 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000198 LOAD_HANDLER(r12,label##_common) \
Benjamin Herrenschmidta5d4f3a2011-04-05 14:20:31 +1000199 mtspr SPRN_##h##SRR0,r12; \
200 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
201 mtspr SPRN_##h##SRR1,r10; \
202 h##rfid; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000203 b . /* prevent speculative execution */
Benjamin Herrenschmidtb3e6b5d2011-04-05 14:27:11 +1000204#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h) \
205 __MASKABLE_EXCEPTION_PSERIES(vec, label, h)
206
207#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
208 . = loc; \
209 .globl label##_pSeries; \
210label##_pSeries: \
211 _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)
212
213#define MASKABLE_EXCEPTION_HV(loc, vec, label) \
214 . = loc; \
215 .globl label##_hv; \
216label##_hv: \
217 _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000218
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000219#ifdef CONFIG_PPC_ISERIES
220#define DISABLE_INTS \
221 li r11,0; \
222 stb r11,PACASOFTIRQEN(r13); \
223BEGIN_FW_FTR_SECTION; \
224 stb r11,PACAHARDIRQEN(r13); \
225END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
Benjamin Herrenschmidt945feb12008-04-17 14:35:01 +1000226 TRACE_DISABLE_INTS; \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000227BEGIN_FW_FTR_SECTION; \
228 mfmsr r10; \
229 ori r10,r10,MSR_EE; \
230 mtmsrd r10,1; \
231END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000232#else
233#define DISABLE_INTS \
234 li r11,0; \
235 stb r11,PACASOFTIRQEN(r13); \
Benjamin Herrenschmidt945feb12008-04-17 14:35:01 +1000236 stb r11,PACAHARDIRQEN(r13); \
237 TRACE_DISABLE_INTS
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000238#endif /* CONFIG_PPC_ISERIES */
239
240#define ENABLE_INTS \
241 ld r12,_MSR(r1); \
242 mfmsr r11; \
243 rlwimi r11,r12,0,MSR_EE; \
244 mtmsrd r11,1
245
246#define STD_EXCEPTION_COMMON(trap, label, hdlr) \
247 .align 7; \
248 .globl label##_common; \
249label##_common: \
250 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
251 DISABLE_INTS; \
252 bl .save_nvgprs; \
253 addi r3,r1,STACK_FRAME_OVERHEAD; \
254 bl hdlr; \
255 b .ret_from_except
256
257/*
258 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
259 * in the idle task and therefore need the special idle handling.
260 */
261#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \
262 .align 7; \
263 .globl label##_common; \
264label##_common: \
265 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
266 FINISH_NAP; \
267 DISABLE_INTS; \
268 bl .save_nvgprs; \
269 addi r3,r1,STACK_FRAME_OVERHEAD; \
270 bl hdlr; \
271 b .ret_from_except
272
273#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \
274 .align 7; \
275 .globl label##_common; \
276label##_common: \
277 EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \
278 FINISH_NAP; \
279 DISABLE_INTS; \
Olof Johanssona4165612007-09-05 12:42:30 +1000280BEGIN_FTR_SECTION \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000281 bl .ppc64_runlatch_on; \
Olof Johanssona4165612007-09-05 12:42:30 +1000282END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \
Stephen Rothwellf9ff0f32007-08-22 13:46:44 +1000283 addi r3,r1,STACK_FRAME_OVERHEAD; \
284 bl hdlr; \
285 b .ret_from_except_lite
286
287/*
288 * When the idle code in power4_idle puts the CPU into NAP mode,
289 * it has to do so in a loop, and relies on the external interrupt
290 * and decrementer interrupt entry code to get it out of the loop.
291 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
292 * to signal that it is in the loop and needs help to get out.
293 */
294#ifdef CONFIG_PPC_970_NAP
295#define FINISH_NAP \
296BEGIN_FTR_SECTION \
297 clrrdi r11,r1,THREAD_SHIFT; \
298 ld r9,TI_LOCAL_FLAGS(r11); \
299 andi. r10,r9,_TLF_NAPPING; \
300 bnel power4_fixup_nap; \
301END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
302#else
303#define FINISH_NAP
304#endif
305
306#endif /* _ASM_POWERPC_EXCEPTION_H */