blob: 9d2b0da590af1b98f50a66028c2001f4ecabba0f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: init.c,v 1.209 2002/02/09 19:49:31 davem Exp $
2 * arch/sparc64/mm/init.c
3 *
4 * Copyright (C) 1996-1999 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1997-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7
8#include <linux/config.h>
David S. Millerc4bce902006-02-11 21:57:54 -08009#include <linux/module.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010#include <linux/kernel.h>
11#include <linux/sched.h>
12#include <linux/string.h>
13#include <linux/init.h>
14#include <linux/bootmem.h>
15#include <linux/mm.h>
16#include <linux/hugetlb.h>
17#include <linux/slab.h>
18#include <linux/initrd.h>
19#include <linux/swap.h>
20#include <linux/pagemap.h>
21#include <linux/fs.h>
22#include <linux/seq_file.h>
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -070023#include <linux/kprobes.h>
David S. Miller1ac4f5e2005-09-21 21:49:32 -070024#include <linux/cache.h>
David S. Miller13edad72005-09-29 17:58:26 -070025#include <linux/sort.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
27#include <asm/head.h>
28#include <asm/system.h>
29#include <asm/page.h>
30#include <asm/pgalloc.h>
31#include <asm/pgtable.h>
32#include <asm/oplib.h>
33#include <asm/iommu.h>
34#include <asm/io.h>
35#include <asm/uaccess.h>
36#include <asm/mmu_context.h>
37#include <asm/tlbflush.h>
38#include <asm/dma.h>
39#include <asm/starfire.h>
40#include <asm/tlb.h>
41#include <asm/spitfire.h>
42#include <asm/sections.h>
David S. Miller517af332006-02-01 15:55:21 -080043#include <asm/tsb.h>
David S. Miller481295f2006-02-07 21:51:08 -080044#include <asm/hypervisor.h>
David S. Miller372b07b2006-06-21 15:35:28 -070045#include <asm/prom.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
47extern void device_scan(void);
48
David S. Miller9cc3a1a2006-02-21 20:51:13 -080049#define MAX_PHYS_ADDRESS (1UL << 42UL)
50#define KPTE_BITMAP_CHUNK_SZ (256UL * 1024UL * 1024UL)
51#define KPTE_BITMAP_BYTES \
52 ((MAX_PHYS_ADDRESS / KPTE_BITMAP_CHUNK_SZ) / 8)
53
54unsigned long kern_linear_pte_xor[2] __read_mostly;
55
56/* A bitmap, one bit for every 256MB of physical memory. If the bit
57 * is clear, we should use a 4MB page (via kern_linear_pte_xor[0]) else
58 * if set we should use a 256MB page (via kern_linear_pte_xor[1]).
59 */
60unsigned long kpte_linear_bitmap[KPTE_BITMAP_BYTES / sizeof(unsigned long)];
61
David S. Millerd7744a02006-02-21 22:31:11 -080062/* A special kernel TSB for 4MB and 256MB linear mappings. */
63struct tsb swapper_4m_tsb[KERNEL_TSB4M_NENTRIES];
64
David S. Miller13edad72005-09-29 17:58:26 -070065#define MAX_BANKS 32
David S. Miller10147572005-09-28 21:46:43 -070066
David S. Miller13edad72005-09-29 17:58:26 -070067static struct linux_prom64_registers pavail[MAX_BANKS] __initdata;
68static struct linux_prom64_registers pavail_rescan[MAX_BANKS] __initdata;
69static int pavail_ents __initdata;
70static int pavail_rescan_ents __initdata;
David S. Miller10147572005-09-28 21:46:43 -070071
David S. Miller13edad72005-09-29 17:58:26 -070072static int cmp_p64(const void *a, const void *b)
73{
74 const struct linux_prom64_registers *x = a, *y = b;
75
76 if (x->phys_addr > y->phys_addr)
77 return 1;
78 if (x->phys_addr < y->phys_addr)
79 return -1;
80 return 0;
81}
82
83static void __init read_obp_memory(const char *property,
84 struct linux_prom64_registers *regs,
85 int *num_ents)
86{
87 int node = prom_finddevice("/memory");
88 int prop_size = prom_getproplen(node, property);
89 int ents, ret, i;
90
91 ents = prop_size / sizeof(struct linux_prom64_registers);
92 if (ents > MAX_BANKS) {
93 prom_printf("The machine has more %s property entries than "
94 "this kernel can support (%d).\n",
95 property, MAX_BANKS);
96 prom_halt();
97 }
98
99 ret = prom_getproperty(node, property, (char *) regs, prop_size);
100 if (ret == -1) {
101 prom_printf("Couldn't get %s property from /memory.\n");
102 prom_halt();
103 }
104
David S. Miller13edad72005-09-29 17:58:26 -0700105 /* Sanitize what we got from the firmware, by page aligning
106 * everything.
107 */
108 for (i = 0; i < ents; i++) {
109 unsigned long base, size;
110
111 base = regs[i].phys_addr;
112 size = regs[i].reg_size;
113
114 size &= PAGE_MASK;
115 if (base & ~PAGE_MASK) {
116 unsigned long new_base = PAGE_ALIGN(base);
117
118 size -= new_base - base;
119 if ((long) size < 0L)
120 size = 0UL;
121 base = new_base;
122 }
123 regs[i].phys_addr = base;
124 regs[i].reg_size = size;
125 }
David S. Miller486ad102006-06-22 00:00:00 -0700126
127 for (i = 0; i < ents; i++) {
128 if (regs[i].reg_size == 0UL) {
129 int j;
130
131 for (j = i; j < ents - 1; j++) {
132 regs[j].phys_addr =
133 regs[j+1].phys_addr;
134 regs[j].reg_size =
135 regs[j+1].reg_size;
136 }
137
138 ents--;
139 i--;
140 }
141 }
142
143 *num_ents = ents;
144
David S. Millerc9c10832005-10-12 12:22:46 -0700145 sort(regs, ents, sizeof(struct linux_prom64_registers),
David S. Miller13edad72005-09-29 17:58:26 -0700146 cmp_p64, NULL);
147}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148
David S. Miller2bdb3cb2005-09-22 01:08:57 -0700149unsigned long *sparc64_valid_addr_bitmap __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
David S. Millerd1112012006-03-08 02:16:07 -0800151/* Kernel physical address base and size in bytes. */
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700152unsigned long kern_base __read_mostly;
153unsigned long kern_size __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155/* get_new_mmu_context() uses "cache + 1". */
156DEFINE_SPINLOCK(ctx_alloc_lock);
157unsigned long tlb_context_cache = CTX_FIRST_VERSION - 1;
158#define CTX_BMAP_SLOTS (1UL << (CTX_NR_BITS - 6))
159unsigned long mmu_context_bmap[CTX_BMAP_SLOTS];
160
161/* References to special section boundaries */
162extern char _start[], _end[];
163
164/* Initial ramdisk setup */
165extern unsigned long sparc_ramdisk_image64;
166extern unsigned int sparc_ramdisk_image;
167extern unsigned int sparc_ramdisk_size;
168
David S. Miller1ac4f5e2005-09-21 21:49:32 -0700169struct page *mem_map_zero __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170
David S. Miller0835ae02005-10-04 15:23:20 -0700171unsigned int sparc64_highest_unlocked_tlb_ent __read_mostly;
172
173unsigned long sparc64_kern_pri_context __read_mostly;
174unsigned long sparc64_kern_pri_nuc_bits __read_mostly;
175unsigned long sparc64_kern_sec_context __read_mostly;
176
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177int bigkernel = 0;
178
David S. Miller3c936462006-01-31 18:30:27 -0800179kmem_cache_t *pgtable_cache __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180
David S. Miller3c936462006-01-31 18:30:27 -0800181static void zero_ctor(void *addr, kmem_cache_t *cache, unsigned long flags)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182{
David S. Miller3c936462006-01-31 18:30:27 -0800183 clear_page(addr);
184}
185
David S. Miller9b4006d2006-03-18 18:12:42 -0800186extern void tsb_cache_init(void);
187
David S. Miller3c936462006-01-31 18:30:27 -0800188void pgtable_cache_init(void)
189{
190 pgtable_cache = kmem_cache_create("pgtable_cache",
191 PAGE_SIZE, PAGE_SIZE,
192 SLAB_HWCACHE_ALIGN |
193 SLAB_MUST_HWCACHE_ALIGN,
194 zero_ctor,
195 NULL);
196 if (!pgtable_cache) {
David S. Miller9b4006d2006-03-18 18:12:42 -0800197 prom_printf("Could not create pgtable_cache\n");
David S. Miller3c936462006-01-31 18:30:27 -0800198 prom_halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 }
David S. Miller9b4006d2006-03-18 18:12:42 -0800200 tsb_cache_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201}
202
203#ifdef CONFIG_DEBUG_DCFLUSH
204atomic_t dcpage_flushes = ATOMIC_INIT(0);
205#ifdef CONFIG_SMP
206atomic_t dcpage_flushes_xcall = ATOMIC_INIT(0);
207#endif
208#endif
209
David S. Miller7a591cf2006-02-26 19:44:50 -0800210inline void flush_dcache_page_impl(struct page *page)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211{
David S. Miller7a591cf2006-02-26 19:44:50 -0800212 BUG_ON(tlb_type == hypervisor);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213#ifdef CONFIG_DEBUG_DCFLUSH
214 atomic_inc(&dcpage_flushes);
215#endif
216
217#ifdef DCACHE_ALIASING_POSSIBLE
218 __flush_dcache_page(page_address(page),
219 ((tlb_type == spitfire) &&
220 page_mapping(page) != NULL));
221#else
222 if (page_mapping(page) != NULL &&
223 tlb_type == spitfire)
224 __flush_icache_page(__pa(page_address(page)));
225#endif
226}
227
228#define PG_dcache_dirty PG_arch_1
David S. Miller17b0e192006-03-08 15:57:03 -0800229#define PG_dcache_cpu_shift 24UL
230#define PG_dcache_cpu_mask (256UL - 1UL)
David S. Miller48b0e542005-07-27 16:08:44 -0700231
232#if NR_CPUS > 256
233#error D-cache dirty tracking and thread_info->cpu need fixing for > 256 cpus
234#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235
236#define dcache_dirty_cpu(page) \
David S. Miller48b0e542005-07-27 16:08:44 -0700237 (((page)->flags >> PG_dcache_cpu_shift) & PG_dcache_cpu_mask)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
239static __inline__ void set_dcache_dirty(struct page *page, int this_cpu)
240{
241 unsigned long mask = this_cpu;
David S. Miller48b0e542005-07-27 16:08:44 -0700242 unsigned long non_cpu_bits;
243
244 non_cpu_bits = ~(PG_dcache_cpu_mask << PG_dcache_cpu_shift);
245 mask = (mask << PG_dcache_cpu_shift) | (1UL << PG_dcache_dirty);
246
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 __asm__ __volatile__("1:\n\t"
248 "ldx [%2], %%g7\n\t"
249 "and %%g7, %1, %%g1\n\t"
250 "or %%g1, %0, %%g1\n\t"
251 "casx [%2], %%g7, %%g1\n\t"
252 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700253 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700255 " nop"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 : /* no outputs */
257 : "r" (mask), "r" (non_cpu_bits), "r" (&page->flags)
258 : "g1", "g7");
259}
260
261static __inline__ void clear_dcache_dirty_cpu(struct page *page, unsigned long cpu)
262{
263 unsigned long mask = (1UL << PG_dcache_dirty);
264
265 __asm__ __volatile__("! test_and_clear_dcache_dirty\n"
266 "1:\n\t"
267 "ldx [%2], %%g7\n\t"
David S. Miller48b0e542005-07-27 16:08:44 -0700268 "srlx %%g7, %4, %%g1\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269 "and %%g1, %3, %%g1\n\t"
270 "cmp %%g1, %0\n\t"
271 "bne,pn %%icc, 2f\n\t"
272 " andn %%g7, %1, %%g1\n\t"
273 "casx [%2], %%g7, %%g1\n\t"
274 "cmp %%g7, %%g1\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700275 "membar #StoreLoad | #StoreStore\n\t"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 "bne,pn %%xcc, 1b\n\t"
David S. Millerb445e262005-06-27 15:42:04 -0700277 " nop\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 "2:"
279 : /* no outputs */
280 : "r" (cpu), "r" (mask), "r" (&page->flags),
David S. Miller48b0e542005-07-27 16:08:44 -0700281 "i" (PG_dcache_cpu_mask),
282 "i" (PG_dcache_cpu_shift)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283 : "g1", "g7");
284}
285
David S. Miller517af332006-02-01 15:55:21 -0800286static inline void tsb_insert(struct tsb *ent, unsigned long tag, unsigned long pte)
287{
288 unsigned long tsb_addr = (unsigned long) ent;
289
David S. Miller3b3ab2e2006-02-17 09:54:42 -0800290 if (tlb_type == cheetah_plus || tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -0800291 tsb_addr = __pa(tsb_addr);
292
293 __tsb_insert(tsb_addr, tag, pte);
294}
295
David S. Millerc4bce902006-02-11 21:57:54 -0800296unsigned long _PAGE_ALL_SZ_BITS __read_mostly;
297unsigned long _PAGE_SZBITS __read_mostly;
298
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
300{
David S. Millerbd407912006-01-31 18:31:38 -0800301 struct mm_struct *mm;
David S. Miller74ae9982006-03-05 18:26:24 -0800302 struct tsb *tsb;
David S. Miller7a1ac522006-03-16 02:02:32 -0800303 unsigned long tag, flags;
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800304 unsigned long tsb_index, tsb_hash_shift;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305
David S. Miller7a591cf2006-02-26 19:44:50 -0800306 if (tlb_type != hypervisor) {
307 unsigned long pfn = pte_pfn(pte);
308 unsigned long pg_flags;
309 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310
David S. Miller7a591cf2006-02-26 19:44:50 -0800311 if (pfn_valid(pfn) &&
312 (page = pfn_to_page(pfn), page_mapping(page)) &&
313 ((pg_flags = page->flags) & (1UL << PG_dcache_dirty))) {
314 int cpu = ((pg_flags >> PG_dcache_cpu_shift) &
315 PG_dcache_cpu_mask);
316 int this_cpu = get_cpu();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317
David S. Miller7a591cf2006-02-26 19:44:50 -0800318 /* This is just to optimize away some function calls
319 * in the SMP case.
320 */
321 if (cpu == this_cpu)
322 flush_dcache_page_impl(page);
323 else
324 smp_flush_dcache_page_impl(page, cpu);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325
David S. Miller7a591cf2006-02-26 19:44:50 -0800326 clear_dcache_dirty_cpu(page, cpu);
327
328 put_cpu();
329 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 }
David S. Millerbd407912006-01-31 18:31:38 -0800331
332 mm = vma->vm_mm;
David S. Miller7a1ac522006-03-16 02:02:32 -0800333
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800334 tsb_index = MM_TSB_BASE;
335 tsb_hash_shift = PAGE_SHIFT;
336
David S. Miller7a1ac522006-03-16 02:02:32 -0800337 spin_lock_irqsave(&mm->context.lock, flags);
338
David S. Millerdcc1e8d2006-03-22 00:49:59 -0800339#ifdef CONFIG_HUGETLB_PAGE
340 if (mm->context.tsb_block[MM_TSB_HUGE].tsb != NULL) {
341 if ((tlb_type == hypervisor &&
342 (pte_val(pte) & _PAGE_SZALL_4V) == _PAGE_SZHUGE_4V) ||
343 (tlb_type != hypervisor &&
344 (pte_val(pte) & _PAGE_SZALL_4U) == _PAGE_SZHUGE_4U)) {
345 tsb_index = MM_TSB_HUGE;
346 tsb_hash_shift = HPAGE_SHIFT;
347 }
348 }
349#endif
350
351 tsb = mm->context.tsb_block[tsb_index].tsb;
352 tsb += ((address >> tsb_hash_shift) &
353 (mm->context.tsb_block[tsb_index].tsb_nentries - 1UL));
David S. Miller74ae9982006-03-05 18:26:24 -0800354 tag = (address >> 22UL);
355 tsb_insert(tsb, tag, pte_val(pte));
David S. Miller7a1ac522006-03-16 02:02:32 -0800356
357 spin_unlock_irqrestore(&mm->context.lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358}
359
360void flush_dcache_page(struct page *page)
361{
David S. Millera9546f52005-04-17 18:03:09 -0700362 struct address_space *mapping;
363 int this_cpu;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364
David S. Miller7a591cf2006-02-26 19:44:50 -0800365 if (tlb_type == hypervisor)
366 return;
367
David S. Millera9546f52005-04-17 18:03:09 -0700368 /* Do not bother with the expensive D-cache flush if it
369 * is merely the zero page. The 'bigcore' testcase in GDB
370 * causes this case to run millions of times.
371 */
372 if (page == ZERO_PAGE(0))
373 return;
374
375 this_cpu = get_cpu();
376
377 mapping = page_mapping(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378 if (mapping && !mapping_mapped(mapping)) {
David S. Millera9546f52005-04-17 18:03:09 -0700379 int dirty = test_bit(PG_dcache_dirty, &page->flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700380 if (dirty) {
David S. Millera9546f52005-04-17 18:03:09 -0700381 int dirty_cpu = dcache_dirty_cpu(page);
382
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383 if (dirty_cpu == this_cpu)
384 goto out;
385 smp_flush_dcache_page_impl(page, dirty_cpu);
386 }
387 set_dcache_dirty(page, this_cpu);
388 } else {
389 /* We could delay the flush for the !page_mapping
390 * case too. But that case is for exec env/arg
391 * pages and those are %99 certainly going to get
392 * faulted into the tlb (and thus flushed) anyways.
393 */
394 flush_dcache_page_impl(page);
395 }
396
397out:
398 put_cpu();
399}
400
Prasanna S Panchamukhi05e14cb2005-09-06 15:19:30 -0700401void __kprobes flush_icache_range(unsigned long start, unsigned long end)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402{
David S. Millera43fe0e2006-02-04 03:10:53 -0800403 /* Cheetah and Hypervisor platform cpus have coherent I-cache. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404 if (tlb_type == spitfire) {
405 unsigned long kaddr;
406
407 for (kaddr = start; kaddr < end; kaddr += PAGE_SIZE)
408 __flush_icache_page(__get_phys(kaddr));
409 }
410}
411
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412void show_mem(void)
413{
414 printk("Mem-info:\n");
415 show_free_areas();
416 printk("Free swap: %6ldkB\n",
417 nr_swap_pages << (PAGE_SHIFT-10));
418 printk("%ld pages of RAM\n", num_physpages);
419 printk("%d free pages\n", nr_free_pages());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420}
421
422void mmu_info(struct seq_file *m)
423{
424 if (tlb_type == cheetah)
425 seq_printf(m, "MMU Type\t: Cheetah\n");
426 else if (tlb_type == cheetah_plus)
427 seq_printf(m, "MMU Type\t: Cheetah+\n");
428 else if (tlb_type == spitfire)
429 seq_printf(m, "MMU Type\t: Spitfire\n");
David S. Millera43fe0e2006-02-04 03:10:53 -0800430 else if (tlb_type == hypervisor)
431 seq_printf(m, "MMU Type\t: Hypervisor (sun4v)\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 else
433 seq_printf(m, "MMU Type\t: ???\n");
434
435#ifdef CONFIG_DEBUG_DCFLUSH
436 seq_printf(m, "DCPageFlushes\t: %d\n",
437 atomic_read(&dcpage_flushes));
438#ifdef CONFIG_SMP
439 seq_printf(m, "DCPageFlushesXC\t: %d\n",
440 atomic_read(&dcpage_flushes_xcall));
441#endif /* CONFIG_SMP */
442#endif /* CONFIG_DEBUG_DCFLUSH */
443}
444
445struct linux_prom_translation {
446 unsigned long virt;
447 unsigned long size;
448 unsigned long data;
449};
David S. Millerc9c10832005-10-12 12:22:46 -0700450
451/* Exported for kernel TLB miss handling in ktlb.S */
452struct linux_prom_translation prom_trans[512] __read_mostly;
453unsigned int prom_trans_ents __read_mostly;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455/* Exported for SMP bootup purposes. */
456unsigned long kern_locked_tte_data;
457
David S. Miller405599b2005-09-22 00:12:35 -0700458/* The obp translations are saved based on 8k pagesize, since obp can
459 * use a mixture of pagesizes. Misses to the LOW_OBP_ADDRESS ->
David S. Miller74bf4312006-01-31 18:29:18 -0800460 * HI_OBP_ADDRESS range are handled in ktlb.S.
David S. Miller405599b2005-09-22 00:12:35 -0700461 */
David S. Miller5085b4a2005-09-22 00:45:41 -0700462static inline int in_obp_range(unsigned long vaddr)
463{
464 return (vaddr >= LOW_OBP_ADDRESS &&
465 vaddr < HI_OBP_ADDRESS);
466}
467
David S. Millerc9c10832005-10-12 12:22:46 -0700468static int cmp_ptrans(const void *a, const void *b)
David S. Miller405599b2005-09-22 00:12:35 -0700469{
David S. Millerc9c10832005-10-12 12:22:46 -0700470 const struct linux_prom_translation *x = a, *y = b;
David S. Miller405599b2005-09-22 00:12:35 -0700471
David S. Millerc9c10832005-10-12 12:22:46 -0700472 if (x->virt > y->virt)
473 return 1;
474 if (x->virt < y->virt)
475 return -1;
476 return 0;
David S. Miller405599b2005-09-22 00:12:35 -0700477}
478
David S. Millerc9c10832005-10-12 12:22:46 -0700479/* Read OBP translations property into 'prom_trans[]'. */
David S. Miller9ad98c52005-10-05 15:12:00 -0700480static void __init read_obp_translations(void)
David S. Miller405599b2005-09-22 00:12:35 -0700481{
David S. Millerc9c10832005-10-12 12:22:46 -0700482 int n, node, ents, first, last, i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483
484 node = prom_finddevice("/virtual-memory");
485 n = prom_getproplen(node, "translations");
David S. Miller405599b2005-09-22 00:12:35 -0700486 if (unlikely(n == 0 || n == -1)) {
David S. Millerb206fc42005-09-21 22:31:13 -0700487 prom_printf("prom_mappings: Couldn't get size.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488 prom_halt();
489 }
David S. Miller405599b2005-09-22 00:12:35 -0700490 if (unlikely(n > sizeof(prom_trans))) {
491 prom_printf("prom_mappings: Size %Zd is too big.\n", n);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492 prom_halt();
493 }
David S. Miller405599b2005-09-22 00:12:35 -0700494
David S. Millerb206fc42005-09-21 22:31:13 -0700495 if ((n = prom_getproperty(node, "translations",
David S. Miller405599b2005-09-22 00:12:35 -0700496 (char *)&prom_trans[0],
497 sizeof(prom_trans))) == -1) {
David S. Millerb206fc42005-09-21 22:31:13 -0700498 prom_printf("prom_mappings: Couldn't get property.\n");
499 prom_halt();
500 }
David S. Miller9ad98c52005-10-05 15:12:00 -0700501
David S. Millerb206fc42005-09-21 22:31:13 -0700502 n = n / sizeof(struct linux_prom_translation);
David S. Miller9ad98c52005-10-05 15:12:00 -0700503
David S. Millerc9c10832005-10-12 12:22:46 -0700504 ents = n;
505
506 sort(prom_trans, ents, sizeof(struct linux_prom_translation),
507 cmp_ptrans, NULL);
508
509 /* Now kick out all the non-OBP entries. */
510 for (i = 0; i < ents; i++) {
511 if (in_obp_range(prom_trans[i].virt))
512 break;
513 }
514 first = i;
515 for (; i < ents; i++) {
516 if (!in_obp_range(prom_trans[i].virt))
517 break;
518 }
519 last = i;
520
521 for (i = 0; i < (last - first); i++) {
522 struct linux_prom_translation *src = &prom_trans[i + first];
523 struct linux_prom_translation *dest = &prom_trans[i];
524
525 *dest = *src;
526 }
527 for (; i < ents; i++) {
528 struct linux_prom_translation *dest = &prom_trans[i];
529 dest->virt = dest->size = dest->data = 0x0UL;
530 }
531
532 prom_trans_ents = last - first;
533
534 if (tlb_type == spitfire) {
535 /* Clear diag TTE bits. */
536 for (i = 0; i < prom_trans_ents; i++)
537 prom_trans[i].data &= ~0x0003fe0000000000UL;
538 }
David S. Miller405599b2005-09-22 00:12:35 -0700539}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540
David S. Millerd82ace72006-02-09 02:52:44 -0800541static void __init hypervisor_tlb_lock(unsigned long vaddr,
542 unsigned long pte,
543 unsigned long mmu)
544{
David S. Miller164c2202006-02-09 22:57:21 -0800545 register unsigned long func asm("%o5");
546 register unsigned long arg0 asm("%o0");
547 register unsigned long arg1 asm("%o1");
548 register unsigned long arg2 asm("%o2");
549 register unsigned long arg3 asm("%o3");
David S. Millerd82ace72006-02-09 02:52:44 -0800550
551 func = HV_FAST_MMU_MAP_PERM_ADDR;
552 arg0 = vaddr;
553 arg1 = 0;
554 arg2 = pte;
555 arg3 = mmu;
556 __asm__ __volatile__("ta 0x80"
557 : "=&r" (func), "=&r" (arg0),
558 "=&r" (arg1), "=&r" (arg2),
559 "=&r" (arg3)
560 : "0" (func), "1" (arg0), "2" (arg1),
561 "3" (arg2), "4" (arg3));
David S. Miller12e126a2006-02-17 14:40:30 -0800562 if (arg0 != 0) {
563 prom_printf("hypervisor_tlb_lock[%lx:%lx:%lx:%lx]: "
564 "errors with %lx\n", vaddr, 0, pte, mmu, arg0);
565 prom_halt();
566 }
David S. Millerd82ace72006-02-09 02:52:44 -0800567}
568
David S. Millerc4bce902006-02-11 21:57:54 -0800569static unsigned long kern_large_tte(unsigned long paddr);
570
David S. Miller898cf0e2005-09-23 11:59:44 -0700571static void __init remap_kernel(void)
David S. Miller405599b2005-09-22 00:12:35 -0700572{
573 unsigned long phys_page, tte_vaddr, tte_data;
David S. Miller405599b2005-09-22 00:12:35 -0700574 int tlb_ent = sparc64_highest_locked_tlbent();
575
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 tte_vaddr = (unsigned long) KERNBASE;
David S. Millerbff06d52005-09-22 20:11:33 -0700577 phys_page = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
David S. Millerc4bce902006-02-11 21:57:54 -0800578 tte_data = kern_large_tte(phys_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579
580 kern_locked_tte_data = tte_data;
581
David S. Millerd82ace72006-02-09 02:52:44 -0800582 /* Now lock us into the TLBs via Hypervisor or OBP. */
583 if (tlb_type == hypervisor) {
584 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
585 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
586 if (bigkernel) {
587 tte_vaddr += 0x400000;
588 tte_data += 0x400000;
589 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_DMMU);
590 hypervisor_tlb_lock(tte_vaddr, tte_data, HV_MMU_IMMU);
591 }
592 } else {
593 prom_dtlb_load(tlb_ent, tte_data, tte_vaddr);
594 prom_itlb_load(tlb_ent, tte_data, tte_vaddr);
595 if (bigkernel) {
596 tlb_ent -= 1;
597 prom_dtlb_load(tlb_ent,
598 tte_data + 0x400000,
599 tte_vaddr + 0x400000);
600 prom_itlb_load(tlb_ent,
601 tte_data + 0x400000,
602 tte_vaddr + 0x400000);
603 }
604 sparc64_highest_unlocked_tlb_ent = tlb_ent - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700605 }
David S. Miller0835ae02005-10-04 15:23:20 -0700606 if (tlb_type == cheetah_plus) {
607 sparc64_kern_pri_context = (CTX_CHEETAH_PLUS_CTX0 |
608 CTX_CHEETAH_PLUS_NUC);
609 sparc64_kern_pri_nuc_bits = CTX_CHEETAH_PLUS_NUC;
610 sparc64_kern_sec_context = CTX_CHEETAH_PLUS_CTX0;
611 }
David S. Miller405599b2005-09-22 00:12:35 -0700612}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613
David S. Miller405599b2005-09-22 00:12:35 -0700614
David S. Millerc9c10832005-10-12 12:22:46 -0700615static void __init inherit_prom_mappings(void)
David S. Miller9ad98c52005-10-05 15:12:00 -0700616{
617 read_obp_translations();
David S. Miller405599b2005-09-22 00:12:35 -0700618
619 /* Now fixup OBP's idea about where we really are mapped. */
620 prom_printf("Remapping the kernel... ");
621 remap_kernel();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 prom_printf("done.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623}
624
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625void prom_world(int enter)
626{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 if (!enter)
628 set_fs((mm_segment_t) { get_thread_current_ds() });
629
David S. Miller3487d1d2006-01-31 18:33:25 -0800630 __asm__ __volatile__("flushw");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631}
632
633#ifdef DCACHE_ALIASING_POSSIBLE
634void __flush_dcache_range(unsigned long start, unsigned long end)
635{
636 unsigned long va;
637
638 if (tlb_type == spitfire) {
639 int n = 0;
640
641 for (va = start; va < end; va += 32) {
642 spitfire_put_dcache_tag(va & 0x3fe0, 0x0);
643 if (++n >= 512)
644 break;
645 }
David S. Millera43fe0e2006-02-04 03:10:53 -0800646 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 start = __pa(start);
648 end = __pa(end);
649 for (va = start; va < end; va += 32)
650 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
651 "membar #Sync"
652 : /* no outputs */
653 : "r" (va),
654 "i" (ASI_DCACHE_INVALIDATE));
655 }
656}
657#endif /* DCACHE_ALIASING_POSSIBLE */
658
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659/* Caller does TLB context flushing on local CPU if necessary.
660 * The caller also ensures that CTX_VALID(mm->context) is false.
661 *
662 * We must be careful about boundary cases so that we never
663 * let the user have CTX 0 (nucleus) or we ever use a CTX
664 * version of zero (and thus NO_CONTEXT would not be caught
665 * by version mis-match tests in mmu_context.h).
David S. Millera0663a72006-02-23 14:19:28 -0800666 *
667 * Always invoked with interrupts disabled.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668 */
669void get_new_mmu_context(struct mm_struct *mm)
670{
671 unsigned long ctx, new_ctx;
672 unsigned long orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800673 unsigned long flags;
David S. Millera0663a72006-02-23 14:19:28 -0800674 int new_version;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700675
David S. Millera77754b2006-03-06 19:59:50 -0800676 spin_lock_irqsave(&ctx_alloc_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 orig_pgsz_bits = (mm->context.sparc64_ctx_val & CTX_PGSZ_MASK);
678 ctx = (tlb_context_cache + 1) & CTX_NR_MASK;
679 new_ctx = find_next_zero_bit(mmu_context_bmap, 1 << CTX_NR_BITS, ctx);
David S. Millera0663a72006-02-23 14:19:28 -0800680 new_version = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 if (new_ctx >= (1 << CTX_NR_BITS)) {
682 new_ctx = find_next_zero_bit(mmu_context_bmap, ctx, 1);
683 if (new_ctx >= ctx) {
684 int i;
685 new_ctx = (tlb_context_cache & CTX_VERSION_MASK) +
686 CTX_FIRST_VERSION;
687 if (new_ctx == 1)
688 new_ctx = CTX_FIRST_VERSION;
689
690 /* Don't call memset, for 16 entries that's just
691 * plain silly...
692 */
693 mmu_context_bmap[0] = 3;
694 mmu_context_bmap[1] = 0;
695 mmu_context_bmap[2] = 0;
696 mmu_context_bmap[3] = 0;
697 for (i = 4; i < CTX_BMAP_SLOTS; i += 4) {
698 mmu_context_bmap[i + 0] = 0;
699 mmu_context_bmap[i + 1] = 0;
700 mmu_context_bmap[i + 2] = 0;
701 mmu_context_bmap[i + 3] = 0;
702 }
David S. Millera0663a72006-02-23 14:19:28 -0800703 new_version = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 goto out;
705 }
706 }
707 mmu_context_bmap[new_ctx>>6] |= (1UL << (new_ctx & 63));
708 new_ctx |= (tlb_context_cache & CTX_VERSION_MASK);
709out:
710 tlb_context_cache = new_ctx;
711 mm->context.sparc64_ctx_val = new_ctx | orig_pgsz_bits;
David S. Millera77754b2006-03-06 19:59:50 -0800712 spin_unlock_irqrestore(&ctx_alloc_lock, flags);
David S. Millera0663a72006-02-23 14:19:28 -0800713
714 if (unlikely(new_version))
715 smp_new_mmu_context_version();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716}
717
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718void sparc_ultra_dump_itlb(void)
719{
720 int slot;
721
722 if (tlb_type == spitfire) {
723 printk ("Contents of itlb: ");
724 for (slot = 0; slot < 14; slot++) printk (" ");
725 printk ("%2x:%016lx,%016lx\n",
726 0,
727 spitfire_get_itlb_tag(0), spitfire_get_itlb_data(0));
728 for (slot = 1; slot < 64; slot+=3) {
729 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx %2x:%016lx,%016lx\n",
730 slot,
731 spitfire_get_itlb_tag(slot), spitfire_get_itlb_data(slot),
732 slot+1,
733 spitfire_get_itlb_tag(slot+1), spitfire_get_itlb_data(slot+1),
734 slot+2,
735 spitfire_get_itlb_tag(slot+2), spitfire_get_itlb_data(slot+2));
736 }
737 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
738 printk ("Contents of itlb0:\n");
739 for (slot = 0; slot < 16; slot+=2) {
740 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
741 slot,
742 cheetah_get_litlb_tag(slot), cheetah_get_litlb_data(slot),
743 slot+1,
744 cheetah_get_litlb_tag(slot+1), cheetah_get_litlb_data(slot+1));
745 }
746 printk ("Contents of itlb2:\n");
747 for (slot = 0; slot < 128; slot+=2) {
748 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
749 slot,
750 cheetah_get_itlb_tag(slot), cheetah_get_itlb_data(slot),
751 slot+1,
752 cheetah_get_itlb_tag(slot+1), cheetah_get_itlb_data(slot+1));
753 }
754 }
755}
756
757void sparc_ultra_dump_dtlb(void)
758{
759 int slot;
760
761 if (tlb_type == spitfire) {
762 printk ("Contents of dtlb: ");
763 for (slot = 0; slot < 14; slot++) printk (" ");
764 printk ("%2x:%016lx,%016lx\n", 0,
765 spitfire_get_dtlb_tag(0), spitfire_get_dtlb_data(0));
766 for (slot = 1; slot < 64; slot+=3) {
767 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx %2x:%016lx,%016lx\n",
768 slot,
769 spitfire_get_dtlb_tag(slot), spitfire_get_dtlb_data(slot),
770 slot+1,
771 spitfire_get_dtlb_tag(slot+1), spitfire_get_dtlb_data(slot+1),
772 slot+2,
773 spitfire_get_dtlb_tag(slot+2), spitfire_get_dtlb_data(slot+2));
774 }
775 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
776 printk ("Contents of dtlb0:\n");
777 for (slot = 0; slot < 16; slot+=2) {
778 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
779 slot,
780 cheetah_get_ldtlb_tag(slot), cheetah_get_ldtlb_data(slot),
781 slot+1,
782 cheetah_get_ldtlb_tag(slot+1), cheetah_get_ldtlb_data(slot+1));
783 }
784 printk ("Contents of dtlb2:\n");
785 for (slot = 0; slot < 512; slot+=2) {
786 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
787 slot,
788 cheetah_get_dtlb_tag(slot, 2), cheetah_get_dtlb_data(slot, 2),
789 slot+1,
790 cheetah_get_dtlb_tag(slot+1, 2), cheetah_get_dtlb_data(slot+1, 2));
791 }
792 if (tlb_type == cheetah_plus) {
793 printk ("Contents of dtlb3:\n");
794 for (slot = 0; slot < 512; slot+=2) {
795 printk ("%2x:%016lx,%016lx %2x:%016lx,%016lx\n",
796 slot,
797 cheetah_get_dtlb_tag(slot, 3), cheetah_get_dtlb_data(slot, 3),
798 slot+1,
799 cheetah_get_dtlb_tag(slot+1, 3), cheetah_get_dtlb_data(slot+1, 3));
800 }
801 }
802 }
803}
804
805extern unsigned long cmdline_memory_size;
806
David S. Millerd1112012006-03-08 02:16:07 -0800807/* Find a free area for the bootmem map, avoiding the kernel image
808 * and the initial ramdisk.
809 */
810static unsigned long __init choose_bootmap_pfn(unsigned long start_pfn,
811 unsigned long end_pfn)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812{
David S. Millerd1112012006-03-08 02:16:07 -0800813 unsigned long avoid_start, avoid_end, bootmap_size;
814 int i;
815
816 bootmap_size = ((end_pfn - start_pfn) + 7) / 8;
817 bootmap_size = ALIGN(bootmap_size, sizeof(long));
818
819 avoid_start = avoid_end = 0;
820#ifdef CONFIG_BLK_DEV_INITRD
821 avoid_start = initrd_start;
822 avoid_end = PAGE_ALIGN(initrd_end);
823#endif
824
825#ifdef CONFIG_DEBUG_BOOTMEM
826 prom_printf("choose_bootmap_pfn: kern[%lx:%lx] avoid[%lx:%lx]\n",
827 kern_base, PAGE_ALIGN(kern_base + kern_size),
828 avoid_start, avoid_end);
829#endif
830 for (i = 0; i < pavail_ents; i++) {
831 unsigned long start, end;
832
833 start = pavail[i].phys_addr;
834 end = start + pavail[i].reg_size;
835
836 while (start < end) {
837 if (start >= kern_base &&
838 start < PAGE_ALIGN(kern_base + kern_size)) {
839 start = PAGE_ALIGN(kern_base + kern_size);
840 continue;
841 }
842 if (start >= avoid_start && start < avoid_end) {
843 start = avoid_end;
844 continue;
845 }
846
847 if ((end - start) < bootmap_size)
848 break;
849
850 if (start < kern_base &&
851 (start + bootmap_size) > kern_base) {
852 start = PAGE_ALIGN(kern_base + kern_size);
853 continue;
854 }
855
856 if (start < avoid_start &&
857 (start + bootmap_size) > avoid_start) {
858 start = avoid_end;
859 continue;
860 }
861
862 /* OK, it doesn't overlap anything, use it. */
863#ifdef CONFIG_DEBUG_BOOTMEM
864 prom_printf("choose_bootmap_pfn: Using %lx [%lx]\n",
865 start >> PAGE_SHIFT, start);
866#endif
867 return start >> PAGE_SHIFT;
868 }
869 }
870
871 prom_printf("Cannot find free area for bootmap, aborting.\n");
872 prom_halt();
873}
874
875static unsigned long __init bootmem_init(unsigned long *pages_avail,
876 unsigned long phys_base)
877{
878 unsigned long bootmap_size, end_pfn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879 unsigned long end_of_phys_memory = 0UL;
880 unsigned long bootmap_pfn, bytes_avail, size;
881 int i;
882
883#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -0700884 prom_printf("bootmem_init: Scan pavail, ");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885#endif
886
887 bytes_avail = 0UL;
David S. Miller13edad72005-09-29 17:58:26 -0700888 for (i = 0; i < pavail_ents; i++) {
889 end_of_phys_memory = pavail[i].phys_addr +
890 pavail[i].reg_size;
891 bytes_avail += pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 if (cmdline_memory_size) {
893 if (bytes_avail > cmdline_memory_size) {
894 unsigned long slack = bytes_avail - cmdline_memory_size;
895
896 bytes_avail -= slack;
897 end_of_phys_memory -= slack;
898
David S. Miller13edad72005-09-29 17:58:26 -0700899 pavail[i].reg_size -= slack;
900 if ((long)pavail[i].reg_size <= 0L) {
901 pavail[i].phys_addr = 0xdeadbeefUL;
902 pavail[i].reg_size = 0UL;
903 pavail_ents = i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904 } else {
David S. Miller13edad72005-09-29 17:58:26 -0700905 pavail[i+1].reg_size = 0Ul;
906 pavail[i+1].phys_addr = 0xdeadbeefUL;
907 pavail_ents = i + 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908 }
909 break;
910 }
911 }
912 }
913
914 *pages_avail = bytes_avail >> PAGE_SHIFT;
915
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 end_pfn = end_of_phys_memory >> PAGE_SHIFT;
917
918#ifdef CONFIG_BLK_DEV_INITRD
919 /* Now have to check initial ramdisk, so that bootmap does not overwrite it */
920 if (sparc_ramdisk_image || sparc_ramdisk_image64) {
921 unsigned long ramdisk_image = sparc_ramdisk_image ?
922 sparc_ramdisk_image : sparc_ramdisk_image64;
923 if (ramdisk_image >= (unsigned long)_end - 2 * PAGE_SIZE)
924 ramdisk_image -= KERNBASE;
925 initrd_start = ramdisk_image + phys_base;
926 initrd_end = initrd_start + sparc_ramdisk_size;
927 if (initrd_end > end_of_phys_memory) {
928 printk(KERN_CRIT "initrd extends beyond end of memory "
929 "(0x%016lx > 0x%016lx)\ndisabling initrd\n",
930 initrd_end, end_of_phys_memory);
931 initrd_start = 0;
David S. Millerd1112012006-03-08 02:16:07 -0800932 initrd_end = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 }
934 }
935#endif
936 /* Initialize the boot-time allocator. */
937 max_pfn = max_low_pfn = end_pfn;
David S. Millerd1112012006-03-08 02:16:07 -0800938 min_low_pfn = (phys_base >> PAGE_SHIFT);
939
940 bootmap_pfn = choose_bootmap_pfn(min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941
942#ifdef CONFIG_DEBUG_BOOTMEM
943 prom_printf("init_bootmem(min[%lx], bootmap[%lx], max[%lx])\n",
944 min_low_pfn, bootmap_pfn, max_low_pfn);
945#endif
David S. Millerd1112012006-03-08 02:16:07 -0800946 bootmap_size = init_bootmem_node(NODE_DATA(0), bootmap_pfn,
David S. Miller17b0e192006-03-08 15:57:03 -0800947 min_low_pfn, end_pfn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700948
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 /* Now register the available physical memory with the
950 * allocator.
951 */
David S. Miller13edad72005-09-29 17:58:26 -0700952 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700953#ifdef CONFIG_DEBUG_BOOTMEM
David S. Miller13edad72005-09-29 17:58:26 -0700954 prom_printf("free_bootmem(pavail:%d): base[%lx] size[%lx]\n",
955 i, pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956#endif
David S. Miller13edad72005-09-29 17:58:26 -0700957 free_bootmem(pavail[i].phys_addr, pavail[i].reg_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 }
959
960#ifdef CONFIG_BLK_DEV_INITRD
961 if (initrd_start) {
962 size = initrd_end - initrd_start;
963
964 /* Resert the initrd image area. */
965#ifdef CONFIG_DEBUG_BOOTMEM
966 prom_printf("reserve_bootmem(initrd): base[%llx] size[%lx]\n",
967 initrd_start, initrd_end);
968#endif
969 reserve_bootmem(initrd_start, size);
970 *pages_avail -= PAGE_ALIGN(size) >> PAGE_SHIFT;
971
972 initrd_start += PAGE_OFFSET;
973 initrd_end += PAGE_OFFSET;
974 }
975#endif
976 /* Reserve the kernel text/data/bss. */
977#ifdef CONFIG_DEBUG_BOOTMEM
978 prom_printf("reserve_bootmem(kernel): base[%lx] size[%lx]\n", kern_base, kern_size);
979#endif
980 reserve_bootmem(kern_base, kern_size);
981 *pages_avail -= PAGE_ALIGN(kern_size) >> PAGE_SHIFT;
982
983 /* Reserve the bootmem map. We do not account for it
984 * in pages_avail because we will release that memory
985 * in free_all_bootmem.
986 */
987 size = bootmap_size;
988#ifdef CONFIG_DEBUG_BOOTMEM
989 prom_printf("reserve_bootmem(bootmap): base[%lx] size[%lx]\n",
990 (bootmap_pfn << PAGE_SHIFT), size);
991#endif
992 reserve_bootmem((bootmap_pfn << PAGE_SHIFT), size);
993 *pages_avail -= PAGE_ALIGN(size) >> PAGE_SHIFT;
994
David S. Millerd1112012006-03-08 02:16:07 -0800995 for (i = 0; i < pavail_ents; i++) {
996 unsigned long start_pfn, end_pfn;
997
998 start_pfn = pavail[i].phys_addr >> PAGE_SHIFT;
999 end_pfn = (start_pfn + (pavail[i].reg_size >> PAGE_SHIFT));
1000#ifdef CONFIG_DEBUG_BOOTMEM
1001 prom_printf("memory_present(0, %lx, %lx)\n",
1002 start_pfn, end_pfn);
1003#endif
1004 memory_present(0, start_pfn, end_pfn);
1005 }
1006
1007 sparse_init();
1008
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009 return end_pfn;
1010}
1011
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001012static struct linux_prom64_registers pall[MAX_BANKS] __initdata;
1013static int pall_ents __initdata;
1014
David S. Miller56425302005-09-25 16:46:57 -07001015#ifdef CONFIG_DEBUG_PAGEALLOC
1016static unsigned long kernel_map_range(unsigned long pstart, unsigned long pend, pgprot_t prot)
1017{
1018 unsigned long vstart = PAGE_OFFSET + pstart;
1019 unsigned long vend = PAGE_OFFSET + pend;
1020 unsigned long alloc_bytes = 0UL;
1021
1022 if ((vstart & ~PAGE_MASK) || (vend & ~PAGE_MASK)) {
David S. Miller13edad72005-09-29 17:58:26 -07001023 prom_printf("kernel_map: Unaligned physmem[%lx:%lx]\n",
David S. Miller56425302005-09-25 16:46:57 -07001024 vstart, vend);
1025 prom_halt();
1026 }
1027
1028 while (vstart < vend) {
1029 unsigned long this_end, paddr = __pa(vstart);
1030 pgd_t *pgd = pgd_offset_k(vstart);
1031 pud_t *pud;
1032 pmd_t *pmd;
1033 pte_t *pte;
1034
1035 pud = pud_offset(pgd, vstart);
1036 if (pud_none(*pud)) {
1037 pmd_t *new;
1038
1039 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1040 alloc_bytes += PAGE_SIZE;
1041 pud_populate(&init_mm, pud, new);
1042 }
1043
1044 pmd = pmd_offset(pud, vstart);
1045 if (!pmd_present(*pmd)) {
1046 pte_t *new;
1047
1048 new = __alloc_bootmem(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE);
1049 alloc_bytes += PAGE_SIZE;
1050 pmd_populate_kernel(&init_mm, pmd, new);
1051 }
1052
1053 pte = pte_offset_kernel(pmd, vstart);
1054 this_end = (vstart + PMD_SIZE) & PMD_MASK;
1055 if (this_end > vend)
1056 this_end = vend;
1057
1058 while (vstart < this_end) {
1059 pte_val(*pte) = (paddr | pgprot_val(prot));
1060
1061 vstart += PAGE_SIZE;
1062 paddr += PAGE_SIZE;
1063 pte++;
1064 }
1065 }
1066
1067 return alloc_bytes;
1068}
1069
David S. Miller56425302005-09-25 16:46:57 -07001070extern unsigned int kvmap_linear_patch[1];
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001071#endif /* CONFIG_DEBUG_PAGEALLOC */
1072
1073static void __init mark_kpte_bitmap(unsigned long start, unsigned long end)
1074{
1075 const unsigned long shift_256MB = 28;
1076 const unsigned long mask_256MB = ((1UL << shift_256MB) - 1UL);
1077 const unsigned long size_256MB = (1UL << shift_256MB);
1078
1079 while (start < end) {
1080 long remains;
1081
David S. Millerf7c00332006-03-05 22:18:50 -08001082 remains = end - start;
1083 if (remains < size_256MB)
1084 break;
1085
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001086 if (start & mask_256MB) {
1087 start = (start + size_256MB) & ~mask_256MB;
1088 continue;
1089 }
1090
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001091 while (remains >= size_256MB) {
1092 unsigned long index = start >> shift_256MB;
1093
1094 __set_bit(index, kpte_linear_bitmap);
1095
1096 start += size_256MB;
1097 remains -= size_256MB;
1098 }
1099 }
1100}
David S. Miller56425302005-09-25 16:46:57 -07001101
1102static void __init kernel_physical_mapping_init(void)
1103{
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001104 unsigned long i;
1105#ifdef CONFIG_DEBUG_PAGEALLOC
1106 unsigned long mem_alloced = 0UL;
1107#endif
David S. Miller56425302005-09-25 16:46:57 -07001108
David S. Miller13edad72005-09-29 17:58:26 -07001109 read_obp_memory("reg", &pall[0], &pall_ents);
1110
1111 for (i = 0; i < pall_ents; i++) {
David S. Miller56425302005-09-25 16:46:57 -07001112 unsigned long phys_start, phys_end;
1113
David S. Miller13edad72005-09-29 17:58:26 -07001114 phys_start = pall[i].phys_addr;
1115 phys_end = phys_start + pall[i].reg_size;
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001116
1117 mark_kpte_bitmap(phys_start, phys_end);
1118
1119#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001120 mem_alloced += kernel_map_range(phys_start, phys_end,
1121 PAGE_KERNEL);
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001122#endif
David S. Miller56425302005-09-25 16:46:57 -07001123 }
1124
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001125#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001126 printk("Allocated %ld bytes for kernel page tables.\n",
1127 mem_alloced);
1128
1129 kvmap_linear_patch[0] = 0x01000000; /* nop */
1130 flushi(&kvmap_linear_patch[0]);
1131
1132 __flush_tlb_all();
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001133#endif
David S. Miller56425302005-09-25 16:46:57 -07001134}
1135
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001136#ifdef CONFIG_DEBUG_PAGEALLOC
David S. Miller56425302005-09-25 16:46:57 -07001137void kernel_map_pages(struct page *page, int numpages, int enable)
1138{
1139 unsigned long phys_start = page_to_pfn(page) << PAGE_SHIFT;
1140 unsigned long phys_end = phys_start + (numpages * PAGE_SIZE);
1141
1142 kernel_map_range(phys_start, phys_end,
1143 (enable ? PAGE_KERNEL : __pgprot(0)));
1144
David S. Miller74bf4312006-01-31 18:29:18 -08001145 flush_tsb_kernel_range(PAGE_OFFSET + phys_start,
1146 PAGE_OFFSET + phys_end);
1147
David S. Miller56425302005-09-25 16:46:57 -07001148 /* we should perform an IPI and flush all tlbs,
1149 * but that can deadlock->flush only current cpu.
1150 */
1151 __flush_tlb_kernel_range(PAGE_OFFSET + phys_start,
1152 PAGE_OFFSET + phys_end);
1153}
1154#endif
1155
David S. Miller10147572005-09-28 21:46:43 -07001156unsigned long __init find_ecache_flush_span(unsigned long size)
1157{
David S. Miller13edad72005-09-29 17:58:26 -07001158 int i;
David S. Miller10147572005-09-28 21:46:43 -07001159
David S. Miller13edad72005-09-29 17:58:26 -07001160 for (i = 0; i < pavail_ents; i++) {
1161 if (pavail[i].reg_size >= size)
1162 return pavail[i].phys_addr;
David S. Miller10147572005-09-28 21:46:43 -07001163 }
1164
1165 return ~0UL;
1166}
1167
David S. Miller517af332006-02-01 15:55:21 -08001168static void __init tsb_phys_patch(void)
1169{
David S. Millerd257d5d2006-02-06 23:44:37 -08001170 struct tsb_ldquad_phys_patch_entry *pquad;
David S. Miller517af332006-02-01 15:55:21 -08001171 struct tsb_phys_patch_entry *p;
1172
David S. Millerd257d5d2006-02-06 23:44:37 -08001173 pquad = &__tsb_ldquad_phys_patch;
1174 while (pquad < &__tsb_ldquad_phys_patch_end) {
1175 unsigned long addr = pquad->addr;
1176
1177 if (tlb_type == hypervisor)
1178 *(unsigned int *) addr = pquad->sun4v_insn;
1179 else
1180 *(unsigned int *) addr = pquad->sun4u_insn;
1181 wmb();
1182 __asm__ __volatile__("flush %0"
1183 : /* no outputs */
1184 : "r" (addr));
1185
1186 pquad++;
1187 }
1188
David S. Miller517af332006-02-01 15:55:21 -08001189 p = &__tsb_phys_patch;
1190 while (p < &__tsb_phys_patch_end) {
1191 unsigned long addr = p->addr;
1192
1193 *(unsigned int *) addr = p->insn;
1194 wmb();
1195 __asm__ __volatile__("flush %0"
1196 : /* no outputs */
1197 : "r" (addr));
1198
1199 p++;
1200 }
1201}
1202
David S. Miller490384e2006-02-11 14:41:18 -08001203/* Don't mark as init, we give this to the Hypervisor. */
1204static struct hv_tsb_descr ktsb_descr[2];
1205extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
1206
1207static void __init sun4v_ktsb_init(void)
1208{
1209 unsigned long ktsb_pa;
1210
David S. Millerd7744a02006-02-21 22:31:11 -08001211 /* First KTSB for PAGE_SIZE mappings. */
David S. Miller490384e2006-02-11 14:41:18 -08001212 ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
1213
1214 switch (PAGE_SIZE) {
1215 case 8 * 1024:
1216 default:
1217 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_8K;
1218 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_8K;
1219 break;
1220
1221 case 64 * 1024:
1222 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_64K;
1223 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_64K;
1224 break;
1225
1226 case 512 * 1024:
1227 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_512K;
1228 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_512K;
1229 break;
1230
1231 case 4 * 1024 * 1024:
1232 ktsb_descr[0].pgsz_idx = HV_PGSZ_IDX_4MB;
1233 ktsb_descr[0].pgsz_mask = HV_PGSZ_MASK_4MB;
1234 break;
1235 };
1236
David S. Miller3f19a842006-02-17 12:03:20 -08001237 ktsb_descr[0].assoc = 1;
David S. Miller490384e2006-02-11 14:41:18 -08001238 ktsb_descr[0].num_ttes = KERNEL_TSB_NENTRIES;
1239 ktsb_descr[0].ctx_idx = 0;
1240 ktsb_descr[0].tsb_base = ktsb_pa;
1241 ktsb_descr[0].resv = 0;
1242
David S. Millerd7744a02006-02-21 22:31:11 -08001243 /* Second KTSB for 4MB/256MB mappings. */
1244 ktsb_pa = (kern_base +
1245 ((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
1246
1247 ktsb_descr[1].pgsz_idx = HV_PGSZ_IDX_4MB;
1248 ktsb_descr[1].pgsz_mask = (HV_PGSZ_MASK_4MB |
1249 HV_PGSZ_MASK_256MB);
1250 ktsb_descr[1].assoc = 1;
1251 ktsb_descr[1].num_ttes = KERNEL_TSB4M_NENTRIES;
1252 ktsb_descr[1].ctx_idx = 0;
1253 ktsb_descr[1].tsb_base = ktsb_pa;
1254 ktsb_descr[1].resv = 0;
David S. Miller490384e2006-02-11 14:41:18 -08001255}
1256
1257void __cpuinit sun4v_ktsb_register(void)
1258{
1259 register unsigned long func asm("%o5");
1260 register unsigned long arg0 asm("%o0");
1261 register unsigned long arg1 asm("%o1");
1262 unsigned long pa;
1263
1264 pa = kern_base + ((unsigned long)&ktsb_descr[0] - KERNBASE);
1265
1266 func = HV_FAST_MMU_TSB_CTX0;
David S. Millerd7744a02006-02-21 22:31:11 -08001267 arg0 = 2;
David S. Miller490384e2006-02-11 14:41:18 -08001268 arg1 = pa;
1269 __asm__ __volatile__("ta %6"
1270 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
1271 : "0" (func), "1" (arg0), "2" (arg1),
1272 "i" (HV_FAST_TRAP));
1273}
1274
Linus Torvalds1da177e2005-04-16 15:20:36 -07001275/* paging_init() sets up the page tables */
1276
1277extern void cheetah_ecache_flush_init(void);
David S. Millerd257d5d2006-02-06 23:44:37 -08001278extern void sun4v_patch_tlb_handlers(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279
1280static unsigned long last_valid_pfn;
David S. Miller56425302005-09-25 16:46:57 -07001281pgd_t swapper_pg_dir[2048];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001282
David S. Millerc4bce902006-02-11 21:57:54 -08001283static void sun4u_pgprot_init(void);
1284static void sun4v_pgprot_init(void);
1285
Linus Torvalds1da177e2005-04-16 15:20:36 -07001286void __init paging_init(void)
1287{
David S. Millerd1112012006-03-08 02:16:07 -08001288 unsigned long end_pfn, pages_avail, shift, phys_base;
David S. Miller0836a0e2005-09-28 21:38:08 -07001289 unsigned long real_end, i;
1290
David S. Miller481295f2006-02-07 21:51:08 -08001291 kern_base = (prom_boot_mapping_phys_low >> 22UL) << 22UL;
1292 kern_size = (unsigned long)&_end - (unsigned long)KERNBASE;
1293
David S. Millerd7744a02006-02-21 22:31:11 -08001294 /* Invalidate both kernel TSBs. */
David S. Miller8b234272006-02-17 18:01:02 -08001295 memset(swapper_tsb, 0x40, sizeof(swapper_tsb));
David S. Millerd7744a02006-02-21 22:31:11 -08001296 memset(swapper_4m_tsb, 0x40, sizeof(swapper_4m_tsb));
David S. Miller8b234272006-02-17 18:01:02 -08001297
David S. Millerc4bce902006-02-11 21:57:54 -08001298 if (tlb_type == hypervisor)
1299 sun4v_pgprot_init();
1300 else
1301 sun4u_pgprot_init();
1302
David S. Millerd257d5d2006-02-06 23:44:37 -08001303 if (tlb_type == cheetah_plus ||
1304 tlb_type == hypervisor)
David S. Miller517af332006-02-01 15:55:21 -08001305 tsb_phys_patch();
1306
David S. Miller490384e2006-02-11 14:41:18 -08001307 if (tlb_type == hypervisor) {
David S. Millerd257d5d2006-02-06 23:44:37 -08001308 sun4v_patch_tlb_handlers();
David S. Miller490384e2006-02-11 14:41:18 -08001309 sun4v_ktsb_init();
1310 }
David S. Millerd257d5d2006-02-06 23:44:37 -08001311
David S. Miller13edad72005-09-29 17:58:26 -07001312 /* Find available physical memory... */
1313 read_obp_memory("available", &pavail[0], &pavail_ents);
David S. Miller0836a0e2005-09-28 21:38:08 -07001314
1315 phys_base = 0xffffffffffffffffUL;
David S. Miller13edad72005-09-29 17:58:26 -07001316 for (i = 0; i < pavail_ents; i++)
1317 phys_base = min(phys_base, pavail[i].phys_addr);
David S. Miller0836a0e2005-09-28 21:38:08 -07001318
Linus Torvalds1da177e2005-04-16 15:20:36 -07001319 set_bit(0, mmu_context_bmap);
1320
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001321 shift = kern_base + PAGE_OFFSET - ((unsigned long)KERNBASE);
1322
Linus Torvalds1da177e2005-04-16 15:20:36 -07001323 real_end = (unsigned long)_end;
1324 if ((real_end > ((unsigned long)KERNBASE + 0x400000)))
1325 bigkernel = 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001326 if ((real_end > ((unsigned long)KERNBASE + 0x800000))) {
1327 prom_printf("paging_init: Kernel > 8MB, too large.\n");
1328 prom_halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001329 }
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001330
1331 /* Set kernel pgd to upper alias so physical page computations
Linus Torvalds1da177e2005-04-16 15:20:36 -07001332 * work.
1333 */
1334 init_mm.pgd += ((shift) / (sizeof(pgd_t)));
1335
David S. Miller56425302005-09-25 16:46:57 -07001336 memset(swapper_low_pmd_dir, 0, sizeof(swapper_low_pmd_dir));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001337
1338 /* Now can init the kernel/bad page tables. */
1339 pud_set(pud_offset(&swapper_pg_dir[0], 0),
David S. Miller56425302005-09-25 16:46:57 -07001340 swapper_low_pmd_dir + (shift / sizeof(pgd_t)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001341
David S. Millerc9c10832005-10-12 12:22:46 -07001342 inherit_prom_mappings();
David S. Miller5085b4a2005-09-22 00:45:41 -07001343
David S. Millera8b900d2006-01-31 18:33:37 -08001344 /* Ok, we can use our TLB miss and window trap handlers safely. */
1345 setup_tba();
Linus Torvalds1da177e2005-04-16 15:20:36 -07001346
David S. Millerc9c10832005-10-12 12:22:46 -07001347 __flush_tlb_all();
David S. Miller9ad98c52005-10-05 15:12:00 -07001348
David S. Miller490384e2006-02-11 14:41:18 -08001349 if (tlb_type == hypervisor)
1350 sun4v_ktsb_register();
1351
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001352 /* Setup bootmem... */
1353 pages_avail = 0;
David S. Millerd1112012006-03-08 02:16:07 -08001354 last_valid_pfn = end_pfn = bootmem_init(&pages_avail, phys_base);
1355
David S. Miller17b0e192006-03-08 15:57:03 -08001356 max_mapnr = last_valid_pfn;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001357
David S. Miller56425302005-09-25 16:46:57 -07001358 kernel_physical_mapping_init();
David S. Miller56425302005-09-25 16:46:57 -07001359
David S. Miller372b07b2006-06-21 15:35:28 -07001360 prom_build_devicetree();
1361
Linus Torvalds1da177e2005-04-16 15:20:36 -07001362 {
1363 unsigned long zones_size[MAX_NR_ZONES];
1364 unsigned long zholes_size[MAX_NR_ZONES];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001365 int znum;
1366
1367 for (znum = 0; znum < MAX_NR_ZONES; znum++)
1368 zones_size[znum] = zholes_size[znum] = 0;
1369
David S. Miller17b0e192006-03-08 15:57:03 -08001370 zones_size[ZONE_DMA] = end_pfn;
1371 zholes_size[ZONE_DMA] = end_pfn - pages_avail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001372
1373 free_area_init_node(0, &contig_page_data, zones_size,
David S. Miller17b0e192006-03-08 15:57:03 -08001374 __pa(PAGE_OFFSET) >> PAGE_SHIFT,
1375 zholes_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001376 }
1377
1378 device_scan();
1379}
1380
Linus Torvalds1da177e2005-04-16 15:20:36 -07001381static void __init taint_real_pages(void)
1382{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383 int i;
1384
David S. Miller13edad72005-09-29 17:58:26 -07001385 read_obp_memory("available", &pavail_rescan[0], &pavail_rescan_ents);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001386
David S. Miller13edad72005-09-29 17:58:26 -07001387 /* Find changes discovered in the physmem available rescan and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001388 * reserve the lost portions in the bootmem maps.
1389 */
David S. Miller13edad72005-09-29 17:58:26 -07001390 for (i = 0; i < pavail_ents; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391 unsigned long old_start, old_end;
1392
David S. Miller13edad72005-09-29 17:58:26 -07001393 old_start = pavail[i].phys_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001394 old_end = old_start +
David S. Miller13edad72005-09-29 17:58:26 -07001395 pavail[i].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001396 while (old_start < old_end) {
1397 int n;
1398
David S. Miller13edad72005-09-29 17:58:26 -07001399 for (n = 0; pavail_rescan_ents; n++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001400 unsigned long new_start, new_end;
1401
David S. Miller13edad72005-09-29 17:58:26 -07001402 new_start = pavail_rescan[n].phys_addr;
1403 new_end = new_start +
1404 pavail_rescan[n].reg_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405
1406 if (new_start <= old_start &&
1407 new_end >= (old_start + PAGE_SIZE)) {
David S. Miller13edad72005-09-29 17:58:26 -07001408 set_bit(old_start >> 22,
1409 sparc64_valid_addr_bitmap);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001410 goto do_next_page;
1411 }
1412 }
1413 reserve_bootmem(old_start, PAGE_SIZE);
1414
1415 do_next_page:
1416 old_start += PAGE_SIZE;
1417 }
1418 }
1419}
1420
1421void __init mem_init(void)
1422{
1423 unsigned long codepages, datapages, initpages;
1424 unsigned long addr, last;
1425 int i;
1426
1427 i = last_valid_pfn >> ((22 - PAGE_SHIFT) + 6);
1428 i += 1;
David S. Miller2bdb3cb2005-09-22 01:08:57 -07001429 sparc64_valid_addr_bitmap = (unsigned long *) alloc_bootmem(i << 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001430 if (sparc64_valid_addr_bitmap == NULL) {
1431 prom_printf("mem_init: Cannot alloc valid_addr_bitmap.\n");
1432 prom_halt();
1433 }
1434 memset(sparc64_valid_addr_bitmap, 0, i << 3);
1435
1436 addr = PAGE_OFFSET + kern_base;
1437 last = PAGE_ALIGN(kern_size) + addr;
1438 while (addr < last) {
1439 set_bit(__pa(addr) >> 22, sparc64_valid_addr_bitmap);
1440 addr += PAGE_SIZE;
1441 }
1442
1443 taint_real_pages();
1444
Linus Torvalds1da177e2005-04-16 15:20:36 -07001445 high_memory = __va(last_valid_pfn << PAGE_SHIFT);
1446
1447#ifdef CONFIG_DEBUG_BOOTMEM
1448 prom_printf("mem_init: Calling free_all_bootmem().\n");
1449#endif
1450 totalram_pages = num_physpages = free_all_bootmem() - 1;
1451
1452 /*
1453 * Set up the zero page, mark it reserved, so that page count
1454 * is not manipulated when freeing the page from user ptes.
1455 */
1456 mem_map_zero = alloc_pages(GFP_KERNEL|__GFP_ZERO, 0);
1457 if (mem_map_zero == NULL) {
1458 prom_printf("paging_init: Cannot alloc zero page.\n");
1459 prom_halt();
1460 }
1461 SetPageReserved(mem_map_zero);
1462
1463 codepages = (((unsigned long) _etext) - ((unsigned long) _start));
1464 codepages = PAGE_ALIGN(codepages) >> PAGE_SHIFT;
1465 datapages = (((unsigned long) _edata) - ((unsigned long) _etext));
1466 datapages = PAGE_ALIGN(datapages) >> PAGE_SHIFT;
1467 initpages = (((unsigned long) __init_end) - ((unsigned long) __init_begin));
1468 initpages = PAGE_ALIGN(initpages) >> PAGE_SHIFT;
1469
1470 printk("Memory: %uk available (%ldk kernel code, %ldk data, %ldk init) [%016lx,%016lx]\n",
1471 nr_free_pages() << (PAGE_SHIFT-10),
1472 codepages << (PAGE_SHIFT-10),
1473 datapages << (PAGE_SHIFT-10),
1474 initpages << (PAGE_SHIFT-10),
1475 PAGE_OFFSET, (last_valid_pfn << PAGE_SHIFT));
1476
1477 if (tlb_type == cheetah || tlb_type == cheetah_plus)
1478 cheetah_ecache_flush_init();
1479}
1480
David S. Miller898cf0e2005-09-23 11:59:44 -07001481void free_initmem(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001482{
1483 unsigned long addr, initend;
1484
1485 /*
1486 * The init section is aligned to 8k in vmlinux.lds. Page align for >8k pagesizes.
1487 */
1488 addr = PAGE_ALIGN((unsigned long)(__init_begin));
1489 initend = (unsigned long)(__init_end) & PAGE_MASK;
1490 for (; addr < initend; addr += PAGE_SIZE) {
1491 unsigned long page;
1492 struct page *p;
1493
1494 page = (addr +
1495 ((unsigned long) __va(kern_base)) -
1496 ((unsigned long) KERNBASE));
1497 memset((void *)addr, 0xcc, PAGE_SIZE);
1498 p = virt_to_page(page);
1499
1500 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001501 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001502 __free_page(p);
1503 num_physpages++;
1504 totalram_pages++;
1505 }
1506}
1507
1508#ifdef CONFIG_BLK_DEV_INITRD
1509void free_initrd_mem(unsigned long start, unsigned long end)
1510{
1511 if (start < end)
1512 printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
1513 for (; start < end; start += PAGE_SIZE) {
1514 struct page *p = virt_to_page(start);
1515
1516 ClearPageReserved(p);
Nick Piggin7835e982006-03-22 00:08:40 -08001517 init_page_count(p);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001518 __free_page(p);
1519 num_physpages++;
1520 totalram_pages++;
1521 }
1522}
1523#endif
David S. Millerc4bce902006-02-11 21:57:54 -08001524
David S. Millerc4bce902006-02-11 21:57:54 -08001525#define _PAGE_CACHE_4U (_PAGE_CP_4U | _PAGE_CV_4U)
1526#define _PAGE_CACHE_4V (_PAGE_CP_4V | _PAGE_CV_4V)
1527#define __DIRTY_BITS_4U (_PAGE_MODIFIED_4U | _PAGE_WRITE_4U | _PAGE_W_4U)
1528#define __DIRTY_BITS_4V (_PAGE_MODIFIED_4V | _PAGE_WRITE_4V | _PAGE_W_4V)
1529#define __ACCESS_BITS_4U (_PAGE_ACCESSED_4U | _PAGE_READ_4U | _PAGE_R)
1530#define __ACCESS_BITS_4V (_PAGE_ACCESSED_4V | _PAGE_READ_4V | _PAGE_R)
1531
1532pgprot_t PAGE_KERNEL __read_mostly;
1533EXPORT_SYMBOL(PAGE_KERNEL);
1534
1535pgprot_t PAGE_KERNEL_LOCKED __read_mostly;
1536pgprot_t PAGE_COPY __read_mostly;
David S. Miller0f159522006-02-18 12:43:16 -08001537
1538pgprot_t PAGE_SHARED __read_mostly;
1539EXPORT_SYMBOL(PAGE_SHARED);
1540
David S. Millerc4bce902006-02-11 21:57:54 -08001541pgprot_t PAGE_EXEC __read_mostly;
1542unsigned long pg_iobits __read_mostly;
1543
1544unsigned long _PAGE_IE __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001545
David S. Millerc4bce902006-02-11 21:57:54 -08001546unsigned long _PAGE_E __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001547EXPORT_SYMBOL(_PAGE_E);
1548
David S. Millerc4bce902006-02-11 21:57:54 -08001549unsigned long _PAGE_CACHE __read_mostly;
David S. Millerb2bef442006-02-23 01:55:55 -08001550EXPORT_SYMBOL(_PAGE_CACHE);
David S. Millerc4bce902006-02-11 21:57:54 -08001551
1552static void prot_init_common(unsigned long page_none,
1553 unsigned long page_shared,
1554 unsigned long page_copy,
1555 unsigned long page_readonly,
1556 unsigned long page_exec_bit)
1557{
1558 PAGE_COPY = __pgprot(page_copy);
David S. Miller0f159522006-02-18 12:43:16 -08001559 PAGE_SHARED = __pgprot(page_shared);
David S. Millerc4bce902006-02-11 21:57:54 -08001560
1561 protection_map[0x0] = __pgprot(page_none);
1562 protection_map[0x1] = __pgprot(page_readonly & ~page_exec_bit);
1563 protection_map[0x2] = __pgprot(page_copy & ~page_exec_bit);
1564 protection_map[0x3] = __pgprot(page_copy & ~page_exec_bit);
1565 protection_map[0x4] = __pgprot(page_readonly);
1566 protection_map[0x5] = __pgprot(page_readonly);
1567 protection_map[0x6] = __pgprot(page_copy);
1568 protection_map[0x7] = __pgprot(page_copy);
1569 protection_map[0x8] = __pgprot(page_none);
1570 protection_map[0x9] = __pgprot(page_readonly & ~page_exec_bit);
1571 protection_map[0xa] = __pgprot(page_shared & ~page_exec_bit);
1572 protection_map[0xb] = __pgprot(page_shared & ~page_exec_bit);
1573 protection_map[0xc] = __pgprot(page_readonly);
1574 protection_map[0xd] = __pgprot(page_readonly);
1575 protection_map[0xe] = __pgprot(page_shared);
1576 protection_map[0xf] = __pgprot(page_shared);
1577}
1578
1579static void __init sun4u_pgprot_init(void)
1580{
1581 unsigned long page_none, page_shared, page_copy, page_readonly;
1582 unsigned long page_exec_bit;
1583
1584 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1585 _PAGE_CACHE_4U | _PAGE_P_4U |
1586 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1587 _PAGE_EXEC_4U);
1588 PAGE_KERNEL_LOCKED = __pgprot (_PAGE_PRESENT_4U | _PAGE_VALID |
1589 _PAGE_CACHE_4U | _PAGE_P_4U |
1590 __ACCESS_BITS_4U | __DIRTY_BITS_4U |
1591 _PAGE_EXEC_4U | _PAGE_L_4U);
1592 PAGE_EXEC = __pgprot(_PAGE_EXEC_4U);
1593
1594 _PAGE_IE = _PAGE_IE_4U;
1595 _PAGE_E = _PAGE_E_4U;
1596 _PAGE_CACHE = _PAGE_CACHE_4U;
1597
1598 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4U | __DIRTY_BITS_4U |
1599 __ACCESS_BITS_4U | _PAGE_E_4U);
1600
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001601 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4U) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001602 0xfffff80000000000;
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001603 kern_linear_pte_xor[0] |= (_PAGE_CP_4U | _PAGE_CV_4U |
1604 _PAGE_P_4U | _PAGE_W_4U);
1605
1606 /* XXX Should use 256MB on Panther. XXX */
1607 kern_linear_pte_xor[1] = kern_linear_pte_xor[0];
David S. Millerc4bce902006-02-11 21:57:54 -08001608
1609 _PAGE_SZBITS = _PAGE_SZBITS_4U;
1610 _PAGE_ALL_SZ_BITS = (_PAGE_SZ4MB_4U | _PAGE_SZ512K_4U |
1611 _PAGE_SZ64K_4U | _PAGE_SZ8K_4U |
1612 _PAGE_SZ32MB_4U | _PAGE_SZ256MB_4U);
1613
1614
1615 page_none = _PAGE_PRESENT_4U | _PAGE_ACCESSED_4U | _PAGE_CACHE_4U;
1616 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1617 __ACCESS_BITS_4U | _PAGE_WRITE_4U | _PAGE_EXEC_4U);
1618 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1619 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1620 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4U | _PAGE_CACHE_4U |
1621 __ACCESS_BITS_4U | _PAGE_EXEC_4U);
1622
1623 page_exec_bit = _PAGE_EXEC_4U;
1624
1625 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1626 page_exec_bit);
1627}
1628
1629static void __init sun4v_pgprot_init(void)
1630{
1631 unsigned long page_none, page_shared, page_copy, page_readonly;
1632 unsigned long page_exec_bit;
1633
1634 PAGE_KERNEL = __pgprot (_PAGE_PRESENT_4V | _PAGE_VALID |
1635 _PAGE_CACHE_4V | _PAGE_P_4V |
1636 __ACCESS_BITS_4V | __DIRTY_BITS_4V |
1637 _PAGE_EXEC_4V);
1638 PAGE_KERNEL_LOCKED = PAGE_KERNEL;
1639 PAGE_EXEC = __pgprot(_PAGE_EXEC_4V);
1640
1641 _PAGE_IE = _PAGE_IE_4V;
1642 _PAGE_E = _PAGE_E_4V;
1643 _PAGE_CACHE = _PAGE_CACHE_4V;
1644
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001645 kern_linear_pte_xor[0] = (_PAGE_VALID | _PAGE_SZ4MB_4V) ^
David S. Millerc4bce902006-02-11 21:57:54 -08001646 0xfffff80000000000;
David S. Miller9cc3a1a2006-02-21 20:51:13 -08001647 kern_linear_pte_xor[0] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1648 _PAGE_P_4V | _PAGE_W_4V);
1649
1650 kern_linear_pte_xor[1] = (_PAGE_VALID | _PAGE_SZ256MB_4V) ^
1651 0xfffff80000000000;
1652 kern_linear_pte_xor[1] |= (_PAGE_CP_4V | _PAGE_CV_4V |
1653 _PAGE_P_4V | _PAGE_W_4V);
David S. Millerc4bce902006-02-11 21:57:54 -08001654
1655 pg_iobits = (_PAGE_VALID | _PAGE_PRESENT_4V | __DIRTY_BITS_4V |
1656 __ACCESS_BITS_4V | _PAGE_E_4V);
1657
1658 _PAGE_SZBITS = _PAGE_SZBITS_4V;
1659 _PAGE_ALL_SZ_BITS = (_PAGE_SZ16GB_4V | _PAGE_SZ2GB_4V |
1660 _PAGE_SZ256MB_4V | _PAGE_SZ32MB_4V |
1661 _PAGE_SZ4MB_4V | _PAGE_SZ512K_4V |
1662 _PAGE_SZ64K_4V | _PAGE_SZ8K_4V);
1663
1664 page_none = _PAGE_PRESENT_4V | _PAGE_ACCESSED_4V | _PAGE_CACHE_4V;
1665 page_shared = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1666 __ACCESS_BITS_4V | _PAGE_WRITE_4V | _PAGE_EXEC_4V);
1667 page_copy = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1668 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1669 page_readonly = (_PAGE_VALID | _PAGE_PRESENT_4V | _PAGE_CACHE_4V |
1670 __ACCESS_BITS_4V | _PAGE_EXEC_4V);
1671
1672 page_exec_bit = _PAGE_EXEC_4V;
1673
1674 prot_init_common(page_none, page_shared, page_copy, page_readonly,
1675 page_exec_bit);
1676}
1677
1678unsigned long pte_sz_bits(unsigned long sz)
1679{
1680 if (tlb_type == hypervisor) {
1681 switch (sz) {
1682 case 8 * 1024:
1683 default:
1684 return _PAGE_SZ8K_4V;
1685 case 64 * 1024:
1686 return _PAGE_SZ64K_4V;
1687 case 512 * 1024:
1688 return _PAGE_SZ512K_4V;
1689 case 4 * 1024 * 1024:
1690 return _PAGE_SZ4MB_4V;
1691 };
1692 } else {
1693 switch (sz) {
1694 case 8 * 1024:
1695 default:
1696 return _PAGE_SZ8K_4U;
1697 case 64 * 1024:
1698 return _PAGE_SZ64K_4U;
1699 case 512 * 1024:
1700 return _PAGE_SZ512K_4U;
1701 case 4 * 1024 * 1024:
1702 return _PAGE_SZ4MB_4U;
1703 };
1704 }
1705}
1706
1707pte_t mk_pte_io(unsigned long page, pgprot_t prot, int space, unsigned long page_size)
1708{
1709 pte_t pte;
David S. Millercf627152006-02-12 21:10:07 -08001710
1711 pte_val(pte) = page | pgprot_val(pgprot_noncached(prot));
David S. Millerc4bce902006-02-11 21:57:54 -08001712 pte_val(pte) |= (((unsigned long)space) << 32);
1713 pte_val(pte) |= pte_sz_bits(page_size);
David S. Millercf627152006-02-12 21:10:07 -08001714
David S. Millerc4bce902006-02-11 21:57:54 -08001715 return pte;
1716}
1717
David S. Millerc4bce902006-02-11 21:57:54 -08001718static unsigned long kern_large_tte(unsigned long paddr)
1719{
1720 unsigned long val;
1721
1722 val = (_PAGE_VALID | _PAGE_SZ4MB_4U |
1723 _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_P_4U |
1724 _PAGE_EXEC_4U | _PAGE_L_4U | _PAGE_W_4U);
1725 if (tlb_type == hypervisor)
1726 val = (_PAGE_VALID | _PAGE_SZ4MB_4V |
1727 _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_P_4V |
1728 _PAGE_EXEC_4V | _PAGE_W_4V);
1729
1730 return val | paddr;
1731}
1732
1733/*
1734 * Translate PROM's mapping we capture at boot time into physical address.
1735 * The second parameter is only set from prom_callback() invocations.
1736 */
1737unsigned long prom_virt_to_phys(unsigned long promva, int *error)
1738{
1739 unsigned long mask;
1740 int i;
1741
1742 mask = _PAGE_PADDR_4U;
1743 if (tlb_type == hypervisor)
1744 mask = _PAGE_PADDR_4V;
1745
1746 for (i = 0; i < prom_trans_ents; i++) {
1747 struct linux_prom_translation *p = &prom_trans[i];
1748
1749 if (promva >= p->virt &&
1750 promva < (p->virt + p->size)) {
1751 unsigned long base = p->data & mask;
1752
1753 if (error)
1754 *error = 0;
1755 return base + (promva & (8192 - 1));
1756 }
1757 }
1758 if (error)
1759 *error = 1;
1760 return 0UL;
1761}
1762
1763/* XXX We should kill off this ugly thing at so me point. XXX */
1764unsigned long sun4u_get_pte(unsigned long addr)
1765{
1766 pgd_t *pgdp;
1767 pud_t *pudp;
1768 pmd_t *pmdp;
1769 pte_t *ptep;
1770 unsigned long mask = _PAGE_PADDR_4U;
1771
1772 if (tlb_type == hypervisor)
1773 mask = _PAGE_PADDR_4V;
1774
1775 if (addr >= PAGE_OFFSET)
1776 return addr & mask;
1777
1778 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
1779 return prom_virt_to_phys(addr, NULL);
1780
1781 pgdp = pgd_offset_k(addr);
1782 pudp = pud_offset(pgdp, addr);
1783 pmdp = pmd_offset(pudp, addr);
1784 ptep = pte_offset_kernel(pmdp, addr);
1785
1786 return pte_val(*ptep) & mask;
1787}
1788
1789/* If not locked, zap it. */
1790void __flush_tlb_all(void)
1791{
1792 unsigned long pstate;
1793 int i;
1794
1795 __asm__ __volatile__("flushw\n\t"
1796 "rdpr %%pstate, %0\n\t"
1797 "wrpr %0, %1, %%pstate"
1798 : "=r" (pstate)
1799 : "i" (PSTATE_IE));
1800 if (tlb_type == spitfire) {
1801 for (i = 0; i < 64; i++) {
1802 /* Spitfire Errata #32 workaround */
1803 /* NOTE: Always runs on spitfire, so no
1804 * cheetah+ page size encodings.
1805 */
1806 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1807 "flush %%g6"
1808 : /* No outputs */
1809 : "r" (0),
1810 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1811
1812 if (!(spitfire_get_dtlb_data(i) & _PAGE_L_4U)) {
1813 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1814 "membar #Sync"
1815 : /* no outputs */
1816 : "r" (TLB_TAG_ACCESS), "i" (ASI_DMMU));
1817 spitfire_put_dtlb_data(i, 0x0UL);
1818 }
1819
1820 /* Spitfire Errata #32 workaround */
1821 /* NOTE: Always runs on spitfire, so no
1822 * cheetah+ page size encodings.
1823 */
1824 __asm__ __volatile__("stxa %0, [%1] %2\n\t"
1825 "flush %%g6"
1826 : /* No outputs */
1827 : "r" (0),
1828 "r" (PRIMARY_CONTEXT), "i" (ASI_DMMU));
1829
1830 if (!(spitfire_get_itlb_data(i) & _PAGE_L_4U)) {
1831 __asm__ __volatile__("stxa %%g0, [%0] %1\n\t"
1832 "membar #Sync"
1833 : /* no outputs */
1834 : "r" (TLB_TAG_ACCESS), "i" (ASI_IMMU));
1835 spitfire_put_itlb_data(i, 0x0UL);
1836 }
1837 }
1838 } else if (tlb_type == cheetah || tlb_type == cheetah_plus) {
1839 cheetah_flush_dtlb_all();
1840 cheetah_flush_itlb_all();
1841 }
1842 __asm__ __volatile__("wrpr %0, 0, %%pstate"
1843 : : "r" (pstate));
1844}
David S. Miller88d70792006-03-18 19:16:23 -08001845
1846#ifdef CONFIG_MEMORY_HOTPLUG
1847
1848void online_page(struct page *page)
1849{
1850 ClearPageReserved(page);
Nick Pigginfcab1e52006-03-23 07:48:16 +01001851 init_page_count(page);
1852 __free_page(page);
David S. Miller88d70792006-03-18 19:16:23 -08001853 totalram_pages++;
1854 num_physpages++;
1855}
1856
1857int remove_memory(u64 start, u64 size)
1858{
1859 return -EINVAL;
1860}
1861
1862#endif /* CONFIG_MEMORY_HOTPLUG */