Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/video/sa1100fb.c |
| 3 | * |
| 4 | * Copyright (C) 1999 Eric A. Thomas |
| 5 | * Based on acornfb.c Copyright (C) Russell King. |
| 6 | * |
| 7 | * This file is subject to the terms and conditions of the GNU General Public |
| 8 | * License. See the file COPYING in the main directory of this archive for |
| 9 | * more details. |
| 10 | * |
| 11 | * StrongARM 1100 LCD Controller Frame Buffer Driver |
| 12 | * |
| 13 | * Please direct your questions and comments on this driver to the following |
| 14 | * email address: |
| 15 | * |
| 16 | * linux-arm-kernel@lists.arm.linux.org.uk |
| 17 | * |
| 18 | * Clean patches should be sent to the ARM Linux Patch System. Please see the |
| 19 | * following web page for more information: |
| 20 | * |
| 21 | * http://www.arm.linux.org.uk/developer/patches/info.shtml |
| 22 | * |
| 23 | * Thank you. |
| 24 | * |
| 25 | * Known problems: |
| 26 | * - With the Neponset plugged into an Assabet, LCD powerdown |
| 27 | * doesn't work (LCD stays powered up). Therefore we shouldn't |
| 28 | * blank the screen. |
| 29 | * - We don't limit the CPU clock rate nor the mode selection |
| 30 | * according to the available SDRAM bandwidth. |
| 31 | * |
| 32 | * Other notes: |
| 33 | * - Linear grayscale palettes and the kernel. |
| 34 | * Such code does not belong in the kernel. The kernel frame buffer |
| 35 | * drivers do not expect a linear colourmap, but a colourmap based on |
| 36 | * the VT100 standard mapping. |
| 37 | * |
| 38 | * If your _userspace_ requires a linear colourmap, then the setup of |
| 39 | * such a colourmap belongs _in userspace_, not in the kernel. Code |
| 40 | * to set the colourmap correctly from user space has been sent to |
| 41 | * David Neuer. It's around 8 lines of C code, plus another 4 to |
| 42 | * detect if we are using grayscale. |
| 43 | * |
| 44 | * - The following must never be specified in a panel definition: |
| 45 | * LCCR0_LtlEnd, LCCR3_PixClkDiv, LCCR3_VrtSnchL, LCCR3_HorSnchL |
| 46 | * |
| 47 | * - The following should be specified: |
| 48 | * either LCCR0_Color or LCCR0_Mono |
| 49 | * either LCCR0_Sngl or LCCR0_Dual |
| 50 | * either LCCR0_Act or LCCR0_Pas |
| 51 | * either LCCR3_OutEnH or LCCD3_OutEnL |
| 52 | * either LCCR3_PixRsEdg or LCCR3_PixFlEdg |
| 53 | * either LCCR3_ACBsDiv or LCCR3_ACBsCntOff |
| 54 | * |
| 55 | * Code Status: |
| 56 | * 1999/04/01: |
| 57 | * - Driver appears to be working for Brutus 320x200x8bpp mode. Other |
| 58 | * resolutions are working, but only the 8bpp mode is supported. |
| 59 | * Changes need to be made to the palette encode and decode routines |
| 60 | * to support 4 and 16 bpp modes. |
| 61 | * Driver is not designed to be a module. The FrameBuffer is statically |
| 62 | * allocated since dynamic allocation of a 300k buffer cannot be |
| 63 | * guaranteed. |
| 64 | * |
| 65 | * 1999/06/17: |
| 66 | * - FrameBuffer memory is now allocated at run-time when the |
| 67 | * driver is initialized. |
| 68 | * |
| 69 | * 2000/04/10: Nicolas Pitre <nico@cam.org> |
| 70 | * - Big cleanup for dynamic selection of machine type at run time. |
| 71 | * |
| 72 | * 2000/07/19: Jamey Hicks <jamey@crl.dec.com> |
| 73 | * - Support for Bitsy aka Compaq iPAQ H3600 added. |
| 74 | * |
| 75 | * 2000/08/07: Tak-Shing Chan <tchan.rd@idthk.com> |
| 76 | * Jeff Sutherland <jsutherland@accelent.com> |
| 77 | * - Resolved an issue caused by a change made to the Assabet's PLD |
| 78 | * earlier this year which broke the framebuffer driver for newer |
| 79 | * Phase 4 Assabets. Some other parameters were changed to optimize |
| 80 | * for the Sharp display. |
| 81 | * |
| 82 | * 2000/08/09: Kunihiko IMAI <imai@vasara.co.jp> |
| 83 | * - XP860 support added |
| 84 | * |
| 85 | * 2000/08/19: Mark Huang <mhuang@livetoy.com> |
| 86 | * - Allows standard options to be passed on the kernel command line |
| 87 | * for most common passive displays. |
| 88 | * |
| 89 | * 2000/08/29: |
| 90 | * - s/save_flags_cli/local_irq_save/ |
| 91 | * - remove unneeded extra save_flags_cli in sa1100fb_enable_lcd_controller |
| 92 | * |
| 93 | * 2000/10/10: Erik Mouw <J.A.K.Mouw@its.tudelft.nl> |
| 94 | * - Updated LART stuff. Fixed some minor bugs. |
| 95 | * |
| 96 | * 2000/10/30: Murphy Chen <murphy@mail.dialogue.com.tw> |
| 97 | * - Pangolin support added |
| 98 | * |
| 99 | * 2000/10/31: Roman Jordan <jor@hoeft-wessel.de> |
| 100 | * - Huw Webpanel support added |
| 101 | * |
| 102 | * 2000/11/23: Eric Peng <ericpeng@coventive.com> |
| 103 | * - Freebird add |
| 104 | * |
| 105 | * 2001/02/07: Jamey Hicks <jamey.hicks@compaq.com> |
| 106 | * Cliff Brake <cbrake@accelent.com> |
| 107 | * - Added PM callback |
| 108 | * |
| 109 | * 2001/05/26: <rmk@arm.linux.org.uk> |
| 110 | * - Fix 16bpp so that (a) we use the right colours rather than some |
| 111 | * totally random colour depending on what was in page 0, and (b) |
| 112 | * we don't de-reference a NULL pointer. |
| 113 | * - remove duplicated implementation of consistent_alloc() |
| 114 | * - convert dma address types to dma_addr_t |
| 115 | * - remove unused 'montype' stuff |
| 116 | * - remove redundant zero inits of init_var after the initial |
| 117 | * memzero. |
| 118 | * - remove allow_modeset (acornfb idea does not belong here) |
| 119 | * |
| 120 | * 2001/05/28: <rmk@arm.linux.org.uk> |
| 121 | * - massive cleanup - move machine dependent data into structures |
| 122 | * - I've left various #warnings in - if you see one, and know |
| 123 | * the hardware concerned, please get in contact with me. |
| 124 | * |
| 125 | * 2001/05/31: <rmk@arm.linux.org.uk> |
| 126 | * - Fix LCCR1 HSW value, fix all machine type specifications to |
| 127 | * keep values in line. (Please check your machine type specs) |
| 128 | * |
| 129 | * 2001/06/10: <rmk@arm.linux.org.uk> |
| 130 | * - Fiddle with the LCD controller from task context only; mainly |
| 131 | * so that we can run with interrupts on, and sleep. |
| 132 | * - Convert #warnings into #errors. No pain, no gain. ;) |
| 133 | * |
| 134 | * 2001/06/14: <rmk@arm.linux.org.uk> |
| 135 | * - Make the palette BPS value for 12bpp come out correctly. |
| 136 | * - Take notice of "greyscale" on any colour depth. |
| 137 | * - Make truecolor visuals use the RGB channel encoding information. |
| 138 | * |
| 139 | * 2001/07/02: <rmk@arm.linux.org.uk> |
| 140 | * - Fix colourmap problems. |
| 141 | * |
| 142 | * 2001/07/13: <abraham@2d3d.co.za> |
| 143 | * - Added support for the ICP LCD-Kit01 on LART. This LCD is |
| 144 | * manufactured by Prime View, model no V16C6448AB |
| 145 | * |
| 146 | * 2001/07/23: <rmk@arm.linux.org.uk> |
| 147 | * - Hand merge version from handhelds.org CVS tree. See patch |
| 148 | * notes for 595/1 for more information. |
| 149 | * - Drop 12bpp (it's 16bpp with different colour register mappings). |
| 150 | * - This hardware can not do direct colour. Therefore we don't |
| 151 | * support it. |
| 152 | * |
| 153 | * 2001/07/27: <rmk@arm.linux.org.uk> |
| 154 | * - Halve YRES on dual scan LCDs. |
| 155 | * |
| 156 | * 2001/08/22: <rmk@arm.linux.org.uk> |
| 157 | * - Add b/w iPAQ pixclock value. |
| 158 | * |
| 159 | * 2001/10/12: <rmk@arm.linux.org.uk> |
| 160 | * - Add patch 681/1 and clean up stork definitions. |
| 161 | */ |
| 162 | |
| 163 | #include <linux/config.h> |
| 164 | #include <linux/module.h> |
| 165 | #include <linux/kernel.h> |
| 166 | #include <linux/sched.h> |
| 167 | #include <linux/errno.h> |
| 168 | #include <linux/string.h> |
| 169 | #include <linux/interrupt.h> |
| 170 | #include <linux/slab.h> |
| 171 | #include <linux/fb.h> |
| 172 | #include <linux/delay.h> |
| 173 | #include <linux/init.h> |
| 174 | #include <linux/ioport.h> |
| 175 | #include <linux/cpufreq.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 176 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | #include <linux/dma-mapping.h> |
| 178 | |
| 179 | #include <asm/hardware.h> |
| 180 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | #include <asm/mach-types.h> |
| 182 | #include <asm/uaccess.h> |
| 183 | #include <asm/arch/assabet.h> |
| 184 | #include <asm/arch/shannon.h> |
| 185 | |
| 186 | /* |
| 187 | * debugging? |
| 188 | */ |
| 189 | #define DEBUG 0 |
| 190 | /* |
| 191 | * Complain if VAR is out of range. |
| 192 | */ |
| 193 | #define DEBUG_VAR 1 |
| 194 | |
| 195 | #undef ASSABET_PAL_VIDEO |
| 196 | |
| 197 | #include "sa1100fb.h" |
| 198 | |
| 199 | extern void (*sa1100fb_backlight_power)(int on); |
| 200 | extern void (*sa1100fb_lcd_power)(int on); |
| 201 | |
| 202 | /* |
| 203 | * IMHO this looks wrong. In 8BPP, length should be 8. |
| 204 | */ |
| 205 | static struct sa1100fb_rgb rgb_8 = { |
| 206 | .red = { .offset = 0, .length = 4, }, |
| 207 | .green = { .offset = 0, .length = 4, }, |
| 208 | .blue = { .offset = 0, .length = 4, }, |
| 209 | .transp = { .offset = 0, .length = 0, }, |
| 210 | }; |
| 211 | |
| 212 | static struct sa1100fb_rgb def_rgb_16 = { |
| 213 | .red = { .offset = 11, .length = 5, }, |
| 214 | .green = { .offset = 5, .length = 6, }, |
| 215 | .blue = { .offset = 0, .length = 5, }, |
| 216 | .transp = { .offset = 0, .length = 0, }, |
| 217 | }; |
| 218 | |
| 219 | #ifdef CONFIG_SA1100_ASSABET |
| 220 | #ifndef ASSABET_PAL_VIDEO |
| 221 | /* |
| 222 | * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually |
| 223 | * takes an RGB666 signal, but we provide it with an RGB565 signal |
| 224 | * instead (def_rgb_16). |
| 225 | */ |
| 226 | static struct sa1100fb_mach_info lq039q2ds54_info __initdata = { |
| 227 | .pixclock = 171521, .bpp = 16, |
| 228 | .xres = 320, .yres = 240, |
| 229 | |
| 230 | .hsync_len = 5, .vsync_len = 1, |
| 231 | .left_margin = 61, .upper_margin = 3, |
| 232 | .right_margin = 9, .lower_margin = 0, |
| 233 | |
| 234 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 235 | |
| 236 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 237 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
| 238 | }; |
| 239 | #else |
| 240 | static struct sa1100fb_mach_info pal_info __initdata = { |
| 241 | .pixclock = 67797, .bpp = 16, |
| 242 | .xres = 640, .yres = 512, |
| 243 | |
| 244 | .hsync_len = 64, .vsync_len = 6, |
| 245 | .left_margin = 125, .upper_margin = 70, |
| 246 | .right_margin = 115, .lower_margin = 36, |
| 247 | |
| 248 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 249 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), |
| 250 | }; |
| 251 | #endif |
| 252 | #endif |
| 253 | |
| 254 | #ifdef CONFIG_SA1100_H3800 |
| 255 | static struct sa1100fb_mach_info h3800_info __initdata = { |
| 256 | .pixclock = 174757, .bpp = 16, |
| 257 | .xres = 320, .yres = 240, |
| 258 | |
| 259 | .hsync_len = 3, .vsync_len = 3, |
| 260 | .left_margin = 12, .upper_margin = 10, |
| 261 | .right_margin = 17, .lower_margin = 1, |
| 262 | |
| 263 | .cmap_static = 1, |
| 264 | |
| 265 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 266 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
| 267 | }; |
| 268 | #endif |
| 269 | |
| 270 | #ifdef CONFIG_SA1100_H3600 |
| 271 | static struct sa1100fb_mach_info h3600_info __initdata = { |
| 272 | .pixclock = 174757, .bpp = 16, |
| 273 | .xres = 320, .yres = 240, |
| 274 | |
| 275 | .hsync_len = 3, .vsync_len = 3, |
| 276 | .left_margin = 12, .upper_margin = 10, |
| 277 | .right_margin = 17, .lower_margin = 1, |
| 278 | |
| 279 | .cmap_static = 1, |
| 280 | |
| 281 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 282 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
| 283 | }; |
| 284 | |
| 285 | static struct sa1100fb_rgb h3600_rgb_16 = { |
| 286 | .red = { .offset = 12, .length = 4, }, |
| 287 | .green = { .offset = 7, .length = 4, }, |
| 288 | .blue = { .offset = 1, .length = 4, }, |
| 289 | .transp = { .offset = 0, .length = 0, }, |
| 290 | }; |
| 291 | #endif |
| 292 | |
| 293 | #ifdef CONFIG_SA1100_H3100 |
| 294 | static struct sa1100fb_mach_info h3100_info __initdata = { |
| 295 | .pixclock = 406977, .bpp = 4, |
| 296 | .xres = 320, .yres = 240, |
| 297 | |
| 298 | .hsync_len = 26, .vsync_len = 41, |
| 299 | .left_margin = 4, .upper_margin = 0, |
| 300 | .right_margin = 4, .lower_margin = 0, |
| 301 | |
| 302 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 303 | .cmap_greyscale = 1, |
| 304 | .cmap_inverse = 1, |
| 305 | |
| 306 | .lccr0 = LCCR0_Mono | LCCR0_4PixMono | LCCR0_Sngl | LCCR0_Pas, |
| 307 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
| 308 | }; |
| 309 | #endif |
| 310 | |
| 311 | #ifdef CONFIG_SA1100_COLLIE |
| 312 | static struct sa1100fb_mach_info collie_info __initdata = { |
| 313 | .pixclock = 171521, .bpp = 16, |
| 314 | .xres = 320, .yres = 240, |
| 315 | |
| 316 | .hsync_len = 5, .vsync_len = 1, |
| 317 | .left_margin = 11, .upper_margin = 2, |
| 318 | .right_margin = 30, .lower_margin = 0, |
| 319 | |
| 320 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 321 | |
| 322 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 323 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
| 324 | }; |
| 325 | #endif |
| 326 | |
| 327 | #ifdef LART_GREY_LCD |
| 328 | static struct sa1100fb_mach_info lart_grey_info __initdata = { |
| 329 | .pixclock = 150000, .bpp = 4, |
| 330 | .xres = 320, .yres = 240, |
| 331 | |
| 332 | .hsync_len = 1, .vsync_len = 1, |
| 333 | .left_margin = 4, .upper_margin = 0, |
| 334 | .right_margin = 2, .lower_margin = 0, |
| 335 | |
| 336 | .cmap_greyscale = 1, |
| 337 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 338 | |
| 339 | .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono, |
| 340 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), |
| 341 | }; |
| 342 | #endif |
| 343 | #ifdef LART_COLOR_LCD |
| 344 | static struct sa1100fb_mach_info lart_color_info __initdata = { |
| 345 | .pixclock = 150000, .bpp = 16, |
| 346 | .xres = 320, .yres = 240, |
| 347 | |
| 348 | .hsync_len = 2, .vsync_len = 3, |
| 349 | .left_margin = 69, .upper_margin = 14, |
| 350 | .right_margin = 8, .lower_margin = 4, |
| 351 | |
| 352 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 353 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), |
| 354 | }; |
| 355 | #endif |
| 356 | #ifdef LART_VIDEO_OUT |
| 357 | static struct sa1100fb_mach_info lart_video_info __initdata = { |
| 358 | .pixclock = 39721, .bpp = 16, |
| 359 | .xres = 640, .yres = 480, |
| 360 | |
| 361 | .hsync_len = 95, .vsync_len = 2, |
| 362 | .left_margin = 40, .upper_margin = 32, |
| 363 | .right_margin = 24, .lower_margin = 11, |
| 364 | |
| 365 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 366 | |
| 367 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 368 | .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), |
| 369 | }; |
| 370 | #endif |
| 371 | |
| 372 | #ifdef LART_KIT01_LCD |
| 373 | static struct sa1100fb_mach_info lart_kit01_info __initdata = { |
| 374 | .pixclock = 63291, .bpp = 16, |
| 375 | .xres = 640, .yres = 480, |
| 376 | |
| 377 | .hsync_len = 64, .vsync_len = 3, |
| 378 | .left_margin = 122, .upper_margin = 45, |
| 379 | .right_margin = 10, .lower_margin = 10, |
| 380 | |
| 381 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 382 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg |
| 383 | }; |
| 384 | #endif |
| 385 | |
| 386 | #ifdef CONFIG_SA1100_SHANNON |
| 387 | static struct sa1100fb_mach_info shannon_info __initdata = { |
| 388 | .pixclock = 152500, .bpp = 8, |
| 389 | .xres = 640, .yres = 480, |
| 390 | |
| 391 | .hsync_len = 4, .vsync_len = 3, |
| 392 | .left_margin = 2, .upper_margin = 0, |
| 393 | .right_margin = 1, .lower_margin = 0, |
| 394 | |
| 395 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 396 | |
| 397 | .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas, |
| 398 | .lccr3 = LCCR3_ACBsDiv(512), |
| 399 | }; |
| 400 | #endif |
| 401 | |
| 402 | |
| 403 | |
| 404 | static struct sa1100fb_mach_info * __init |
| 405 | sa1100fb_get_machine_info(struct sa1100fb_info *fbi) |
| 406 | { |
| 407 | struct sa1100fb_mach_info *inf = NULL; |
| 408 | |
| 409 | /* |
| 410 | * R G B T |
| 411 | * default {11,5}, { 5,6}, { 0,5}, { 0,0} |
| 412 | * h3600 {12,4}, { 7,4}, { 1,4}, { 0,0} |
| 413 | * freebird { 8,4}, { 4,4}, { 0,4}, {12,4} |
| 414 | */ |
| 415 | #ifdef CONFIG_SA1100_ASSABET |
| 416 | if (machine_is_assabet()) { |
| 417 | #ifndef ASSABET_PAL_VIDEO |
| 418 | inf = &lq039q2ds54_info; |
| 419 | #else |
| 420 | inf = &pal_info; |
| 421 | #endif |
| 422 | } |
| 423 | #endif |
| 424 | #ifdef CONFIG_SA1100_H3100 |
| 425 | if (machine_is_h3100()) { |
| 426 | inf = &h3100_info; |
| 427 | } |
| 428 | #endif |
| 429 | #ifdef CONFIG_SA1100_H3600 |
| 430 | if (machine_is_h3600()) { |
| 431 | inf = &h3600_info; |
| 432 | fbi->rgb[RGB_16] = &h3600_rgb_16; |
| 433 | } |
| 434 | #endif |
| 435 | #ifdef CONFIG_SA1100_H3800 |
| 436 | if (machine_is_h3800()) { |
| 437 | inf = &h3800_info; |
| 438 | } |
| 439 | #endif |
| 440 | #ifdef CONFIG_SA1100_COLLIE |
| 441 | if (machine_is_collie()) { |
| 442 | inf = &collie_info; |
| 443 | } |
| 444 | #endif |
| 445 | #ifdef CONFIG_SA1100_LART |
| 446 | if (machine_is_lart()) { |
| 447 | #ifdef LART_GREY_LCD |
| 448 | inf = &lart_grey_info; |
| 449 | #endif |
| 450 | #ifdef LART_COLOR_LCD |
| 451 | inf = &lart_color_info; |
| 452 | #endif |
| 453 | #ifdef LART_VIDEO_OUT |
| 454 | inf = &lart_video_info; |
| 455 | #endif |
| 456 | #ifdef LART_KIT01_LCD |
| 457 | inf = &lart_kit01_info; |
| 458 | #endif |
| 459 | } |
| 460 | #endif |
| 461 | #ifdef CONFIG_SA1100_SHANNON |
| 462 | if (machine_is_shannon()) { |
| 463 | inf = &shannon_info; |
| 464 | } |
| 465 | #endif |
| 466 | return inf; |
| 467 | } |
| 468 | |
| 469 | static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *); |
| 470 | static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state); |
| 471 | |
| 472 | static inline void sa1100fb_schedule_work(struct sa1100fb_info *fbi, u_int state) |
| 473 | { |
| 474 | unsigned long flags; |
| 475 | |
| 476 | local_irq_save(flags); |
| 477 | /* |
| 478 | * We need to handle two requests being made at the same time. |
| 479 | * There are two important cases: |
| 480 | * 1. When we are changing VT (C_REENABLE) while unblanking (C_ENABLE) |
| 481 | * We must perform the unblanking, which will do our REENABLE for us. |
| 482 | * 2. When we are blanking, but immediately unblank before we have |
| 483 | * blanked. We do the "REENABLE" thing here as well, just to be sure. |
| 484 | */ |
| 485 | if (fbi->task_state == C_ENABLE && state == C_REENABLE) |
| 486 | state = (u_int) -1; |
| 487 | if (fbi->task_state == C_DISABLE && state == C_ENABLE) |
| 488 | state = C_REENABLE; |
| 489 | |
| 490 | if (state != (u_int)-1) { |
| 491 | fbi->task_state = state; |
| 492 | schedule_work(&fbi->task); |
| 493 | } |
| 494 | local_irq_restore(flags); |
| 495 | } |
| 496 | |
| 497 | static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf) |
| 498 | { |
| 499 | chan &= 0xffff; |
| 500 | chan >>= 16 - bf->length; |
| 501 | return chan << bf->offset; |
| 502 | } |
| 503 | |
| 504 | /* |
| 505 | * Convert bits-per-pixel to a hardware palette PBS value. |
| 506 | */ |
| 507 | static inline u_int palette_pbs(struct fb_var_screeninfo *var) |
| 508 | { |
| 509 | int ret = 0; |
| 510 | switch (var->bits_per_pixel) { |
| 511 | case 4: ret = 0 << 12; break; |
| 512 | case 8: ret = 1 << 12; break; |
| 513 | case 16: ret = 2 << 12; break; |
| 514 | } |
| 515 | return ret; |
| 516 | } |
| 517 | |
| 518 | static int |
| 519 | sa1100fb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue, |
| 520 | u_int trans, struct fb_info *info) |
| 521 | { |
| 522 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 523 | u_int val, ret = 1; |
| 524 | |
| 525 | if (regno < fbi->palette_size) { |
| 526 | val = ((red >> 4) & 0xf00); |
| 527 | val |= ((green >> 8) & 0x0f0); |
| 528 | val |= ((blue >> 12) & 0x00f); |
| 529 | |
| 530 | if (regno == 0) |
| 531 | val |= palette_pbs(&fbi->fb.var); |
| 532 | |
| 533 | fbi->palette_cpu[regno] = val; |
| 534 | ret = 0; |
| 535 | } |
| 536 | return ret; |
| 537 | } |
| 538 | |
| 539 | static int |
| 540 | sa1100fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 541 | u_int trans, struct fb_info *info) |
| 542 | { |
| 543 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 544 | unsigned int val; |
| 545 | int ret = 1; |
| 546 | |
| 547 | /* |
| 548 | * If inverse mode was selected, invert all the colours |
| 549 | * rather than the register number. The register number |
| 550 | * is what you poke into the framebuffer to produce the |
| 551 | * colour you requested. |
| 552 | */ |
| 553 | if (fbi->cmap_inverse) { |
| 554 | red = 0xffff - red; |
| 555 | green = 0xffff - green; |
| 556 | blue = 0xffff - blue; |
| 557 | } |
| 558 | |
| 559 | /* |
| 560 | * If greyscale is true, then we convert the RGB value |
| 561 | * to greyscale no mater what visual we are using. |
| 562 | */ |
| 563 | if (fbi->fb.var.grayscale) |
| 564 | red = green = blue = (19595 * red + 38470 * green + |
| 565 | 7471 * blue) >> 16; |
| 566 | |
| 567 | switch (fbi->fb.fix.visual) { |
| 568 | case FB_VISUAL_TRUECOLOR: |
| 569 | /* |
| 570 | * 12 or 16-bit True Colour. We encode the RGB value |
| 571 | * according to the RGB bitfield information. |
| 572 | */ |
| 573 | if (regno < 16) { |
| 574 | u32 *pal = fbi->fb.pseudo_palette; |
| 575 | |
| 576 | val = chan_to_field(red, &fbi->fb.var.red); |
| 577 | val |= chan_to_field(green, &fbi->fb.var.green); |
| 578 | val |= chan_to_field(blue, &fbi->fb.var.blue); |
| 579 | |
| 580 | pal[regno] = val; |
| 581 | ret = 0; |
| 582 | } |
| 583 | break; |
| 584 | |
| 585 | case FB_VISUAL_STATIC_PSEUDOCOLOR: |
| 586 | case FB_VISUAL_PSEUDOCOLOR: |
| 587 | ret = sa1100fb_setpalettereg(regno, red, green, blue, trans, info); |
| 588 | break; |
| 589 | } |
| 590 | |
| 591 | return ret; |
| 592 | } |
| 593 | |
Pavel Machek | 6edb746 | 2005-10-14 15:59:01 -0700 | [diff] [blame] | 594 | #ifdef CONFIG_CPU_FREQ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | /* |
| 596 | * sa1100fb_display_dma_period() |
| 597 | * Calculate the minimum period (in picoseconds) between two DMA |
| 598 | * requests for the LCD controller. If we hit this, it means we're |
| 599 | * doing nothing but LCD DMA. |
| 600 | */ |
Russell King | fc1df37 | 2005-08-07 14:20:26 +0100 | [diff] [blame] | 601 | static inline unsigned int sa1100fb_display_dma_period(struct fb_var_screeninfo *var) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 602 | { |
| 603 | /* |
| 604 | * Period = pixclock * bits_per_byte * bytes_per_transfer |
| 605 | * / memory_bits_per_pixel; |
| 606 | */ |
| 607 | return var->pixclock * 8 * 16 / var->bits_per_pixel; |
| 608 | } |
Pavel Machek | 6edb746 | 2005-10-14 15:59:01 -0700 | [diff] [blame] | 609 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 610 | |
| 611 | /* |
| 612 | * sa1100fb_check_var(): |
| 613 | * Round up in the following order: bits_per_pixel, xres, |
| 614 | * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale, |
| 615 | * bitfields, horizontal timing, vertical timing. |
| 616 | */ |
| 617 | static int |
| 618 | sa1100fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
| 619 | { |
| 620 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 621 | int rgbidx; |
| 622 | |
| 623 | if (var->xres < MIN_XRES) |
| 624 | var->xres = MIN_XRES; |
| 625 | if (var->yres < MIN_YRES) |
| 626 | var->yres = MIN_YRES; |
| 627 | if (var->xres > fbi->max_xres) |
| 628 | var->xres = fbi->max_xres; |
| 629 | if (var->yres > fbi->max_yres) |
| 630 | var->yres = fbi->max_yres; |
| 631 | var->xres_virtual = max(var->xres_virtual, var->xres); |
| 632 | var->yres_virtual = max(var->yres_virtual, var->yres); |
| 633 | |
| 634 | DPRINTK("var->bits_per_pixel=%d\n", var->bits_per_pixel); |
| 635 | switch (var->bits_per_pixel) { |
| 636 | case 4: |
| 637 | rgbidx = RGB_8; |
| 638 | break; |
| 639 | case 8: |
| 640 | rgbidx = RGB_8; |
| 641 | break; |
| 642 | case 16: |
| 643 | rgbidx = RGB_16; |
| 644 | break; |
| 645 | default: |
| 646 | return -EINVAL; |
| 647 | } |
| 648 | |
| 649 | /* |
| 650 | * Copy the RGB parameters for this display |
| 651 | * from the machine specific parameters. |
| 652 | */ |
| 653 | var->red = fbi->rgb[rgbidx]->red; |
| 654 | var->green = fbi->rgb[rgbidx]->green; |
| 655 | var->blue = fbi->rgb[rgbidx]->blue; |
| 656 | var->transp = fbi->rgb[rgbidx]->transp; |
| 657 | |
| 658 | DPRINTK("RGBT length = %d:%d:%d:%d\n", |
| 659 | var->red.length, var->green.length, var->blue.length, |
| 660 | var->transp.length); |
| 661 | |
| 662 | DPRINTK("RGBT offset = %d:%d:%d:%d\n", |
| 663 | var->red.offset, var->green.offset, var->blue.offset, |
| 664 | var->transp.offset); |
| 665 | |
| 666 | #ifdef CONFIG_CPU_FREQ |
| 667 | printk(KERN_DEBUG "dma period = %d ps, clock = %d kHz\n", |
| 668 | sa1100fb_display_dma_period(var), |
| 669 | cpufreq_get(smp_processor_id())); |
| 670 | #endif |
| 671 | |
| 672 | return 0; |
| 673 | } |
| 674 | |
| 675 | static inline void sa1100fb_set_truecolor(u_int is_true_color) |
| 676 | { |
| 677 | if (machine_is_assabet()) { |
| 678 | #if 1 // phase 4 or newer Assabet's |
| 679 | if (is_true_color) |
| 680 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 681 | else |
| 682 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 683 | #else |
| 684 | // older Assabet's |
| 685 | if (is_true_color) |
| 686 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 687 | else |
| 688 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 689 | #endif |
| 690 | } |
| 691 | } |
| 692 | |
| 693 | /* |
| 694 | * sa1100fb_set_par(): |
| 695 | * Set the user defined part of the display for the specified console |
| 696 | */ |
| 697 | static int sa1100fb_set_par(struct fb_info *info) |
| 698 | { |
| 699 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 700 | struct fb_var_screeninfo *var = &info->var; |
| 701 | unsigned long palette_mem_size; |
| 702 | |
| 703 | DPRINTK("set_par\n"); |
| 704 | |
| 705 | if (var->bits_per_pixel == 16) |
| 706 | fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; |
| 707 | else if (!fbi->cmap_static) |
| 708 | fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; |
| 709 | else { |
| 710 | /* |
| 711 | * Some people have weird ideas about wanting static |
| 712 | * pseudocolor maps. I suspect their user space |
| 713 | * applications are broken. |
| 714 | */ |
| 715 | fbi->fb.fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR; |
| 716 | } |
| 717 | |
| 718 | fbi->fb.fix.line_length = var->xres_virtual * |
| 719 | var->bits_per_pixel / 8; |
| 720 | fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16; |
| 721 | |
| 722 | palette_mem_size = fbi->palette_size * sizeof(u16); |
| 723 | |
| 724 | DPRINTK("palette_mem_size = 0x%08lx\n", (u_long) palette_mem_size); |
| 725 | |
| 726 | fbi->palette_cpu = (u16 *)(fbi->map_cpu + PAGE_SIZE - palette_mem_size); |
| 727 | fbi->palette_dma = fbi->map_dma + PAGE_SIZE - palette_mem_size; |
| 728 | |
| 729 | /* |
| 730 | * Set (any) board control register to handle new color depth |
| 731 | */ |
| 732 | sa1100fb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR); |
| 733 | sa1100fb_activate_var(var, fbi); |
| 734 | |
| 735 | return 0; |
| 736 | } |
| 737 | |
| 738 | #if 0 |
| 739 | static int |
| 740 | sa1100fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, |
| 741 | struct fb_info *info) |
| 742 | { |
| 743 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 744 | |
| 745 | /* |
| 746 | * Make sure the user isn't doing something stupid. |
| 747 | */ |
| 748 | if (!kspc && (fbi->fb.var.bits_per_pixel == 16 || fbi->cmap_static)) |
| 749 | return -EINVAL; |
| 750 | |
| 751 | return gen_set_cmap(cmap, kspc, con, info); |
| 752 | } |
| 753 | #endif |
| 754 | |
| 755 | /* |
| 756 | * Formal definition of the VESA spec: |
| 757 | * On |
| 758 | * This refers to the state of the display when it is in full operation |
| 759 | * Stand-By |
| 760 | * This defines an optional operating state of minimal power reduction with |
| 761 | * the shortest recovery time |
| 762 | * Suspend |
| 763 | * This refers to a level of power management in which substantial power |
| 764 | * reduction is achieved by the display. The display can have a longer |
| 765 | * recovery time from this state than from the Stand-by state |
| 766 | * Off |
| 767 | * This indicates that the display is consuming the lowest level of power |
| 768 | * and is non-operational. Recovery from this state may optionally require |
| 769 | * the user to manually power on the monitor |
| 770 | * |
| 771 | * Now, the fbdev driver adds an additional state, (blank), where they |
| 772 | * turn off the video (maybe by colormap tricks), but don't mess with the |
| 773 | * video itself: think of it semantically between on and Stand-By. |
| 774 | * |
| 775 | * So here's what we should do in our fbdev blank routine: |
| 776 | * |
| 777 | * VESA_NO_BLANKING (mode 0) Video on, front/back light on |
| 778 | * VESA_VSYNC_SUSPEND (mode 1) Video on, front/back light off |
| 779 | * VESA_HSYNC_SUSPEND (mode 2) Video on, front/back light off |
| 780 | * VESA_POWERDOWN (mode 3) Video off, front/back light off |
| 781 | * |
| 782 | * This will match the matrox implementation. |
| 783 | */ |
| 784 | /* |
| 785 | * sa1100fb_blank(): |
| 786 | * Blank the display by setting all palette values to zero. Note, the |
| 787 | * 12 and 16 bpp modes don't really use the palette, so this will not |
| 788 | * blank the display in all modes. |
| 789 | */ |
| 790 | static int sa1100fb_blank(int blank, struct fb_info *info) |
| 791 | { |
| 792 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 793 | int i; |
| 794 | |
| 795 | DPRINTK("sa1100fb_blank: blank=%d\n", blank); |
| 796 | |
| 797 | switch (blank) { |
| 798 | case FB_BLANK_POWERDOWN: |
| 799 | case FB_BLANK_VSYNC_SUSPEND: |
| 800 | case FB_BLANK_HSYNC_SUSPEND: |
| 801 | case FB_BLANK_NORMAL: |
| 802 | if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || |
| 803 | fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) |
| 804 | for (i = 0; i < fbi->palette_size; i++) |
| 805 | sa1100fb_setpalettereg(i, 0, 0, 0, 0, info); |
| 806 | sa1100fb_schedule_work(fbi, C_DISABLE); |
| 807 | break; |
| 808 | |
| 809 | case FB_BLANK_UNBLANK: |
| 810 | if (fbi->fb.fix.visual == FB_VISUAL_PSEUDOCOLOR || |
| 811 | fbi->fb.fix.visual == FB_VISUAL_STATIC_PSEUDOCOLOR) |
| 812 | fb_set_cmap(&fbi->fb.cmap, info); |
| 813 | sa1100fb_schedule_work(fbi, C_ENABLE); |
| 814 | } |
| 815 | return 0; |
| 816 | } |
| 817 | |
Christoph Hellwig | 216d526 | 2006-01-14 13:21:25 -0800 | [diff] [blame] | 818 | static int sa1100fb_mmap(struct fb_info *info, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 819 | struct vm_area_struct *vma) |
| 820 | { |
| 821 | struct sa1100fb_info *fbi = (struct sa1100fb_info *)info; |
| 822 | unsigned long start, len, off = vma->vm_pgoff << PAGE_SHIFT; |
| 823 | |
| 824 | if (off < info->fix.smem_len) { |
| 825 | vma->vm_pgoff += 1; /* skip over the palette */ |
| 826 | return dma_mmap_writecombine(fbi->dev, vma, fbi->map_cpu, |
| 827 | fbi->map_dma, fbi->map_size); |
| 828 | } |
| 829 | |
| 830 | start = info->fix.mmio_start; |
| 831 | len = PAGE_ALIGN((start & ~PAGE_MASK) + info->fix.mmio_len); |
| 832 | |
| 833 | if ((vma->vm_end - vma->vm_start + off) > len) |
| 834 | return -EINVAL; |
| 835 | |
| 836 | off += start & PAGE_MASK; |
| 837 | vma->vm_pgoff = off >> PAGE_SHIFT; |
| 838 | vma->vm_flags |= VM_IO; |
| 839 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
| 840 | return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, |
| 841 | vma->vm_end - vma->vm_start, |
| 842 | vma->vm_page_prot); |
| 843 | } |
| 844 | |
| 845 | static struct fb_ops sa1100fb_ops = { |
| 846 | .owner = THIS_MODULE, |
| 847 | .fb_check_var = sa1100fb_check_var, |
| 848 | .fb_set_par = sa1100fb_set_par, |
| 849 | // .fb_set_cmap = sa1100fb_set_cmap, |
| 850 | .fb_setcolreg = sa1100fb_setcolreg, |
| 851 | .fb_fillrect = cfb_fillrect, |
| 852 | .fb_copyarea = cfb_copyarea, |
| 853 | .fb_imageblit = cfb_imageblit, |
| 854 | .fb_blank = sa1100fb_blank, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 855 | .fb_mmap = sa1100fb_mmap, |
| 856 | }; |
| 857 | |
| 858 | /* |
| 859 | * Calculate the PCD value from the clock rate (in picoseconds). |
| 860 | * We take account of the PPCR clock setting. |
| 861 | */ |
| 862 | static inline unsigned int get_pcd(unsigned int pixclock, unsigned int cpuclock) |
| 863 | { |
| 864 | unsigned int pcd = cpuclock / 100; |
| 865 | |
| 866 | pcd *= pixclock; |
| 867 | pcd /= 10000000; |
| 868 | |
| 869 | return pcd + 1; /* make up for integer math truncations */ |
| 870 | } |
| 871 | |
| 872 | /* |
| 873 | * sa1100fb_activate_var(): |
| 874 | * Configures LCD Controller based on entries in var parameter. Settings are |
| 875 | * only written to the controller if changes were made. |
| 876 | */ |
| 877 | static int sa1100fb_activate_var(struct fb_var_screeninfo *var, struct sa1100fb_info *fbi) |
| 878 | { |
| 879 | struct sa1100fb_lcd_reg new_regs; |
| 880 | u_int half_screen_size, yres, pcd; |
| 881 | u_long flags; |
| 882 | |
| 883 | DPRINTK("Configuring SA1100 LCD\n"); |
| 884 | |
| 885 | DPRINTK("var: xres=%d hslen=%d lm=%d rm=%d\n", |
| 886 | var->xres, var->hsync_len, |
| 887 | var->left_margin, var->right_margin); |
| 888 | DPRINTK("var: yres=%d vslen=%d um=%d bm=%d\n", |
| 889 | var->yres, var->vsync_len, |
| 890 | var->upper_margin, var->lower_margin); |
| 891 | |
| 892 | #if DEBUG_VAR |
| 893 | if (var->xres < 16 || var->xres > 1024) |
| 894 | printk(KERN_ERR "%s: invalid xres %d\n", |
| 895 | fbi->fb.fix.id, var->xres); |
| 896 | if (var->hsync_len < 1 || var->hsync_len > 64) |
| 897 | printk(KERN_ERR "%s: invalid hsync_len %d\n", |
| 898 | fbi->fb.fix.id, var->hsync_len); |
| 899 | if (var->left_margin < 1 || var->left_margin > 255) |
| 900 | printk(KERN_ERR "%s: invalid left_margin %d\n", |
| 901 | fbi->fb.fix.id, var->left_margin); |
| 902 | if (var->right_margin < 1 || var->right_margin > 255) |
| 903 | printk(KERN_ERR "%s: invalid right_margin %d\n", |
| 904 | fbi->fb.fix.id, var->right_margin); |
| 905 | if (var->yres < 1 || var->yres > 1024) |
| 906 | printk(KERN_ERR "%s: invalid yres %d\n", |
| 907 | fbi->fb.fix.id, var->yres); |
| 908 | if (var->vsync_len < 1 || var->vsync_len > 64) |
| 909 | printk(KERN_ERR "%s: invalid vsync_len %d\n", |
| 910 | fbi->fb.fix.id, var->vsync_len); |
| 911 | if (var->upper_margin < 0 || var->upper_margin > 255) |
| 912 | printk(KERN_ERR "%s: invalid upper_margin %d\n", |
| 913 | fbi->fb.fix.id, var->upper_margin); |
| 914 | if (var->lower_margin < 0 || var->lower_margin > 255) |
| 915 | printk(KERN_ERR "%s: invalid lower_margin %d\n", |
| 916 | fbi->fb.fix.id, var->lower_margin); |
| 917 | #endif |
| 918 | |
| 919 | new_regs.lccr0 = fbi->lccr0 | |
| 920 | LCCR0_LEN | LCCR0_LDM | LCCR0_BAM | |
| 921 | LCCR0_ERM | LCCR0_LtlEnd | LCCR0_DMADel(0); |
| 922 | |
| 923 | new_regs.lccr1 = |
| 924 | LCCR1_DisWdth(var->xres) + |
| 925 | LCCR1_HorSnchWdth(var->hsync_len) + |
| 926 | LCCR1_BegLnDel(var->left_margin) + |
| 927 | LCCR1_EndLnDel(var->right_margin); |
| 928 | |
| 929 | /* |
| 930 | * If we have a dual scan LCD, then we need to halve |
| 931 | * the YRES parameter. |
| 932 | */ |
| 933 | yres = var->yres; |
| 934 | if (fbi->lccr0 & LCCR0_Dual) |
| 935 | yres /= 2; |
| 936 | |
| 937 | new_regs.lccr2 = |
| 938 | LCCR2_DisHght(yres) + |
| 939 | LCCR2_VrtSnchWdth(var->vsync_len) + |
| 940 | LCCR2_BegFrmDel(var->upper_margin) + |
| 941 | LCCR2_EndFrmDel(var->lower_margin); |
| 942 | |
| 943 | pcd = get_pcd(var->pixclock, cpufreq_get(0)); |
| 944 | new_regs.lccr3 = LCCR3_PixClkDiv(pcd) | fbi->lccr3 | |
| 945 | (var->sync & FB_SYNC_HOR_HIGH_ACT ? LCCR3_HorSnchH : LCCR3_HorSnchL) | |
| 946 | (var->sync & FB_SYNC_VERT_HIGH_ACT ? LCCR3_VrtSnchH : LCCR3_VrtSnchL); |
| 947 | |
| 948 | DPRINTK("nlccr0 = 0x%08lx\n", new_regs.lccr0); |
| 949 | DPRINTK("nlccr1 = 0x%08lx\n", new_regs.lccr1); |
| 950 | DPRINTK("nlccr2 = 0x%08lx\n", new_regs.lccr2); |
| 951 | DPRINTK("nlccr3 = 0x%08lx\n", new_regs.lccr3); |
| 952 | |
| 953 | half_screen_size = var->bits_per_pixel; |
| 954 | half_screen_size = half_screen_size * var->xres * var->yres / 16; |
| 955 | |
| 956 | /* Update shadow copy atomically */ |
| 957 | local_irq_save(flags); |
| 958 | fbi->dbar1 = fbi->palette_dma; |
| 959 | fbi->dbar2 = fbi->screen_dma + half_screen_size; |
| 960 | |
| 961 | fbi->reg_lccr0 = new_regs.lccr0; |
| 962 | fbi->reg_lccr1 = new_regs.lccr1; |
| 963 | fbi->reg_lccr2 = new_regs.lccr2; |
| 964 | fbi->reg_lccr3 = new_regs.lccr3; |
| 965 | local_irq_restore(flags); |
| 966 | |
| 967 | /* |
| 968 | * Only update the registers if the controller is enabled |
| 969 | * and something has changed. |
| 970 | */ |
| 971 | if ((LCCR0 != fbi->reg_lccr0) || (LCCR1 != fbi->reg_lccr1) || |
| 972 | (LCCR2 != fbi->reg_lccr2) || (LCCR3 != fbi->reg_lccr3) || |
| 973 | (DBAR1 != fbi->dbar1) || (DBAR2 != fbi->dbar2)) |
| 974 | sa1100fb_schedule_work(fbi, C_REENABLE); |
| 975 | |
| 976 | return 0; |
| 977 | } |
| 978 | |
| 979 | /* |
| 980 | * NOTE! The following functions are purely helpers for set_ctrlr_state. |
| 981 | * Do not call them directly; set_ctrlr_state does the correct serialisation |
| 982 | * to ensure that things happen in the right way 100% of time time. |
| 983 | * -- rmk |
| 984 | */ |
| 985 | static inline void __sa1100fb_backlight_power(struct sa1100fb_info *fbi, int on) |
| 986 | { |
| 987 | DPRINTK("backlight o%s\n", on ? "n" : "ff"); |
| 988 | |
| 989 | if (sa1100fb_backlight_power) |
| 990 | sa1100fb_backlight_power(on); |
| 991 | } |
| 992 | |
| 993 | static inline void __sa1100fb_lcd_power(struct sa1100fb_info *fbi, int on) |
| 994 | { |
| 995 | DPRINTK("LCD power o%s\n", on ? "n" : "ff"); |
| 996 | |
| 997 | if (sa1100fb_lcd_power) |
| 998 | sa1100fb_lcd_power(on); |
| 999 | } |
| 1000 | |
| 1001 | static void sa1100fb_setup_gpio(struct sa1100fb_info *fbi) |
| 1002 | { |
| 1003 | u_int mask = 0; |
| 1004 | |
| 1005 | /* |
| 1006 | * Enable GPIO<9:2> for LCD use if: |
| 1007 | * 1. Active display, or |
| 1008 | * 2. Color Dual Passive display |
| 1009 | * |
| 1010 | * see table 11.8 on page 11-27 in the SA1100 manual |
| 1011 | * -- Erik. |
| 1012 | * |
| 1013 | * SA1110 spec update nr. 25 says we can and should |
| 1014 | * clear LDD15 to 12 for 4 or 8bpp modes with active |
| 1015 | * panels. |
| 1016 | */ |
| 1017 | if ((fbi->reg_lccr0 & LCCR0_CMS) == LCCR0_Color && |
| 1018 | (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) != 0) { |
| 1019 | mask = GPIO_LDD11 | GPIO_LDD10 | GPIO_LDD9 | GPIO_LDD8; |
| 1020 | |
| 1021 | if (fbi->fb.var.bits_per_pixel > 8 || |
| 1022 | (fbi->reg_lccr0 & (LCCR0_Dual|LCCR0_Act)) == LCCR0_Dual) |
| 1023 | mask |= GPIO_LDD15 | GPIO_LDD14 | GPIO_LDD13 | GPIO_LDD12; |
| 1024 | |
| 1025 | } |
| 1026 | |
| 1027 | if (mask) { |
| 1028 | GPDR |= mask; |
| 1029 | GAFR |= mask; |
| 1030 | } |
| 1031 | } |
| 1032 | |
| 1033 | static void sa1100fb_enable_controller(struct sa1100fb_info *fbi) |
| 1034 | { |
| 1035 | DPRINTK("Enabling LCD controller\n"); |
| 1036 | |
| 1037 | /* |
| 1038 | * Make sure the mode bits are present in the first palette entry |
| 1039 | */ |
| 1040 | fbi->palette_cpu[0] &= 0xcfff; |
| 1041 | fbi->palette_cpu[0] |= palette_pbs(&fbi->fb.var); |
| 1042 | |
| 1043 | /* Sequence from 11.7.10 */ |
| 1044 | LCCR3 = fbi->reg_lccr3; |
| 1045 | LCCR2 = fbi->reg_lccr2; |
| 1046 | LCCR1 = fbi->reg_lccr1; |
| 1047 | LCCR0 = fbi->reg_lccr0 & ~LCCR0_LEN; |
| 1048 | DBAR1 = fbi->dbar1; |
| 1049 | DBAR2 = fbi->dbar2; |
| 1050 | LCCR0 |= LCCR0_LEN; |
| 1051 | |
| 1052 | if (machine_is_shannon()) { |
| 1053 | GPDR |= SHANNON_GPIO_DISP_EN; |
| 1054 | GPSR |= SHANNON_GPIO_DISP_EN; |
| 1055 | } |
| 1056 | |
| 1057 | DPRINTK("DBAR1 = 0x%08x\n", DBAR1); |
| 1058 | DPRINTK("DBAR2 = 0x%08x\n", DBAR2); |
| 1059 | DPRINTK("LCCR0 = 0x%08x\n", LCCR0); |
| 1060 | DPRINTK("LCCR1 = 0x%08x\n", LCCR1); |
| 1061 | DPRINTK("LCCR2 = 0x%08x\n", LCCR2); |
| 1062 | DPRINTK("LCCR3 = 0x%08x\n", LCCR3); |
| 1063 | } |
| 1064 | |
| 1065 | static void sa1100fb_disable_controller(struct sa1100fb_info *fbi) |
| 1066 | { |
| 1067 | DECLARE_WAITQUEUE(wait, current); |
| 1068 | |
| 1069 | DPRINTK("Disabling LCD controller\n"); |
| 1070 | |
| 1071 | if (machine_is_shannon()) { |
| 1072 | GPCR |= SHANNON_GPIO_DISP_EN; |
| 1073 | } |
| 1074 | |
| 1075 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 1076 | add_wait_queue(&fbi->ctrlr_wait, &wait); |
| 1077 | |
| 1078 | LCSR = 0xffffffff; /* Clear LCD Status Register */ |
| 1079 | LCCR0 &= ~LCCR0_LDM; /* Enable LCD Disable Done Interrupt */ |
| 1080 | LCCR0 &= ~LCCR0_LEN; /* Disable LCD Controller */ |
| 1081 | |
| 1082 | schedule_timeout(20 * HZ / 1000); |
| 1083 | remove_wait_queue(&fbi->ctrlr_wait, &wait); |
| 1084 | } |
| 1085 | |
| 1086 | /* |
| 1087 | * sa1100fb_handle_irq: Handle 'LCD DONE' interrupts. |
| 1088 | */ |
| 1089 | static irqreturn_t sa1100fb_handle_irq(int irq, void *dev_id, struct pt_regs *regs) |
| 1090 | { |
| 1091 | struct sa1100fb_info *fbi = dev_id; |
| 1092 | unsigned int lcsr = LCSR; |
| 1093 | |
| 1094 | if (lcsr & LCSR_LDD) { |
| 1095 | LCCR0 |= LCCR0_LDM; |
| 1096 | wake_up(&fbi->ctrlr_wait); |
| 1097 | } |
| 1098 | |
| 1099 | LCSR = lcsr; |
| 1100 | return IRQ_HANDLED; |
| 1101 | } |
| 1102 | |
| 1103 | /* |
| 1104 | * This function must be called from task context only, since it will |
| 1105 | * sleep when disabling the LCD controller, or if we get two contending |
| 1106 | * processes trying to alter state. |
| 1107 | */ |
| 1108 | static void set_ctrlr_state(struct sa1100fb_info *fbi, u_int state) |
| 1109 | { |
| 1110 | u_int old_state; |
| 1111 | |
| 1112 | down(&fbi->ctrlr_sem); |
| 1113 | |
| 1114 | old_state = fbi->state; |
| 1115 | |
| 1116 | /* |
| 1117 | * Hack around fbcon initialisation. |
| 1118 | */ |
| 1119 | if (old_state == C_STARTUP && state == C_REENABLE) |
| 1120 | state = C_ENABLE; |
| 1121 | |
| 1122 | switch (state) { |
| 1123 | case C_DISABLE_CLKCHANGE: |
| 1124 | /* |
| 1125 | * Disable controller for clock change. If the |
| 1126 | * controller is already disabled, then do nothing. |
| 1127 | */ |
| 1128 | if (old_state != C_DISABLE && old_state != C_DISABLE_PM) { |
| 1129 | fbi->state = state; |
| 1130 | sa1100fb_disable_controller(fbi); |
| 1131 | } |
| 1132 | break; |
| 1133 | |
| 1134 | case C_DISABLE_PM: |
| 1135 | case C_DISABLE: |
| 1136 | /* |
| 1137 | * Disable controller |
| 1138 | */ |
| 1139 | if (old_state != C_DISABLE) { |
| 1140 | fbi->state = state; |
| 1141 | |
| 1142 | __sa1100fb_backlight_power(fbi, 0); |
| 1143 | if (old_state != C_DISABLE_CLKCHANGE) |
| 1144 | sa1100fb_disable_controller(fbi); |
| 1145 | __sa1100fb_lcd_power(fbi, 0); |
| 1146 | } |
| 1147 | break; |
| 1148 | |
| 1149 | case C_ENABLE_CLKCHANGE: |
| 1150 | /* |
| 1151 | * Enable the controller after clock change. Only |
| 1152 | * do this if we were disabled for the clock change. |
| 1153 | */ |
| 1154 | if (old_state == C_DISABLE_CLKCHANGE) { |
| 1155 | fbi->state = C_ENABLE; |
| 1156 | sa1100fb_enable_controller(fbi); |
| 1157 | } |
| 1158 | break; |
| 1159 | |
| 1160 | case C_REENABLE: |
| 1161 | /* |
| 1162 | * Re-enable the controller only if it was already |
| 1163 | * enabled. This is so we reprogram the control |
| 1164 | * registers. |
| 1165 | */ |
| 1166 | if (old_state == C_ENABLE) { |
| 1167 | sa1100fb_disable_controller(fbi); |
| 1168 | sa1100fb_setup_gpio(fbi); |
| 1169 | sa1100fb_enable_controller(fbi); |
| 1170 | } |
| 1171 | break; |
| 1172 | |
| 1173 | case C_ENABLE_PM: |
| 1174 | /* |
| 1175 | * Re-enable the controller after PM. This is not |
| 1176 | * perfect - think about the case where we were doing |
| 1177 | * a clock change, and we suspended half-way through. |
| 1178 | */ |
| 1179 | if (old_state != C_DISABLE_PM) |
| 1180 | break; |
| 1181 | /* fall through */ |
| 1182 | |
| 1183 | case C_ENABLE: |
| 1184 | /* |
| 1185 | * Power up the LCD screen, enable controller, and |
| 1186 | * turn on the backlight. |
| 1187 | */ |
| 1188 | if (old_state != C_ENABLE) { |
| 1189 | fbi->state = C_ENABLE; |
| 1190 | sa1100fb_setup_gpio(fbi); |
| 1191 | __sa1100fb_lcd_power(fbi, 1); |
| 1192 | sa1100fb_enable_controller(fbi); |
| 1193 | __sa1100fb_backlight_power(fbi, 1); |
| 1194 | } |
| 1195 | break; |
| 1196 | } |
| 1197 | up(&fbi->ctrlr_sem); |
| 1198 | } |
| 1199 | |
| 1200 | /* |
| 1201 | * Our LCD controller task (which is called when we blank or unblank) |
| 1202 | * via keventd. |
| 1203 | */ |
| 1204 | static void sa1100fb_task(void *dummy) |
| 1205 | { |
| 1206 | struct sa1100fb_info *fbi = dummy; |
| 1207 | u_int state = xchg(&fbi->task_state, -1); |
| 1208 | |
| 1209 | set_ctrlr_state(fbi, state); |
| 1210 | } |
| 1211 | |
| 1212 | #ifdef CONFIG_CPU_FREQ |
| 1213 | /* |
| 1214 | * Calculate the minimum DMA period over all displays that we own. |
| 1215 | * This, together with the SDRAM bandwidth defines the slowest CPU |
| 1216 | * frequency that can be selected. |
| 1217 | */ |
| 1218 | static unsigned int sa1100fb_min_dma_period(struct sa1100fb_info *fbi) |
| 1219 | { |
| 1220 | #if 0 |
| 1221 | unsigned int min_period = (unsigned int)-1; |
| 1222 | int i; |
| 1223 | |
| 1224 | for (i = 0; i < MAX_NR_CONSOLES; i++) { |
| 1225 | struct display *disp = &fb_display[i]; |
| 1226 | unsigned int period; |
| 1227 | |
| 1228 | /* |
| 1229 | * Do we own this display? |
| 1230 | */ |
| 1231 | if (disp->fb_info != &fbi->fb) |
| 1232 | continue; |
| 1233 | |
| 1234 | /* |
| 1235 | * Ok, calculate its DMA period |
| 1236 | */ |
| 1237 | period = sa1100fb_display_dma_period(&disp->var); |
| 1238 | if (period < min_period) |
| 1239 | min_period = period; |
| 1240 | } |
| 1241 | |
| 1242 | return min_period; |
| 1243 | #else |
| 1244 | /* |
| 1245 | * FIXME: we need to verify _all_ consoles. |
| 1246 | */ |
| 1247 | return sa1100fb_display_dma_period(&fbi->fb.var); |
| 1248 | #endif |
| 1249 | } |
| 1250 | |
| 1251 | /* |
| 1252 | * CPU clock speed change handler. We need to adjust the LCD timing |
| 1253 | * parameters when the CPU clock is adjusted by the power management |
| 1254 | * subsystem. |
| 1255 | */ |
| 1256 | static int |
| 1257 | sa1100fb_freq_transition(struct notifier_block *nb, unsigned long val, |
| 1258 | void *data) |
| 1259 | { |
| 1260 | struct sa1100fb_info *fbi = TO_INF(nb, freq_transition); |
| 1261 | struct cpufreq_freqs *f = data; |
| 1262 | u_int pcd; |
| 1263 | |
| 1264 | switch (val) { |
| 1265 | case CPUFREQ_PRECHANGE: |
| 1266 | set_ctrlr_state(fbi, C_DISABLE_CLKCHANGE); |
| 1267 | break; |
| 1268 | |
| 1269 | case CPUFREQ_POSTCHANGE: |
| 1270 | pcd = get_pcd(fbi->fb.var.pixclock, f->new); |
| 1271 | fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) | LCCR3_PixClkDiv(pcd); |
| 1272 | set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE); |
| 1273 | break; |
| 1274 | } |
| 1275 | return 0; |
| 1276 | } |
| 1277 | |
| 1278 | static int |
| 1279 | sa1100fb_freq_policy(struct notifier_block *nb, unsigned long val, |
| 1280 | void *data) |
| 1281 | { |
| 1282 | struct sa1100fb_info *fbi = TO_INF(nb, freq_policy); |
| 1283 | struct cpufreq_policy *policy = data; |
| 1284 | |
| 1285 | switch (val) { |
| 1286 | case CPUFREQ_ADJUST: |
| 1287 | case CPUFREQ_INCOMPATIBLE: |
| 1288 | printk(KERN_DEBUG "min dma period: %d ps, " |
| 1289 | "new clock %d kHz\n", sa1100fb_min_dma_period(fbi), |
| 1290 | policy->max); |
| 1291 | /* todo: fill in min/max values */ |
| 1292 | break; |
| 1293 | case CPUFREQ_NOTIFY: |
| 1294 | do {} while(0); |
| 1295 | /* todo: panic if min/max values aren't fulfilled |
| 1296 | * [can't really happen unless there's a bug in the |
| 1297 | * CPU policy verififcation process * |
| 1298 | */ |
| 1299 | break; |
| 1300 | } |
| 1301 | return 0; |
| 1302 | } |
| 1303 | #endif |
| 1304 | |
| 1305 | #ifdef CONFIG_PM |
| 1306 | /* |
| 1307 | * Power management hooks. Note that we won't be called from IRQ context, |
| 1308 | * unlike the blank functions above, so we may sleep. |
| 1309 | */ |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1310 | static int sa1100fb_suspend(struct platform_device *dev, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1311 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1312 | struct sa1100fb_info *fbi = platform_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 1314 | set_ctrlr_state(fbi, C_DISABLE_PM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | return 0; |
| 1316 | } |
| 1317 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1318 | static int sa1100fb_resume(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1319 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1320 | struct sa1100fb_info *fbi = platform_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1321 | |
Russell King | 9480e30 | 2005-10-28 09:52:56 -0700 | [diff] [blame] | 1322 | set_ctrlr_state(fbi, C_ENABLE_PM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | return 0; |
| 1324 | } |
| 1325 | #else |
| 1326 | #define sa1100fb_suspend NULL |
| 1327 | #define sa1100fb_resume NULL |
| 1328 | #endif |
| 1329 | |
| 1330 | /* |
| 1331 | * sa1100fb_map_video_memory(): |
| 1332 | * Allocates the DRAM memory for the frame buffer. This buffer is |
| 1333 | * remapped into a non-cached, non-buffered, memory region to |
| 1334 | * allow palette and pixel writes to occur without flushing the |
| 1335 | * cache. Once this area is remapped, all virtual memory |
| 1336 | * access to the video memory should occur at the new region. |
| 1337 | */ |
| 1338 | static int __init sa1100fb_map_video_memory(struct sa1100fb_info *fbi) |
| 1339 | { |
| 1340 | /* |
| 1341 | * We reserve one page for the palette, plus the size |
| 1342 | * of the framebuffer. |
| 1343 | */ |
| 1344 | fbi->map_size = PAGE_ALIGN(fbi->fb.fix.smem_len + PAGE_SIZE); |
| 1345 | fbi->map_cpu = dma_alloc_writecombine(fbi->dev, fbi->map_size, |
| 1346 | &fbi->map_dma, GFP_KERNEL); |
| 1347 | |
| 1348 | if (fbi->map_cpu) { |
| 1349 | fbi->fb.screen_base = fbi->map_cpu + PAGE_SIZE; |
| 1350 | fbi->screen_dma = fbi->map_dma + PAGE_SIZE; |
| 1351 | /* |
| 1352 | * FIXME: this is actually the wrong thing to place in |
| 1353 | * smem_start. But fbdev suffers from the problem that |
| 1354 | * it needs an API which doesn't exist (in this case, |
| 1355 | * dma_writecombine_mmap) |
| 1356 | */ |
| 1357 | fbi->fb.fix.smem_start = fbi->screen_dma; |
| 1358 | } |
| 1359 | |
| 1360 | return fbi->map_cpu ? 0 : -ENOMEM; |
| 1361 | } |
| 1362 | |
| 1363 | /* Fake monspecs to fill in fbinfo structure */ |
| 1364 | static struct fb_monspecs monspecs __initdata = { |
| 1365 | .hfmin = 30000, |
| 1366 | .hfmax = 70000, |
| 1367 | .vfmin = 50, |
| 1368 | .vfmax = 65, |
| 1369 | }; |
| 1370 | |
| 1371 | |
| 1372 | static struct sa1100fb_info * __init sa1100fb_init_fbinfo(struct device *dev) |
| 1373 | { |
| 1374 | struct sa1100fb_mach_info *inf; |
| 1375 | struct sa1100fb_info *fbi; |
| 1376 | |
| 1377 | fbi = kmalloc(sizeof(struct sa1100fb_info) + sizeof(u32) * 16, |
| 1378 | GFP_KERNEL); |
| 1379 | if (!fbi) |
| 1380 | return NULL; |
| 1381 | |
| 1382 | memset(fbi, 0, sizeof(struct sa1100fb_info)); |
| 1383 | fbi->dev = dev; |
| 1384 | |
| 1385 | strcpy(fbi->fb.fix.id, SA1100_NAME); |
| 1386 | |
| 1387 | fbi->fb.fix.type = FB_TYPE_PACKED_PIXELS; |
| 1388 | fbi->fb.fix.type_aux = 0; |
| 1389 | fbi->fb.fix.xpanstep = 0; |
| 1390 | fbi->fb.fix.ypanstep = 0; |
| 1391 | fbi->fb.fix.ywrapstep = 0; |
| 1392 | fbi->fb.fix.accel = FB_ACCEL_NONE; |
| 1393 | |
| 1394 | fbi->fb.var.nonstd = 0; |
| 1395 | fbi->fb.var.activate = FB_ACTIVATE_NOW; |
| 1396 | fbi->fb.var.height = -1; |
| 1397 | fbi->fb.var.width = -1; |
| 1398 | fbi->fb.var.accel_flags = 0; |
| 1399 | fbi->fb.var.vmode = FB_VMODE_NONINTERLACED; |
| 1400 | |
| 1401 | fbi->fb.fbops = &sa1100fb_ops; |
| 1402 | fbi->fb.flags = FBINFO_DEFAULT; |
| 1403 | fbi->fb.monspecs = monspecs; |
| 1404 | fbi->fb.pseudo_palette = (fbi + 1); |
| 1405 | |
| 1406 | fbi->rgb[RGB_8] = &rgb_8; |
| 1407 | fbi->rgb[RGB_16] = &def_rgb_16; |
| 1408 | |
| 1409 | inf = sa1100fb_get_machine_info(fbi); |
| 1410 | |
| 1411 | /* |
| 1412 | * People just don't seem to get this. We don't support |
| 1413 | * anything but correct entries now, so panic if someone |
| 1414 | * does something stupid. |
| 1415 | */ |
| 1416 | if (inf->lccr3 & (LCCR3_VrtSnchL|LCCR3_HorSnchL|0xff) || |
| 1417 | inf->pixclock == 0) |
| 1418 | panic("sa1100fb error: invalid LCCR3 fields set or zero " |
| 1419 | "pixclock."); |
| 1420 | |
| 1421 | fbi->max_xres = inf->xres; |
| 1422 | fbi->fb.var.xres = inf->xres; |
| 1423 | fbi->fb.var.xres_virtual = inf->xres; |
| 1424 | fbi->max_yres = inf->yres; |
| 1425 | fbi->fb.var.yres = inf->yres; |
| 1426 | fbi->fb.var.yres_virtual = inf->yres; |
| 1427 | fbi->max_bpp = inf->bpp; |
| 1428 | fbi->fb.var.bits_per_pixel = inf->bpp; |
| 1429 | fbi->fb.var.pixclock = inf->pixclock; |
| 1430 | fbi->fb.var.hsync_len = inf->hsync_len; |
| 1431 | fbi->fb.var.left_margin = inf->left_margin; |
| 1432 | fbi->fb.var.right_margin = inf->right_margin; |
| 1433 | fbi->fb.var.vsync_len = inf->vsync_len; |
| 1434 | fbi->fb.var.upper_margin = inf->upper_margin; |
| 1435 | fbi->fb.var.lower_margin = inf->lower_margin; |
| 1436 | fbi->fb.var.sync = inf->sync; |
| 1437 | fbi->fb.var.grayscale = inf->cmap_greyscale; |
| 1438 | fbi->cmap_inverse = inf->cmap_inverse; |
| 1439 | fbi->cmap_static = inf->cmap_static; |
| 1440 | fbi->lccr0 = inf->lccr0; |
| 1441 | fbi->lccr3 = inf->lccr3; |
| 1442 | fbi->state = C_STARTUP; |
| 1443 | fbi->task_state = (u_char)-1; |
| 1444 | fbi->fb.fix.smem_len = fbi->max_xres * fbi->max_yres * |
| 1445 | fbi->max_bpp / 8; |
| 1446 | |
| 1447 | init_waitqueue_head(&fbi->ctrlr_wait); |
| 1448 | INIT_WORK(&fbi->task, sa1100fb_task, fbi); |
| 1449 | init_MUTEX(&fbi->ctrlr_sem); |
| 1450 | |
| 1451 | return fbi; |
| 1452 | } |
| 1453 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1454 | static int __init sa1100fb_probe(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1455 | { |
| 1456 | struct sa1100fb_info *fbi; |
Russell King | e9368f8 | 2006-01-09 13:56:42 +0000 | [diff] [blame] | 1457 | int ret, irq; |
| 1458 | |
| 1459 | irq = platform_get_irq(pdev, 0); |
David Vrabel | 4894473 | 2006-01-19 17:56:29 +0000 | [diff] [blame^] | 1460 | if (irq < 0) |
Russell King | e9368f8 | 2006-01-09 13:56:42 +0000 | [diff] [blame] | 1461 | return -EINVAL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1462 | |
| 1463 | if (!request_mem_region(0xb0100000, 0x10000, "LCD")) |
| 1464 | return -EBUSY; |
| 1465 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1466 | fbi = sa1100fb_init_fbinfo(&pdev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1467 | ret = -ENOMEM; |
| 1468 | if (!fbi) |
| 1469 | goto failed; |
| 1470 | |
| 1471 | /* Initialize video memory */ |
| 1472 | ret = sa1100fb_map_video_memory(fbi); |
| 1473 | if (ret) |
| 1474 | goto failed; |
| 1475 | |
Russell King | e9368f8 | 2006-01-09 13:56:42 +0000 | [diff] [blame] | 1476 | ret = request_irq(irq, sa1100fb_handle_irq, SA_INTERRUPT, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1477 | "LCD", fbi); |
| 1478 | if (ret) { |
| 1479 | printk(KERN_ERR "sa1100fb: request_irq failed: %d\n", ret); |
| 1480 | goto failed; |
| 1481 | } |
| 1482 | |
| 1483 | #ifdef ASSABET_PAL_VIDEO |
| 1484 | if (machine_is_assabet()) |
| 1485 | ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); |
| 1486 | #endif |
| 1487 | |
| 1488 | /* |
| 1489 | * This makes sure that our colour bitfield |
| 1490 | * descriptors are correctly initialised. |
| 1491 | */ |
| 1492 | sa1100fb_check_var(&fbi->fb.var, &fbi->fb); |
| 1493 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1494 | platform_set_drvdata(pdev, fbi); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1495 | |
| 1496 | ret = register_framebuffer(&fbi->fb); |
| 1497 | if (ret < 0) |
Russell King | e9368f8 | 2006-01-09 13:56:42 +0000 | [diff] [blame] | 1498 | goto err_free_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1499 | |
| 1500 | #ifdef CONFIG_CPU_FREQ |
| 1501 | fbi->freq_transition.notifier_call = sa1100fb_freq_transition; |
| 1502 | fbi->freq_policy.notifier_call = sa1100fb_freq_policy; |
| 1503 | cpufreq_register_notifier(&fbi->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); |
| 1504 | cpufreq_register_notifier(&fbi->freq_policy, CPUFREQ_POLICY_NOTIFIER); |
| 1505 | #endif |
| 1506 | |
| 1507 | /* This driver cannot be unloaded at the moment */ |
| 1508 | return 0; |
| 1509 | |
Russell King | e9368f8 | 2006-01-09 13:56:42 +0000 | [diff] [blame] | 1510 | err_free_irq: |
| 1511 | free_irq(irq, fbi); |
| 1512 | failed: |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1513 | platform_set_drvdata(pdev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1514 | kfree(fbi); |
| 1515 | release_mem_region(0xb0100000, 0x10000); |
| 1516 | return ret; |
| 1517 | } |
| 1518 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1519 | static struct platform_driver sa1100fb_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1520 | .probe = sa1100fb_probe, |
| 1521 | .suspend = sa1100fb_suspend, |
| 1522 | .resume = sa1100fb_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1523 | .driver = { |
| 1524 | .name = "sa11x0-fb", |
| 1525 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1526 | }; |
| 1527 | |
| 1528 | int __init sa1100fb_init(void) |
| 1529 | { |
| 1530 | if (fb_get_options("sa1100fb", NULL)) |
| 1531 | return -ENODEV; |
| 1532 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1533 | return platform_driver_register(&sa1100fb_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1534 | } |
| 1535 | |
| 1536 | int __init sa1100fb_setup(char *options) |
| 1537 | { |
| 1538 | #if 0 |
| 1539 | char *this_opt; |
| 1540 | |
| 1541 | if (!options || !*options) |
| 1542 | return 0; |
| 1543 | |
| 1544 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 1545 | |
| 1546 | if (!strncmp(this_opt, "bpp:", 4)) |
| 1547 | current_par.max_bpp = |
| 1548 | simple_strtoul(this_opt + 4, NULL, 0); |
| 1549 | |
| 1550 | if (!strncmp(this_opt, "lccr0:", 6)) |
| 1551 | lcd_shadow.lccr0 = |
| 1552 | simple_strtoul(this_opt + 6, NULL, 0); |
| 1553 | if (!strncmp(this_opt, "lccr1:", 6)) { |
| 1554 | lcd_shadow.lccr1 = |
| 1555 | simple_strtoul(this_opt + 6, NULL, 0); |
| 1556 | current_par.max_xres = |
| 1557 | (lcd_shadow.lccr1 & 0x3ff) + 16; |
| 1558 | } |
| 1559 | if (!strncmp(this_opt, "lccr2:", 6)) { |
| 1560 | lcd_shadow.lccr2 = |
| 1561 | simple_strtoul(this_opt + 6, NULL, 0); |
| 1562 | current_par.max_yres = |
| 1563 | (lcd_shadow. |
| 1564 | lccr0 & LCCR0_SDS) ? ((lcd_shadow. |
| 1565 | lccr2 & 0x3ff) + |
| 1566 | 1) * |
| 1567 | 2 : ((lcd_shadow.lccr2 & 0x3ff) + 1); |
| 1568 | } |
| 1569 | if (!strncmp(this_opt, "lccr3:", 6)) |
| 1570 | lcd_shadow.lccr3 = |
| 1571 | simple_strtoul(this_opt + 6, NULL, 0); |
| 1572 | } |
| 1573 | #endif |
| 1574 | return 0; |
| 1575 | } |
| 1576 | |
| 1577 | module_init(sa1100fb_init); |
| 1578 | MODULE_DESCRIPTION("StrongARM-1100/1110 framebuffer driver"); |
| 1579 | MODULE_LICENSE("GPL"); |