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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
Ralf Baechle0004a9d2006-10-31 03:45:07 +00006 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 * Copyright (C) 1996 by Paul M. Antoine
8 * Copyright (C) 1999 Silicon Graphics
9 * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com
10 * Copyright (C) 2000 MIPS Technologies, Inc.
11 */
12#ifndef _ASM_SYSTEM_H
13#define _ASM_SYSTEM_H
14
Ralf Baechlec6771892009-11-24 13:16:02 +000015#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <linux/types.h>
Ralf Baechle192ef362006-07-07 14:07:18 +010017#include <linux/irqflags.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018
19#include <asm/addrspace.h>
Ralf Baechle0004a9d2006-10-31 03:45:07 +000020#include <asm/barrier.h>
Ralf Baechlefef74702007-10-01 04:15:00 +010021#include <asm/cmpxchg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <asm/cpu-features.h>
Ralf Baechlee50c0a82005-05-31 11:49:19 +000023#include <asm/dsp.h>
David Daney2c708cb2008-09-23 00:09:51 -070024#include <asm/watch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/war.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Linus Torvalds1da177e2005-04-16 15:20:36 -070028/*
29 * switch_to(n) should switch tasks to task nr n, first
30 * checking that n isn't the current task, in which case it does nothing.
31 */
32extern asmlinkage void *resume(void *last, void *next, void *next_ti);
33
34struct task_struct;
35
Ralf Baechlef1e39a42009-09-17 02:25:05 +020036extern unsigned int ll_bit;
37extern struct task_struct *ll_task;
38
Ralf Baechlef088fc82006-04-05 09:45:47 +010039#ifdef CONFIG_MIPS_MT_FPAFF
40
41/*
42 * Handle the scheduler resume end of FPU affinity management. We do this
43 * inline to try to keep the overhead down. If we have been forced to run on
44 * a "CPU" with an FPU because of a previous high level of FP computation,
45 * but did not actually use the FPU during the most recent time-slice (CU1
46 * isn't set), we undo the restriction on cpus_allowed.
47 *
48 * We're not calling set_cpus_allowed() here, because we have no need to
49 * force prompt migration - we're already switching the current CPU to a
50 * different thread.
51 */
52
Ralf Baechled223a862007-07-10 17:33:02 +010053#define __mips_mt_fpaff_switch_to(prev) \
Ralf Baechlef088fc82006-04-05 09:45:47 +010054do { \
Ralf Baechle293c5bd2007-07-25 16:19:33 +010055 struct thread_info *__prev_ti = task_thread_info(prev); \
56 \
Ralf Baechlef088fc82006-04-05 09:45:47 +010057 if (cpu_has_fpu && \
Ralf Baechle293c5bd2007-07-25 16:19:33 +010058 test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \
59 (!(KSTK_STATUS(prev) & ST0_CU1))) { \
60 clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \
Ralf Baechlef088fc82006-04-05 09:45:47 +010061 prev->cpus_allowed = prev->thread.user_cpus_allowed; \
62 } \
Ralf Baechlef088fc82006-04-05 09:45:47 +010063 next->thread.emulated_fp = 0; \
Ralf Baechlef088fc82006-04-05 09:45:47 +010064} while(0)
65
66#else
Ralf Baechle35c700c2007-07-10 08:59:17 +010067#define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0)
Ralf Baechled223a862007-07-10 17:33:02 +010068#endif
69
Ralf Baechlef4c6b6b2009-09-17 02:25:05 +020070#define __clear_software_ll_bit() \
71do { \
Ralf Baechle43e6ae62009-09-17 02:25:05 +020072 if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \
73 ll_bit = 0; \
Ralf Baechlef4c6b6b2009-09-17 02:25:05 +020074} while (0)
Ralf Baechlef4c6b6b2009-09-17 02:25:05 +020075
Ralf Baechle21a151d2007-10-11 23:46:15 +010076#define switch_to(prev, next, last) \
Ralf Baechlee50c0a82005-05-31 11:49:19 +000077do { \
Ralf Baechled223a862007-07-10 17:33:02 +010078 __mips_mt_fpaff_switch_to(prev); \
Ralf Baechlee50c0a82005-05-31 11:49:19 +000079 if (cpu_has_dsp) \
80 __save_dsp(prev); \
Ralf Baechlef4c6b6b2009-09-17 02:25:05 +020081 __clear_software_ll_bit(); \
Al Viro40bc9c62006-01-12 01:06:07 -080082 (last) = resume(prev, next, task_thread_info(next)); \
Ralf Baechle07500b02007-10-30 17:25:26 +000083} while (0)
84
85#define finish_arch_switch(prev) \
86do { \
Ralf Baechlee50c0a82005-05-31 11:49:19 +000087 if (cpu_has_dsp) \
88 __restore_dsp(current); \
Ralf Baechlea3692022007-07-10 17:33:02 +010089 if (cpu_has_userlocal) \
Ralf Baechle07500b02007-10-30 17:25:26 +000090 write_c0_userlocal(current_thread_info()->tp_value); \
David Daney2c708cb2008-09-23 00:09:51 -070091 __restore_watch(); \
Ralf Baechle07500b02007-10-30 17:25:26 +000092} while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
Linus Torvalds1da177e2005-04-16 15:20:36 -070094static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
95{
96 __u32 retval;
97
David Daneyf252ffd2010-01-08 17:17:43 -080098 smp_mb__before_llsc();
99
David Daneyb791d112009-07-13 11:15:19 -0700100 if (kernel_uses_llsc && R10000_LLSC_WAR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 unsigned long dummy;
102
103 __asm__ __volatile__(
Maciej W. Rozyckic4559f62005-06-23 15:57:15 +0000104 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 "1: ll %0, %3 # xchg_u32 \n"
Ralf Baechle72224242005-06-29 13:35:19 +0000106 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107 " move %2, %z4 \n"
Ralf Baechle72224242005-06-29 13:35:19 +0000108 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109 " sc %2, %1 \n"
110 " beqzl %2, 1b \n"
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000111 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
113 : "R" (*m), "Jr" (val)
114 : "memory");
David Daneyb791d112009-07-13 11:15:19 -0700115 } else if (kernel_uses_llsc) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 unsigned long dummy;
117
118 __asm__ __volatile__(
Maciej W. Rozyckic4559f62005-06-23 15:57:15 +0000119 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120 "1: ll %0, %3 # xchg_u32 \n"
Ralf Baechle72224242005-06-29 13:35:19 +0000121 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122 " move %2, %z4 \n"
Ralf Baechle72224242005-06-29 13:35:19 +0000123 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124 " sc %2, %1 \n"
Ralf Baechlef65e4fa2006-09-28 01:45:21 +0100125 " beqz %2, 2f \n"
126 " .subsection 2 \n"
127 "2: b 1b \n"
128 " .previous \n"
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000129 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
131 : "R" (*m), "Jr" (val)
132 : "memory");
133 } else {
134 unsigned long flags;
135
Ralf Baechle49edd092007-03-16 16:10:36 +0000136 raw_local_irq_save(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 retval = *m;
138 *m = val;
Ralf Baechle49edd092007-03-16 16:10:36 +0000139 raw_local_irq_restore(flags); /* implies memory barrier */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140 }
141
Ralf Baechle17099b12007-07-14 13:24:05 +0100142 smp_llsc_mb();
Ralf Baechle0004a9d2006-10-31 03:45:07 +0000143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 return retval;
145}
146
Ralf Baechle875d43e2005-09-03 15:56:16 -0700147#ifdef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
149{
150 __u64 retval;
151
David Daneyf252ffd2010-01-08 17:17:43 -0800152 smp_mb__before_llsc();
153
David Daneyb791d112009-07-13 11:15:19 -0700154 if (kernel_uses_llsc && R10000_LLSC_WAR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 unsigned long dummy;
156
157 __asm__ __volatile__(
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000158 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700159 "1: lld %0, %3 # xchg_u64 \n"
160 " move %2, %z4 \n"
161 " scd %2, %1 \n"
162 " beqzl %2, 1b \n"
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000163 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700164 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
165 : "R" (*m), "Jr" (val)
166 : "memory");
David Daneyb791d112009-07-13 11:15:19 -0700167 } else if (kernel_uses_llsc) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 unsigned long dummy;
169
170 __asm__ __volatile__(
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000171 " .set mips3 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 "1: lld %0, %3 # xchg_u64 \n"
173 " move %2, %z4 \n"
174 " scd %2, %1 \n"
Ralf Baechlef65e4fa2006-09-28 01:45:21 +0100175 " beqz %2, 2f \n"
176 " .subsection 2 \n"
177 "2: b 1b \n"
178 " .previous \n"
Maciej W. Rozyckiaac8aa72005-06-14 17:35:03 +0000179 " .set mips0 \n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 : "=&r" (retval), "=m" (*m), "=&r" (dummy)
181 : "R" (*m), "Jr" (val)
182 : "memory");
183 } else {
184 unsigned long flags;
185
Ralf Baechle49edd092007-03-16 16:10:36 +0000186 raw_local_irq_save(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 retval = *m;
188 *m = val;
Ralf Baechle49edd092007-03-16 16:10:36 +0000189 raw_local_irq_restore(flags); /* implies memory barrier */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190 }
191
Ralf Baechle17099b12007-07-14 13:24:05 +0100192 smp_llsc_mb();
Ralf Baechle0004a9d2006-10-31 03:45:07 +0000193
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194 return retval;
195}
196#else
197extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val);
198#define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels
199#endif
200
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
202{
203 switch (size) {
Ralf Baechle0cea0432006-03-03 09:42:05 +0000204 case 4:
205 return __xchg_u32(ptr, x);
206 case 8:
207 return __xchg_u64(ptr, x);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 }
Ralf Baechlec6771892009-11-24 13:16:02 +0000209
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 return x;
211}
212
Ralf Baechlec6771892009-11-24 13:16:02 +0000213#define xchg(ptr, x) \
214({ \
215 BUILD_BUG_ON(sizeof(*(ptr)) & ~0xc); \
216 \
217 ((__typeof__(*(ptr))) \
218 __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))); \
219})
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100221extern void set_handler(unsigned long offset, void *addr, unsigned long len);
222extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len);
Ralf Baechleef300e42007-05-06 18:31:18 +0100223
224typedef void (*vi_handler_t)(void);
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100225extern void *set_vi_handler(int n, vi_handler_t addr);
Ralf Baechleef300e42007-05-06 18:31:18 +0100226
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227extern void *set_except_vector(int n, void *addr);
Ralf Baechle91b05e62006-03-29 18:53:00 +0100228extern unsigned long ebase;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229extern void per_cpu_trap_init(void);
230
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231/*
Nick Piggin4866cde2005-06-25 14:57:23 -0700232 * See include/asm-ia64/system.h; prevents deadlock on SMP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 * systems.
234 */
Nick Piggin4866cde2005-06-25 14:57:23 -0700235#define __ARCH_WANT_UNLOCKED_CTXSW
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236
Franck Bui-Huu94109102007-07-19 14:04:21 +0200237extern unsigned long arch_align_stack(unsigned long sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238
239#endif /* _ASM_SYSTEM_H */