blob: 5e6b08ff6f6701e158aa94241cabe3681024d520 [file] [log] [blame]
Stefan Roesea62f48d2007-10-11 22:08:27 +10001/*
2 * Device Tree Source for AMCC Kilauea (405EX)
3 *
4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
David Gibson71f34972008-05-15 16:46:39 +100011/dts-v1/;
12
Stefan Roesea62f48d2007-10-11 22:08:27 +100013/ {
14 #address-cells = <1>;
15 #size-cells = <1>;
16 model = "amcc,kilauea";
17 compatible = "amcc,kilauea";
David Gibson71f34972008-05-15 16:46:39 +100018 dcr-parent = <&{/cpus/cpu@0}>;
Stefan Roesea62f48d2007-10-11 22:08:27 +100019
Stefan Roese8aaed982007-12-15 18:55:16 +110020 aliases {
21 ethernet0 = &EMAC0;
22 ethernet1 = &EMAC1;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
26
Stefan Roesea62f48d2007-10-11 22:08:27 +100027 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
Josh Boyer72fda112007-12-06 13:20:05 -060031 cpu@0 {
Stefan Roesea62f48d2007-10-11 22:08:27 +100032 device_type = "cpu";
Josh Boyer72fda112007-12-06 13:20:05 -060033 model = "PowerPC,405EX";
David Gibson71f34972008-05-15 16:46:39 +100034 reg = <0x00000000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +100035 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
David Gibson71f34972008-05-15 16:46:39 +100037 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <16384>; /* 16 kB */
40 d-cache-size = <16384>; /* 16 kB */
Stefan Roesea62f48d2007-10-11 22:08:27 +100041 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
45
46 memory {
47 device_type = "memory";
David Gibson71f34972008-05-15 16:46:39 +100048 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
Stefan Roesea62f48d2007-10-11 22:08:27 +100049 };
50
51 UIC0: interrupt-controller {
52 compatible = "ibm,uic-405ex", "ibm,uic";
53 interrupt-controller;
54 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +100055 dcr-reg = <0x0c0 0x009>;
Stefan Roesea62f48d2007-10-11 22:08:27 +100056 #address-cells = <0>;
57 #size-cells = <0>;
58 #interrupt-cells = <2>;
59 };
60
61 UIC1: interrupt-controller1 {
62 compatible = "ibm,uic-405ex","ibm,uic";
63 interrupt-controller;
64 cell-index = <1>;
David Gibson71f34972008-05-15 16:46:39 +100065 dcr-reg = <0x0d0 0x009>;
Stefan Roesea62f48d2007-10-11 22:08:27 +100066 #address-cells = <0>;
67 #size-cells = <0>;
68 #interrupt-cells = <2>;
David Gibson71f34972008-05-15 16:46:39 +100069 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
Stefan Roesea62f48d2007-10-11 22:08:27 +100070 interrupt-parent = <&UIC0>;
71 };
72
73 UIC2: interrupt-controller2 {
74 compatible = "ibm,uic-405ex","ibm,uic";
75 interrupt-controller;
76 cell-index = <2>;
David Gibson71f34972008-05-15 16:46:39 +100077 dcr-reg = <0x0e0 0x009>;
Stefan Roesea62f48d2007-10-11 22:08:27 +100078 #address-cells = <0>;
79 #size-cells = <0>;
80 #interrupt-cells = <2>;
David Gibson71f34972008-05-15 16:46:39 +100081 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
Stefan Roesea62f48d2007-10-11 22:08:27 +100082 interrupt-parent = <&UIC0>;
83 };
84
85 plb {
86 compatible = "ibm,plb-405ex", "ibm,plb4";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges;
90 clock-frequency = <0>; /* Filled in by U-Boot */
91
92 SDRAM0: memory-controller {
Grant Erickson94ce1c52008-12-18 12:34:05 +000093 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
David Gibson71f34972008-05-15 16:46:39 +100094 dcr-reg = <0x010 0x002>;
Grant Erickson94ce1c52008-12-18 12:34:05 +000095 interrupt-parent = <&UIC2>;
96 interrupts = <0x5 0x4 /* ECC DED Error */
97 0x6 0x4>; /* ECC SEC Error */
Stefan Roesea62f48d2007-10-11 22:08:27 +100098 };
99
James Hsiao049359d2009-02-05 16:18:13 +1100100 CRYPTO: crypto@ef700000 {
101 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
102 reg = <0xef700000 0x80400>;
103 interrupt-parent = <&UIC0>;
104 interrupts = <0x17 0x2>;
105 };
106
Stefan Roesea62f48d2007-10-11 22:08:27 +1000107 MAL0: mcmal {
108 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
David Gibson71f34972008-05-15 16:46:39 +1000109 dcr-reg = <0x180 0x062>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000110 num-tx-chans = <2>;
111 num-rx-chans = <2>;
112 interrupt-parent = <&MAL0>;
David Gibson71f34972008-05-15 16:46:39 +1000113 interrupts = <0x0 0x1 0x2 0x3 0x4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000114 #interrupt-cells = <1>;
115 #address-cells = <0>;
116 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000117 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
118 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
119 /*SERR*/ 0x2 &UIC1 0x0 0x4
120 /*TXDE*/ 0x3 &UIC1 0x1 0x4
121 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
122 interrupt-map-mask = <0xffffffff>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000123 };
124
125 POB0: opb {
126 compatible = "ibm,opb-405ex", "ibm,opb";
127 #address-cells = <1>;
128 #size-cells = <1>;
David Gibson71f34972008-05-15 16:46:39 +1000129 ranges = <0x80000000 0x80000000 0x10000000
130 0xef600000 0xef600000 0x00a00000
131 0xf0000000 0xf0000000 0x10000000>;
132 dcr-reg = <0x0a0 0x005>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000133 clock-frequency = <0>; /* Filled in by U-Boot */
134
135 EBC0: ebc {
136 compatible = "ibm,ebc-405ex", "ibm,ebc";
David Gibson71f34972008-05-15 16:46:39 +1000137 dcr-reg = <0x012 0x002>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000138 #address-cells = <2>;
139 #size-cells = <1>;
140 clock-frequency = <0>; /* Filled in by U-Boot */
141 /* ranges property is supplied by U-Boot */
David Gibson71f34972008-05-15 16:46:39 +1000142 interrupts = <0x5 0x1>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000143 interrupt-parent = <&UIC1>;
144
145 nor_flash@0,0 {
146 compatible = "amd,s29gl512n", "cfi-flash";
147 bank-width = <2>;
David Gibson71f34972008-05-15 16:46:39 +1000148 reg = <0x00000000 0x00000000 0x04000000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000149 #address-cells = <1>;
150 #size-cells = <1>;
151 partition@0 {
152 label = "kernel";
David Gibson71f34972008-05-15 16:46:39 +1000153 reg = <0x00000000 0x00200000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000154 };
155 partition@200000 {
156 label = "root";
David Gibson71f34972008-05-15 16:46:39 +1000157 reg = <0x00200000 0x00200000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000158 };
159 partition@400000 {
160 label = "user";
David Gibson71f34972008-05-15 16:46:39 +1000161 reg = <0x00400000 0x03b60000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000162 };
163 partition@3f60000 {
164 label = "env";
David Gibson71f34972008-05-15 16:46:39 +1000165 reg = <0x03f60000 0x00040000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000166 };
167 partition@3fa0000 {
168 label = "u-boot";
David Gibson71f34972008-05-15 16:46:39 +1000169 reg = <0x03fa0000 0x00060000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000170 };
171 };
172 };
173
174 UART0: serial@ef600200 {
175 device_type = "serial";
176 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000177 reg = <0xef600200 0x00000008>;
178 virtual-reg = <0xef600200>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000179 clock-frequency = <0>; /* Filled in by U-Boot */
180 current-speed = <0>;
181 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000182 interrupts = <0x1a 0x4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000183 };
184
185 UART1: serial@ef600300 {
186 device_type = "serial";
187 compatible = "ns16550";
David Gibson71f34972008-05-15 16:46:39 +1000188 reg = <0xef600300 0x00000008>;
189 virtual-reg = <0xef600300>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000190 clock-frequency = <0>; /* Filled in by U-Boot */
191 current-speed = <0>;
192 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000193 interrupts = <0x1 0x4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000194 };
195
196 IIC0: i2c@ef600400 {
Stefan Roesea62f48d2007-10-11 22:08:27 +1000197 compatible = "ibm,iic-405ex", "ibm,iic";
David Gibson71f34972008-05-15 16:46:39 +1000198 reg = <0xef600400 0x00000014>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000199 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000200 interrupts = <0x2 0x4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000201 };
202
203 IIC1: i2c@ef600500 {
Stefan Roesea62f48d2007-10-11 22:08:27 +1000204 compatible = "ibm,iic-405ex", "ibm,iic";
David Gibson71f34972008-05-15 16:46:39 +1000205 reg = <0xef600500 0x00000014>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000206 interrupt-parent = <&UIC0>;
David Gibson71f34972008-05-15 16:46:39 +1000207 interrupts = <0x7 0x4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000208 };
209
210
211 RGMII0: emac-rgmii@ef600b00 {
Stefan Roesea62f48d2007-10-11 22:08:27 +1000212 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000213 reg = <0xef600b00 0x00000104>;
Stefan Roese0a6ea8b2007-12-01 21:25:00 +1100214 has-mdio;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000215 };
216
217 EMAC0: ethernet@ef600900 {
David Gibson71f34972008-05-15 16:46:39 +1000218 linux,network-index = <0x0>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000219 device_type = "network";
Grant Erickson05781cc2008-07-08 08:03:11 +1000220 compatible = "ibm,emac-405ex", "ibm,emac4sync";
Stefan Roesea62f48d2007-10-11 22:08:27 +1000221 interrupt-parent = <&EMAC0>;
David Gibson71f34972008-05-15 16:46:39 +1000222 interrupts = <0x0 0x1>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000223 #interrupt-cells = <1>;
224 #address-cells = <0>;
225 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000226 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
227 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
Grant Erickson05781cc2008-07-08 08:03:11 +1000228 reg = <0xef600900 0x000000c4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000229 local-mac-address = [000000000000]; /* Filled in by U-Boot */
230 mal-device = <&MAL0>;
231 mal-tx-channel = <0>;
232 mal-rx-channel = <0>;
233 cell-index = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000234 max-frame-size = <9000>;
235 rx-fifo-size = <4096>;
236 tx-fifo-size = <2048>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000237 phy-mode = "rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000238 phy-map = <0x00000000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000239 rgmii-device = <&RGMII0>;
240 rgmii-channel = <0>;
Stefan Roese0a6ea8b2007-12-01 21:25:00 +1100241 has-inverted-stacr-oc;
242 has-new-stacr-staopc;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000243 };
244
245 EMAC1: ethernet@ef600a00 {
David Gibson71f34972008-05-15 16:46:39 +1000246 linux,network-index = <0x1>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000247 device_type = "network";
Grant Erickson05781cc2008-07-08 08:03:11 +1000248 compatible = "ibm,emac-405ex", "ibm,emac4sync";
Stefan Roesea62f48d2007-10-11 22:08:27 +1000249 interrupt-parent = <&EMAC1>;
David Gibson71f34972008-05-15 16:46:39 +1000250 interrupts = <0x0 0x1>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000251 #interrupt-cells = <1>;
252 #address-cells = <0>;
253 #size-cells = <0>;
David Gibson71f34972008-05-15 16:46:39 +1000254 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
255 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
Grant Erickson05781cc2008-07-08 08:03:11 +1000256 reg = <0xef600a00 0x000000c4>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000257 local-mac-address = [000000000000]; /* Filled in by U-Boot */
258 mal-device = <&MAL0>;
259 mal-tx-channel = <1>;
260 mal-rx-channel = <1>;
261 cell-index = <1>;
David Gibson71f34972008-05-15 16:46:39 +1000262 max-frame-size = <9000>;
263 rx-fifo-size = <4096>;
264 tx-fifo-size = <2048>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000265 phy-mode = "rgmii";
David Gibson71f34972008-05-15 16:46:39 +1000266 phy-map = <0x00000000>;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000267 rgmii-device = <&RGMII0>;
268 rgmii-channel = <1>;
Stefan Roese0a6ea8b2007-12-01 21:25:00 +1100269 has-inverted-stacr-oc;
270 has-new-stacr-staopc;
Stefan Roesea62f48d2007-10-11 22:08:27 +1000271 };
272 };
Stefan Roese151161c2007-12-07 20:34:26 +1100273
274 PCIE0: pciex@0a0000000 {
275 device_type = "pci";
276 #interrupt-cells = <1>;
277 #size-cells = <2>;
278 #address-cells = <3>;
279 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
280 primary;
David Gibson71f34972008-05-15 16:46:39 +1000281 port = <0x0>; /* port number */
282 reg = <0xa0000000 0x20000000 /* Config space access */
283 0xef000000 0x00001000>; /* Registers */
284 dcr-reg = <0x040 0x020>;
285 sdr-base = <0x400>;
Stefan Roese151161c2007-12-07 20:34:26 +1100286
287 /* Outbound ranges, one memory and one IO,
288 * later cannot be changed
289 */
David Gibson71f34972008-05-15 16:46:39 +1000290 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
291 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
Stefan Roese151161c2007-12-07 20:34:26 +1100292
293 /* Inbound 2GB range starting at 0 */
David Gibson71f34972008-05-15 16:46:39 +1000294 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
Stefan Roese151161c2007-12-07 20:34:26 +1100295
Stefan Roesedc884162007-12-15 19:10:56 +1100296 /* This drives busses 0x00 to 0x3f */
David Gibson71f34972008-05-15 16:46:39 +1000297 bus-range = <0x0 0x3f>;
Stefan Roese151161c2007-12-07 20:34:26 +1100298
299 /* Legacy interrupts (note the weird polarity, the bridge seems
300 * to invert PCIe legacy interrupts).
301 * We are de-swizzling here because the numbers are actually for
302 * port of the root complex virtual P2P bridge. But I want
303 * to avoid putting a node for it in the tree, so the numbers
304 * below are basically de-swizzled numbers.
305 * The real slot is on idsel 0, so the swizzling is 1:1
306 */
David Gibson71f34972008-05-15 16:46:39 +1000307 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
Stefan Roese151161c2007-12-07 20:34:26 +1100308 interrupt-map = <
David Gibson71f34972008-05-15 16:46:39 +1000309 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
310 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
311 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
312 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
Stefan Roese151161c2007-12-07 20:34:26 +1100313 };
314
315 PCIE1: pciex@0c0000000 {
316 device_type = "pci";
317 #interrupt-cells = <1>;
318 #size-cells = <2>;
319 #address-cells = <3>;
320 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
321 primary;
David Gibson71f34972008-05-15 16:46:39 +1000322 port = <0x1>; /* port number */
323 reg = <0xc0000000 0x20000000 /* Config space access */
324 0xef001000 0x00001000>; /* Registers */
325 dcr-reg = <0x060 0x020>;
326 sdr-base = <0x440>;
Stefan Roese151161c2007-12-07 20:34:26 +1100327
328 /* Outbound ranges, one memory and one IO,
329 * later cannot be changed
330 */
David Gibson71f34972008-05-15 16:46:39 +1000331 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
332 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
Stefan Roese151161c2007-12-07 20:34:26 +1100333
334 /* Inbound 2GB range starting at 0 */
David Gibson71f34972008-05-15 16:46:39 +1000335 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
Stefan Roese151161c2007-12-07 20:34:26 +1100336
Stefan Roesedc884162007-12-15 19:10:56 +1100337 /* This drives busses 0x40 to 0x7f */
David Gibson71f34972008-05-15 16:46:39 +1000338 bus-range = <0x40 0x7f>;
Stefan Roese151161c2007-12-07 20:34:26 +1100339
340 /* Legacy interrupts (note the weird polarity, the bridge seems
341 * to invert PCIe legacy interrupts).
342 * We are de-swizzling here because the numbers are actually for
343 * port of the root complex virtual P2P bridge. But I want
344 * to avoid putting a node for it in the tree, so the numbers
345 * below are basically de-swizzled numbers.
346 * The real slot is on idsel 0, so the swizzling is 1:1
347 */
David Gibson71f34972008-05-15 16:46:39 +1000348 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
Stefan Roese151161c2007-12-07 20:34:26 +1100349 interrupt-map = <
David Gibson71f34972008-05-15 16:46:39 +1000350 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
351 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
352 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
353 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
Stefan Roese151161c2007-12-07 20:34:26 +1100354 };
Stefan Roesea62f48d2007-10-11 22:08:27 +1000355 };
356};