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Sam Ravnborgf5e706a2008-07-17 21:55:51 -07001/* smp.h: Sparc specific SMP stuff.
2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
5
6#ifndef _SPARC_SMP_H
7#define _SPARC_SMP_H
8
9#include <linux/threads.h>
10#include <asm/head.h>
11#include <asm/btfixup.h>
12
13#ifndef __ASSEMBLY__
14
15#include <linux/cpumask.h>
16
17#endif /* __ASSEMBLY__ */
18
19#ifdef CONFIG_SMP
20
21#ifndef __ASSEMBLY__
22
23#include <asm/ptrace.h>
24#include <asm/asi.h>
25#include <asm/atomic.h>
26
27/*
28 * Private routines/data
29 */
30
31extern unsigned char boot_cpu_id;
Sam Ravnborgb7afdb72011-01-28 22:08:18 +000032extern volatile unsigned long cpu_callin_map[NR_CPUS];
33extern cpumask_t smp_commenced_mask;
34extern struct linux_prom_registers smp_penguin_ctable;
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070035
36typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
37 unsigned long, unsigned long);
38
Sam Ravnborgb7afdb72011-01-28 22:08:18 +000039void cpu_panic(void);
40extern void smp4m_irq_rotate(int cpu);
41
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070042/*
43 * General functions that each host system must provide.
44 */
45
46void sun4m_init_smp(void);
47void sun4d_init_smp(void);
48
49void smp_callin(void);
50void smp_boot_cpus(void);
51void smp_store_cpu_info(int);
52
53struct seq_file;
54void smp_bogo(struct seq_file *);
55void smp_info(struct seq_file *);
56
David S. Miller66e4f8c2008-08-27 20:03:22 -070057BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, cpumask_t, unsigned long, unsigned long, unsigned long, unsigned long)
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070058BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void)
59BTFIXUPDEF_BLACKBOX(hard_smp_processor_id)
60BTFIXUPDEF_BLACKBOX(load_current)
61
David S. Miller66e4f8c2008-08-27 20:03:22 -070062#define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070063
David S. Miller66e4f8c2008-08-27 20:03:22 -070064static inline void xc0(smpfunc_t func) { smp_cross_call(func, cpu_online_map, 0, 0, 0, 0); }
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070065static inline void xc1(smpfunc_t func, unsigned long arg1)
David S. Miller66e4f8c2008-08-27 20:03:22 -070066{ smp_cross_call(func, cpu_online_map, arg1, 0, 0, 0); }
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070067static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2)
David S. Miller66e4f8c2008-08-27 20:03:22 -070068{ smp_cross_call(func, cpu_online_map, arg1, arg2, 0, 0); }
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070069static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2,
70 unsigned long arg3)
David S. Miller66e4f8c2008-08-27 20:03:22 -070071{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, 0); }
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070072static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2,
73 unsigned long arg3, unsigned long arg4)
David S. Miller66e4f8c2008-08-27 20:03:22 -070074{ smp_cross_call(func, cpu_online_map, arg1, arg2, arg3, arg4); }
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070075
76static inline int smp_call_function(void (*func)(void *info), void *info, int wait)
77{
78 xc1((smpfunc_t)func, (unsigned long)info);
79 return 0;
80}
81
David S. Miller66e4f8c2008-08-27 20:03:22 -070082static inline int smp_call_function_single(int cpuid, void (*func) (void *info),
83 void *info, int wait)
84{
85 smp_cross_call((smpfunc_t)func, cpumask_of_cpu(cpuid),
86 (unsigned long) info, 0, 0, 0);
87 return 0;
88}
89
Sam Ravnborgf5e706a2008-07-17 21:55:51 -070090static inline int cpu_logical_map(int cpu)
91{
92 return cpu;
93}
94
95static inline int hard_smp4m_processor_id(void)
96{
97 int cpuid;
98
99 __asm__ __volatile__("rd %%tbr, %0\n\t"
100 "srl %0, 12, %0\n\t"
101 "and %0, 3, %0\n\t" :
102 "=&r" (cpuid));
103 return cpuid;
104}
105
106static inline int hard_smp4d_processor_id(void)
107{
108 int cpuid;
109
110 __asm__ __volatile__("lda [%%g0] %1, %0\n\t" :
111 "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1));
112 return cpuid;
113}
114
Konrad Eisele84017072009-08-31 22:08:13 +0000115extern inline int hard_smpleon_processor_id(void)
116{
117 int cpuid;
118 __asm__ __volatile__("rd %%asr17,%0\n\t"
119 "srl %0,28,%0" :
120 "=&r" (cpuid) : );
121 return cpuid;
122}
123
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700124#ifndef MODULE
125static inline int hard_smp_processor_id(void)
126{
127 int cpuid;
128
129 /* Black box - sun4m
130 __asm__ __volatile__("rd %%tbr, %0\n\t"
131 "srl %0, 12, %0\n\t"
132 "and %0, 3, %0\n\t" :
133 "=&r" (cpuid));
134 - sun4d
135 __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
136 "nop; nop" :
137 "=&r" (cpuid));
Daniel Hellstrom5149bed2011-04-25 21:43:48 +0000138 - leon
139 __asm__ __volatile__( "rd %asr17, %0\n\t"
140 "srl %0, 0x1c, %0\n\t"
141 "nop\n\t" :
142 "=&r" (cpuid));
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700143 See btfixup.h and btfixupprep.c to understand how a blackbox works.
144 */
145 __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
146 "sethi %%hi(boot_cpu_id), %0\n\t"
147 "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
148 "=&r" (cpuid));
149 return cpuid;
150}
151#else
152static inline int hard_smp_processor_id(void)
153{
154 int cpuid;
155
156 __asm__ __volatile__("mov %%o7, %%g1\n\t"
157 "call ___f___hard_smp_processor_id\n\t"
158 " nop\n\t"
159 "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2");
160 return cpuid;
161}
162#endif
163
164#define raw_smp_processor_id() (current_thread_info()->cpu)
165
166#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
167#define prof_counter(__cpu) cpu_data(__cpu).counter
168
169void smp_setup_cpu_possible_map(void);
170
171#endif /* !(__ASSEMBLY__) */
172
173/* Sparc specific messages. */
174#define MSG_CROSS_CALL 0x0005 /* run func on cpus */
175
176/* Empirical PROM processor mailbox constants. If the per-cpu mailbox
177 * contains something other than one of these then the ipi is from
178 * Linux's active_kernel_processor. This facility exists so that
179 * the boot monitor can capture all the other cpus when one catches
180 * a watchdog reset or the user enters the monitor using L1-A keys.
181 */
182#define MBOX_STOPCPU 0xFB
183#define MBOX_IDLECPU 0xFC
184#define MBOX_IDLECPU2 0xFD
185#define MBOX_STOPCPU2 0xFE
186
187#else /* SMP */
188
189#define hard_smp_processor_id() 0
190#define smp_setup_cpu_possible_map() do { } while (0)
191
192#endif /* !(SMP) */
Sam Ravnborgf5e706a2008-07-17 21:55:51 -0700193#endif /* !(_SPARC_SMP_H) */