blob: 7d8a3acb9441f785cd9df284577a85dafee862fa [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Machine specific setup for generic
3 */
4
5#include <linux/config.h>
6#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007#include <linux/interrupt.h>
8#include <asm/acpi.h>
9#include <asm/arch_hooks.h>
10
11void __init pre_intr_init_hook(void)
12{
13 init_ISA_irqs();
14}
15
16/*
17 * IRQ2 is cascade interrupt to second interrupt controller
18 */
19static struct irqaction irq2 = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL};
20
21void __init intr_init_hook(void)
22{
23#ifdef CONFIG_SMP
24 smp_intr_init();
25#endif
26
27 if (!acpi_ioapic)
28 setup_irq(2, &irq2);
29}
30
31void __init pre_setup_arch_hook(void)
32{
33 /* Voyagers run their CPUs from independent clocks, so disable
34 * the TSC code because we can't sync them */
35 tsc_disable = 1;
36}
37
38void __init trap_init_hook(void)
39{
40}
41
42static struct irqaction irq0 = { timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL};
43
44void __init time_init_hook(void)
45{
46 setup_irq(0, &irq0);
47}