blob: ce34fff605ad2284980b6ad301fb24e673ec967b [file] [log] [blame]
Kalle Valobdcd8172011-07-18 00:22:30 +03001
2/*
3 * Copyright (c) 2011 Atheros Communications Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Stephen Rothwellc6efe572011-09-28 18:32:34 +100018#include <linux/moduleparam.h>
Sam Leffler92ecbff2011-09-07 10:55:16 +030019#include <linux/of.h>
Kalle Valobdcd8172011-07-18 00:22:30 +030020#include <linux/mmc/sdio_func.h>
21#include "core.h"
22#include "cfg80211.h"
23#include "target.h"
24#include "debug.h"
25#include "hif-ops.h"
26
27unsigned int debug_mask;
Kalle Valo003353b2011-09-01 10:14:21 +030028static unsigned int testmode;
Kalle Valobdcd8172011-07-18 00:22:30 +030029
30module_param(debug_mask, uint, 0644);
Kalle Valo003353b2011-09-01 10:14:21 +030031module_param(testmode, uint, 0644);
Kalle Valobdcd8172011-07-18 00:22:30 +030032
33/*
34 * Include definitions here that can be used to tune the WLAN module
35 * behavior. Different customers can tune the behavior as per their needs,
36 * here.
37 */
38
39/*
40 * This configuration item enable/disable keepalive support.
41 * Keepalive support: In the absence of any data traffic to AP, null
42 * frames will be sent to the AP at periodic interval, to keep the association
43 * active. This configuration item defines the periodic interval.
44 * Use value of zero to disable keepalive support
45 * Default: 60 seconds
46 */
47#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
48
49/*
50 * This configuration item sets the value of disconnect timeout
51 * Firmware delays sending the disconnec event to the host for this
52 * timeout after is gets disconnected from the current AP.
53 * If the firmware successly roams within the disconnect timeout
54 * it sends a new connect event
55 */
56#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
57
58#define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
59
Kalle Valobdcd8172011-07-18 00:22:30 +030060#define ATH6KL_DATA_OFFSET 64
61struct sk_buff *ath6kl_buf_alloc(int size)
62{
63 struct sk_buff *skb;
64 u16 reserved;
65
66 /* Add chacheline space at front and back of buffer */
67 reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
Vasanthakumar Thiagarajan1df94a82011-08-17 18:45:10 +053068 sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
Kalle Valobdcd8172011-07-18 00:22:30 +030069 skb = dev_alloc_skb(size + reserved);
70
71 if (skb)
72 skb_reserve(skb, reserved - L1_CACHE_BYTES);
73 return skb;
74}
75
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +053076void ath6kl_init_profile_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +030077{
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +053078 vif->ssid_len = 0;
79 memset(vif->ssid, 0, sizeof(vif->ssid));
80
81 vif->dot11_auth_mode = OPEN_AUTH;
82 vif->auth_mode = NONE_AUTH;
83 vif->prwise_crypto = NONE_CRYPT;
84 vif->prwise_crypto_len = 0;
85 vif->grp_crypto = NONE_CRYPT;
86 vif->grp_crypto_len = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +053087 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajan8c8b65e2011-10-25 19:34:04 +053088 memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
89 memset(vif->bssid, 0, sizeof(vif->bssid));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +053090 vif->bss_ch = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +030091}
92
Kalle Valobdcd8172011-07-18 00:22:30 +030093static int ath6kl_set_host_app_area(struct ath6kl *ar)
94{
95 u32 address, data;
96 struct host_app_area host_app_area;
97
98 /* Fetch the address of the host_app_area_s
99 * instance in the host interest area */
100 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
Kevin Fang31024d92011-07-11 17:14:13 +0800101 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300102
Kalle Valoaddb44b2011-09-02 10:32:05 +0300103 if (ath6kl_diag_read32(ar, address, &data))
Kalle Valobdcd8172011-07-18 00:22:30 +0300104 return -EIO;
105
Kevin Fang31024d92011-07-11 17:14:13 +0800106 address = TARG_VTOP(ar->target_type, data);
Kalle Valocbf49a62011-10-05 12:23:17 +0300107 host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
Kalle Valoaddb44b2011-09-02 10:32:05 +0300108 if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
109 sizeof(struct host_app_area)))
Kalle Valobdcd8172011-07-18 00:22:30 +0300110 return -EIO;
111
112 return 0;
113}
114
115static inline void set_ac2_ep_map(struct ath6kl *ar,
116 u8 ac,
117 enum htc_endpoint_id ep)
118{
119 ar->ac2ep_map[ac] = ep;
120 ar->ep2ac_map[ep] = ac;
121}
122
123/* connect to a service */
124static int ath6kl_connectservice(struct ath6kl *ar,
125 struct htc_service_connect_req *con_req,
126 char *desc)
127{
128 int status;
129 struct htc_service_connect_resp response;
130
131 memset(&response, 0, sizeof(response));
132
Kalle Vaload226ec2011-08-10 09:49:12 +0300133 status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
Kalle Valobdcd8172011-07-18 00:22:30 +0300134 if (status) {
135 ath6kl_err("failed to connect to %s service status:%d\n",
136 desc, status);
137 return status;
138 }
139
140 switch (con_req->svc_id) {
141 case WMI_CONTROL_SVC:
142 if (test_bit(WMI_ENABLED, &ar->flag))
143 ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
144 ar->ctrl_ep = response.endpoint;
145 break;
146 case WMI_DATA_BE_SVC:
147 set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
148 break;
149 case WMI_DATA_BK_SVC:
150 set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
151 break;
152 case WMI_DATA_VI_SVC:
153 set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
154 break;
155 case WMI_DATA_VO_SVC:
156 set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
157 break;
158 default:
159 ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
160 return -EINVAL;
161 }
162
163 return 0;
164}
165
166static int ath6kl_init_service_ep(struct ath6kl *ar)
167{
168 struct htc_service_connect_req connect;
169
170 memset(&connect, 0, sizeof(connect));
171
172 /* these fields are the same for all service endpoints */
173 connect.ep_cb.rx = ath6kl_rx;
174 connect.ep_cb.rx_refill = ath6kl_rx_refill;
175 connect.ep_cb.tx_full = ath6kl_tx_queue_full;
176
177 /*
178 * Set the max queue depth so that our ath6kl_tx_queue_full handler
179 * gets called.
180 */
181 connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
182 connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
183 if (!connect.ep_cb.rx_refill_thresh)
184 connect.ep_cb.rx_refill_thresh++;
185
186 /* connect to control service */
187 connect.svc_id = WMI_CONTROL_SVC;
188 if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
189 return -EIO;
190
191 connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
192
193 /*
194 * Limit the HTC message size on the send path, although e can
195 * receive A-MSDU frames of 4K, we will only send ethernet-sized
196 * (802.3) frames on the send path.
197 */
198 connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
199
200 /*
201 * To reduce the amount of committed memory for larger A_MSDU
202 * frames, use the recv-alloc threshold mechanism for larger
203 * packets.
204 */
205 connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
206 connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
207
208 /*
209 * For the remaining data services set the connection flag to
210 * reduce dribbling, if configured to do so.
211 */
212 connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
213 connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
214 connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
215
216 connect.svc_id = WMI_DATA_BE_SVC;
217
218 if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
219 return -EIO;
220
221 /* connect to back-ground map this to WMI LOW_PRI */
222 connect.svc_id = WMI_DATA_BK_SVC;
223 if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
224 return -EIO;
225
226 /* connect to Video service, map this to to HI PRI */
227 connect.svc_id = WMI_DATA_VI_SVC;
228 if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
229 return -EIO;
230
231 /*
232 * Connect to VO service, this is currently not mapped to a WMI
233 * priority stream due to historical reasons. WMI originally
234 * defined 3 priorities over 3 mailboxes We can change this when
235 * WMI is reworked so that priorities are not dependent on
236 * mailboxes.
237 */
238 connect.svc_id = WMI_DATA_VO_SVC;
239 if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
240 return -EIO;
241
242 return 0;
243}
244
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530245void ath6kl_init_control_info(struct ath6kl_vif *vif)
Kalle Valobdcd8172011-07-18 00:22:30 +0300246{
Vasanthakumar Thiagarajane29f25f2011-10-25 19:34:15 +0530247 ath6kl_init_profile_info(vif);
Vasanthakumar Thiagarajan34503342011-10-25 19:34:02 +0530248 vif->def_txkey_index = 0;
Vasanthakumar Thiagarajan6f2a73f2011-10-25 19:34:06 +0530249 memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
Vasanthakumar Thiagarajanf74bac52011-10-25 19:34:05 +0530250 vif->ch_hint = 0;
Kalle Valobdcd8172011-07-18 00:22:30 +0300251}
252
253/*
254 * Set HTC/Mbox operational parameters, this can only be called when the
255 * target is in the BMI phase.
256 */
257static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
258 u8 htc_ctrl_buf)
259{
260 int status;
261 u32 blk_size;
262
263 blk_size = ar->mbox_info.block_size;
264
265 if (htc_ctrl_buf)
266 blk_size |= ((u32)htc_ctrl_buf) << 16;
267
268 /* set the host interest area for the block size */
269 status = ath6kl_bmi_write(ar,
270 ath6kl_get_hi_item_addr(ar,
271 HI_ITEM(hi_mbox_io_block_sz)),
272 (u8 *)&blk_size,
273 4);
274 if (status) {
275 ath6kl_err("bmi_write_memory for IO block size failed\n");
276 goto out;
277 }
278
279 ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
280 blk_size,
281 ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
282
283 if (mbox_isr_yield_val) {
284 /* set the host interest area for the mbox ISR yield limit */
285 status = ath6kl_bmi_write(ar,
286 ath6kl_get_hi_item_addr(ar,
287 HI_ITEM(hi_mbox_isr_yield_limit)),
288 (u8 *)&mbox_isr_yield_val,
289 4);
290 if (status) {
291 ath6kl_err("bmi_write_memory for yield limit failed\n");
292 goto out;
293 }
294 }
295
296out:
297 return status;
298}
299
300#define REG_DUMP_COUNT_AR6003 60
301#define REGISTER_DUMP_LEN_MAX 60
302
303static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
304{
305 u32 address;
306 u32 regdump_loc = 0;
307 int status;
308 u32 regdump_val[REGISTER_DUMP_LEN_MAX];
309 u32 i;
310
311 if (ar->target_type != TARGET_TYPE_AR6003)
312 return;
313
314 /* the reg dump pointer is copied to the host interest area */
315 address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
Kevin Fang31024d92011-07-11 17:14:13 +0800316 address = TARG_VTOP(ar->target_type, address);
Kalle Valobdcd8172011-07-18 00:22:30 +0300317
318 /* read RAM location through diagnostic window */
Kalle Valoaddb44b2011-09-02 10:32:05 +0300319 status = ath6kl_diag_read32(ar, address, &regdump_loc);
Kalle Valobdcd8172011-07-18 00:22:30 +0300320
321 if (status || !regdump_loc) {
322 ath6kl_err("failed to get ptr to register dump area\n");
323 return;
324 }
325
326 ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
327 regdump_loc);
Kevin Fang31024d92011-07-11 17:14:13 +0800328 regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
Kalle Valobdcd8172011-07-18 00:22:30 +0300329
330 /* fetch register dump data */
Kalle Valoaddb44b2011-09-02 10:32:05 +0300331 status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
332 REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
Kalle Valobdcd8172011-07-18 00:22:30 +0300333
334 if (status) {
335 ath6kl_err("failed to get register dump\n");
336 return;
337 }
338 ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
339
340 for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
341 ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
342 i, regdump_val[i]);
343
344}
345
346void ath6kl_target_failure(struct ath6kl *ar)
347{
348 ath6kl_err("target asserted\n");
349
350 /* try dumping target assertion information (if any) */
351 ath6kl_dump_target_assert_info(ar);
352
353}
354
355static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
356{
357 int status = 0;
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300358 int ret;
Kalle Valobdcd8172011-07-18 00:22:30 +0300359
360 /*
361 * Configure the device for rx dot11 header rules. "0,0" are the
362 * default values. Required if checksum offload is needed. Set
363 * RxMetaVersion to 2.
364 */
365 if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
366 ar->rx_meta_ver, 0, 0)) {
367 ath6kl_err("unable to set the rx frame format\n");
368 status = -EIO;
369 }
370
371 if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
372 if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
373 IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
374 ath6kl_err("unable to set power save fail event policy\n");
375 status = -EIO;
376 }
377
378 if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
379 if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
380 WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
381 ath6kl_err("unable to set barker preamble policy\n");
382 status = -EIO;
383 }
384
385 if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
386 WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
387 ath6kl_err("unable to set keep alive interval\n");
388 status = -EIO;
389 }
390
391 if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
392 WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
393 ath6kl_err("unable to set disconnect timeout\n");
394 status = -EIO;
395 }
396
397 if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
398 if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
399 ath6kl_err("unable to set txop bursting\n");
400 status = -EIO;
401 }
402
Jouni Malinen6bbc7c32011-09-05 17:38:47 +0300403 if (ar->p2p) {
404 ret = ath6kl_wmi_info_req_cmd(ar->wmi,
405 P2P_FLAG_CAPABILITIES_REQ |
406 P2P_FLAG_MACADDR_REQ |
407 P2P_FLAG_HMODEL_REQ);
408 if (ret) {
409 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
410 "capabilities (%d) - assuming P2P not "
411 "supported\n", ret);
412 ar->p2p = 0;
413 }
414 }
415
416 if (ar->p2p) {
417 /* Enable Probe Request reporting for P2P */
418 ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, true);
419 if (ret) {
420 ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
421 "Request reporting (%d)\n", ret);
422 }
Jouni Malinen4dea08e2011-08-30 21:57:57 +0300423 }
424
Kalle Valobdcd8172011-07-18 00:22:30 +0300425 return status;
426}
427
428int ath6kl_configure_target(struct ath6kl *ar)
429{
430 u32 param, ram_reserved_size;
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530431 u8 fw_iftype, fw_mode = 0, fw_submode;
432 int i;
Kalle Valobdcd8172011-07-18 00:22:30 +0300433
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530434 /*
435 * Note: Even though the firmware interface type is
436 * chosen as BSS_STA for all three interfaces, can
437 * be configured to IBSS/AP as long as the fw submode
438 * remains normal mode (0 - AP, STA and IBSS). But
439 * due to an target assert in firmware only one interface is
440 * configured for now.
441 */
Vasanthakumar Thiagarajandd3751f2011-10-25 19:33:59 +0530442 fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
Kalle Valobdcd8172011-07-18 00:22:30 +0300443
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530444 for (i = 0; i < MAX_NUM_VIF; i++)
445 fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
446
447 /*
448 * submodes : vif[0] - AP/STA/IBSS
449 * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
450 * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
451 */
452 fw_submode = HI_OPTION_FW_SUBMODE_NONE |
453 (HI_OPTION_FW_SUBMODE_P2PDEV <<
454 (1 * HI_OPTION_FW_SUBMODE_BITS)) |
455 (HI_OPTION_FW_SUBMODE_P2PDEV <<
456 (2 * HI_OPTION_FW_SUBMODE_BITS));
457
458 /*
459 * FIXME: This needs to be removed once the multivif
460 * support is enabled.
461 */
462 if (ar->p2p)
463 fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
464 else
465 fw_submode = HI_OPTION_FW_SUBMODE_NONE;
466
Kalle Valobdcd8172011-07-18 00:22:30 +0300467 param = HTC_PROTOCOL_VERSION;
468 if (ath6kl_bmi_write(ar,
469 ath6kl_get_hi_item_addr(ar,
470 HI_ITEM(hi_app_host_interest)),
471 (u8 *)&param, 4) != 0) {
472 ath6kl_err("bmi_write_memory for htc version failed\n");
473 return -EIO;
474 }
475
476 /* set the firmware mode to STA/IBSS/AP */
477 param = 0;
478
479 if (ath6kl_bmi_read(ar,
480 ath6kl_get_hi_item_addr(ar,
481 HI_ITEM(hi_option_flag)),
482 (u8 *)&param, 4) != 0) {
483 ath6kl_err("bmi_read_memory for setting fwmode failed\n");
484 return -EIO;
485 }
486
Vasanthakumar Thiagarajan7b858322011-10-25 19:34:22 +0530487 param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
488 param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
489 param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
490
Kalle Valobdcd8172011-07-18 00:22:30 +0300491 param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
492 param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
493
494 if (ath6kl_bmi_write(ar,
495 ath6kl_get_hi_item_addr(ar,
496 HI_ITEM(hi_option_flag)),
497 (u8 *)&param,
498 4) != 0) {
499 ath6kl_err("bmi_write_memory for setting fwmode failed\n");
500 return -EIO;
501 }
502
503 ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
504
505 /*
506 * Hardcode the address use for the extended board data
507 * Ideally this should be pre-allocate by the OS at boot time
508 * But since it is a new feature and board data is loaded
509 * at init time, we have to workaround this from host.
510 * It is difficult to patch the firmware boot code,
511 * but possible in theory.
512 */
513
Kalle Valo991b27e2011-09-07 10:55:17 +0300514 param = ar->hw.board_ext_data_addr;
515 ram_reserved_size = ar->hw.reserved_ram_size;
Kalle Valobdcd8172011-07-18 00:22:30 +0300516
Kalle Valo991b27e2011-09-07 10:55:17 +0300517 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
518 HI_ITEM(hi_board_ext_data)),
519 (u8 *)&param, 4) != 0) {
520 ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
521 return -EIO;
522 }
523
524 if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
525 HI_ITEM(hi_end_ram_reserve_sz)),
526 (u8 *)&ram_reserved_size, 4) != 0) {
527 ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
528 return -EIO;
Kalle Valobdcd8172011-07-18 00:22:30 +0300529 }
530
531 /* set the block size for the target */
532 if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
533 /* use default number of control buffers */
534 return -EIO;
535
536 return 0;
537}
538
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530539void ath6kl_core_free(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300540{
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +0530541 wiphy_free(ar->wiphy);
Kalle Valobdcd8172011-07-18 00:22:30 +0300542}
543
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530544void ath6kl_core_cleanup(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +0300545{
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530546 destroy_workqueue(ar->ath6kl_wq);
Kalle Valobdcd8172011-07-18 00:22:30 +0300547
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +0530548 if (ar->htc_target)
549 ath6kl_htc_cleanup(ar->htc_target);
550
551 ath6kl_cookie_cleanup(ar);
552
553 ath6kl_cleanup_amsdu_rxbufs(ar);
554
555 ath6kl_bmi_cleanup(ar);
556
557 ath6kl_debug_cleanup(ar);
558
559 kfree(ar->fw_board);
560 kfree(ar->fw_otp);
561 kfree(ar->fw);
562 kfree(ar->fw_patch);
563
564 ath6kl_deinit_ieee80211_hw(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +0300565}
566
567/* firmware upload */
Kalle Valobdcd8172011-07-18 00:22:30 +0300568static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
569 u8 **fw, size_t *fw_len)
570{
571 const struct firmware *fw_entry;
572 int ret;
573
574 ret = request_firmware(&fw_entry, filename, ar->dev);
575 if (ret)
576 return ret;
577
578 *fw_len = fw_entry->size;
579 *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
580
581 if (*fw == NULL)
582 ret = -ENOMEM;
583
584 release_firmware(fw_entry);
585
586 return ret;
587}
588
Sam Leffler92ecbff2011-09-07 10:55:16 +0300589#ifdef CONFIG_OF
590static const char *get_target_ver_dir(const struct ath6kl *ar)
591{
592 switch (ar->version.target_ver) {
593 case AR6003_REV1_VERSION:
594 return "ath6k/AR6003/hw1.0";
595 case AR6003_REV2_VERSION:
596 return "ath6k/AR6003/hw2.0";
597 case AR6003_REV3_VERSION:
598 return "ath6k/AR6003/hw2.1.1";
599 }
600 ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
601 ar->version.target_ver);
602 return NULL;
603}
604
605/*
606 * Check the device tree for a board-id and use it to construct
607 * the pathname to the firmware file. Used (for now) to find a
608 * fallback to the "bdata.bin" file--typically a symlink to the
609 * appropriate board-specific file.
610 */
611static bool check_device_tree(struct ath6kl *ar)
612{
613 static const char *board_id_prop = "atheros,board-id";
614 struct device_node *node;
615 char board_filename[64];
616 const char *board_id;
617 int ret;
618
619 for_each_compatible_node(node, NULL, "atheros,ath6kl") {
620 board_id = of_get_property(node, board_id_prop, NULL);
621 if (board_id == NULL) {
622 ath6kl_warn("No \"%s\" property on %s node.\n",
623 board_id_prop, node->name);
624 continue;
625 }
626 snprintf(board_filename, sizeof(board_filename),
627 "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
628
629 ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
630 &ar->fw_board_len);
631 if (ret) {
632 ath6kl_err("Failed to get DT board file %s: %d\n",
633 board_filename, ret);
634 continue;
635 }
636 return true;
637 }
638 return false;
639}
640#else
641static bool check_device_tree(struct ath6kl *ar)
642{
643 return false;
644}
645#endif /* CONFIG_OF */
646
Kalle Valobdcd8172011-07-18 00:22:30 +0300647static int ath6kl_fetch_board_file(struct ath6kl *ar)
648{
649 const char *filename;
650 int ret;
651
Kalle Valo772c31e2011-09-07 10:55:16 +0300652 if (ar->fw_board != NULL)
653 return 0;
654
Kalle Valobdcd8172011-07-18 00:22:30 +0300655 switch (ar->version.target_ver) {
656 case AR6003_REV2_VERSION:
657 filename = AR6003_REV2_BOARD_DATA_FILE;
658 break;
Kevin Fang31024d92011-07-11 17:14:13 +0800659 case AR6004_REV1_VERSION:
660 filename = AR6004_REV1_BOARD_DATA_FILE;
661 break;
Kalle Valobdcd8172011-07-18 00:22:30 +0300662 default:
663 filename = AR6003_REV3_BOARD_DATA_FILE;
664 break;
665 }
666
667 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
668 &ar->fw_board_len);
669 if (ret == 0) {
670 /* managed to get proper board file */
671 return 0;
672 }
673
Sam Leffler92ecbff2011-09-07 10:55:16 +0300674 if (check_device_tree(ar)) {
675 /* got board file from device tree */
676 return 0;
677 }
678
Kalle Valobdcd8172011-07-18 00:22:30 +0300679 /* there was no proper board file, try to use default instead */
680 ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
681 filename, ret);
682
683 switch (ar->version.target_ver) {
684 case AR6003_REV2_VERSION:
685 filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
686 break;
Kevin Fang31024d92011-07-11 17:14:13 +0800687 case AR6004_REV1_VERSION:
688 filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
689 break;
Kalle Valobdcd8172011-07-18 00:22:30 +0300690 default:
691 filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
692 break;
693 }
694
695 ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
696 &ar->fw_board_len);
697 if (ret) {
698 ath6kl_err("Failed to get default board file %s: %d\n",
699 filename, ret);
700 return ret;
701 }
702
703 ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
704 ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
705
706 return 0;
707}
708
Kalle Valo772c31e2011-09-07 10:55:16 +0300709static int ath6kl_fetch_otp_file(struct ath6kl *ar)
710{
711 const char *filename;
712 int ret;
713
714 if (ar->fw_otp != NULL)
715 return 0;
716
717 switch (ar->version.target_ver) {
718 case AR6003_REV2_VERSION:
719 filename = AR6003_REV2_OTP_FILE;
720 break;
721 case AR6004_REV1_VERSION:
722 ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
723 return 0;
724 break;
725 default:
726 filename = AR6003_REV3_OTP_FILE;
727 break;
728 }
729
730 ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
731 &ar->fw_otp_len);
732 if (ret) {
733 ath6kl_err("Failed to get OTP file %s: %d\n",
734 filename, ret);
735 return ret;
736 }
737
738 return 0;
739}
740
741static int ath6kl_fetch_fw_file(struct ath6kl *ar)
742{
743 const char *filename;
744 int ret;
745
746 if (ar->fw != NULL)
747 return 0;
748
749 if (testmode) {
750 switch (ar->version.target_ver) {
751 case AR6003_REV2_VERSION:
752 filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
753 break;
754 case AR6003_REV3_VERSION:
755 filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
756 break;
757 case AR6004_REV1_VERSION:
758 ath6kl_warn("testmode not supported with ar6004\n");
759 return -EOPNOTSUPP;
760 default:
761 ath6kl_warn("unknown target version: 0x%x\n",
762 ar->version.target_ver);
763 return -EINVAL;
764 }
765
766 set_bit(TESTMODE, &ar->flag);
767
768 goto get_fw;
769 }
770
771 switch (ar->version.target_ver) {
772 case AR6003_REV2_VERSION:
773 filename = AR6003_REV2_FIRMWARE_FILE;
774 break;
775 case AR6004_REV1_VERSION:
776 filename = AR6004_REV1_FIRMWARE_FILE;
777 break;
778 default:
779 filename = AR6003_REV3_FIRMWARE_FILE;
780 break;
781 }
782
783get_fw:
784 ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
785 if (ret) {
786 ath6kl_err("Failed to get firmware file %s: %d\n",
787 filename, ret);
788 return ret;
789 }
790
791 return 0;
792}
793
794static int ath6kl_fetch_patch_file(struct ath6kl *ar)
795{
796 const char *filename;
797 int ret;
798
799 switch (ar->version.target_ver) {
800 case AR6003_REV2_VERSION:
801 filename = AR6003_REV2_PATCH_FILE;
802 break;
803 case AR6004_REV1_VERSION:
804 /* FIXME: implement for AR6004 */
805 return 0;
806 break;
807 default:
808 filename = AR6003_REV3_PATCH_FILE;
809 break;
810 }
811
812 if (ar->fw_patch == NULL) {
813 ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
814 &ar->fw_patch_len);
815 if (ret) {
816 ath6kl_err("Failed to get patch file %s: %d\n",
817 filename, ret);
818 return ret;
819 }
820 }
821
822 return 0;
823}
824
Kalle Valo50d41232011-09-07 10:55:17 +0300825static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
Kalle Valo772c31e2011-09-07 10:55:16 +0300826{
827 int ret;
828
Kalle Valo772c31e2011-09-07 10:55:16 +0300829 ret = ath6kl_fetch_otp_file(ar);
830 if (ret)
831 return ret;
832
833 ret = ath6kl_fetch_fw_file(ar);
834 if (ret)
835 return ret;
836
837 ret = ath6kl_fetch_patch_file(ar);
838 if (ret)
839 return ret;
840
841 return 0;
842}
Kalle Valobdcd8172011-07-18 00:22:30 +0300843
Kalle Valo50d41232011-09-07 10:55:17 +0300844static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
845{
846 size_t magic_len, len, ie_len;
847 const struct firmware *fw;
848 struct ath6kl_fw_ie *hdr;
849 const char *filename;
850 const u8 *data;
Kalle Valo97e04962011-09-12 13:47:34 +0300851 int ret, ie_id, i, index, bit;
Kalle Valo8a137482011-09-07 10:55:17 +0300852 __le32 *val;
Kalle Valo50d41232011-09-07 10:55:17 +0300853
854 switch (ar->version.target_ver) {
855 case AR6003_REV2_VERSION:
856 filename = AR6003_REV2_FIRMWARE_2_FILE;
857 break;
858 case AR6003_REV3_VERSION:
859 filename = AR6003_REV3_FIRMWARE_2_FILE;
860 break;
861 case AR6004_REV1_VERSION:
862 filename = AR6004_REV1_FIRMWARE_2_FILE;
863 break;
864 default:
865 return -EOPNOTSUPP;
866 }
867
868 ret = request_firmware(&fw, filename, ar->dev);
869 if (ret)
870 return ret;
871
872 data = fw->data;
873 len = fw->size;
874
875 /* magic also includes the null byte, check that as well */
876 magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
877
878 if (len < magic_len) {
879 ret = -EINVAL;
880 goto out;
881 }
882
883 if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
884 ret = -EINVAL;
885 goto out;
886 }
887
888 len -= magic_len;
889 data += magic_len;
890
891 /* loop elements */
892 while (len > sizeof(struct ath6kl_fw_ie)) {
893 /* hdr is unaligned! */
894 hdr = (struct ath6kl_fw_ie *) data;
895
896 ie_id = le32_to_cpup(&hdr->id);
897 ie_len = le32_to_cpup(&hdr->len);
898
899 len -= sizeof(*hdr);
900 data += sizeof(*hdr);
901
902 if (len < ie_len) {
903 ret = -EINVAL;
904 goto out;
905 }
906
907 switch (ie_id) {
908 case ATH6KL_FW_IE_OTP_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300909 ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300910 ie_len);
911
Kalle Valo50d41232011-09-07 10:55:17 +0300912 ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
913
914 if (ar->fw_otp == NULL) {
915 ret = -ENOMEM;
916 goto out;
917 }
918
919 ar->fw_otp_len = ie_len;
920 break;
921 case ATH6KL_FW_IE_FW_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300922 ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300923 ie_len);
924
Kalle Valo50d41232011-09-07 10:55:17 +0300925 ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
926
927 if (ar->fw == NULL) {
928 ret = -ENOMEM;
929 goto out;
930 }
931
932 ar->fw_len = ie_len;
933 break;
934 case ATH6KL_FW_IE_PATCH_IMAGE:
Kalle Valoef548622011-10-01 09:43:09 +0300935 ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300936 ie_len);
937
Kalle Valo50d41232011-09-07 10:55:17 +0300938 ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
939
940 if (ar->fw_patch == NULL) {
941 ret = -ENOMEM;
942 goto out;
943 }
944
945 ar->fw_patch_len = ie_len;
946 break;
Kalle Valo8a137482011-09-07 10:55:17 +0300947 case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
948 val = (__le32 *) data;
949 ar->hw.reserved_ram_size = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300950
951 ath6kl_dbg(ATH6KL_DBG_BOOT,
952 "found reserved ram size ie 0x%d\n",
953 ar->hw.reserved_ram_size);
Kalle Valo8a137482011-09-07 10:55:17 +0300954 break;
Kalle Valo97e04962011-09-12 13:47:34 +0300955 case ATH6KL_FW_IE_CAPABILITIES:
Kalle Valo6bc36432011-09-27 14:31:11 +0300956 ath6kl_dbg(ATH6KL_DBG_BOOT,
Kalle Valoef548622011-10-01 09:43:09 +0300957 "found firmware capabilities ie (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +0300958 ie_len);
959
Kalle Valo97e04962011-09-12 13:47:34 +0300960 for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
961 index = ALIGN(i, 8) / 8;
962 bit = i % 8;
963
964 if (data[index] & (1 << bit))
965 __set_bit(i, ar->fw_capabilities);
966 }
Kalle Valo6bc36432011-09-27 14:31:11 +0300967
968 ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
969 ar->fw_capabilities,
970 sizeof(ar->fw_capabilities));
Kalle Valo97e04962011-09-12 13:47:34 +0300971 break;
Kalle Valo1b4304d2011-09-27 11:05:26 +0300972 case ATH6KL_FW_IE_PATCH_ADDR:
973 if (ie_len != sizeof(*val))
974 break;
975
976 val = (__le32 *) data;
977 ar->hw.dataset_patch_addr = le32_to_cpup(val);
Kalle Valo6bc36432011-09-27 14:31:11 +0300978
979 ath6kl_dbg(ATH6KL_DBG_BOOT,
980 "found patch address ie 0x%d\n",
981 ar->hw.dataset_patch_addr);
Kalle Valo1b4304d2011-09-27 11:05:26 +0300982 break;
Kalle Valo50d41232011-09-07 10:55:17 +0300983 default:
Kalle Valo6bc36432011-09-27 14:31:11 +0300984 ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
Kalle Valo50d41232011-09-07 10:55:17 +0300985 le32_to_cpup(&hdr->id));
986 break;
987 }
988
989 len -= ie_len;
990 data += ie_len;
991 };
992
993 ret = 0;
994out:
995 release_firmware(fw);
996
997 return ret;
998}
999
1000static int ath6kl_fetch_firmwares(struct ath6kl *ar)
1001{
1002 int ret;
1003
1004 ret = ath6kl_fetch_board_file(ar);
1005 if (ret)
1006 return ret;
1007
1008 ret = ath6kl_fetch_fw_api2(ar);
Kalle Valo6bc36432011-09-27 14:31:11 +03001009 if (ret == 0) {
1010 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
Kalle Valo50d41232011-09-07 10:55:17 +03001011 return 0;
Kalle Valo6bc36432011-09-27 14:31:11 +03001012 }
Kalle Valo50d41232011-09-07 10:55:17 +03001013
1014 ret = ath6kl_fetch_fw_api1(ar);
1015 if (ret)
1016 return ret;
1017
Kalle Valo6bc36432011-09-27 14:31:11 +03001018 ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
1019
Kalle Valo50d41232011-09-07 10:55:17 +03001020 return 0;
1021}
1022
Kalle Valobdcd8172011-07-18 00:22:30 +03001023static int ath6kl_upload_board_file(struct ath6kl *ar)
1024{
1025 u32 board_address, board_ext_address, param;
Kevin Fang31024d92011-07-11 17:14:13 +08001026 u32 board_data_size, board_ext_data_size;
Kalle Valobdcd8172011-07-18 00:22:30 +03001027 int ret;
1028
Kalle Valo772c31e2011-09-07 10:55:16 +03001029 if (WARN_ON(ar->fw_board == NULL))
1030 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001031
Kevin Fang31024d92011-07-11 17:14:13 +08001032 /*
1033 * Determine where in Target RAM to write Board Data.
1034 * For AR6004, host determine Target RAM address for
1035 * writing board data.
1036 */
1037 if (ar->target_type == TARGET_TYPE_AR6004) {
1038 board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
1039 ath6kl_bmi_write(ar,
1040 ath6kl_get_hi_item_addr(ar,
1041 HI_ITEM(hi_board_data)),
1042 (u8 *) &board_address, 4);
1043 } else {
1044 ath6kl_bmi_read(ar,
1045 ath6kl_get_hi_item_addr(ar,
1046 HI_ITEM(hi_board_data)),
1047 (u8 *) &board_address, 4);
1048 }
1049
Kalle Valobdcd8172011-07-18 00:22:30 +03001050 /* determine where in target ram to write extended board data */
1051 ath6kl_bmi_read(ar,
1052 ath6kl_get_hi_item_addr(ar,
1053 HI_ITEM(hi_board_ext_data)),
1054 (u8 *) &board_ext_address, 4);
1055
Kalle Valobdcd8172011-07-18 00:22:30 +03001056 if (board_ext_address == 0) {
1057 ath6kl_err("Failed to get board file target address.\n");
1058 return -EINVAL;
1059 }
1060
Kevin Fang31024d92011-07-11 17:14:13 +08001061 switch (ar->target_type) {
1062 case TARGET_TYPE_AR6003:
1063 board_data_size = AR6003_BOARD_DATA_SZ;
1064 board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1065 break;
1066 case TARGET_TYPE_AR6004:
1067 board_data_size = AR6004_BOARD_DATA_SZ;
1068 board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1069 break;
1070 default:
1071 WARN_ON(1);
1072 return -EINVAL;
1073 break;
1074 }
1075
1076 if (ar->fw_board_len == (board_data_size +
1077 board_ext_data_size)) {
1078
Kalle Valobdcd8172011-07-18 00:22:30 +03001079 /* write extended board data */
Kalle Valo6bc36432011-09-27 14:31:11 +03001080 ath6kl_dbg(ATH6KL_DBG_BOOT,
1081 "writing extended board data to 0x%x (%d B)\n",
1082 board_ext_address, board_ext_data_size);
1083
Kalle Valobdcd8172011-07-18 00:22:30 +03001084 ret = ath6kl_bmi_write(ar, board_ext_address,
Kevin Fang31024d92011-07-11 17:14:13 +08001085 ar->fw_board + board_data_size,
1086 board_ext_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001087 if (ret) {
1088 ath6kl_err("Failed to write extended board data: %d\n",
1089 ret);
1090 return ret;
1091 }
1092
1093 /* record that extended board data is initialized */
Kevin Fang31024d92011-07-11 17:14:13 +08001094 param = (board_ext_data_size << 16) | 1;
1095
Kalle Valobdcd8172011-07-18 00:22:30 +03001096 ath6kl_bmi_write(ar,
1097 ath6kl_get_hi_item_addr(ar,
1098 HI_ITEM(hi_board_ext_data_config)),
1099 (unsigned char *) &param, 4);
1100 }
1101
Kevin Fang31024d92011-07-11 17:14:13 +08001102 if (ar->fw_board_len < board_data_size) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001103 ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1104 ret = -EINVAL;
1105 return ret;
1106 }
1107
Kalle Valo6bc36432011-09-27 14:31:11 +03001108 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1109 board_address, board_data_size);
1110
Kalle Valobdcd8172011-07-18 00:22:30 +03001111 ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
Kevin Fang31024d92011-07-11 17:14:13 +08001112 board_data_size);
Kalle Valobdcd8172011-07-18 00:22:30 +03001113
1114 if (ret) {
1115 ath6kl_err("Board file bmi write failed: %d\n", ret);
1116 return ret;
1117 }
1118
1119 /* record the fact that Board Data IS initialized */
1120 param = 1;
1121 ath6kl_bmi_write(ar,
1122 ath6kl_get_hi_item_addr(ar,
1123 HI_ITEM(hi_board_data_initialized)),
1124 (u8 *)&param, 4);
1125
1126 return ret;
1127}
1128
1129static int ath6kl_upload_otp(struct ath6kl *ar)
1130{
Kalle Valobdcd8172011-07-18 00:22:30 +03001131 u32 address, param;
Kalle Valobef26a72011-10-12 09:58:28 +03001132 bool from_hw = false;
Kalle Valobdcd8172011-07-18 00:22:30 +03001133 int ret;
1134
Kalle Valo772c31e2011-09-07 10:55:16 +03001135 if (WARN_ON(ar->fw_otp == NULL))
1136 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001137
Kalle Valoa01ac412011-09-07 10:55:17 +03001138 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001139
Kalle Valoef548622011-10-01 09:43:09 +03001140 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
Kalle Valo6bc36432011-09-27 14:31:11 +03001141 ar->fw_otp_len);
1142
Kalle Valobdcd8172011-07-18 00:22:30 +03001143 ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1144 ar->fw_otp_len);
1145 if (ret) {
1146 ath6kl_err("Failed to upload OTP file: %d\n", ret);
1147 return ret;
1148 }
1149
Kalle Valo639d0b82011-09-12 12:48:09 +03001150 /* read firmware start address */
1151 ret = ath6kl_bmi_read(ar,
1152 ath6kl_get_hi_item_addr(ar,
1153 HI_ITEM(hi_app_start)),
1154 (u8 *) &address, sizeof(address));
1155
1156 if (ret) {
1157 ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1158 return ret;
1159 }
1160
Kalle Valobef26a72011-10-12 09:58:28 +03001161 if (ar->hw.app_start_override_addr == 0) {
1162 ar->hw.app_start_override_addr = address;
1163 from_hw = true;
1164 }
Kalle Valo639d0b82011-09-12 12:48:09 +03001165
Kalle Valobef26a72011-10-12 09:58:28 +03001166 ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1167 from_hw ? " (from hw)" : "",
Kalle Valo6bc36432011-09-27 14:31:11 +03001168 ar->hw.app_start_override_addr);
1169
Kalle Valobdcd8172011-07-18 00:22:30 +03001170 /* execute the OTP code */
Kalle Valobef26a72011-10-12 09:58:28 +03001171 ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1172 ar->hw.app_start_override_addr);
Kalle Valobdcd8172011-07-18 00:22:30 +03001173 param = 0;
Kalle Valobef26a72011-10-12 09:58:28 +03001174 ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
Kalle Valobdcd8172011-07-18 00:22:30 +03001175
1176 return ret;
1177}
1178
1179static int ath6kl_upload_firmware(struct ath6kl *ar)
1180{
Kalle Valobdcd8172011-07-18 00:22:30 +03001181 u32 address;
1182 int ret;
1183
Kalle Valo772c31e2011-09-07 10:55:16 +03001184 if (WARN_ON(ar->fw == NULL))
1185 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001186
Kalle Valoa01ac412011-09-07 10:55:17 +03001187 address = ar->hw.app_load_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001188
Kalle Valoef548622011-10-01 09:43:09 +03001189 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001190 address, ar->fw_len);
1191
Kalle Valobdcd8172011-07-18 00:22:30 +03001192 ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1193
1194 if (ret) {
1195 ath6kl_err("Failed to write firmware: %d\n", ret);
1196 return ret;
1197 }
1198
Kevin Fang31024d92011-07-11 17:14:13 +08001199 /*
1200 * Set starting address for firmware
1201 * Don't need to setup app_start override addr on AR6004
1202 */
1203 if (ar->target_type != TARGET_TYPE_AR6004) {
Kalle Valoa01ac412011-09-07 10:55:17 +03001204 address = ar->hw.app_start_override_addr;
Kevin Fang31024d92011-07-11 17:14:13 +08001205 ath6kl_bmi_set_app_start(ar, address);
1206 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001207 return ret;
1208}
1209
1210static int ath6kl_upload_patch(struct ath6kl *ar)
1211{
Kalle Valobdcd8172011-07-18 00:22:30 +03001212 u32 address, param;
1213 int ret;
1214
Kalle Valo772c31e2011-09-07 10:55:16 +03001215 if (WARN_ON(ar->fw_patch == NULL))
1216 return -ENOENT;
Kalle Valobdcd8172011-07-18 00:22:30 +03001217
Kalle Valoa01ac412011-09-07 10:55:17 +03001218 address = ar->hw.dataset_patch_addr;
Kalle Valobdcd8172011-07-18 00:22:30 +03001219
Kalle Valoef548622011-10-01 09:43:09 +03001220 ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
Kalle Valo6bc36432011-09-27 14:31:11 +03001221 address, ar->fw_patch_len);
1222
Kalle Valobdcd8172011-07-18 00:22:30 +03001223 ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1224 if (ret) {
1225 ath6kl_err("Failed to write patch file: %d\n", ret);
1226 return ret;
1227 }
1228
1229 param = address;
1230 ath6kl_bmi_write(ar,
1231 ath6kl_get_hi_item_addr(ar,
1232 HI_ITEM(hi_dset_list_head)),
1233 (unsigned char *) &param, 4);
1234
1235 return 0;
1236}
1237
1238static int ath6kl_init_upload(struct ath6kl *ar)
1239{
1240 u32 param, options, sleep, address;
1241 int status = 0;
1242
Kevin Fang31024d92011-07-11 17:14:13 +08001243 if (ar->target_type != TARGET_TYPE_AR6003 &&
1244 ar->target_type != TARGET_TYPE_AR6004)
Kalle Valobdcd8172011-07-18 00:22:30 +03001245 return -EINVAL;
1246
1247 /* temporarily disable system sleep */
1248 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1249 status = ath6kl_bmi_reg_read(ar, address, &param);
1250 if (status)
1251 return status;
1252
1253 options = param;
1254
1255 param |= ATH6KL_OPTION_SLEEP_DISABLE;
1256 status = ath6kl_bmi_reg_write(ar, address, param);
1257 if (status)
1258 return status;
1259
1260 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1261 status = ath6kl_bmi_reg_read(ar, address, &param);
1262 if (status)
1263 return status;
1264
1265 sleep = param;
1266
1267 param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1268 status = ath6kl_bmi_reg_write(ar, address, param);
1269 if (status)
1270 return status;
1271
1272 ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1273 options, sleep);
1274
1275 /* program analog PLL register */
Kevin Fang31024d92011-07-11 17:14:13 +08001276 /* no need to control 40/44MHz clock on AR6004 */
1277 if (ar->target_type != TARGET_TYPE_AR6004) {
1278 status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1279 0xF9104001);
Kalle Valobdcd8172011-07-18 00:22:30 +03001280
Kevin Fang31024d92011-07-11 17:14:13 +08001281 if (status)
1282 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001283
Kevin Fang31024d92011-07-11 17:14:13 +08001284 /* Run at 80/88MHz by default */
1285 param = SM(CPU_CLOCK_STANDARD, 1);
1286
1287 address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1288 status = ath6kl_bmi_reg_write(ar, address, param);
1289 if (status)
1290 return status;
1291 }
Kalle Valobdcd8172011-07-18 00:22:30 +03001292
1293 param = 0;
1294 address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1295 param = SM(LPO_CAL_ENABLE, 1);
1296 status = ath6kl_bmi_reg_write(ar, address, param);
1297 if (status)
1298 return status;
1299
1300 /* WAR to avoid SDIO CRC err */
1301 if (ar->version.target_ver == AR6003_REV2_VERSION) {
1302 ath6kl_err("temporary war to avoid sdio crc error\n");
1303
1304 param = 0x20;
1305
1306 address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1307 status = ath6kl_bmi_reg_write(ar, address, param);
1308 if (status)
1309 return status;
1310
1311 address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1312 status = ath6kl_bmi_reg_write(ar, address, param);
1313 if (status)
1314 return status;
1315
1316 address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1317 status = ath6kl_bmi_reg_write(ar, address, param);
1318 if (status)
1319 return status;
1320
1321 address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1322 status = ath6kl_bmi_reg_write(ar, address, param);
1323 if (status)
1324 return status;
1325 }
1326
1327 /* write EEPROM data to Target RAM */
1328 status = ath6kl_upload_board_file(ar);
1329 if (status)
1330 return status;
1331
1332 /* transfer One time Programmable data */
1333 status = ath6kl_upload_otp(ar);
1334 if (status)
1335 return status;
1336
1337 /* Download Target firmware */
1338 status = ath6kl_upload_firmware(ar);
1339 if (status)
1340 return status;
1341
1342 status = ath6kl_upload_patch(ar);
1343 if (status)
1344 return status;
1345
1346 /* Restore system sleep */
1347 address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1348 status = ath6kl_bmi_reg_write(ar, address, sleep);
1349 if (status)
1350 return status;
1351
1352 address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1353 param = options | 0x20;
1354 status = ath6kl_bmi_reg_write(ar, address, param);
1355 if (status)
1356 return status;
1357
1358 /* Configure GPIO AR6003 UART */
1359 param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
1360 status = ath6kl_bmi_write(ar,
1361 ath6kl_get_hi_item_addr(ar,
1362 HI_ITEM(hi_dbg_uart_txpin)),
1363 (u8 *)&param, 4);
1364
1365 return status;
1366}
1367
Kalle Valoa01ac412011-09-07 10:55:17 +03001368static int ath6kl_init_hw_params(struct ath6kl *ar)
1369{
1370 switch (ar->version.target_ver) {
1371 case AR6003_REV2_VERSION:
1372 ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1373 ar->hw.app_load_addr = AR6003_REV2_APP_LOAD_ADDRESS;
Kalle Valo991b27e2011-09-07 10:55:17 +03001374 ar->hw.board_ext_data_addr = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
1375 ar->hw.reserved_ram_size = AR6003_REV2_RAM_RESERVE_SIZE;
Kalle Valobef26a72011-10-12 09:58:28 +03001376
1377 /* hw2.0 needs override address hardcoded */
1378 ar->hw.app_start_override_addr = 0x944C00;
1379
Kalle Valoa01ac412011-09-07 10:55:17 +03001380 break;
1381 case AR6003_REV3_VERSION:
1382 ar->hw.dataset_patch_addr = AR6003_REV3_DATASET_PATCH_ADDRESS;
1383 ar->hw.app_load_addr = 0x1234;
Kalle Valo991b27e2011-09-07 10:55:17 +03001384 ar->hw.board_ext_data_addr = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
1385 ar->hw.reserved_ram_size = AR6003_REV3_RAM_RESERVE_SIZE;
Kalle Valoa01ac412011-09-07 10:55:17 +03001386 break;
1387 case AR6004_REV1_VERSION:
1388 ar->hw.dataset_patch_addr = AR6003_REV2_DATASET_PATCH_ADDRESS;
1389 ar->hw.app_load_addr = AR6003_REV3_APP_LOAD_ADDRESS;
Kalle Valo991b27e2011-09-07 10:55:17 +03001390 ar->hw.board_ext_data_addr = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
1391 ar->hw.reserved_ram_size = AR6004_REV1_RAM_RESERVE_SIZE;
Kalle Valoa01ac412011-09-07 10:55:17 +03001392 break;
1393 default:
1394 ath6kl_err("Unsupported hardware version: 0x%x\n",
1395 ar->version.target_ver);
1396 return -EINVAL;
1397 }
1398
Kalle Valo6bc36432011-09-27 14:31:11 +03001399 ath6kl_dbg(ATH6KL_DBG_BOOT,
1400 "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1401 ar->version.target_ver, ar->target_type,
1402 ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1403 ath6kl_dbg(ATH6KL_DBG_BOOT,
1404 "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1405 ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1406 ar->hw.reserved_ram_size);
1407
Kalle Valoa01ac412011-09-07 10:55:17 +03001408 return 0;
1409}
1410
Vasanthakumar Thiagarajan521dffc2011-10-25 19:33:56 +05301411static int ath6kl_init(struct ath6kl *ar)
Kalle Valobdcd8172011-07-18 00:22:30 +03001412{
Kalle Valobdcd8172011-07-18 00:22:30 +03001413 int status = 0;
1414 s32 timeleft;
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301415 struct net_device *ndev;
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301416 int i;
Kalle Valobdcd8172011-07-18 00:22:30 +03001417
1418 if (!ar)
1419 return -EIO;
1420
1421 /* Do we need to finish the BMI phase */
1422 if (ath6kl_bmi_done(ar)) {
1423 status = -EIO;
1424 goto ath6kl_init_done;
1425 }
1426
1427 /* Indicate that WMI is enabled (although not ready yet) */
1428 set_bit(WMI_ENABLED, &ar->flag);
Vasanthakumar Thiagarajan28657852011-07-21 12:00:49 +05301429 ar->wmi = ath6kl_wmi_init(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001430 if (!ar->wmi) {
1431 ath6kl_err("failed to initialize wmi\n");
1432 status = -EIO;
1433 goto ath6kl_init_done;
1434 }
1435
1436 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
1437
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301438 status = ath6kl_register_ieee80211_hw(ar);
1439 if (status)
1440 goto err_node_cleanup;
1441
1442 status = ath6kl_debug_init(ar);
1443 if (status) {
1444 wiphy_unregister(ar->wiphy);
1445 goto err_node_cleanup;
1446 }
1447
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301448 for (i = 0; i < MAX_NUM_VIF; i++)
1449 ar->avail_idx_map |= BIT(i);
1450
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301451 rtnl_lock();
1452
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301453 /* Add an initial station interface */
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301454 ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
1455 INFRA_NETWORK);
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301456
1457 rtnl_unlock();
1458
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301459 if (!ndev) {
1460 ath6kl_err("Failed to instantiate a network device\n");
1461 status = -ENOMEM;
1462 wiphy_unregister(ar->wiphy);
1463 goto err_debug_init;
1464 }
1465
1466
1467 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
Vasanthakumar Thiagarajan28ae58d2011-10-25 19:34:14 +05301468 __func__, ndev->name, ndev, ar);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301469
Kalle Valobdcd8172011-07-18 00:22:30 +03001470 /*
1471 * The reason we have to wait for the target here is that the
1472 * driver layer has to init BMI in order to set the host block
1473 * size.
1474 */
Kalle Vaload226ec2011-08-10 09:49:12 +03001475 if (ath6kl_htc_wait_target(ar->htc_target)) {
Kalle Valobdcd8172011-07-18 00:22:30 +03001476 status = -EIO;
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301477 goto err_if_deinit;
Kalle Valobdcd8172011-07-18 00:22:30 +03001478 }
1479
1480 if (ath6kl_init_service_ep(ar)) {
1481 status = -EIO;
1482 goto err_cleanup_scatter;
1483 }
1484
1485 /* setup access class priority mappings */
1486 ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
1487 ar->ac_stream_pri_map[WMM_AC_BE] = 1;
1488 ar->ac_stream_pri_map[WMM_AC_VI] = 2;
1489 ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
1490
1491 /* give our connected endpoints some buffers */
1492 ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
1493 ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
1494
1495 /* allocate some buffers that handle larger AMSDU frames */
1496 ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
1497
1498 /* setup credit distribution */
1499 ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
1500
1501 ath6kl_cookie_init(ar);
1502
1503 /* start HTC */
Kalle Vaload226ec2011-08-10 09:49:12 +03001504 status = ath6kl_htc_start(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001505
1506 if (status) {
1507 ath6kl_cookie_cleanup(ar);
1508 goto err_rxbuf_cleanup;
1509 }
1510
1511 /* Wait for Wmi event to be ready */
1512 timeleft = wait_event_interruptible_timeout(ar->event_wq,
1513 test_bit(WMI_READY,
1514 &ar->flag),
1515 WMI_TIMEOUT);
1516
Kalle Valo6bc36432011-09-27 14:31:11 +03001517 ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1518
Kalle Valobdcd8172011-07-18 00:22:30 +03001519 if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1520 ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1521 ATH6KL_ABI_VERSION, ar->version.abi_ver);
1522 status = -EIO;
1523 goto err_htc_stop;
1524 }
1525
1526 if (!timeleft || signal_pending(current)) {
1527 ath6kl_err("wmi is not ready or wait was interrupted\n");
1528 status = -EIO;
1529 goto err_htc_stop;
1530 }
1531
1532 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1533
1534 /* communicate the wmi protocol verision to the target */
1535 if ((ath6kl_set_host_app_area(ar)) != 0)
1536 ath6kl_err("unable to set the host app area\n");
1537
1538 ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
1539 ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
1540
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301541 ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
1542 WIPHY_FLAG_HAVE_AP_SME;
Vivek Natarajan011a36e2011-09-19 13:29:16 +05301543
Kalle Valobdcd8172011-07-18 00:22:30 +03001544 status = ath6kl_target_config_wlan_params(ar);
Vasanthakumar Thiagarajand66ea4f2011-10-25 19:34:18 +05301545 if (status)
1546 goto err_htc_stop;
1547
1548 /*
1549 * Set mac address which is received in ready event
1550 * FIXME: Move to ath6kl_interface_add()
1551 */
1552 memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
1553
1554 return status;
Kalle Valobdcd8172011-07-18 00:22:30 +03001555
1556err_htc_stop:
Kalle Vaload226ec2011-08-10 09:49:12 +03001557 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001558err_rxbuf_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001559 ath6kl_htc_flush_rx_buf(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001560 ath6kl_cleanup_amsdu_rxbufs(ar);
1561err_cleanup_scatter:
1562 ath6kl_hif_cleanup_scatter(ar);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301563err_if_deinit:
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301564 rtnl_lock();
Vasanthakumar Thiagarajan108438b2011-10-25 19:34:00 +05301565 ath6kl_deinit_if_data(netdev_priv(ndev));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301566 rtnl_unlock();
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301567 wiphy_unregister(ar->wiphy);
1568err_debug_init:
1569 ath6kl_debug_cleanup(ar);
Vasanthakumar Thiagarajan852bd9d2011-07-21 14:24:54 +05301570err_node_cleanup:
Kalle Valobdcd8172011-07-18 00:22:30 +03001571 ath6kl_wmi_shutdown(ar->wmi);
1572 clear_bit(WMI_ENABLED, &ar->flag);
1573 ar->wmi = NULL;
1574
1575ath6kl_init_done:
1576 return status;
1577}
1578
1579int ath6kl_core_init(struct ath6kl *ar)
1580{
1581 int ret = 0;
1582 struct ath6kl_bmi_target_info targ_info;
1583
1584 ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
1585 if (!ar->ath6kl_wq)
1586 return -ENOMEM;
1587
1588 ret = ath6kl_bmi_init(ar);
1589 if (ret)
1590 goto err_wq;
1591
1592 ret = ath6kl_bmi_get_target_info(ar, &targ_info);
1593 if (ret)
1594 goto err_bmi_cleanup;
1595
1596 ar->version.target_ver = le32_to_cpu(targ_info.version);
1597 ar->target_type = le32_to_cpu(targ_info.type);
Vasanthakumar Thiagarajanbe98e3a2011-10-25 19:33:57 +05301598 ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
Kalle Valobdcd8172011-07-18 00:22:30 +03001599
Kalle Valoa01ac412011-09-07 10:55:17 +03001600 ret = ath6kl_init_hw_params(ar);
1601 if (ret)
1602 goto err_bmi_cleanup;
1603
Kalle Valobdcd8172011-07-18 00:22:30 +03001604 ret = ath6kl_configure_target(ar);
1605 if (ret)
1606 goto err_bmi_cleanup;
1607
Kalle Vaload226ec2011-08-10 09:49:12 +03001608 ar->htc_target = ath6kl_htc_create(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001609
1610 if (!ar->htc_target) {
1611 ret = -ENOMEM;
1612 goto err_bmi_cleanup;
1613 }
1614
Kalle Valo772c31e2011-09-07 10:55:16 +03001615 ret = ath6kl_fetch_firmwares(ar);
1616 if (ret)
1617 goto err_htc_cleanup;
1618
Kalle Valobdcd8172011-07-18 00:22:30 +03001619 ret = ath6kl_init_upload(ar);
1620 if (ret)
1621 goto err_htc_cleanup;
1622
Vasanthakumar Thiagarajan521dffc2011-10-25 19:33:56 +05301623 ret = ath6kl_init(ar);
Kalle Valobdcd8172011-07-18 00:22:30 +03001624 if (ret)
1625 goto err_htc_cleanup;
1626
Kalle Valobdcd8172011-07-18 00:22:30 +03001627 return ret;
1628
1629err_htc_cleanup:
Kalle Vaload226ec2011-08-10 09:49:12 +03001630 ath6kl_htc_cleanup(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001631err_bmi_cleanup:
1632 ath6kl_bmi_cleanup(ar);
1633err_wq:
1634 destroy_workqueue(ar->ath6kl_wq);
Vasanthakumar Thiagarajan8dafb702011-10-25 19:33:58 +05301635
Kalle Valobdcd8172011-07-18 00:22:30 +03001636 return ret;
1637}
1638
Vasanthakumar Thiagarajan55055972011-10-25 19:34:23 +05301639void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301640{
1641 static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
1642 bool discon_issued;
1643
1644 netif_stop_queue(vif->ndev);
1645
1646 clear_bit(WLAN_ENABLED, &vif->flags);
1647
1648 if (wmi_ready) {
1649 discon_issued = test_bit(CONNECTED, &vif->flags) ||
1650 test_bit(CONNECT_PEND, &vif->flags);
1651 ath6kl_disconnect(vif);
1652 del_timer(&vif->disconnect_timer);
1653
1654 if (discon_issued)
1655 ath6kl_disconnect_event(vif, DISCONNECT_CMD,
1656 (vif->nw_type & AP_NETWORK) ?
1657 bcast_mac : vif->bssid,
1658 0, NULL, 0);
1659 }
1660
1661 if (vif->scan_req) {
1662 cfg80211_scan_done(vif->scan_req, true);
1663 vif->scan_req = NULL;
1664 }
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301665}
1666
Kalle Valobdcd8172011-07-18 00:22:30 +03001667void ath6kl_stop_txrx(struct ath6kl *ar)
1668{
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301669 struct ath6kl_vif *vif, *tmp_vif;
Kalle Valobdcd8172011-07-18 00:22:30 +03001670
1671 set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1672
1673 if (down_interruptible(&ar->sem)) {
1674 ath6kl_err("down_interruptible failed\n");
1675 return;
1676 }
1677
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301678 spin_lock(&ar->list_lock);
1679 list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1680 list_del(&vif->list);
1681 spin_unlock(&ar->list_lock);
1682 ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
Vasanthakumar Thiagarajan27929722011-10-25 19:34:21 +05301683 rtnl_lock();
1684 ath6kl_deinit_if_data(vif);
1685 rtnl_unlock();
Vasanthakumar Thiagarajan990bd912011-10-25 19:34:20 +05301686 spin_lock(&ar->list_lock);
1687 }
1688 spin_unlock(&ar->list_lock);
Kalle Valobdcd8172011-07-18 00:22:30 +03001689
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301690 clear_bit(WMI_READY, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001691
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301692 /*
1693 * After wmi_shudown all WMI events will be dropped. We
1694 * need to cleanup the buffers allocated in AP mode and
1695 * give disconnect notification to stack, which usually
1696 * happens in the disconnect_event. Simulate the disconnect
1697 * event by calling the function directly. Sometimes
1698 * disconnect_event will be received when the debug logs
1699 * are collected.
1700 */
1701 ath6kl_wmi_shutdown(ar->wmi);
Kalle Valobdcd8172011-07-18 00:22:30 +03001702
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301703 clear_bit(WMI_ENABLED, &ar->flag);
1704 if (ar->htc_target) {
1705 ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1706 ath6kl_htc_stop(ar->htc_target);
Kalle Valobdcd8172011-07-18 00:22:30 +03001707 }
1708
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301709 /*
1710 * Try to reset the device if we can. The driver may have been
1711 * configure NOT to reset the target during a debug session.
1712 */
1713 ath6kl_dbg(ATH6KL_DBG_TRC,
1714 "attempting to reset target on instance destroy\n");
1715 ath6kl_reset_device(ar, ar->target_type, true, true);
Kalle Valobdcd8172011-07-18 00:22:30 +03001716
Vasanthakumar Thiagarajan6db8fa52011-10-25 19:34:16 +05301717 clear_bit(WLAN_ENABLED, &ar->flag);
Kalle Valobdcd8172011-07-18 00:22:30 +03001718}