blob: 770bf6da8c3dd019aca47ca2251195db8e057564 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_MPSPEC_H
2#define __ASM_MPSPEC_H
3
4#include <linux/cpumask.h>
5#include <asm/mpspec_def.h>
6#include <mach_mpspec.h>
7
8extern int mp_bus_id_to_type [MAX_MP_BUSSES];
9extern int mp_bus_id_to_node [MAX_MP_BUSSES];
10extern int mp_bus_id_to_local [MAX_MP_BUSSES];
11extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
12extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
13
Venkatesh Pallipadi911a62d2005-09-03 15:56:31 -070014extern unsigned int def_to_bigsmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -070015extern unsigned int boot_cpu_physical_apicid;
16extern int smp_found_config;
17extern void find_smp_config (void);
18extern void get_smp_config (void);
19extern int nr_ioapics;
20extern int apic_version [MAX_APICS];
Linus Torvalds1da177e2005-04-16 15:20:36 -070021extern int mp_irq_entries;
22extern struct mpc_config_intsrc mp_irqs [MAX_IRQ_SOURCES];
23extern int mpc_default_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -070024extern unsigned long mp_lapic_addr;
25extern int pic_mode;
26extern int using_apic_timer;
27
Len Brown888ba6c2005-08-24 12:07:20 -040028#ifdef CONFIG_ACPI
Linus Torvalds1da177e2005-04-16 15:20:36 -070029extern void mp_register_lapic (u8 id, u8 enabled);
30extern void mp_register_lapic_address (u64 address);
31extern void mp_register_ioapic (u8 id, u32 address, u32 gsi_base);
32extern void mp_override_legacy_irq (u8 bus_irq, u8 polarity, u8 trigger, u32 gsi);
33extern void mp_config_acpi_legacy_irqs (void);
34extern int mp_register_gsi (u32 gsi, int edge_level, int active_high_low);
Len Brown888ba6c2005-08-24 12:07:20 -040035#endif /* CONFIG_ACPI */
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
38
39struct physid_mask
40{
41 unsigned long mask[PHYSID_ARRAY_SIZE];
42};
43
44typedef struct physid_mask physid_mask_t;
45
46#define physid_set(physid, map) set_bit(physid, (map).mask)
47#define physid_clear(physid, map) clear_bit(physid, (map).mask)
48#define physid_isset(physid, map) test_bit(physid, (map).mask)
49#define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
50
51#define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
52#define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
53#define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
54#define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
55#define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
56#define physids_equal(map1, map2) bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
57#define physids_weight(map) bitmap_weight((map).mask, MAX_APICS)
58#define physids_shift_right(d, s, n) bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
59#define physids_shift_left(d, s, n) bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
60#define physids_coerce(map) ((map).mask[0])
61
62#define physids_promote(physids) \
63 ({ \
64 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
65 __physid_mask.mask[0] = physids; \
66 __physid_mask; \
67 })
68
69#define physid_mask_of_physid(physid) \
70 ({ \
71 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
72 physid_set(physid, __physid_mask); \
73 __physid_mask; \
74 })
75
76#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
77#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
78
79extern physid_mask_t phys_cpu_present_map;
80
81#endif
82