| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| Uwe Zeisberger | f30c226 | 2006-10-03 23:01:26 +0200 | [diff] [blame] | 2 | * include/asm-x86_64/cache.h |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | */ |
| 4 | #ifndef __ARCH_X8664_CACHE_H |
| 5 | #define __ARCH_X8664_CACHE_H |
| 6 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | |
| 8 | /* L1 cache line size */ |
| 9 | #define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT) |
| 10 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | |
| Ravikiran G Thirumalai | 5fd63b3 | 2006-01-11 22:46:15 +0100 | [diff] [blame] | 12 | #ifdef CONFIG_X86_VSMP |
| 13 | |
| 14 | /* vSMP Internode cacheline shift */ |
| 15 | #define INTERNODE_CACHE_SHIFT (12) |
| 16 | #ifdef CONFIG_SMP |
| 17 | #define __cacheline_aligned_in_smp \ |
| 18 | __attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \ |
| 19 | __attribute__((__section__(".data.page_aligned"))) |
| 20 | #endif |
| 21 | |
| 22 | #endif |
| 23 | |
| Eric Dumazet | 0b699e3 | 2006-04-20 02:36:48 +0200 | [diff] [blame] | 24 | #define __read_mostly __attribute__((__section__(".data.read_mostly"))) |
| 25 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | #endif |