Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is provided under a dual BSD/GPLv2 license. When using or |
| 3 | * redistributing this file, you may do so under either license. |
| 4 | * |
| 5 | * GPL LICENSE SUMMARY |
| 6 | * |
| 7 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but |
| 14 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 21 | * The full GNU General Public License is included in this distribution |
| 22 | * in the file called LICENSE.GPL. |
| 23 | * |
| 24 | * BSD LICENSE |
| 25 | * |
| 26 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
| 27 | * All rights reserved. |
| 28 | * |
| 29 | * Redistribution and use in source and binary forms, with or without |
| 30 | * modification, are permitted provided that the following conditions |
| 31 | * are met: |
| 32 | * |
| 33 | * * Redistributions of source code must retain the above copyright |
| 34 | * notice, this list of conditions and the following disclaimer. |
| 35 | * * Redistributions in binary form must reproduce the above copyright |
| 36 | * notice, this list of conditions and the following disclaimer in |
| 37 | * the documentation and/or other materials provided with the |
| 38 | * distribution. |
| 39 | * * Neither the name of Intel Corporation nor the names of its |
| 40 | * contributors may be used to endorse or promote products derived |
| 41 | * from this software without specific prior written permission. |
| 42 | * |
| 43 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 44 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 45 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
| 46 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
| 47 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 48 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 49 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 50 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 51 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 52 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| 53 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 54 | */ |
| 55 | |
| 56 | #include "isci.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 57 | #include "task.h" |
| 58 | #include "request.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 59 | #include "scu_completion_codes.h" |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 60 | #include "scu_event_codes.h" |
Dave Jiang | 2ec53eb | 2011-05-04 18:01:22 -0700 | [diff] [blame] | 61 | #include "sas.h" |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 62 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 63 | static struct scu_sgl_element_pair *to_sgl_element_pair(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 64 | int idx) |
| 65 | { |
| 66 | if (idx == 0) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 67 | return &ireq->tc->sgl_pair_ab; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 68 | else if (idx == 1) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 69 | return &ireq->tc->sgl_pair_cd; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 70 | else if (idx < 0) |
| 71 | return NULL; |
| 72 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 73 | return &ireq->sg_table[idx - 2]; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 74 | } |
| 75 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 76 | static dma_addr_t to_sgl_element_pair_dma(struct isci_host *ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 77 | struct isci_request *ireq, u32 idx) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 78 | { |
| 79 | u32 offset; |
| 80 | |
| 81 | if (idx == 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 82 | offset = (void *) &ireq->tc->sgl_pair_ab - |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 83 | (void *) &ihost->task_context_table[0]; |
| 84 | return ihost->task_context_dma + offset; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 85 | } else if (idx == 1) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 86 | offset = (void *) &ireq->tc->sgl_pair_cd - |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 87 | (void *) &ihost->task_context_table[0]; |
| 88 | return ihost->task_context_dma + offset; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 89 | } |
| 90 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 91 | return sci_io_request_get_dma_addr(ireq, &ireq->sg_table[idx - 2]); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 92 | } |
| 93 | |
| 94 | static void init_sgl_element(struct scu_sgl_element *e, struct scatterlist *sg) |
| 95 | { |
| 96 | e->length = sg_dma_len(sg); |
| 97 | e->address_upper = upper_32_bits(sg_dma_address(sg)); |
| 98 | e->address_lower = lower_32_bits(sg_dma_address(sg)); |
| 99 | e->address_modifier = 0; |
| 100 | } |
| 101 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 102 | static void sci_request_build_sgl(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 103 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 104 | struct isci_host *ihost = ireq->isci_host; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 105 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 106 | struct scatterlist *sg = NULL; |
| 107 | dma_addr_t dma_addr; |
| 108 | u32 sg_idx = 0; |
| 109 | struct scu_sgl_element_pair *scu_sg = NULL; |
| 110 | struct scu_sgl_element_pair *prev_sg = NULL; |
| 111 | |
| 112 | if (task->num_scatter > 0) { |
| 113 | sg = task->scatter; |
| 114 | |
| 115 | while (sg) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 116 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 117 | init_sgl_element(&scu_sg->A, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 118 | sg = sg_next(sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 119 | if (sg) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 120 | init_sgl_element(&scu_sg->B, sg); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 121 | sg = sg_next(sg); |
| 122 | } else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 123 | memset(&scu_sg->B, 0, sizeof(scu_sg->B)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 124 | |
| 125 | if (prev_sg) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 126 | dma_addr = to_sgl_element_pair_dma(ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 127 | ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 128 | sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 129 | |
| 130 | prev_sg->next_pair_upper = |
| 131 | upper_32_bits(dma_addr); |
| 132 | prev_sg->next_pair_lower = |
| 133 | lower_32_bits(dma_addr); |
| 134 | } |
| 135 | |
| 136 | prev_sg = scu_sg; |
| 137 | sg_idx++; |
| 138 | } |
| 139 | } else { /* handle when no sg */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 140 | scu_sg = to_sgl_element_pair(ireq, sg_idx); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 141 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 142 | dma_addr = dma_map_single(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 143 | task->scatter, |
| 144 | task->total_xfer_len, |
| 145 | task->data_dir); |
| 146 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 147 | ireq->zero_scatter_daddr = dma_addr; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 148 | |
| 149 | scu_sg->A.length = task->total_xfer_len; |
| 150 | scu_sg->A.address_upper = upper_32_bits(dma_addr); |
| 151 | scu_sg->A.address_lower = lower_32_bits(dma_addr); |
| 152 | } |
| 153 | |
| 154 | if (scu_sg) { |
| 155 | scu_sg->next_pair_upper = 0; |
| 156 | scu_sg->next_pair_lower = 0; |
| 157 | } |
| 158 | } |
| 159 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 160 | static void sci_io_request_build_ssp_command_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 161 | { |
| 162 | struct ssp_cmd_iu *cmd_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 163 | struct sas_task *task = isci_request_access_task(ireq); |
| 164 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 165 | cmd_iu = &ireq->ssp.cmd; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 166 | |
| 167 | memcpy(cmd_iu->LUN, task->ssp_task.LUN, 8); |
| 168 | cmd_iu->add_cdb_len = 0; |
| 169 | cmd_iu->_r_a = 0; |
| 170 | cmd_iu->_r_b = 0; |
| 171 | cmd_iu->en_fburst = 0; /* unsupported */ |
| 172 | cmd_iu->task_prio = task->ssp_task.task_prio; |
| 173 | cmd_iu->task_attr = task->ssp_task.task_attr; |
| 174 | cmd_iu->_r_c = 0; |
| 175 | |
| 176 | sci_swab32_cpy(&cmd_iu->cdb, task->ssp_task.cdb, |
| 177 | sizeof(task->ssp_task.cdb) / sizeof(u32)); |
| 178 | } |
| 179 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 180 | static void sci_task_request_build_ssp_task_iu(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 181 | { |
| 182 | struct ssp_task_iu *task_iu; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 183 | struct sas_task *task = isci_request_access_task(ireq); |
| 184 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 185 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 186 | task_iu = &ireq->ssp.tmf; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 187 | |
| 188 | memset(task_iu, 0, sizeof(struct ssp_task_iu)); |
| 189 | |
| 190 | memcpy(task_iu->LUN, task->ssp_task.LUN, 8); |
| 191 | |
| 192 | task_iu->task_func = isci_tmf->tmf_code; |
| 193 | task_iu->task_tag = |
| 194 | (ireq->ttype == tmf_task) ? |
| 195 | isci_tmf->io_tag : |
| 196 | SCI_CONTROLLER_INVALID_IO_TAG; |
| 197 | } |
| 198 | |
| 199 | /** |
| 200 | * This method is will fill in the SCU Task Context for any type of SSP request. |
| 201 | * @sci_req: |
| 202 | * @task_context: |
| 203 | * |
| 204 | */ |
| 205 | static void scu_ssp_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 206 | struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 207 | struct scu_task_context *task_context) |
| 208 | { |
| 209 | dma_addr_t dma_addr; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 210 | struct isci_remote_device *idev; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 211 | struct isci_port *iport; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 212 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 213 | idev = ireq->target_device; |
| 214 | iport = idev->owning_port; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 215 | |
| 216 | /* Fill in the TC with the its required data */ |
| 217 | task_context->abort = 0; |
| 218 | task_context->priority = 0; |
| 219 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 220 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 221 | task_context->protocol_engine_index = ISCI_PEG; |
| 222 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 223 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SSP; |
| 224 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 225 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 226 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 227 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 228 | task_context->command_code = 0; |
| 229 | |
| 230 | task_context->link_layer_control = 0; |
| 231 | task_context->do_not_dma_ssp_good_response = 1; |
| 232 | task_context->strict_ordering = 0; |
| 233 | task_context->control_frame = 0; |
| 234 | task_context->timeout_enable = 0; |
| 235 | task_context->block_guard_enable = 0; |
| 236 | |
| 237 | task_context->address_modifier = 0; |
| 238 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 239 | /* task_context->type.ssp.tag = ireq->io_tag; */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 240 | task_context->task_phase = 0x01; |
| 241 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 242 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 243 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 244 | (iport->physical_port_index << |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 245 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 246 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 247 | |
| 248 | /* |
| 249 | * Copy the physical address for the command buffer to the |
| 250 | * SCU Task Context |
| 251 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 252 | dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.cmd); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 253 | |
| 254 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 255 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 256 | |
| 257 | /* |
| 258 | * Copy the physical address for the response buffer to the |
| 259 | * SCU Task Context |
| 260 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 261 | dma_addr = sci_io_request_get_dma_addr(ireq, &ireq->ssp.rsp); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 262 | |
| 263 | task_context->response_iu_upper = upper_32_bits(dma_addr); |
| 264 | task_context->response_iu_lower = lower_32_bits(dma_addr); |
| 265 | } |
| 266 | |
| 267 | /** |
| 268 | * This method is will fill in the SCU Task Context for a SSP IO request. |
| 269 | * @sci_req: |
| 270 | * |
| 271 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 272 | static void scu_ssp_io_request_construct_task_context(struct isci_request *ireq, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 273 | enum dma_data_direction dir, |
| 274 | u32 len) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 275 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 276 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 277 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 278 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 279 | |
| 280 | task_context->ssp_command_iu_length = |
| 281 | sizeof(struct ssp_cmd_iu) / sizeof(u32); |
| 282 | task_context->type.ssp.frame_type = SSP_COMMAND; |
| 283 | |
| 284 | switch (dir) { |
| 285 | case DMA_FROM_DEVICE: |
| 286 | case DMA_NONE: |
| 287 | default: |
| 288 | task_context->task_type = SCU_TASK_TYPE_IOREAD; |
| 289 | break; |
| 290 | case DMA_TO_DEVICE: |
| 291 | task_context->task_type = SCU_TASK_TYPE_IOWRITE; |
| 292 | break; |
| 293 | } |
| 294 | |
| 295 | task_context->transfer_length_bytes = len; |
| 296 | |
| 297 | if (task_context->transfer_length_bytes > 0) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 298 | sci_request_build_sgl(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 299 | } |
| 300 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 301 | /** |
| 302 | * This method will fill in the SCU Task Context for a SSP Task request. The |
| 303 | * following important settings are utilized: -# priority == |
| 304 | * SCU_TASK_PRIORITY_HIGH. This ensures that the task request is issued |
| 305 | * ahead of other task destined for the same Remote Node. -# task_type == |
| 306 | * SCU_TASK_TYPE_IOREAD. This simply indicates that a normal request type |
| 307 | * (i.e. non-raw frame) is being utilized to perform task management. -# |
| 308 | * control_frame == 1. This ensures that the proper endianess is set so |
| 309 | * that the bytes are transmitted in the right order for a task frame. |
| 310 | * @sci_req: This parameter specifies the task request object being |
| 311 | * constructed. |
| 312 | * |
| 313 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 314 | static void scu_ssp_task_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 315 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 316 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 317 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 318 | scu_ssp_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 319 | |
| 320 | task_context->control_frame = 1; |
| 321 | task_context->priority = SCU_TASK_PRIORITY_HIGH; |
| 322 | task_context->task_type = SCU_TASK_TYPE_RAW_FRAME; |
| 323 | task_context->transfer_length_bytes = 0; |
| 324 | task_context->type.ssp.frame_type = SSP_TASK; |
| 325 | task_context->ssp_command_iu_length = |
| 326 | sizeof(struct ssp_task_iu) / sizeof(u32); |
| 327 | } |
| 328 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 329 | /** |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 330 | * This method is will fill in the SCU Task Context for any type of SATA |
| 331 | * request. This is called from the various SATA constructors. |
| 332 | * @sci_req: The general IO request object which is to be used in |
| 333 | * constructing the SCU task context. |
| 334 | * @task_context: The buffer pointer for the SCU task context which is being |
| 335 | * constructed. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 336 | * |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 337 | * The general io request construction is complete. The buffer assignment for |
| 338 | * the command buffer is complete. none Revisit task context construction to |
| 339 | * determine what is common for SSP/SMP/STP task context structures. |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 340 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 341 | static void scu_sata_reqeust_construct_task_context( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 342 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 343 | struct scu_task_context *task_context) |
| 344 | { |
| 345 | dma_addr_t dma_addr; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 346 | struct isci_remote_device *idev; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 347 | struct isci_port *iport; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 348 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 349 | idev = ireq->target_device; |
| 350 | iport = idev->owning_port; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 351 | |
| 352 | /* Fill in the TC with the its required data */ |
| 353 | task_context->abort = 0; |
| 354 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 355 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 356 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 357 | task_context->protocol_engine_index = ISCI_PEG; |
| 358 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 359 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_STP; |
| 360 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 361 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 362 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 363 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 364 | task_context->command_code = 0; |
| 365 | |
| 366 | task_context->link_layer_control = 0; |
| 367 | task_context->do_not_dma_ssp_good_response = 1; |
| 368 | task_context->strict_ordering = 0; |
| 369 | task_context->control_frame = 0; |
| 370 | task_context->timeout_enable = 0; |
| 371 | task_context->block_guard_enable = 0; |
| 372 | |
| 373 | task_context->address_modifier = 0; |
| 374 | task_context->task_phase = 0x01; |
| 375 | |
| 376 | task_context->ssp_command_iu_length = |
| 377 | (sizeof(struct host_to_dev_fis) - sizeof(u32)) / sizeof(u32); |
| 378 | |
| 379 | /* Set the first word of the H2D REG FIS */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 380 | task_context->type.words[0] = *(u32 *)&ireq->stp.cmd; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 381 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 382 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 383 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 384 | (iport->physical_port_index << |
| 385 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 386 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 387 | /* |
| 388 | * Copy the physical address for the command buffer to the SCU Task |
| 389 | * Context. We must offset the command buffer by 4 bytes because the |
| 390 | * first 4 bytes are transfered in the body of the TC. |
| 391 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 392 | dma_addr = sci_io_request_get_dma_addr(ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 393 | ((char *) &ireq->stp.cmd) + |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 394 | sizeof(u32)); |
| 395 | |
| 396 | task_context->command_iu_upper = upper_32_bits(dma_addr); |
| 397 | task_context->command_iu_lower = lower_32_bits(dma_addr); |
| 398 | |
| 399 | /* SATA Requests do not have a response buffer */ |
| 400 | task_context->response_iu_upper = 0; |
| 401 | task_context->response_iu_lower = 0; |
| 402 | } |
| 403 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 404 | static void scu_stp_raw_request_construct_task_context(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 405 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 406 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 407 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 408 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 409 | |
| 410 | task_context->control_frame = 0; |
| 411 | task_context->priority = SCU_TASK_PRIORITY_NORMAL; |
| 412 | task_context->task_type = SCU_TASK_TYPE_SATA_RAW_FRAME; |
| 413 | task_context->type.stp.fis_type = FIS_REGH2D; |
| 414 | task_context->transfer_length_bytes = sizeof(struct host_to_dev_fis) - sizeof(u32); |
| 415 | } |
| 416 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 417 | static enum sci_status sci_stp_pio_request_construct(struct isci_request *ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 418 | bool copy_rx_frame) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 419 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 420 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 421 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 422 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 423 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 424 | stp_req->status = 0; |
| 425 | stp_req->sgl.offset = 0; |
| 426 | stp_req->sgl.set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 427 | |
| 428 | if (copy_rx_frame) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 429 | sci_request_build_sgl(ireq); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 430 | stp_req->sgl.index = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 431 | } else { |
| 432 | /* The user does not want the data copied to the SGL buffer location */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 433 | stp_req->sgl.index = -1; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 434 | } |
| 435 | |
| 436 | return SCI_SUCCESS; |
| 437 | } |
| 438 | |
| 439 | /** |
| 440 | * |
| 441 | * @sci_req: This parameter specifies the request to be constructed as an |
| 442 | * optimized request. |
| 443 | * @optimized_task_type: This parameter specifies whether the request is to be |
| 444 | * an UDMA request or a NCQ request. - A value of 0 indicates UDMA. - A |
| 445 | * value of 1 indicates NCQ. |
| 446 | * |
| 447 | * This method will perform request construction common to all types of STP |
| 448 | * requests that are optimized by the silicon (i.e. UDMA, NCQ). This method |
| 449 | * returns an indication as to whether the construction was successful. |
| 450 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 451 | static void sci_stp_optimized_request_construct(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 452 | u8 optimized_task_type, |
| 453 | u32 len, |
| 454 | enum dma_data_direction dir) |
| 455 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 456 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 457 | |
| 458 | /* Build the STP task context structure */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 459 | scu_sata_reqeust_construct_task_context(ireq, task_context); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 460 | |
| 461 | /* Copy over the SGL elements */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 462 | sci_request_build_sgl(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 463 | |
| 464 | /* Copy over the number of bytes to be transfered */ |
| 465 | task_context->transfer_length_bytes = len; |
| 466 | |
| 467 | if (dir == DMA_TO_DEVICE) { |
| 468 | /* |
| 469 | * The difference between the DMA IN and DMA OUT request task type |
| 470 | * values are consistent with the difference between FPDMA READ |
| 471 | * and FPDMA WRITE values. Add the supplied task type parameter |
| 472 | * to this difference to set the task type properly for this |
| 473 | * DATA OUT (WRITE) case. */ |
| 474 | task_context->task_type = optimized_task_type + (SCU_TASK_TYPE_DMA_OUT |
| 475 | - SCU_TASK_TYPE_DMA_IN); |
| 476 | } else { |
| 477 | /* |
| 478 | * For the DATA IN (READ) case, simply save the supplied |
| 479 | * optimized task type. */ |
| 480 | task_context->task_type = optimized_task_type; |
| 481 | } |
| 482 | } |
| 483 | |
| 484 | |
| 485 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 486 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 487 | sci_io_request_construct_sata(struct isci_request *ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 488 | u32 len, |
| 489 | enum dma_data_direction dir, |
| 490 | bool copy) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 491 | { |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 492 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 493 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 494 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 495 | /* check for management protocols */ |
| 496 | if (ireq->ttype == tmf_task) { |
| 497 | struct isci_tmf *tmf = isci_request_access_tmf(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 498 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 499 | if (tmf->tmf_code == isci_tmf_sata_srst_high || |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 500 | tmf->tmf_code == isci_tmf_sata_srst_low) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 501 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 502 | return SCI_SUCCESS; |
| 503 | } else { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 504 | dev_err(&ireq->owning_controller->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 505 | "%s: Request 0x%p received un-handled SAT " |
| 506 | "management protocol 0x%x.\n", |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 507 | __func__, ireq, tmf->tmf_code); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 508 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 509 | return SCI_FAILURE; |
| 510 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 511 | } |
| 512 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 513 | if (!sas_protocol_ata(task->task_proto)) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 514 | dev_err(&ireq->owning_controller->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 515 | "%s: Non-ATA protocol in SATA path: 0x%x\n", |
| 516 | __func__, |
| 517 | task->task_proto); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 518 | return SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 519 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 520 | } |
| 521 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 522 | /* non data */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 523 | if (task->data_dir == DMA_NONE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 524 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 525 | return SCI_SUCCESS; |
| 526 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 527 | |
| 528 | /* NCQ */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 529 | if (task->ata_task.use_ncq) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 530 | sci_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 531 | SCU_TASK_TYPE_FPDMAQ_READ, |
| 532 | len, dir); |
| 533 | return SCI_SUCCESS; |
| 534 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 535 | |
| 536 | /* DMA */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 537 | if (task->ata_task.dma_xfer) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 538 | sci_stp_optimized_request_construct(ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 539 | SCU_TASK_TYPE_DMA_IN, |
| 540 | len, dir); |
| 541 | return SCI_SUCCESS; |
| 542 | } else /* PIO */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 543 | return sci_stp_pio_request_construct(ireq, copy); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 544 | |
| 545 | return status; |
| 546 | } |
| 547 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 548 | static enum sci_status sci_io_request_construct_basic_ssp(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 549 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 550 | struct sas_task *task = isci_request_access_task(ireq); |
| 551 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 552 | ireq->protocol = SCIC_SSP_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 553 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 554 | scu_ssp_io_request_construct_task_context(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 555 | task->data_dir, |
| 556 | task->total_xfer_len); |
| 557 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 558 | sci_io_request_build_ssp_command_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 559 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 560 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 561 | |
| 562 | return SCI_SUCCESS; |
| 563 | } |
| 564 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 565 | enum sci_status sci_task_request_construct_ssp( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 566 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 567 | { |
| 568 | /* Construct the SSP Task SCU Task Context */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 569 | scu_ssp_task_request_construct_task_context(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 570 | |
| 571 | /* Fill in the SSP Task IU */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 572 | sci_task_request_build_ssp_task_iu(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 573 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 574 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 575 | |
| 576 | return SCI_SUCCESS; |
| 577 | } |
| 578 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 579 | static enum sci_status sci_io_request_construct_basic_sata(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 580 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 581 | enum sci_status status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 582 | bool copy = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 583 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 584 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 585 | ireq->protocol = SCIC_STP_PROTOCOL; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 586 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 587 | copy = (task->data_dir == DMA_NONE) ? false : true; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 588 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 589 | status = sci_io_request_construct_sata(ireq, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 590 | task->total_xfer_len, |
| 591 | task->data_dir, |
| 592 | copy); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 593 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 594 | if (status == SCI_SUCCESS) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 595 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 596 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 597 | return status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 598 | } |
| 599 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 600 | enum sci_status sci_task_request_construct_sata(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 601 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 602 | enum sci_status status = SCI_SUCCESS; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 603 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 604 | /* check for management protocols */ |
| 605 | if (ireq->ttype == tmf_task) { |
| 606 | struct isci_tmf *tmf = isci_request_access_tmf(ireq); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 607 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 608 | if (tmf->tmf_code == isci_tmf_sata_srst_high || |
| 609 | tmf->tmf_code == isci_tmf_sata_srst_low) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 610 | scu_stp_raw_request_construct_task_context(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 611 | } else { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 612 | dev_err(&ireq->owning_controller->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 613 | "%s: Request 0x%p received un-handled SAT " |
| 614 | "Protocol 0x%x.\n", |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 615 | __func__, ireq, tmf->tmf_code); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 616 | |
| 617 | return SCI_FAILURE; |
| 618 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 619 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 620 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 621 | if (status != SCI_SUCCESS) |
| 622 | return status; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 623 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 624 | |
| 625 | return status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 626 | } |
| 627 | |
| 628 | /** |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 629 | * sci_req_tx_bytes - bytes transferred when reply underruns request |
| 630 | * @sci_req: request that was terminated early |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 631 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 632 | #define SCU_TASK_CONTEXT_SRAM 0x200000 |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 633 | static u32 sci_req_tx_bytes(struct isci_request *ireq) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 634 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 635 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 636 | u32 ret_val = 0; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 637 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 638 | if (readl(&ihost->smu_registers->address_modifier) == 0) { |
| 639 | void __iomem *scu_reg_base = ihost->scu_registers; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 640 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 641 | /* get the bytes of data from the Address == BAR1 + 20002Ch + (256*TCi) where |
| 642 | * BAR1 is the scu_registers |
| 643 | * 0x20002C = 0x200000 + 0x2c |
| 644 | * = start of task context SRAM + offset of (type.ssp.data_offset) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 645 | * TCi is the io_tag of struct sci_request |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 646 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 647 | ret_val = readl(scu_reg_base + |
| 648 | (SCU_TASK_CONTEXT_SRAM + offsetof(struct scu_task_context, type.ssp.data_offset)) + |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 649 | ((sizeof(struct scu_task_context)) * ISCI_TAG_TCI(ireq->io_tag))); |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 650 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 651 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 652 | return ret_val; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 653 | } |
| 654 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 655 | enum sci_status sci_request_start(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 656 | { |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 657 | enum sci_base_request_states state; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 658 | struct scu_task_context *tc = ireq->tc; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 659 | struct isci_host *ihost = ireq->owning_controller; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 660 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 661 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 662 | if (state != SCI_REQ_CONSTRUCTED) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 663 | dev_warn(&ihost->pdev->dev, |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 664 | "%s: SCIC IO Request requested to start while in wrong " |
| 665 | "state %d\n", __func__, state); |
| 666 | return SCI_FAILURE_INVALID_STATE; |
| 667 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 668 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 669 | tc->task_index = ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 670 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 671 | switch (tc->protocol_type) { |
| 672 | case SCU_TASK_CONTEXT_PROTOCOL_SMP: |
| 673 | case SCU_TASK_CONTEXT_PROTOCOL_SSP: |
| 674 | /* SSP/SMP Frame */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 675 | tc->type.ssp.tag = ireq->io_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 676 | tc->type.ssp.target_port_transfer_tag = 0xFFFF; |
| 677 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 678 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 679 | case SCU_TASK_CONTEXT_PROTOCOL_STP: |
| 680 | /* STP/SATA Frame |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 681 | * tc->type.stp.ncq_tag = ireq->ncq_tag; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 682 | */ |
| 683 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 684 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 685 | case SCU_TASK_CONTEXT_PROTOCOL_NONE: |
| 686 | /* / @todo When do we set no protocol type? */ |
| 687 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 688 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 689 | default: |
| 690 | /* This should never happen since we build the IO |
| 691 | * requests */ |
| 692 | break; |
Piotr Sawicki | f4636a7 | 2011-05-10 23:50:32 +0000 | [diff] [blame] | 693 | } |
| 694 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 695 | /* Add to the post_context the io tag value */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 696 | ireq->post_context |= ISCI_TAG_TCI(ireq->io_tag); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 697 | |
| 698 | /* Everything is good go ahead and change state */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 699 | sci_change_state(&ireq->sm, SCI_REQ_STARTED); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 700 | |
| 701 | return SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 702 | } |
| 703 | |
| 704 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 705 | sci_io_request_terminate(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 706 | { |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 707 | enum sci_base_request_states state; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 708 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 709 | state = ireq->sm.current_state_id; |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 710 | |
| 711 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 712 | case SCI_REQ_CONSTRUCTED: |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 713 | ireq->scu_status = SCU_TASK_DONE_TASK_ABORT; |
| 714 | ireq->sci_status = SCI_FAILURE_IO_TERMINATED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 715 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 716 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 717 | case SCI_REQ_STARTED: |
| 718 | case SCI_REQ_TASK_WAIT_TC_COMP: |
| 719 | case SCI_REQ_SMP_WAIT_RESP: |
| 720 | case SCI_REQ_SMP_WAIT_TC_COMP: |
| 721 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
| 722 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
| 723 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
| 724 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: |
| 725 | case SCI_REQ_STP_PIO_WAIT_H2D: |
| 726 | case SCI_REQ_STP_PIO_WAIT_FRAME: |
| 727 | case SCI_REQ_STP_PIO_DATA_IN: |
| 728 | case SCI_REQ_STP_PIO_DATA_OUT: |
| 729 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED: |
| 730 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG: |
| 731 | case SCI_REQ_STP_SOFT_RESET_WAIT_D2H: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 732 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 733 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 734 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Jeff Skirvin | 2cd24ae | 2011-07-29 17:17:05 -0700 | [diff] [blame] | 735 | /* The task frame was already confirmed to have been |
| 736 | * sent by the SCU HW. Since the state machine is |
| 737 | * now only waiting for the task response itself, |
| 738 | * abort the request and complete it immediately |
| 739 | * and don't wait for the task response. |
| 740 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 741 | sci_change_state(&ireq->sm, SCI_REQ_ABORTING); |
| 742 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 743 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 744 | case SCI_REQ_ABORTING: |
Jeff Skirvin | 2cd24ae | 2011-07-29 17:17:05 -0700 | [diff] [blame] | 745 | /* If a request has a termination requested twice, return |
| 746 | * a failure indication, since HW confirmation of the first |
| 747 | * abort is still outstanding. |
| 748 | */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 749 | case SCI_REQ_COMPLETED: |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 750 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 751 | dev_warn(&ireq->owning_controller->pdev->dev, |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 752 | "%s: SCIC IO Request requested to abort while in wrong " |
| 753 | "state %d\n", |
| 754 | __func__, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 755 | ireq->sm.current_state_id); |
Dan Williams | f00e6ba | 2011-05-10 02:39:11 -0700 | [diff] [blame] | 756 | break; |
| 757 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 758 | |
| 759 | return SCI_FAILURE_INVALID_STATE; |
| 760 | } |
| 761 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 762 | enum sci_status sci_request_complete(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 763 | { |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 764 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 765 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 766 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 767 | state = ireq->sm.current_state_id; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 768 | if (WARN_ONCE(state != SCI_REQ_COMPLETED, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 769 | "isci: request completion from wrong state (%d)\n", state)) |
| 770 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 771 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 772 | if (ireq->saved_rx_frame_index != SCU_INVALID_FRAME_INDEX) |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 773 | sci_controller_release_frame(ihost, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 774 | ireq->saved_rx_frame_index); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 775 | |
| 776 | /* XXX can we just stop the machine and remove the 'final' state? */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 777 | sci_change_state(&ireq->sm, SCI_REQ_FINAL); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 778 | return SCI_SUCCESS; |
| 779 | } |
| 780 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 781 | enum sci_status sci_io_request_event_handler(struct isci_request *ireq, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 782 | u32 event_code) |
| 783 | { |
| 784 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 785 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 786 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 787 | state = ireq->sm.current_state_id; |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 788 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 789 | if (state != SCI_REQ_STP_PIO_DATA_IN) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 790 | dev_warn(&ihost->pdev->dev, "%s: (%x) in wrong state %d\n", |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 791 | __func__, event_code, state); |
| 792 | |
| 793 | return SCI_FAILURE_INVALID_STATE; |
| 794 | } |
| 795 | |
| 796 | switch (scu_get_event_specifier(event_code)) { |
| 797 | case SCU_TASK_DONE_CRC_ERR << SCU_EVENT_SPECIFIC_CODE_SHIFT: |
| 798 | /* We are waiting for data and the SCU has R_ERR the data frame. |
| 799 | * Go back to waiting for the D2H Register FIS |
| 800 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 801 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 802 | return SCI_SUCCESS; |
| 803 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 804 | dev_err(&ihost->pdev->dev, |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 805 | "%s: pio request unexpected event %#x\n", |
| 806 | __func__, event_code); |
| 807 | |
| 808 | /* TODO Should we fail the PIO request when we get an |
| 809 | * unexpected event? |
| 810 | */ |
| 811 | return SCI_FAILURE; |
| 812 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 813 | } |
| 814 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 815 | /* |
| 816 | * This function copies response data for requests returning response data |
| 817 | * instead of sense data. |
| 818 | * @sci_req: This parameter specifies the request object for which to copy |
| 819 | * the response data. |
| 820 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 821 | static void sci_io_request_copy_response(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 822 | { |
| 823 | void *resp_buf; |
| 824 | u32 len; |
| 825 | struct ssp_response_iu *ssp_response; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 826 | struct isci_tmf *isci_tmf = isci_request_access_tmf(ireq); |
| 827 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 828 | ssp_response = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 829 | |
| 830 | resp_buf = &isci_tmf->resp.resp_iu; |
| 831 | |
| 832 | len = min_t(u32, |
| 833 | SSP_RESP_IU_MAX_SIZE, |
| 834 | be32_to_cpu(ssp_response->response_data_len)); |
| 835 | |
| 836 | memcpy(resp_buf, ssp_response->resp_data, len); |
| 837 | } |
| 838 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 839 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 840 | request_started_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 841 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 842 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 843 | struct ssp_response_iu *resp_iu; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 844 | u8 datapres; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 845 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 846 | /* TODO: Any SDMA return code of other than 0 is bad decode 0x003C0000 |
| 847 | * to determine SDMA status |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 848 | */ |
| 849 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 850 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 851 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 852 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 853 | break; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 854 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EARLY_RESP): { |
| 855 | /* There are times when the SCU hardware will return an early |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 856 | * response because the io request specified more data than is |
| 857 | * returned by the target device (mode pages, inquiry data, |
| 858 | * etc.). We must check the response stats to see if this is |
| 859 | * truly a failed request or a good request that just got |
| 860 | * completed early. |
| 861 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 862 | struct ssp_response_iu *resp = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 863 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 864 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 865 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 866 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 867 | word_cnt); |
| 868 | |
| 869 | if (resp->status == 0) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 870 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 871 | ireq->sci_status = SCI_SUCCESS_IO_DONE_EARLY; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 872 | } else { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 873 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 874 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 875 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 876 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 877 | } |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 878 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CHECK_RESPONSE): { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 879 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 880 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 881 | sci_swab32_cpy(&ireq->ssp.rsp, |
| 882 | &ireq->ssp.rsp, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 883 | word_cnt); |
| 884 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 885 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 886 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 887 | break; |
| 888 | } |
| 889 | |
| 890 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RESP_LEN_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 891 | /* TODO With TASK_DONE_RESP_LEN_ERR is the response frame |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 892 | * guaranteed to be received before this completion status is |
| 893 | * posted? |
| 894 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 895 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 896 | datapres = resp_iu->datapres; |
| 897 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 898 | if (datapres == 1 || datapres == 2) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 899 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 900 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 901 | } else { |
| 902 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 903 | ireq->sci_status = SCI_SUCCESS; |
| 904 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 905 | break; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 906 | /* only stp device gets suspended. */ |
| 907 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
| 908 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_PERR): |
| 909 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_ERR): |
| 910 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_DATA_LEN_ERR): |
| 911 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_ABORT_ERR): |
| 912 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_WD_LEN): |
| 913 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): |
| 914 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_RESP): |
| 915 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_SDBFIS): |
| 916 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
| 917 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDB_ERR): |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 918 | if (ireq->protocol == SCIC_STP_PROTOCOL) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 919 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 920 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 921 | ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 922 | } else { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 923 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 924 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 925 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 926 | } |
| 927 | break; |
| 928 | |
| 929 | /* both stp/ssp device gets suspended */ |
| 930 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LF_ERR): |
| 931 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_WRONG_DESTINATION): |
| 932 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1): |
| 933 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2): |
| 934 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3): |
| 935 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_BAD_DESTINATION): |
| 936 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_ZONE_VIOLATION): |
| 937 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY): |
| 938 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED): |
| 939 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 940 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 941 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 942 | ireq->sci_status = SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 943 | break; |
| 944 | |
| 945 | /* neither ssp nor stp gets suspended. */ |
| 946 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_NAK_CMD_ERR): |
| 947 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_XR): |
| 948 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_XR_IU_LEN_ERR): |
| 949 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SDMA_ERR): |
| 950 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OFFSET_ERR): |
| 951 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_EXCESS_DATA): |
| 952 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 953 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 954 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 955 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
| 956 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_DATA): |
| 957 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_OPEN_FAIL): |
| 958 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_VIIT_ENTRY_NV): |
| 959 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_IIT_ENTRY_NV): |
| 960 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_RNCNV_OUTBOUND): |
| 961 | default: |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 962 | ireq->scu_status = SCU_GET_COMPLETION_TL_STATUS(completion_code) >> |
| 963 | SCU_COMPLETION_TL_STATUS_SHIFT; |
| 964 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 965 | break; |
| 966 | } |
| 967 | |
| 968 | /* |
| 969 | * TODO: This is probably wrong for ACK/NAK timeout conditions |
| 970 | */ |
| 971 | |
| 972 | /* In all cases we will treat this as the completion of the IO req. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 973 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 974 | return SCI_SUCCESS; |
| 975 | } |
| 976 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 977 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 978 | request_aborting_state_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 979 | u32 completion_code) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 980 | { |
| 981 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 982 | case (SCU_TASK_DONE_GOOD << SCU_COMPLETION_TL_STATUS_SHIFT): |
| 983 | case (SCU_TASK_DONE_TASK_ABORT << SCU_COMPLETION_TL_STATUS_SHIFT): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 984 | ireq->scu_status = SCU_TASK_DONE_TASK_ABORT; |
| 985 | ireq->sci_status = SCI_FAILURE_IO_TERMINATED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 986 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 987 | break; |
| 988 | |
| 989 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 990 | /* Unless we get some strange error wait for the task abort to complete |
| 991 | * TODO: Should there be a state change for this completion? |
| 992 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 993 | break; |
| 994 | } |
| 995 | |
| 996 | return SCI_SUCCESS; |
| 997 | } |
| 998 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 999 | static enum sci_status ssp_task_request_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1000 | u32 completion_code) |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1001 | { |
| 1002 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1003 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1004 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1005 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1006 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1007 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1008 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_ACK_NAK_TO): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1009 | /* Currently, the decision is to simply allow the task request |
| 1010 | * to timeout if the task IU wasn't received successfully. |
| 1011 | * There is a potential for receiving multiple task responses if |
| 1012 | * we decide to send the task IU again. |
| 1013 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1014 | dev_warn(&ireq->owning_controller->pdev->dev, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1015 | "%s: TaskRequest:0x%p CompletionCode:%x - " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1016 | "ACK/NAK timeout\n", __func__, ireq, |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1017 | completion_code); |
| 1018 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1019 | sci_change_state(&ireq->sm, SCI_REQ_TASK_WAIT_TC_RESP); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1020 | break; |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1021 | default: |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1022 | /* |
| 1023 | * All other completion status cause the IO to be complete. |
| 1024 | * If a NAK was received, then it is up to the user to retry |
| 1025 | * the request. |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1026 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1027 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1028 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1029 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 1030 | break; |
| 1031 | } |
| 1032 | |
| 1033 | return SCI_SUCCESS; |
| 1034 | } |
| 1035 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1036 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1037 | smp_request_await_response_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1038 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1039 | { |
| 1040 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1041 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1042 | /* In the AWAIT RESPONSE state, any TC completion is |
| 1043 | * unexpected. but if the TC has success status, we |
| 1044 | * complete the IO anyway. |
| 1045 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1046 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1047 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1048 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1049 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1050 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_RESP_TO_ERR): |
| 1051 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_UFI_ERR): |
| 1052 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_FRM_TYPE_ERR): |
| 1053 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_SMP_LL_RX_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1054 | /* These status has been seen in a specific LSI |
| 1055 | * expander, which sometimes is not able to send smp |
| 1056 | * response within 2 ms. This causes our hardware break |
| 1057 | * the connection and set TC completion with one of |
| 1058 | * these SMP_XXX_XX_ERR status. For these type of error, |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1059 | * we ask ihost user to retry the request. |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1060 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1061 | ireq->scu_status = SCU_TASK_DONE_SMP_RESP_TO_ERR; |
| 1062 | ireq->sci_status = SCI_FAILURE_RETRY_REQUIRED; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1063 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1064 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1065 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1066 | /* All other completion status cause the IO to be complete. If a NAK |
| 1067 | * was received, then it is up to the user to retry the request |
| 1068 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1069 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1070 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1071 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1072 | break; |
| 1073 | } |
| 1074 | |
| 1075 | return SCI_SUCCESS; |
| 1076 | } |
| 1077 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1078 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1079 | smp_request_await_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1080 | u32 completion_code) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1081 | { |
| 1082 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1083 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1084 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1085 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1086 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1087 | break; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1088 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1089 | /* All other completion status cause the IO to be |
| 1090 | * complete. If a NAK was received, then it is up to |
| 1091 | * the user to retry the request. |
| 1092 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1093 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1094 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1095 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 1096 | break; |
| 1097 | } |
| 1098 | |
| 1099 | return SCI_SUCCESS; |
| 1100 | } |
| 1101 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1102 | static struct scu_sgl_element *pio_sgl_next(struct isci_stp_request *stp_req) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1103 | { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1104 | struct scu_sgl_element *sgl; |
| 1105 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1106 | struct isci_request *ireq = to_ireq(stp_req); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1107 | struct isci_stp_pio_sgl *pio_sgl = &stp_req->sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1108 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1109 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1110 | if (!sgl_pair) |
| 1111 | sgl = NULL; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1112 | else if (pio_sgl->set == SCU_SGL_ELEMENT_PAIR_A) { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1113 | if (sgl_pair->B.address_lower == 0 && |
| 1114 | sgl_pair->B.address_upper == 0) { |
| 1115 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1116 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1117 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_B; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1118 | sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1119 | } |
| 1120 | } else { |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1121 | if (sgl_pair->next_pair_lower == 0 && |
| 1122 | sgl_pair->next_pair_upper == 0) { |
| 1123 | sgl = NULL; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1124 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1125 | pio_sgl->index++; |
| 1126 | pio_sgl->set = SCU_SGL_ELEMENT_PAIR_A; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1127 | sgl_pair = to_sgl_element_pair(ireq, pio_sgl->index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1128 | sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1129 | } |
| 1130 | } |
| 1131 | |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1132 | return sgl; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1133 | } |
| 1134 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1135 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1136 | stp_request_non_data_await_h2d_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1137 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1138 | { |
| 1139 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1140 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1141 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1142 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1143 | sci_change_state(&ireq->sm, SCI_REQ_STP_NON_DATA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1144 | break; |
| 1145 | |
| 1146 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1147 | /* All other completion status cause the IO to be |
| 1148 | * complete. If a NAK was received, then it is up to |
| 1149 | * the user to retry the request. |
| 1150 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1151 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1152 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1153 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1154 | break; |
| 1155 | } |
| 1156 | |
| 1157 | return SCI_SUCCESS; |
| 1158 | } |
| 1159 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1160 | #define SCU_MAX_FRAME_BUFFER_SIZE 0x400 /* 1K is the maximum SCU frame data payload */ |
| 1161 | |
| 1162 | /* transmit DATA_FIS from (current sgl + offset) for input |
| 1163 | * parameter length. current sgl and offset is alreay stored in the IO request |
| 1164 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1165 | static enum sci_status sci_stp_request_pio_data_out_trasmit_data_frame( |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1166 | struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1167 | u32 length) |
| 1168 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1169 | struct isci_stp_request *stp_req = &ireq->stp.req; |
| 1170 | struct scu_task_context *task_context = ireq->tc; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1171 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1172 | struct scu_sgl_element *current_sgl; |
| 1173 | |
| 1174 | /* Recycle the TC and reconstruct it for sending out DATA FIS containing |
| 1175 | * for the data from current_sgl+offset for the input length |
| 1176 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1177 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1178 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1179 | current_sgl = &sgl_pair->A; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1180 | else |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1181 | current_sgl = &sgl_pair->B; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1182 | |
| 1183 | /* update the TC */ |
| 1184 | task_context->command_iu_upper = current_sgl->address_upper; |
| 1185 | task_context->command_iu_lower = current_sgl->address_lower; |
| 1186 | task_context->transfer_length_bytes = length; |
| 1187 | task_context->type.stp.fis_type = FIS_DATA; |
| 1188 | |
| 1189 | /* send the new TC out. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1190 | return sci_controller_continue_io(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1191 | } |
| 1192 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1193 | static enum sci_status sci_stp_request_pio_data_out_transmit_data(struct isci_request *ireq) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1194 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1195 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1196 | struct scu_sgl_element_pair *sgl_pair; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1197 | struct scu_sgl_element *sgl; |
| 1198 | enum sci_status status; |
| 1199 | u32 offset; |
| 1200 | u32 len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1201 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1202 | offset = stp_req->sgl.offset; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1203 | sgl_pair = to_sgl_element_pair(ireq, stp_req->sgl.index); |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 1204 | if (WARN_ONCE(!sgl_pair, "%s: null sgl element", __func__)) |
| 1205 | return SCI_FAILURE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1206 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1207 | if (stp_req->sgl.set == SCU_SGL_ELEMENT_PAIR_A) { |
| 1208 | sgl = &sgl_pair->A; |
| 1209 | len = sgl_pair->A.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1210 | } else { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1211 | sgl = &sgl_pair->B; |
| 1212 | len = sgl_pair->B.length - offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1213 | } |
| 1214 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1215 | if (stp_req->pio_len == 0) |
| 1216 | return SCI_SUCCESS; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1217 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1218 | if (stp_req->pio_len >= len) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1219 | status = sci_stp_request_pio_data_out_trasmit_data_frame(ireq, len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1220 | if (status != SCI_SUCCESS) |
| 1221 | return status; |
| 1222 | stp_req->pio_len -= len; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1223 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1224 | /* update the current sgl, offset and save for future */ |
| 1225 | sgl = pio_sgl_next(stp_req); |
| 1226 | offset = 0; |
| 1227 | } else if (stp_req->pio_len < len) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1228 | sci_stp_request_pio_data_out_trasmit_data_frame(ireq, stp_req->pio_len); |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1229 | |
| 1230 | /* Sgl offset will be adjusted and saved for future */ |
| 1231 | offset += stp_req->pio_len; |
| 1232 | sgl->address_lower += stp_req->pio_len; |
| 1233 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1234 | } |
| 1235 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1236 | stp_req->sgl.offset = offset; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1237 | |
| 1238 | return status; |
| 1239 | } |
| 1240 | |
| 1241 | /** |
| 1242 | * |
| 1243 | * @stp_request: The request that is used for the SGL processing. |
| 1244 | * @data_buffer: The buffer of data to be copied. |
| 1245 | * @length: The length of the data transfer. |
| 1246 | * |
| 1247 | * Copy the data from the buffer for the length specified to the IO reqeust SGL |
| 1248 | * specified data region. enum sci_status |
| 1249 | */ |
| 1250 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1251 | sci_stp_request_pio_data_in_copy_data_buffer(struct isci_stp_request *stp_req, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1252 | u8 *data_buf, u32 len) |
| 1253 | { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1254 | struct isci_request *ireq; |
| 1255 | u8 *src_addr; |
| 1256 | int copy_len; |
| 1257 | struct sas_task *task; |
| 1258 | struct scatterlist *sg; |
| 1259 | void *kaddr; |
| 1260 | int total_len = len; |
| 1261 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1262 | ireq = to_ireq(stp_req); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1263 | task = isci_request_access_task(ireq); |
| 1264 | src_addr = data_buf; |
| 1265 | |
| 1266 | if (task->num_scatter > 0) { |
| 1267 | sg = task->scatter; |
| 1268 | |
| 1269 | while (total_len > 0) { |
| 1270 | struct page *page = sg_page(sg); |
| 1271 | |
| 1272 | copy_len = min_t(int, total_len, sg_dma_len(sg)); |
| 1273 | kaddr = kmap_atomic(page, KM_IRQ0); |
| 1274 | memcpy(kaddr + sg->offset, src_addr, copy_len); |
| 1275 | kunmap_atomic(kaddr, KM_IRQ0); |
| 1276 | total_len -= copy_len; |
| 1277 | src_addr += copy_len; |
| 1278 | sg = sg_next(sg); |
| 1279 | } |
| 1280 | } else { |
| 1281 | BUG_ON(task->total_xfer_len < total_len); |
| 1282 | memcpy(task->scatter, src_addr, total_len); |
| 1283 | } |
| 1284 | |
| 1285 | return SCI_SUCCESS; |
| 1286 | } |
| 1287 | |
| 1288 | /** |
| 1289 | * |
| 1290 | * @sci_req: The PIO DATA IN request that is to receive the data. |
| 1291 | * @data_buffer: The buffer to copy from. |
| 1292 | * |
| 1293 | * Copy the data buffer to the io request data region. enum sci_status |
| 1294 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1295 | static enum sci_status sci_stp_request_pio_data_in_copy_data( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1296 | struct isci_stp_request *stp_req, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1297 | u8 *data_buffer) |
| 1298 | { |
| 1299 | enum sci_status status; |
| 1300 | |
| 1301 | /* |
| 1302 | * If there is less than 1K remaining in the transfer request |
| 1303 | * copy just the data for the transfer */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1304 | if (stp_req->pio_len < SCU_MAX_FRAME_BUFFER_SIZE) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1305 | status = sci_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1306 | stp_req, data_buffer, stp_req->pio_len); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1307 | |
| 1308 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1309 | stp_req->pio_len = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1310 | } else { |
| 1311 | /* We are transfering the whole frame so copy */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1312 | status = sci_stp_request_pio_data_in_copy_data_buffer( |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1313 | stp_req, data_buffer, SCU_MAX_FRAME_BUFFER_SIZE); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1314 | |
| 1315 | if (status == SCI_SUCCESS) |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1316 | stp_req->pio_len -= SCU_MAX_FRAME_BUFFER_SIZE; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1317 | } |
| 1318 | |
| 1319 | return status; |
| 1320 | } |
| 1321 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1322 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1323 | stp_request_pio_await_h2d_completion_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1324 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1325 | { |
| 1326 | enum sci_status status = SCI_SUCCESS; |
| 1327 | |
| 1328 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1329 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1330 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1331 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1332 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1333 | break; |
| 1334 | |
| 1335 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1336 | /* All other completion status cause the IO to be |
| 1337 | * complete. If a NAK was received, then it is up to |
| 1338 | * the user to retry the request. |
| 1339 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1340 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1341 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1342 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1343 | break; |
| 1344 | } |
| 1345 | |
| 1346 | return status; |
| 1347 | } |
| 1348 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1349 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1350 | pio_data_out_tx_done_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1351 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1352 | { |
| 1353 | enum sci_status status = SCI_SUCCESS; |
| 1354 | bool all_frames_transferred = false; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1355 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1356 | |
| 1357 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1358 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
| 1359 | /* Transmit data */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1360 | if (stp_req->pio_len != 0) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1361 | status = sci_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1362 | if (status == SCI_SUCCESS) { |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1363 | if (stp_req->pio_len == 0) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1364 | all_frames_transferred = true; |
| 1365 | } |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1366 | } else if (stp_req->pio_len == 0) { |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1367 | /* |
| 1368 | * this will happen if the all data is written at the |
| 1369 | * first time after the pio setup fis is received |
| 1370 | */ |
| 1371 | all_frames_transferred = true; |
| 1372 | } |
| 1373 | |
| 1374 | /* all data transferred. */ |
| 1375 | if (all_frames_transferred) { |
| 1376 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1377 | * Change the state to SCI_REQ_STP_PIO_DATA_IN |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1378 | * and wait for PIO_SETUP fis / or D2H REg fis. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1379 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1380 | } |
| 1381 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1382 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1383 | default: |
| 1384 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1385 | * All other completion status cause the IO to be complete. |
| 1386 | * If a NAK was received, then it is up to the user to retry |
| 1387 | * the request. |
| 1388 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1389 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1390 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1391 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1392 | break; |
| 1393 | } |
| 1394 | |
| 1395 | return status; |
| 1396 | } |
| 1397 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1398 | static enum sci_status sci_stp_request_udma_general_frame_handler(struct isci_request *ireq, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1399 | u32 frame_index) |
| 1400 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1401 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1402 | struct dev_to_host_fis *frame_header; |
| 1403 | enum sci_status status; |
| 1404 | u32 *frame_buffer; |
| 1405 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1406 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1407 | frame_index, |
| 1408 | (void **)&frame_header); |
| 1409 | |
| 1410 | if ((status == SCI_SUCCESS) && |
| 1411 | (frame_header->fis_type == FIS_REGD2H)) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1412 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1413 | frame_index, |
| 1414 | (void **)&frame_buffer); |
| 1415 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1416 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1417 | frame_header, |
| 1418 | frame_buffer); |
| 1419 | } |
| 1420 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1421 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1422 | |
| 1423 | return status; |
| 1424 | } |
| 1425 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1426 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1427 | sci_io_request_frame_handler(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1428 | u32 frame_index) |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1429 | { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1430 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1431 | struct isci_stp_request *stp_req = &ireq->stp.req; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1432 | enum sci_base_request_states state; |
| 1433 | enum sci_status status; |
| 1434 | ssize_t word_cnt; |
| 1435 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1436 | state = ireq->sm.current_state_id; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1437 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1438 | case SCI_REQ_STARTED: { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1439 | struct ssp_frame_hdr ssp_hdr; |
| 1440 | void *frame_header; |
| 1441 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1442 | sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1443 | frame_index, |
| 1444 | &frame_header); |
| 1445 | |
| 1446 | word_cnt = sizeof(struct ssp_frame_hdr) / sizeof(u32); |
| 1447 | sci_swab32_cpy(&ssp_hdr, frame_header, word_cnt); |
| 1448 | |
| 1449 | if (ssp_hdr.frame_type == SSP_RESPONSE) { |
| 1450 | struct ssp_response_iu *resp_iu; |
| 1451 | ssize_t word_cnt = SSP_RESP_IU_MAX_SIZE / sizeof(u32); |
| 1452 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1453 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1454 | frame_index, |
| 1455 | (void **)&resp_iu); |
| 1456 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1457 | sci_swab32_cpy(&ireq->ssp.rsp, resp_iu, word_cnt); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1458 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1459 | resp_iu = &ireq->ssp.rsp; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1460 | |
| 1461 | if (resp_iu->datapres == 0x01 || |
| 1462 | resp_iu->datapres == 0x02) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1463 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1464 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
| 1465 | } else { |
| 1466 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1467 | ireq->sci_status = SCI_SUCCESS; |
| 1468 | } |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1469 | } else { |
| 1470 | /* not a response frame, why did it get forwarded? */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1471 | dev_err(&ihost->pdev->dev, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1472 | "%s: SCIC IO Request 0x%p received unexpected " |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1473 | "frame %d type 0x%02x\n", __func__, ireq, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1474 | frame_index, ssp_hdr.frame_type); |
| 1475 | } |
| 1476 | |
| 1477 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1478 | * In any case we are done with this frame buffer return it to |
| 1479 | * the controller |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1480 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1481 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1482 | |
| 1483 | return SCI_SUCCESS; |
| 1484 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1485 | |
| 1486 | case SCI_REQ_TASK_WAIT_TC_RESP: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1487 | sci_io_request_copy_response(ireq); |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1488 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1489 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1490 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1491 | |
| 1492 | case SCI_REQ_SMP_WAIT_RESP: { |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1493 | struct sas_task *task = isci_request_access_task(ireq); |
| 1494 | struct scatterlist *sg = &task->smp_task.smp_resp; |
| 1495 | void *frame_header, *kaddr; |
| 1496 | u8 *rsp; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1497 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1498 | sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1499 | frame_index, |
| 1500 | &frame_header); |
| 1501 | kaddr = kmap_atomic(sg_page(sg), KM_IRQ0); |
| 1502 | rsp = kaddr + sg->offset; |
| 1503 | sci_swab32_cpy(rsp, frame_header, 1); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1504 | |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1505 | if (rsp[0] == SMP_RESPONSE) { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1506 | void *smp_resp; |
| 1507 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1508 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1509 | frame_index, |
| 1510 | &smp_resp); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1511 | |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1512 | word_cnt = (sg->length/4)-1; |
| 1513 | if (word_cnt > 0) |
| 1514 | word_cnt = min_t(unsigned int, word_cnt, |
| 1515 | SCU_UNSOLICITED_FRAME_BUFFER_SIZE/4); |
| 1516 | sci_swab32_cpy(rsp + 4, smp_resp, word_cnt); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1517 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1518 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1519 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1520 | sci_change_state(&ireq->sm, SCI_REQ_SMP_WAIT_TC_COMP); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1521 | } else { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1522 | /* |
| 1523 | * This was not a response frame why did it get |
| 1524 | * forwarded? |
| 1525 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1526 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1527 | "%s: SCIC SMP Request 0x%p received unexpected " |
| 1528 | "frame %d type 0x%02x\n", |
| 1529 | __func__, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1530 | ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1531 | frame_index, |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1532 | rsp[0]); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1533 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1534 | ireq->scu_status = SCU_TASK_DONE_SMP_FRM_TYPE_ERR; |
| 1535 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1536 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1537 | } |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 1538 | kunmap_atomic(kaddr, KM_IRQ0); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1539 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1540 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1541 | |
| 1542 | return SCI_SUCCESS; |
| 1543 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1544 | |
| 1545 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1546 | return sci_stp_request_udma_general_frame_handler(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1547 | frame_index); |
| 1548 | |
| 1549 | case SCI_REQ_STP_UDMA_WAIT_D2H: |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1550 | /* Use the general frame handler to copy the resposne data */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1551 | status = sci_stp_request_udma_general_frame_handler(ireq, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1552 | |
| 1553 | if (status != SCI_SUCCESS) |
| 1554 | return status; |
| 1555 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1556 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1557 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 1558 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1559 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1560 | |
| 1561 | case SCI_REQ_STP_NON_DATA_WAIT_D2H: { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1562 | struct dev_to_host_fis *frame_header; |
| 1563 | u32 *frame_buffer; |
| 1564 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1565 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1566 | frame_index, |
| 1567 | (void **)&frame_header); |
| 1568 | |
| 1569 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1570 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1571 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1572 | "header for frame index %d, status %x\n", |
| 1573 | __func__, |
| 1574 | stp_req, |
| 1575 | frame_index, |
| 1576 | status); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1577 | |
| 1578 | return status; |
| 1579 | } |
| 1580 | |
| 1581 | switch (frame_header->fis_type) { |
| 1582 | case FIS_REGD2H: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1583 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1584 | frame_index, |
| 1585 | (void **)&frame_buffer); |
| 1586 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1587 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1588 | frame_header, |
| 1589 | frame_buffer); |
| 1590 | |
| 1591 | /* The command has completed with error */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1592 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1593 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1594 | break; |
| 1595 | |
| 1596 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1597 | dev_warn(&ihost->pdev->dev, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1598 | "%s: IO Request:0x%p Frame Id:%d protocol " |
| 1599 | "violation occurred\n", __func__, stp_req, |
| 1600 | frame_index); |
| 1601 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1602 | ireq->scu_status = SCU_TASK_DONE_UNEXP_FIS; |
| 1603 | ireq->sci_status = SCI_FAILURE_PROTOCOL_VIOLATION; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1604 | break; |
| 1605 | } |
| 1606 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1607 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1608 | |
| 1609 | /* Frame has been decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1610 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1611 | |
| 1612 | return status; |
| 1613 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1614 | |
| 1615 | case SCI_REQ_STP_PIO_WAIT_FRAME: { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1616 | struct sas_task *task = isci_request_access_task(ireq); |
| 1617 | struct dev_to_host_fis *frame_header; |
| 1618 | u32 *frame_buffer; |
| 1619 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1620 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1621 | frame_index, |
| 1622 | (void **)&frame_header); |
| 1623 | |
| 1624 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1625 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1626 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1627 | "header for frame index %d, status %x\n", |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1628 | __func__, stp_req, frame_index, status); |
| 1629 | return status; |
| 1630 | } |
| 1631 | |
| 1632 | switch (frame_header->fis_type) { |
| 1633 | case FIS_PIO_SETUP: |
| 1634 | /* Get from the frame buffer the PIO Setup Data */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1635 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1636 | frame_index, |
| 1637 | (void **)&frame_buffer); |
| 1638 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1639 | /* Get the data from the PIO Setup The SCU Hardware |
| 1640 | * returns first word in the frame_header and the rest |
| 1641 | * of the data is in the frame buffer so we need to |
| 1642 | * back up one dword |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1643 | */ |
| 1644 | |
| 1645 | /* transfer_count: first 16bits in the 4th dword */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1646 | stp_req->pio_len = frame_buffer[3] & 0xffff; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1647 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1648 | /* status: 4th byte in the 3rd dword */ |
| 1649 | stp_req->status = (frame_buffer[2] >> 24) & 0xff; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1650 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1651 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1652 | frame_header, |
| 1653 | frame_buffer); |
| 1654 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1655 | ireq->stp.rsp.status = stp_req->status; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1656 | |
| 1657 | /* The next state is dependent on whether the |
| 1658 | * request was PIO Data-in or Data out |
| 1659 | */ |
| 1660 | if (task->data_dir == DMA_FROM_DEVICE) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1661 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_IN); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1662 | } else if (task->data_dir == DMA_TO_DEVICE) { |
| 1663 | /* Transmit data */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1664 | status = sci_stp_request_pio_data_out_transmit_data(ireq); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1665 | if (status != SCI_SUCCESS) |
| 1666 | break; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1667 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_DATA_OUT); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1668 | } |
| 1669 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1670 | |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1671 | case FIS_SETDEVBITS: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1672 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1673 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1674 | |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1675 | case FIS_REGD2H: |
| 1676 | if (frame_header->status & ATA_BUSY) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1677 | /* |
| 1678 | * Now why is the drive sending a D2H Register |
| 1679 | * FIS when it is still busy? Do nothing since |
| 1680 | * we are still in the right state. |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1681 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1682 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1683 | "%s: SCIC PIO Request 0x%p received " |
| 1684 | "D2H Register FIS with BSY status " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1685 | "0x%x\n", |
| 1686 | __func__, |
| 1687 | stp_req, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1688 | frame_header->status); |
| 1689 | break; |
| 1690 | } |
| 1691 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1692 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1693 | frame_index, |
| 1694 | (void **)&frame_buffer); |
| 1695 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1696 | sci_controller_copy_sata_response(&ireq->stp.req, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1697 | frame_header, |
| 1698 | frame_buffer); |
| 1699 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1700 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1701 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1702 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1703 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1704 | |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1705 | default: |
| 1706 | /* FIXME: what do we do here? */ |
| 1707 | break; |
| 1708 | } |
| 1709 | |
| 1710 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1711 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1712 | |
| 1713 | return status; |
| 1714 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1715 | |
| 1716 | case SCI_REQ_STP_PIO_DATA_IN: { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1717 | struct dev_to_host_fis *frame_header; |
| 1718 | struct sata_fis_data *frame_buffer; |
| 1719 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1720 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1721 | frame_index, |
| 1722 | (void **)&frame_header); |
| 1723 | |
| 1724 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1725 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1726 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1727 | "header for frame index %d, status %x\n", |
| 1728 | __func__, |
| 1729 | stp_req, |
| 1730 | frame_index, |
| 1731 | status); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1732 | return status; |
| 1733 | } |
| 1734 | |
| 1735 | if (frame_header->fis_type != FIS_DATA) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1736 | dev_err(&ihost->pdev->dev, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1737 | "%s: SCIC PIO Request 0x%p received frame %d " |
| 1738 | "with fis type 0x%02x when expecting a data " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1739 | "fis.\n", |
| 1740 | __func__, |
| 1741 | stp_req, |
| 1742 | frame_index, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1743 | frame_header->fis_type); |
| 1744 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1745 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1746 | ireq->sci_status = SCI_FAILURE_IO_REQUIRES_SCSI_ABORT; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1747 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1748 | |
| 1749 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1750 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1751 | return status; |
| 1752 | } |
| 1753 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1754 | if (stp_req->sgl.index < 0) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1755 | ireq->saved_rx_frame_index = frame_index; |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1756 | stp_req->pio_len = 0; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1757 | } else { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1758 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1759 | frame_index, |
| 1760 | (void **)&frame_buffer); |
| 1761 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1762 | status = sci_stp_request_pio_data_in_copy_data(stp_req, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1763 | (u8 *)frame_buffer); |
| 1764 | |
| 1765 | /* Frame is decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1766 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1767 | } |
| 1768 | |
| 1769 | /* Check for the end of the transfer, are there more |
| 1770 | * bytes remaining for this data transfer |
| 1771 | */ |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1772 | if (status != SCI_SUCCESS || stp_req->pio_len != 0) |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1773 | return status; |
| 1774 | |
Dan Williams | ba7cb22 | 2011-06-27 11:56:41 -0700 | [diff] [blame] | 1775 | if ((stp_req->status & ATA_BUSY) == 0) { |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1776 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1777 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1778 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1779 | } else { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1780 | sci_change_state(&ireq->sm, SCI_REQ_STP_PIO_WAIT_FRAME); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1781 | } |
| 1782 | return status; |
| 1783 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1784 | |
| 1785 | case SCI_REQ_STP_SOFT_RESET_WAIT_D2H: { |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1786 | struct dev_to_host_fis *frame_header; |
| 1787 | u32 *frame_buffer; |
| 1788 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1789 | status = sci_unsolicited_frame_control_get_header(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1790 | frame_index, |
| 1791 | (void **)&frame_header); |
| 1792 | if (status != SCI_SUCCESS) { |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1793 | dev_err(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1794 | "%s: SCIC IO Request 0x%p could not get frame " |
| 1795 | "header for frame index %d, status %x\n", |
| 1796 | __func__, |
| 1797 | stp_req, |
| 1798 | frame_index, |
| 1799 | status); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1800 | return status; |
| 1801 | } |
| 1802 | |
| 1803 | switch (frame_header->fis_type) { |
| 1804 | case FIS_REGD2H: |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1805 | sci_unsolicited_frame_control_get_buffer(&ihost->uf_control, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1806 | frame_index, |
| 1807 | (void **)&frame_buffer); |
| 1808 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1809 | sci_controller_copy_sata_response(&ireq->stp.rsp, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1810 | frame_header, |
| 1811 | frame_buffer); |
| 1812 | |
| 1813 | /* The command has completed with error */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1814 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1815 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1816 | break; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1817 | |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1818 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1819 | dev_warn(&ihost->pdev->dev, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1820 | "%s: IO Request:0x%p Frame Id:%d protocol " |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1821 | "violation occurred\n", |
| 1822 | __func__, |
| 1823 | stp_req, |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1824 | frame_index); |
| 1825 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1826 | ireq->scu_status = SCU_TASK_DONE_UNEXP_FIS; |
| 1827 | ireq->sci_status = SCI_FAILURE_PROTOCOL_VIOLATION; |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1828 | break; |
| 1829 | } |
| 1830 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1831 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1832 | |
| 1833 | /* Frame has been decoded return it to the controller */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1834 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1835 | |
| 1836 | return status; |
| 1837 | } |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1838 | case SCI_REQ_ABORTING: |
| 1839 | /* |
| 1840 | * TODO: Is it even possible to get an unsolicited frame in the |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1841 | * aborting state? |
| 1842 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1843 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1844 | return SCI_SUCCESS; |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1845 | |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1846 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1847 | dev_warn(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1848 | "%s: SCIC IO Request given unexpected frame %x while " |
| 1849 | "in state %d\n", |
| 1850 | __func__, |
| 1851 | frame_index, |
| 1852 | state); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1853 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1854 | sci_controller_release_frame(ihost, frame_index); |
Dan Williams | d1c637c | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1855 | return SCI_FAILURE_INVALID_STATE; |
| 1856 | } |
| 1857 | } |
| 1858 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1859 | static enum sci_status stp_request_udma_await_tc_event(struct isci_request *ireq, |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1860 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1861 | { |
| 1862 | enum sci_status status = SCI_SUCCESS; |
| 1863 | |
| 1864 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1865 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1866 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1867 | ireq->sci_status = SCI_SUCCESS; |
| 1868 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1869 | break; |
| 1870 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_UNEXP_FIS): |
| 1871 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_REG_ERR): |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1872 | /* We must check ther response buffer to see if the D2H |
| 1873 | * Register FIS was received before we got the TC |
| 1874 | * completion. |
| 1875 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1876 | if (ireq->stp.rsp.fis_type == FIS_REGD2H) { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1877 | sci_remote_device_suspend(ireq->target_device, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1878 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code))); |
| 1879 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1880 | ireq->scu_status = SCU_TASK_DONE_CHECK_RESPONSE; |
| 1881 | ireq->sci_status = SCI_FAILURE_IO_RESPONSE_VALID; |
| 1882 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1883 | } else { |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1884 | /* If we have an error completion status for the |
| 1885 | * TC then we can expect a D2H register FIS from |
| 1886 | * the device so we must change state to wait |
| 1887 | * for it |
| 1888 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1889 | sci_change_state(&ireq->sm, SCI_REQ_STP_UDMA_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1890 | } |
| 1891 | break; |
| 1892 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1893 | /* TODO Check to see if any of these completion status need to |
| 1894 | * wait for the device to host register fis. |
| 1895 | */ |
| 1896 | /* TODO We can retry the command for SCU_TASK_DONE_CMD_LL_R_ERR |
| 1897 | * - this comes only for B0 |
| 1898 | */ |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1899 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_INV_FIS_LEN): |
| 1900 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_MAX_PLD_ERR): |
| 1901 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_LL_R_ERR): |
| 1902 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CMD_LL_R_ERR): |
| 1903 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_CRC_ERR): |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1904 | sci_remote_device_suspend(ireq->target_device, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1905 | SCU_EVENT_SPECIFIC(SCU_NORMALIZE_COMPLETION_STATUS(completion_code))); |
| 1906 | /* Fall through to the default case */ |
| 1907 | default: |
| 1908 | /* All other completion status cause the IO to be complete. */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1909 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1910 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
| 1911 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1912 | break; |
| 1913 | } |
| 1914 | |
| 1915 | return status; |
| 1916 | } |
| 1917 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1918 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1919 | stp_request_soft_reset_await_h2d_asserted_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1920 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1921 | { |
| 1922 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1923 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1924 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1925 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1926 | sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1927 | break; |
| 1928 | |
| 1929 | default: |
| 1930 | /* |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1931 | * All other completion status cause the IO to be complete. |
| 1932 | * If a NAK was received, then it is up to the user to retry |
| 1933 | * the request. |
| 1934 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1935 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1936 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1937 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1938 | break; |
| 1939 | } |
| 1940 | |
| 1941 | return SCI_SUCCESS; |
| 1942 | } |
| 1943 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1944 | static enum sci_status |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1945 | stp_request_soft_reset_await_h2d_diagnostic_tc_event(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1946 | u32 completion_code) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1947 | { |
| 1948 | switch (SCU_GET_COMPLETION_TL_STATUS(completion_code)) { |
| 1949 | case SCU_MAKE_COMPLETION_STATUS(SCU_TASK_DONE_GOOD): |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1950 | ireq->scu_status = SCU_TASK_DONE_GOOD; |
| 1951 | ireq->sci_status = SCI_SUCCESS; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1952 | sci_change_state(&ireq->sm, SCI_REQ_STP_SOFT_RESET_WAIT_D2H); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1953 | break; |
| 1954 | |
| 1955 | default: |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1956 | /* All other completion status cause the IO to be complete. If |
| 1957 | * a NAK was received, then it is up to the user to retry the |
| 1958 | * request. |
| 1959 | */ |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 1960 | ireq->scu_status = SCU_NORMALIZE_COMPLETION_STATUS(completion_code); |
| 1961 | ireq->sci_status = SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1962 | sci_change_state(&ireq->sm, SCI_REQ_COMPLETED); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 1963 | break; |
| 1964 | } |
| 1965 | |
| 1966 | return SCI_SUCCESS; |
| 1967 | } |
| 1968 | |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1969 | enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 1970 | sci_io_request_tc_completion(struct isci_request *ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1971 | u32 completion_code) |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1972 | { |
| 1973 | enum sci_base_request_states state; |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 1974 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1975 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1976 | state = ireq->sm.current_state_id; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 1977 | |
| 1978 | switch (state) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1979 | case SCI_REQ_STARTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1980 | return request_started_state_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1981 | |
| 1982 | case SCI_REQ_TASK_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1983 | return ssp_task_request_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1984 | completion_code); |
| 1985 | |
| 1986 | case SCI_REQ_SMP_WAIT_RESP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1987 | return smp_request_await_response_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1988 | completion_code); |
| 1989 | |
| 1990 | case SCI_REQ_SMP_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1991 | return smp_request_await_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1992 | |
| 1993 | case SCI_REQ_STP_UDMA_WAIT_TC_COMP: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1994 | return stp_request_udma_await_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1995 | completion_code); |
| 1996 | |
| 1997 | case SCI_REQ_STP_NON_DATA_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 1998 | return stp_request_non_data_await_h2d_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 1999 | completion_code); |
| 2000 | |
| 2001 | case SCI_REQ_STP_PIO_WAIT_H2D: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2002 | return stp_request_pio_await_h2d_completion_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2003 | completion_code); |
| 2004 | |
| 2005 | case SCI_REQ_STP_PIO_DATA_OUT: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2006 | return pio_data_out_tx_done_tc_event(ireq, completion_code); |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2007 | |
| 2008 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2009 | return stp_request_soft_reset_await_h2d_asserted_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2010 | completion_code); |
| 2011 | |
| 2012 | case SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2013 | return stp_request_soft_reset_await_h2d_diagnostic_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2014 | completion_code); |
| 2015 | |
| 2016 | case SCI_REQ_ABORTING: |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2017 | return request_aborting_state_tc_event(ireq, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2018 | completion_code); |
| 2019 | |
| 2020 | default: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2021 | dev_warn(&ihost->pdev->dev, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2022 | "%s: SCIC IO Request given task completion " |
| 2023 | "notification %x while in wrong state %d\n", |
| 2024 | __func__, |
| 2025 | completion_code, |
| 2026 | state); |
| 2027 | return SCI_FAILURE_INVALID_STATE; |
Dan Williams | a7e255a | 2011-05-11 08:27:47 -0700 | [diff] [blame] | 2028 | } |
| 2029 | } |
| 2030 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2031 | /** |
| 2032 | * isci_request_process_response_iu() - This function sets the status and |
| 2033 | * response iu, in the task struct, from the request object for the upper |
| 2034 | * layer driver. |
| 2035 | * @sas_task: This parameter is the task struct from the upper layer driver. |
| 2036 | * @resp_iu: This parameter points to the response iu of the completed request. |
| 2037 | * @dev: This parameter specifies the linux device struct. |
| 2038 | * |
| 2039 | * none. |
| 2040 | */ |
| 2041 | static void isci_request_process_response_iu( |
| 2042 | struct sas_task *task, |
| 2043 | struct ssp_response_iu *resp_iu, |
| 2044 | struct device *dev) |
| 2045 | { |
| 2046 | dev_dbg(dev, |
| 2047 | "%s: resp_iu = %p " |
| 2048 | "resp_iu->status = 0x%x,\nresp_iu->datapres = %d " |
| 2049 | "resp_iu->response_data_len = %x, " |
| 2050 | "resp_iu->sense_data_len = %x\nrepsonse data: ", |
| 2051 | __func__, |
| 2052 | resp_iu, |
| 2053 | resp_iu->status, |
| 2054 | resp_iu->datapres, |
| 2055 | resp_iu->response_data_len, |
| 2056 | resp_iu->sense_data_len); |
| 2057 | |
| 2058 | task->task_status.stat = resp_iu->status; |
| 2059 | |
| 2060 | /* libsas updates the task status fields based on the response iu. */ |
| 2061 | sas_ssp_task_response(dev, task, resp_iu); |
| 2062 | } |
| 2063 | |
| 2064 | /** |
| 2065 | * isci_request_set_open_reject_status() - This function prepares the I/O |
| 2066 | * completion for OPEN_REJECT conditions. |
| 2067 | * @request: This parameter is the completed isci_request object. |
| 2068 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2069 | * @status_ptr: This parameter specifies the exec status for the I/O. |
| 2070 | * @complete_to_host_ptr: This parameter specifies the action to be taken by |
| 2071 | * the LLDD with respect to completing this request or forcing an abort |
| 2072 | * condition on the I/O. |
| 2073 | * @open_rej_reason: This parameter specifies the encoded reason for the |
| 2074 | * abandon-class reject. |
| 2075 | * |
| 2076 | * none. |
| 2077 | */ |
| 2078 | static void isci_request_set_open_reject_status( |
| 2079 | struct isci_request *request, |
| 2080 | struct sas_task *task, |
| 2081 | enum service_response *response_ptr, |
| 2082 | enum exec_status *status_ptr, |
| 2083 | enum isci_completion_selection *complete_to_host_ptr, |
| 2084 | enum sas_open_rej_reason open_rej_reason) |
| 2085 | { |
| 2086 | /* Task in the target is done. */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2087 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2088 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2089 | *status_ptr = SAS_OPEN_REJECT; |
| 2090 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2091 | task->task_status.open_rej_reason = open_rej_reason; |
| 2092 | } |
| 2093 | |
| 2094 | /** |
| 2095 | * isci_request_handle_controller_specific_errors() - This function decodes |
| 2096 | * controller-specific I/O completion error conditions. |
| 2097 | * @request: This parameter is the completed isci_request object. |
| 2098 | * @response_ptr: This parameter specifies the service response for the I/O. |
| 2099 | * @status_ptr: This parameter specifies the exec status for the I/O. |
| 2100 | * @complete_to_host_ptr: This parameter specifies the action to be taken by |
| 2101 | * the LLDD with respect to completing this request or forcing an abort |
| 2102 | * condition on the I/O. |
| 2103 | * |
| 2104 | * none. |
| 2105 | */ |
| 2106 | static void isci_request_handle_controller_specific_errors( |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2107 | struct isci_remote_device *idev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2108 | struct isci_request *request, |
| 2109 | struct sas_task *task, |
| 2110 | enum service_response *response_ptr, |
| 2111 | enum exec_status *status_ptr, |
| 2112 | enum isci_completion_selection *complete_to_host_ptr) |
| 2113 | { |
| 2114 | unsigned int cstatus; |
| 2115 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2116 | cstatus = request->scu_status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2117 | |
| 2118 | dev_dbg(&request->isci_host->pdev->dev, |
| 2119 | "%s: %p SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR " |
| 2120 | "- controller status = 0x%x\n", |
| 2121 | __func__, request, cstatus); |
| 2122 | |
| 2123 | /* Decode the controller-specific errors; most |
| 2124 | * important is to recognize those conditions in which |
| 2125 | * the target may still have a task outstanding that |
| 2126 | * must be aborted. |
| 2127 | * |
| 2128 | * Note that there are SCU completion codes being |
| 2129 | * named in the decode below for which SCIC has already |
| 2130 | * done work to handle them in a way other than as |
| 2131 | * a controller-specific completion code; these are left |
| 2132 | * in the decode below for completeness sake. |
| 2133 | */ |
| 2134 | switch (cstatus) { |
| 2135 | case SCU_TASK_DONE_DMASETUP_DIRERR: |
| 2136 | /* Also SCU_TASK_DONE_SMP_FRM_TYPE_ERR: */ |
| 2137 | case SCU_TASK_DONE_XFERCNT_ERR: |
| 2138 | /* Also SCU_TASK_DONE_SMP_UFI_ERR: */ |
| 2139 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
| 2140 | /* SCU_TASK_DONE_SMP_UFI_ERR == Task Done. */ |
| 2141 | *response_ptr = SAS_TASK_COMPLETE; |
| 2142 | |
| 2143 | /* See if the device has been/is being stopped. Note |
| 2144 | * that we ignore the quiesce state, since we are |
| 2145 | * concerned about the actual device state. |
| 2146 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2147 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2148 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2149 | else |
| 2150 | *status_ptr = SAS_ABORTED_TASK; |
| 2151 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2152 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2153 | |
| 2154 | *complete_to_host_ptr = |
| 2155 | isci_perform_normal_io_completion; |
| 2156 | } else { |
| 2157 | /* Task in the target is not done. */ |
| 2158 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2159 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2160 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2161 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2162 | else |
| 2163 | *status_ptr = SAM_STAT_TASK_ABORTED; |
| 2164 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2165 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2166 | |
| 2167 | *complete_to_host_ptr = |
| 2168 | isci_perform_error_io_completion; |
| 2169 | } |
| 2170 | |
| 2171 | break; |
| 2172 | |
| 2173 | case SCU_TASK_DONE_CRC_ERR: |
| 2174 | case SCU_TASK_DONE_NAK_CMD_ERR: |
| 2175 | case SCU_TASK_DONE_EXCESS_DATA: |
| 2176 | case SCU_TASK_DONE_UNEXP_FIS: |
| 2177 | /* Also SCU_TASK_DONE_UNEXP_RESP: */ |
| 2178 | case SCU_TASK_DONE_VIIT_ENTRY_NV: /* TODO - conditions? */ |
| 2179 | case SCU_TASK_DONE_IIT_ENTRY_NV: /* TODO - conditions? */ |
| 2180 | case SCU_TASK_DONE_RNCNV_OUTBOUND: /* TODO - conditions? */ |
| 2181 | /* These are conditions in which the target |
| 2182 | * has completed the task, so that no cleanup |
| 2183 | * is necessary. |
| 2184 | */ |
| 2185 | *response_ptr = SAS_TASK_COMPLETE; |
| 2186 | |
| 2187 | /* See if the device has been/is being stopped. Note |
| 2188 | * that we ignore the quiesce state, since we are |
| 2189 | * concerned about the actual device state. |
| 2190 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2191 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2192 | *status_ptr = SAS_DEVICE_UNKNOWN; |
| 2193 | else |
| 2194 | *status_ptr = SAS_ABORTED_TASK; |
| 2195 | |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2196 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2197 | |
| 2198 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2199 | break; |
| 2200 | |
| 2201 | |
| 2202 | /* Note that the only open reject completion codes seen here will be |
| 2203 | * abandon-class codes; all others are automatically retried in the SCU. |
| 2204 | */ |
| 2205 | case SCU_TASK_OPEN_REJECT_WRONG_DESTINATION: |
| 2206 | |
| 2207 | isci_request_set_open_reject_status( |
| 2208 | request, task, response_ptr, status_ptr, |
| 2209 | complete_to_host_ptr, SAS_OREJ_WRONG_DEST); |
| 2210 | break; |
| 2211 | |
| 2212 | case SCU_TASK_OPEN_REJECT_ZONE_VIOLATION: |
| 2213 | |
| 2214 | /* Note - the return of AB0 will change when |
| 2215 | * libsas implements detection of zone violations. |
| 2216 | */ |
| 2217 | isci_request_set_open_reject_status( |
| 2218 | request, task, response_ptr, status_ptr, |
| 2219 | complete_to_host_ptr, SAS_OREJ_RESV_AB0); |
| 2220 | break; |
| 2221 | |
| 2222 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1: |
| 2223 | |
| 2224 | isci_request_set_open_reject_status( |
| 2225 | request, task, response_ptr, status_ptr, |
| 2226 | complete_to_host_ptr, SAS_OREJ_RESV_AB1); |
| 2227 | break; |
| 2228 | |
| 2229 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2: |
| 2230 | |
| 2231 | isci_request_set_open_reject_status( |
| 2232 | request, task, response_ptr, status_ptr, |
| 2233 | complete_to_host_ptr, SAS_OREJ_RESV_AB2); |
| 2234 | break; |
| 2235 | |
| 2236 | case SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3: |
| 2237 | |
| 2238 | isci_request_set_open_reject_status( |
| 2239 | request, task, response_ptr, status_ptr, |
| 2240 | complete_to_host_ptr, SAS_OREJ_RESV_AB3); |
| 2241 | break; |
| 2242 | |
| 2243 | case SCU_TASK_OPEN_REJECT_BAD_DESTINATION: |
| 2244 | |
| 2245 | isci_request_set_open_reject_status( |
| 2246 | request, task, response_ptr, status_ptr, |
| 2247 | complete_to_host_ptr, SAS_OREJ_BAD_DEST); |
| 2248 | break; |
| 2249 | |
| 2250 | case SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY: |
| 2251 | |
| 2252 | isci_request_set_open_reject_status( |
| 2253 | request, task, response_ptr, status_ptr, |
| 2254 | complete_to_host_ptr, SAS_OREJ_STP_NORES); |
| 2255 | break; |
| 2256 | |
| 2257 | case SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED: |
| 2258 | |
| 2259 | isci_request_set_open_reject_status( |
| 2260 | request, task, response_ptr, status_ptr, |
| 2261 | complete_to_host_ptr, SAS_OREJ_EPROTO); |
| 2262 | break; |
| 2263 | |
| 2264 | case SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED: |
| 2265 | |
| 2266 | isci_request_set_open_reject_status( |
| 2267 | request, task, response_ptr, status_ptr, |
| 2268 | complete_to_host_ptr, SAS_OREJ_CONN_RATE); |
| 2269 | break; |
| 2270 | |
| 2271 | case SCU_TASK_DONE_LL_R_ERR: |
| 2272 | /* Also SCU_TASK_DONE_ACK_NAK_TO: */ |
| 2273 | case SCU_TASK_DONE_LL_PERR: |
| 2274 | case SCU_TASK_DONE_LL_SY_TERM: |
| 2275 | /* Also SCU_TASK_DONE_NAK_ERR:*/ |
| 2276 | case SCU_TASK_DONE_LL_LF_TERM: |
| 2277 | /* Also SCU_TASK_DONE_DATA_LEN_ERR: */ |
| 2278 | case SCU_TASK_DONE_LL_ABORT_ERR: |
| 2279 | case SCU_TASK_DONE_SEQ_INV_TYPE: |
| 2280 | /* Also SCU_TASK_DONE_UNEXP_XR: */ |
| 2281 | case SCU_TASK_DONE_XR_IU_LEN_ERR: |
| 2282 | case SCU_TASK_DONE_INV_FIS_LEN: |
| 2283 | /* Also SCU_TASK_DONE_XR_WD_LEN: */ |
| 2284 | case SCU_TASK_DONE_SDMA_ERR: |
| 2285 | case SCU_TASK_DONE_OFFSET_ERR: |
| 2286 | case SCU_TASK_DONE_MAX_PLD_ERR: |
| 2287 | case SCU_TASK_DONE_LF_ERR: |
| 2288 | case SCU_TASK_DONE_SMP_RESP_TO_ERR: /* Escalate to dev reset? */ |
| 2289 | case SCU_TASK_DONE_SMP_LL_RX_ERR: |
| 2290 | case SCU_TASK_DONE_UNEXP_DATA: |
| 2291 | case SCU_TASK_DONE_UNEXP_SDBFIS: |
| 2292 | case SCU_TASK_DONE_REG_ERR: |
| 2293 | case SCU_TASK_DONE_SDB_ERR: |
| 2294 | case SCU_TASK_DONE_TASK_ABORT: |
| 2295 | default: |
| 2296 | /* Task in the target is not done. */ |
| 2297 | *response_ptr = SAS_TASK_UNDELIVERED; |
| 2298 | *status_ptr = SAM_STAT_TASK_ABORTED; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2299 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2300 | if (task->task_proto == SAS_PROTOCOL_SMP) { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2301 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2302 | |
| 2303 | *complete_to_host_ptr = isci_perform_normal_io_completion; |
| 2304 | } else { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2305 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2306 | |
| 2307 | *complete_to_host_ptr = isci_perform_error_io_completion; |
| 2308 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2309 | break; |
| 2310 | } |
| 2311 | } |
| 2312 | |
| 2313 | /** |
| 2314 | * isci_task_save_for_upper_layer_completion() - This function saves the |
| 2315 | * request for later completion to the upper layer driver. |
| 2316 | * @host: This parameter is a pointer to the host on which the the request |
| 2317 | * should be queued (either as an error or success). |
| 2318 | * @request: This parameter is the completed request. |
| 2319 | * @response: This parameter is the response code for the completed task. |
| 2320 | * @status: This parameter is the status code for the completed task. |
| 2321 | * |
| 2322 | * none. |
| 2323 | */ |
| 2324 | static void isci_task_save_for_upper_layer_completion( |
| 2325 | struct isci_host *host, |
| 2326 | struct isci_request *request, |
| 2327 | enum service_response response, |
| 2328 | enum exec_status status, |
| 2329 | enum isci_completion_selection task_notification_selection) |
| 2330 | { |
| 2331 | struct sas_task *task = isci_request_access_task(request); |
| 2332 | |
Jeff Skirvin | ec6c963 | 2011-03-04 14:06:44 -0800 | [diff] [blame] | 2333 | task_notification_selection |
| 2334 | = isci_task_set_completion_status(task, response, status, |
| 2335 | task_notification_selection); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2336 | |
| 2337 | /* Tasks aborted specifically by a call to the lldd_abort_task |
| 2338 | * function should not be completed to the host in the regular path. |
| 2339 | */ |
| 2340 | switch (task_notification_selection) { |
| 2341 | |
| 2342 | case isci_perform_normal_io_completion: |
| 2343 | |
| 2344 | /* Normal notification (task_done) */ |
| 2345 | dev_dbg(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2346 | "%s: Normal - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2347 | __func__, |
| 2348 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2349 | task->task_status.resp, response, |
| 2350 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2351 | /* Add to the completed list. */ |
| 2352 | list_add(&request->completed_node, |
| 2353 | &host->requests_to_complete); |
Jeff Skirvin | ec6c963 | 2011-03-04 14:06:44 -0800 | [diff] [blame] | 2354 | |
| 2355 | /* Take the request off the device's pending request list. */ |
| 2356 | list_del_init(&request->dev_node); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2357 | break; |
| 2358 | |
| 2359 | case isci_perform_aborted_io_completion: |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2360 | /* No notification to libsas because this request is |
| 2361 | * already in the abort path. |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2362 | */ |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 2363 | dev_dbg(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2364 | "%s: Aborted - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2365 | __func__, |
| 2366 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2367 | task->task_status.resp, response, |
| 2368 | task->task_status.stat, status); |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2369 | |
| 2370 | /* Wake up whatever process was waiting for this |
| 2371 | * request to complete. |
| 2372 | */ |
| 2373 | WARN_ON(request->io_request_completion == NULL); |
| 2374 | |
| 2375 | if (request->io_request_completion != NULL) { |
| 2376 | |
| 2377 | /* Signal whoever is waiting that this |
| 2378 | * request is complete. |
| 2379 | */ |
| 2380 | complete(request->io_request_completion); |
| 2381 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2382 | break; |
| 2383 | |
| 2384 | case isci_perform_error_io_completion: |
| 2385 | /* Use sas_task_abort */ |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 2386 | dev_dbg(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2387 | "%s: Error - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2388 | __func__, |
| 2389 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2390 | task->task_status.resp, response, |
| 2391 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2392 | /* Add to the aborted list. */ |
| 2393 | list_add(&request->completed_node, |
Jeff Skirvin | 11b00c1 | 2011-03-04 14:06:40 -0800 | [diff] [blame] | 2394 | &host->requests_to_errorback); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2395 | break; |
| 2396 | |
| 2397 | default: |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 2398 | dev_dbg(&host->pdev->dev, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2399 | "%s: Unknown - task = %p, response=%d (%d), status=%d (%d)\n", |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2400 | __func__, |
| 2401 | task, |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2402 | task->task_status.resp, response, |
| 2403 | task->task_status.stat, status); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2404 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2405 | /* Add to the error to libsas list. */ |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2406 | list_add(&request->completed_node, |
Jeff Skirvin | 11b00c1 | 2011-03-04 14:06:40 -0800 | [diff] [blame] | 2407 | &host->requests_to_errorback); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2408 | break; |
| 2409 | } |
| 2410 | } |
| 2411 | |
Dan Williams | 60c48a4 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2412 | static void isci_process_stp_response(struct sas_task *task, struct dev_to_host_fis *fis) |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2413 | { |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2414 | struct task_status_struct *ts = &task->task_status; |
| 2415 | struct ata_task_resp *resp = (void *)&ts->buf[0]; |
| 2416 | |
Dan Williams | 60c48a4 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2417 | resp->frame_len = sizeof(*fis); |
| 2418 | memcpy(resp->ending_fis, fis, sizeof(*fis)); |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2419 | ts->buf_valid_size = sizeof(*resp); |
| 2420 | |
Dan Williams | 60c48a4 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2421 | /* If the device fault bit is set in the status register, then |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2422 | * set the sense data and return. |
| 2423 | */ |
Dan Williams | 60c48a4 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2424 | if (fis->status & ATA_DF) |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2425 | ts->stat = SAS_PROTO_RESPONSE; |
| 2426 | else |
| 2427 | ts->stat = SAM_STAT_GOOD; |
| 2428 | |
| 2429 | ts->resp = SAS_TASK_COMPLETE; |
| 2430 | } |
| 2431 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2432 | static void isci_request_io_request_complete(struct isci_host *ihost, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2433 | struct isci_request *request, |
| 2434 | enum sci_io_status completion_status) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2435 | { |
| 2436 | struct sas_task *task = isci_request_access_task(request); |
| 2437 | struct ssp_response_iu *resp_iu; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2438 | unsigned long task_flags; |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2439 | struct isci_remote_device *idev = isci_lookup_device(task->dev); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2440 | enum service_response response = SAS_TASK_UNDELIVERED; |
| 2441 | enum exec_status status = SAS_ABORTED_TASK; |
| 2442 | enum isci_request_status request_status; |
| 2443 | enum isci_completion_selection complete_to_host |
| 2444 | = isci_perform_normal_io_completion; |
| 2445 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2446 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2447 | "%s: request = %p, task = %p,\n" |
| 2448 | "task->data_dir = %d completion_status = 0x%x\n", |
| 2449 | __func__, |
| 2450 | request, |
| 2451 | task, |
| 2452 | task->data_dir, |
| 2453 | completion_status); |
| 2454 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2455 | spin_lock(&request->state_lock); |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2456 | request_status = request->status; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2457 | |
| 2458 | /* Decode the request status. Note that if the request has been |
| 2459 | * aborted by a task management function, we don't care |
| 2460 | * what the status is. |
| 2461 | */ |
| 2462 | switch (request_status) { |
| 2463 | |
| 2464 | case aborted: |
| 2465 | /* "aborted" indicates that the request was aborted by a task |
| 2466 | * management function, since once a task management request is |
| 2467 | * perfomed by the device, the request only completes because |
| 2468 | * of the subsequent driver terminate. |
| 2469 | * |
| 2470 | * Aborted also means an external thread is explicitly managing |
| 2471 | * this request, so that we do not complete it up the stack. |
| 2472 | * |
| 2473 | * The target is still there (since the TMF was successful). |
| 2474 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2475 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2476 | response = SAS_TASK_COMPLETE; |
| 2477 | |
| 2478 | /* See if the device has been/is being stopped. Note |
| 2479 | * that we ignore the quiesce state, since we are |
| 2480 | * concerned about the actual device state. |
| 2481 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2482 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2483 | status = SAS_DEVICE_UNKNOWN; |
| 2484 | else |
| 2485 | status = SAS_ABORTED_TASK; |
| 2486 | |
| 2487 | complete_to_host = isci_perform_aborted_io_completion; |
| 2488 | /* This was an aborted request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2489 | |
| 2490 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2491 | break; |
| 2492 | |
| 2493 | case aborting: |
| 2494 | /* aborting means that the task management function tried and |
| 2495 | * failed to abort the request. We need to note the request |
| 2496 | * as SAS_TASK_UNDELIVERED, so that the scsi mid layer marks the |
| 2497 | * target as down. |
| 2498 | * |
| 2499 | * Aborting also means an external thread is explicitly managing |
| 2500 | * this request, so that we do not complete it up the stack. |
| 2501 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2502 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2503 | response = SAS_TASK_UNDELIVERED; |
| 2504 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2505 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2506 | /* The device has been /is being stopped. Note that |
| 2507 | * we ignore the quiesce state, since we are |
| 2508 | * concerned about the actual device state. |
| 2509 | */ |
| 2510 | status = SAS_DEVICE_UNKNOWN; |
| 2511 | else |
| 2512 | status = SAS_PHY_DOWN; |
| 2513 | |
| 2514 | complete_to_host = isci_perform_aborted_io_completion; |
| 2515 | |
| 2516 | /* This was an aborted request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2517 | |
| 2518 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2519 | break; |
| 2520 | |
| 2521 | case terminating: |
| 2522 | |
| 2523 | /* This was an terminated request. This happens when |
| 2524 | * the I/O is being terminated because of an action on |
| 2525 | * the device (reset, tear down, etc.), and the I/O needs |
| 2526 | * to be completed up the stack. |
| 2527 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2528 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2529 | response = SAS_TASK_UNDELIVERED; |
| 2530 | |
| 2531 | /* See if the device has been/is being stopped. Note |
| 2532 | * that we ignore the quiesce state, since we are |
| 2533 | * concerned about the actual device state. |
| 2534 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2535 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2536 | status = SAS_DEVICE_UNKNOWN; |
| 2537 | else |
| 2538 | status = SAS_ABORTED_TASK; |
| 2539 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2540 | complete_to_host = isci_perform_aborted_io_completion; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2541 | |
| 2542 | /* This was a terminated request. */ |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2543 | |
| 2544 | spin_unlock(&request->state_lock); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2545 | break; |
| 2546 | |
Jeff Skirvin | 77c852f | 2011-06-20 14:09:16 -0700 | [diff] [blame] | 2547 | case dead: |
| 2548 | /* This was a terminated request that timed-out during the |
| 2549 | * termination process. There is no task to complete to |
| 2550 | * libsas. |
| 2551 | */ |
| 2552 | complete_to_host = isci_perform_normal_io_completion; |
| 2553 | spin_unlock(&request->state_lock); |
| 2554 | break; |
| 2555 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2556 | default: |
| 2557 | |
Jeff Skirvin | a5fde22 | 2011-03-04 14:06:42 -0800 | [diff] [blame] | 2558 | /* The request is done from an SCU HW perspective. */ |
| 2559 | request->status = completed; |
| 2560 | |
| 2561 | spin_unlock(&request->state_lock); |
| 2562 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2563 | /* This is an active request being completed from the core. */ |
| 2564 | switch (completion_status) { |
| 2565 | |
| 2566 | case SCI_IO_FAILURE_RESPONSE_VALID: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2567 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2568 | "%s: SCI_IO_FAILURE_RESPONSE_VALID (%p/%p)\n", |
| 2569 | __func__, |
| 2570 | request, |
| 2571 | task); |
| 2572 | |
| 2573 | if (sas_protocol_ata(task->task_proto)) { |
Dan Williams | 60c48a4 | 2011-07-29 17:16:40 -0700 | [diff] [blame] | 2574 | isci_process_stp_response(task, &request->stp.rsp); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2575 | } else if (SAS_PROTOCOL_SSP == task->task_proto) { |
| 2576 | |
| 2577 | /* crack the iu response buffer. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2578 | resp_iu = &request->ssp.rsp; |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2579 | isci_request_process_response_iu(task, resp_iu, |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2580 | &ihost->pdev->dev); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2581 | |
| 2582 | } else if (SAS_PROTOCOL_SMP == task->task_proto) { |
| 2583 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2584 | dev_err(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2585 | "%s: SCI_IO_FAILURE_RESPONSE_VALID: " |
| 2586 | "SAS_PROTOCOL_SMP protocol\n", |
| 2587 | __func__); |
| 2588 | |
| 2589 | } else |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2590 | dev_err(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2591 | "%s: unknown protocol\n", __func__); |
| 2592 | |
| 2593 | /* use the task status set in the task struct by the |
| 2594 | * isci_request_process_response_iu call. |
| 2595 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2596 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2597 | response = task->task_status.resp; |
| 2598 | status = task->task_status.stat; |
| 2599 | break; |
| 2600 | |
| 2601 | case SCI_IO_SUCCESS: |
| 2602 | case SCI_IO_SUCCESS_IO_DONE_EARLY: |
| 2603 | |
| 2604 | response = SAS_TASK_COMPLETE; |
| 2605 | status = SAM_STAT_GOOD; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2606 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2607 | |
Dan Williams | 5cbadb2 | 2011-09-28 18:35:27 -0700 | [diff] [blame^] | 2608 | if (completion_status == SCI_IO_SUCCESS_IO_DONE_EARLY) { |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2609 | |
| 2610 | /* This was an SSP / STP / SATA transfer. |
| 2611 | * There is a possibility that less data than |
| 2612 | * the maximum was transferred. |
| 2613 | */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2614 | u32 transferred_length = sci_req_tx_bytes(request); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2615 | |
| 2616 | task->task_status.residual |
| 2617 | = task->total_xfer_len - transferred_length; |
| 2618 | |
| 2619 | /* If there were residual bytes, call this an |
| 2620 | * underrun. |
| 2621 | */ |
| 2622 | if (task->task_status.residual != 0) |
| 2623 | status = SAS_DATA_UNDERRUN; |
| 2624 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2625 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2626 | "%s: SCI_IO_SUCCESS_IO_DONE_EARLY %d\n", |
| 2627 | __func__, |
| 2628 | status); |
| 2629 | |
| 2630 | } else |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2631 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2632 | "%s: SCI_IO_SUCCESS\n", |
| 2633 | __func__); |
| 2634 | |
| 2635 | break; |
| 2636 | |
| 2637 | case SCI_IO_FAILURE_TERMINATED: |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2638 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2639 | "%s: SCI_IO_FAILURE_TERMINATED (%p/%p)\n", |
| 2640 | __func__, |
| 2641 | request, |
| 2642 | task); |
| 2643 | |
| 2644 | /* The request was terminated explicitly. No handling |
| 2645 | * is needed in the SCSI error handler path. |
| 2646 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2647 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2648 | response = SAS_TASK_UNDELIVERED; |
| 2649 | |
| 2650 | /* See if the device has been/is being stopped. Note |
| 2651 | * that we ignore the quiesce state, since we are |
| 2652 | * concerned about the actual device state. |
| 2653 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2654 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2655 | status = SAS_DEVICE_UNKNOWN; |
| 2656 | else |
| 2657 | status = SAS_ABORTED_TASK; |
| 2658 | |
| 2659 | complete_to_host = isci_perform_normal_io_completion; |
| 2660 | break; |
| 2661 | |
| 2662 | case SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR: |
| 2663 | |
| 2664 | isci_request_handle_controller_specific_errors( |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2665 | idev, request, task, &response, &status, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2666 | &complete_to_host); |
| 2667 | |
| 2668 | break; |
| 2669 | |
| 2670 | case SCI_IO_FAILURE_REMOTE_DEVICE_RESET_REQUIRED: |
| 2671 | /* This is a special case, in that the I/O completion |
| 2672 | * is telling us that the device needs a reset. |
| 2673 | * In order for the device reset condition to be |
| 2674 | * noticed, the I/O has to be handled in the error |
| 2675 | * handler. Set the reset flag and cause the |
| 2676 | * SCSI error thread to be scheduled. |
| 2677 | */ |
| 2678 | spin_lock_irqsave(&task->task_state_lock, task_flags); |
| 2679 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 2680 | spin_unlock_irqrestore(&task->task_state_lock, task_flags); |
| 2681 | |
Jeff Skirvin | aa14510 | 2011-03-07 16:40:47 -0700 | [diff] [blame] | 2682 | /* Fail the I/O. */ |
| 2683 | response = SAS_TASK_UNDELIVERED; |
| 2684 | status = SAM_STAT_TASK_ABORTED; |
| 2685 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2686 | complete_to_host = isci_perform_error_io_completion; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2687 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2688 | break; |
| 2689 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2690 | case SCI_FAILURE_RETRY_REQUIRED: |
| 2691 | |
| 2692 | /* Fail the I/O so it can be retried. */ |
| 2693 | response = SAS_TASK_UNDELIVERED; |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2694 | if (!idev) |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2695 | status = SAS_DEVICE_UNKNOWN; |
| 2696 | else |
| 2697 | status = SAS_ABORTED_TASK; |
| 2698 | |
| 2699 | complete_to_host = isci_perform_normal_io_completion; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2700 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2701 | break; |
| 2702 | |
| 2703 | |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2704 | default: |
| 2705 | /* Catch any otherwise unhandled error codes here. */ |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 2706 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2707 | "%s: invalid completion code: 0x%x - " |
| 2708 | "isci_request = %p\n", |
| 2709 | __func__, completion_status, request); |
| 2710 | |
| 2711 | response = SAS_TASK_UNDELIVERED; |
| 2712 | |
| 2713 | /* See if the device has been/is being stopped. Note |
| 2714 | * that we ignore the quiesce state, since we are |
| 2715 | * concerned about the actual device state. |
| 2716 | */ |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2717 | if (!idev) |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2718 | status = SAS_DEVICE_UNKNOWN; |
| 2719 | else |
| 2720 | status = SAS_ABORTED_TASK; |
| 2721 | |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2722 | if (SAS_PROTOCOL_SMP == task->task_proto) { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2723 | set_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2724 | complete_to_host = isci_perform_normal_io_completion; |
| 2725 | } else { |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2726 | clear_bit(IREQ_COMPLETE_IN_TARGET, &request->flags); |
Jeff Skirvin | cde76fb | 2011-06-20 14:09:06 -0700 | [diff] [blame] | 2727 | complete_to_host = isci_perform_error_io_completion; |
| 2728 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2729 | break; |
| 2730 | } |
| 2731 | break; |
| 2732 | } |
| 2733 | |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2734 | switch (task->task_proto) { |
| 2735 | case SAS_PROTOCOL_SSP: |
| 2736 | if (task->data_dir == DMA_NONE) |
| 2737 | break; |
| 2738 | if (task->num_scatter == 0) |
| 2739 | /* 0 indicates a single dma address */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2740 | dma_unmap_single(&ihost->pdev->dev, |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2741 | request->zero_scatter_daddr, |
| 2742 | task->total_xfer_len, task->data_dir); |
| 2743 | else /* unmap the sgl dma addresses */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2744 | dma_unmap_sg(&ihost->pdev->dev, task->scatter, |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2745 | request->num_sg_entries, task->data_dir); |
| 2746 | break; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2747 | case SAS_PROTOCOL_SMP: { |
| 2748 | struct scatterlist *sg = &task->smp_task.smp_req; |
| 2749 | struct smp_req *smp_req; |
| 2750 | void *kaddr; |
| 2751 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2752 | dma_unmap_sg(&ihost->pdev->dev, sg, 1, DMA_TO_DEVICE); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2753 | |
| 2754 | /* need to swab it back in case the command buffer is re-used */ |
| 2755 | kaddr = kmap_atomic(sg_page(sg), KM_IRQ0); |
| 2756 | smp_req = kaddr + sg->offset; |
| 2757 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
| 2758 | kunmap_atomic(kaddr, KM_IRQ0); |
| 2759 | break; |
| 2760 | } |
Dan Williams | ddcc7e3 | 2011-06-17 10:40:43 -0700 | [diff] [blame] | 2761 | default: |
| 2762 | break; |
| 2763 | } |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2764 | |
| 2765 | /* Put the completed request on the correct list */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2766 | isci_task_save_for_upper_layer_completion(ihost, request, response, |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2767 | status, complete_to_host |
| 2768 | ); |
| 2769 | |
| 2770 | /* complete the io request to the core. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2771 | sci_controller_complete_io(ihost, request->target_device, request); |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 2772 | isci_put_device(idev); |
| 2773 | |
Dan Williams | 67ea838 | 2011-05-08 11:47:15 -0700 | [diff] [blame] | 2774 | /* set terminated handle so it cannot be completed or |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2775 | * terminated again, and to cause any calls into abort |
| 2776 | * task to recognize the already completed case. |
| 2777 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2778 | set_bit(IREQ_TERMINATED, &request->flags); |
Dan Williams | 6f231dd | 2011-07-02 22:56:22 -0700 | [diff] [blame] | 2779 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2780 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2781 | static void sci_request_started_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2782 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2783 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2784 | struct domain_device *dev = ireq->target_device->domain_dev; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2785 | struct sas_task *task; |
| 2786 | |
| 2787 | /* XXX as hch said always creating an internal sas_task for tmf |
| 2788 | * requests would simplify the driver |
| 2789 | */ |
| 2790 | task = ireq->ttype == io_task ? isci_request_access_task(ireq) : NULL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2791 | |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2792 | /* all unaccelerated request types (non ssp or ncq) handled with |
| 2793 | * substates |
Dan Williams | f139303 | 2011-05-10 02:28:47 -0700 | [diff] [blame] | 2794 | */ |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2795 | if (!task && dev->dev_type == SAS_END_DEV) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2796 | sci_change_state(sm, SCI_REQ_TASK_WAIT_TC_COMP); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2797 | } else if (!task && |
| 2798 | (isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_high || |
| 2799 | isci_request_access_tmf(ireq)->tmf_code == isci_tmf_sata_srst_low)) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2800 | sci_change_state(sm, SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2801 | } else if (task && task->task_proto == SAS_PROTOCOL_SMP) { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2802 | sci_change_state(sm, SCI_REQ_SMP_WAIT_RESP); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2803 | } else if (task && sas_protocol_ata(task->task_proto) && |
| 2804 | !task->ata_task.use_ncq) { |
| 2805 | u32 state; |
| 2806 | |
| 2807 | if (task->data_dir == DMA_NONE) |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2808 | state = SCI_REQ_STP_NON_DATA_WAIT_H2D; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2809 | else if (task->ata_task.dma_xfer) |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2810 | state = SCI_REQ_STP_UDMA_WAIT_TC_COMP; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2811 | else /* PIO */ |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2812 | state = SCI_REQ_STP_PIO_WAIT_H2D; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2813 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2814 | sci_change_state(sm, state); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2815 | } |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2816 | } |
| 2817 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2818 | static void sci_request_completed_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2819 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2820 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 2821 | struct isci_host *ihost = ireq->owning_controller; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2822 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2823 | /* Tell the SCI_USER that the IO request is complete */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 2824 | if (!test_bit(IREQ_TMF, &ireq->flags)) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2825 | isci_request_io_request_complete(ihost, ireq, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2826 | ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2827 | else |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2828 | isci_task_request_complete(ihost, ireq, ireq->sci_status); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2829 | } |
| 2830 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2831 | static void sci_request_aborting_state_enter(struct sci_base_state_machine *sm) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2832 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2833 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2834 | |
| 2835 | /* Setting the abort bit in the Task Context is required by the silicon. */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2836 | ireq->tc->abort = 1; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2837 | } |
| 2838 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2839 | static void sci_stp_request_started_non_data_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2840 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2841 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2842 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2843 | ireq->target_device->working_request = ireq; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2844 | } |
| 2845 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2846 | static void sci_stp_request_started_pio_await_h2d_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2847 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2848 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2849 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2850 | ireq->target_device->working_request = ireq; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2851 | } |
| 2852 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2853 | static void sci_stp_request_started_soft_reset_await_h2d_asserted_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2854 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2855 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2856 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 2857 | ireq->target_device->working_request = ireq; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2858 | } |
| 2859 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2860 | static void sci_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter(struct sci_base_state_machine *sm) |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2861 | { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2862 | struct isci_request *ireq = container_of(sm, typeof(*ireq), sm); |
| 2863 | struct scu_task_context *tc = ireq->tc; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2864 | struct host_to_dev_fis *h2d_fis; |
| 2865 | enum sci_status status; |
| 2866 | |
| 2867 | /* Clear the SRST bit */ |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2868 | h2d_fis = &ireq->stp.cmd; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2869 | h2d_fis->control = 0; |
| 2870 | |
| 2871 | /* Clear the TC control bit */ |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 2872 | tc->control_frame = 0; |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2873 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2874 | status = sci_controller_continue_io(ireq); |
Dan Williams | 79e2b6b | 2011-05-11 08:29:56 -0700 | [diff] [blame] | 2875 | WARN_ONCE(status != SCI_SUCCESS, "isci: continue io failure\n"); |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2876 | } |
| 2877 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2878 | static const struct sci_base_state sci_request_state_table[] = { |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2879 | [SCI_REQ_INIT] = { }, |
| 2880 | [SCI_REQ_CONSTRUCTED] = { }, |
| 2881 | [SCI_REQ_STARTED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2882 | .enter_state = sci_request_started_state_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2883 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2884 | [SCI_REQ_STP_NON_DATA_WAIT_H2D] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2885 | .enter_state = sci_stp_request_started_non_data_await_h2d_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2886 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2887 | [SCI_REQ_STP_NON_DATA_WAIT_D2H] = { }, |
| 2888 | [SCI_REQ_STP_PIO_WAIT_H2D] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2889 | .enter_state = sci_stp_request_started_pio_await_h2d_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2890 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2891 | [SCI_REQ_STP_PIO_WAIT_FRAME] = { }, |
| 2892 | [SCI_REQ_STP_PIO_DATA_IN] = { }, |
| 2893 | [SCI_REQ_STP_PIO_DATA_OUT] = { }, |
| 2894 | [SCI_REQ_STP_UDMA_WAIT_TC_COMP] = { }, |
| 2895 | [SCI_REQ_STP_UDMA_WAIT_D2H] = { }, |
| 2896 | [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_ASSERTED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2897 | .enter_state = sci_stp_request_started_soft_reset_await_h2d_asserted_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2898 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2899 | [SCI_REQ_STP_SOFT_RESET_WAIT_H2D_DIAG] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2900 | .enter_state = sci_stp_request_started_soft_reset_await_h2d_diagnostic_completion_enter, |
Dan Williams | 5dec6f4 | 2011-05-10 02:28:49 -0700 | [diff] [blame] | 2901 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2902 | [SCI_REQ_STP_SOFT_RESET_WAIT_D2H] = { }, |
| 2903 | [SCI_REQ_TASK_WAIT_TC_COMP] = { }, |
| 2904 | [SCI_REQ_TASK_WAIT_TC_RESP] = { }, |
| 2905 | [SCI_REQ_SMP_WAIT_RESP] = { }, |
| 2906 | [SCI_REQ_SMP_WAIT_TC_COMP] = { }, |
| 2907 | [SCI_REQ_COMPLETED] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2908 | .enter_state = sci_request_completed_state_enter, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2909 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2910 | [SCI_REQ_ABORTING] = { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2911 | .enter_state = sci_request_aborting_state_enter, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2912 | }, |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2913 | [SCI_REQ_FINAL] = { }, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2914 | }; |
| 2915 | |
Edmund Nadolski | e301370 | 2011-06-02 00:10:43 +0000 | [diff] [blame] | 2916 | static void |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2917 | sci_general_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2918 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2919 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2920 | { |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2921 | sci_init_sm(&ireq->sm, sci_request_state_table, SCI_REQ_INIT); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2922 | |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2923 | ireq->target_device = idev; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2924 | ireq->protocol = SCIC_NO_PROTOCOL; |
| 2925 | ireq->saved_rx_frame_index = SCU_INVALID_FRAME_INDEX; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2926 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2927 | ireq->sci_status = SCI_SUCCESS; |
| 2928 | ireq->scu_status = 0; |
| 2929 | ireq->post_context = 0xFFFFFFFF; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2930 | } |
| 2931 | |
| 2932 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2933 | sci_io_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2934 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2935 | struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2936 | { |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2937 | struct domain_device *dev = idev->domain_dev; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2938 | enum sci_status status = SCI_SUCCESS; |
| 2939 | |
| 2940 | /* Build the common part of the request */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2941 | sci_general_request_construct(ihost, idev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2942 | |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2943 | if (idev->rnc.remote_node_index == SCIC_SDS_REMOTE_NODE_CONTEXT_INVALID_INDEX) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2944 | return SCI_FAILURE_INVALID_REMOTE_DEVICE; |
| 2945 | |
| 2946 | if (dev->dev_type == SAS_END_DEV) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2947 | /* pass */; |
| 2948 | else if (dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2949 | memset(&ireq->stp.cmd, 0, sizeof(ireq->stp.cmd)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2950 | else if (dev_is_expander(dev)) |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 2951 | /* pass */; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2952 | else |
| 2953 | return SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2954 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2955 | memset(ireq->tc, 0, offsetof(struct scu_task_context, sgl_pair_ab)); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2956 | |
| 2957 | return status; |
| 2958 | } |
| 2959 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2960 | enum sci_status sci_task_request_construct(struct isci_host *ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2961 | struct isci_remote_device *idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2962 | u16 io_tag, struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2963 | { |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 2964 | struct domain_device *dev = idev->domain_dev; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2965 | enum sci_status status = SCI_SUCCESS; |
| 2966 | |
| 2967 | /* Build the common part of the request */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2968 | sci_general_request_construct(ihost, idev, ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2969 | |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2970 | if (dev->dev_type == SAS_END_DEV || |
| 2971 | dev->dev_type == SATA_DEV || (dev->tproto & SAS_PROTOCOL_STP)) { |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 2972 | set_bit(IREQ_TMF, &ireq->flags); |
| 2973 | memset(ireq->tc, 0, sizeof(struct scu_task_context)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 2974 | } else |
| 2975 | status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2976 | |
| 2977 | return status; |
| 2978 | } |
| 2979 | |
| 2980 | static enum sci_status isci_request_ssp_request_construct( |
| 2981 | struct isci_request *request) |
| 2982 | { |
| 2983 | enum sci_status status; |
| 2984 | |
| 2985 | dev_dbg(&request->isci_host->pdev->dev, |
| 2986 | "%s: request = %p\n", |
| 2987 | __func__, |
| 2988 | request); |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 2989 | status = sci_io_request_construct_basic_ssp(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2990 | return status; |
| 2991 | } |
| 2992 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2993 | static enum sci_status isci_request_stp_request_construct(struct isci_request *ireq) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2994 | { |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 2995 | struct sas_task *task = isci_request_access_task(ireq); |
| 2996 | struct host_to_dev_fis *fis = &ireq->stp.cmd; |
| 2997 | struct ata_queued_cmd *qc = task->uldd_task; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2998 | enum sci_status status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 2999 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3000 | dev_dbg(&ireq->isci_host->pdev->dev, |
| 3001 | "%s: ireq = %p\n", |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3002 | __func__, |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3003 | ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3004 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3005 | memcpy(fis, &task->ata_task.fis, sizeof(struct host_to_dev_fis)); |
| 3006 | if (!task->ata_task.device_control_reg_update) |
| 3007 | fis->flags |= 0x80; |
| 3008 | fis->flags &= 0xF0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3009 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3010 | status = sci_io_request_construct_basic_sata(ireq); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3011 | |
Dan Williams | 16ba770 | 2011-07-01 10:52:55 -0700 | [diff] [blame] | 3012 | if (qc && (qc->tf.command == ATA_CMD_FPDMA_WRITE || |
| 3013 | qc->tf.command == ATA_CMD_FPDMA_READ)) { |
| 3014 | fis->sector_count = qc->tag << 3; |
| 3015 | ireq->tc->type.stp.ncq_tag = qc->tag; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3016 | } |
| 3017 | |
| 3018 | return status; |
| 3019 | } |
| 3020 | |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3021 | static enum sci_status |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3022 | sci_io_request_construct_smp(struct device *dev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3023 | struct isci_request *ireq, |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3024 | struct sas_task *task) |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3025 | { |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3026 | struct scatterlist *sg = &task->smp_task.smp_req; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3027 | struct isci_remote_device *idev; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3028 | struct scu_task_context *task_context; |
Dan Williams | ffe191c | 2011-06-29 13:09:25 -0700 | [diff] [blame] | 3029 | struct isci_port *iport; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3030 | struct smp_req *smp_req; |
| 3031 | void *kaddr; |
| 3032 | u8 req_len; |
| 3033 | u32 cmd; |
| 3034 | |
| 3035 | kaddr = kmap_atomic(sg_page(sg), KM_IRQ0); |
| 3036 | smp_req = kaddr + sg->offset; |
| 3037 | /* |
| 3038 | * Look at the SMP requests' header fields; for certain SAS 1.x SMP |
| 3039 | * functions under SAS 2.0, a zero request length really indicates |
| 3040 | * a non-zero default length. |
| 3041 | */ |
| 3042 | if (smp_req->req_len == 0) { |
| 3043 | switch (smp_req->func) { |
| 3044 | case SMP_DISCOVER: |
| 3045 | case SMP_REPORT_PHY_ERR_LOG: |
| 3046 | case SMP_REPORT_PHY_SATA: |
| 3047 | case SMP_REPORT_ROUTE_INFO: |
| 3048 | smp_req->req_len = 2; |
| 3049 | break; |
| 3050 | case SMP_CONF_ROUTE_INFO: |
| 3051 | case SMP_PHY_CONTROL: |
| 3052 | case SMP_PHY_TEST_FUNCTION: |
| 3053 | smp_req->req_len = 9; |
| 3054 | break; |
| 3055 | /* Default - zero is a valid default for 2.0. */ |
| 3056 | } |
| 3057 | } |
| 3058 | req_len = smp_req->req_len; |
| 3059 | sci_swab32_cpy(smp_req, smp_req, sg->length / sizeof(u32)); |
| 3060 | cmd = *(u32 *) smp_req; |
| 3061 | kunmap_atomic(kaddr, KM_IRQ0); |
| 3062 | |
| 3063 | if (!dma_map_sg(dev, sg, 1, DMA_TO_DEVICE)) |
| 3064 | return SCI_FAILURE; |
| 3065 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3066 | ireq->protocol = SCIC_SMP_PROTOCOL; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3067 | |
| 3068 | /* byte swap the smp request. */ |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3069 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3070 | task_context = ireq->tc; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3071 | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3072 | idev = ireq->target_device; |
| 3073 | iport = idev->owning_port; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3074 | |
| 3075 | /* |
| 3076 | * Fill in the TC with the its required data |
| 3077 | * 00h |
| 3078 | */ |
| 3079 | task_context->priority = 0; |
| 3080 | task_context->initiator_request = 1; |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3081 | task_context->connection_rate = idev->connection_rate; |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3082 | task_context->protocol_engine_index = ISCI_PEG; |
| 3083 | task_context->logical_port_index = iport->physical_port_index; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3084 | task_context->protocol_type = SCU_TASK_CONTEXT_PROTOCOL_SMP; |
| 3085 | task_context->abort = 0; |
| 3086 | task_context->valid = SCU_TASK_CONTEXT_VALID; |
| 3087 | task_context->context_type = SCU_TASK_CONTEXT_TYPE; |
| 3088 | |
| 3089 | /* 04h */ |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3090 | task_context->remote_node_index = idev->rnc.remote_node_index; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3091 | task_context->command_code = 0; |
| 3092 | task_context->task_type = SCU_TASK_TYPE_SMP_REQUEST; |
| 3093 | |
| 3094 | /* 08h */ |
| 3095 | task_context->link_layer_control = 0; |
| 3096 | task_context->do_not_dma_ssp_good_response = 1; |
| 3097 | task_context->strict_ordering = 0; |
| 3098 | task_context->control_frame = 1; |
| 3099 | task_context->timeout_enable = 0; |
| 3100 | task_context->block_guard_enable = 0; |
| 3101 | |
| 3102 | /* 0ch */ |
| 3103 | task_context->address_modifier = 0; |
| 3104 | |
| 3105 | /* 10h */ |
Dave Jiang | 77d6738 | 2011-05-25 02:21:57 +0000 | [diff] [blame] | 3106 | task_context->ssp_command_iu_length = req_len; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3107 | |
| 3108 | /* 14h */ |
| 3109 | task_context->transfer_length_bytes = 0; |
| 3110 | |
| 3111 | /* |
| 3112 | * 18h ~ 30h, protocol specific |
| 3113 | * since commandIU has been build by framework at this point, we just |
| 3114 | * copy the frist DWord from command IU to this location. */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3115 | memcpy(&task_context->type.smp, &cmd, sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3116 | |
| 3117 | /* |
| 3118 | * 40h |
| 3119 | * "For SMP you could program it to zero. We would prefer that way |
| 3120 | * so that done code will be consistent." - Venki |
| 3121 | */ |
| 3122 | task_context->task_phase = 0; |
| 3123 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3124 | ireq->post_context = (SCU_CONTEXT_COMMAND_REQUEST_TYPE_POST_TC | |
Dan Williams | 34a9915 | 2011-07-01 02:25:15 -0700 | [diff] [blame] | 3125 | (ISCI_PEG << SCU_CONTEXT_COMMAND_PROTOCOL_ENGINE_GROUP_SHIFT) | |
| 3126 | (iport->physical_port_index << |
| 3127 | SCU_CONTEXT_COMMAND_LOGICAL_PORT_SHIFT) | |
| 3128 | ISCI_TAG_TCI(ireq->io_tag)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3129 | /* |
| 3130 | * Copy the physical address for the command buffer to the SCU Task |
| 3131 | * Context command buffer should not contain command header. |
| 3132 | */ |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3133 | task_context->command_iu_upper = upper_32_bits(sg_dma_address(sg)); |
| 3134 | task_context->command_iu_lower = lower_32_bits(sg_dma_address(sg) + sizeof(u32)); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3135 | |
| 3136 | /* SMP response comes as UF, so no need to set response IU address. */ |
| 3137 | task_context->response_iu_upper = 0; |
| 3138 | task_context->response_iu_lower = 0; |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3139 | |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3140 | sci_change_state(&ireq->sm, SCI_REQ_CONSTRUCTED); |
Dan Williams | c72086e | 2011-05-10 02:28:48 -0700 | [diff] [blame] | 3141 | |
| 3142 | return SCI_SUCCESS; |
| 3143 | } |
| 3144 | |
| 3145 | /* |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3146 | * isci_smp_request_build() - This function builds the smp request. |
| 3147 | * @ireq: This parameter points to the isci_request allocated in the |
| 3148 | * request construct function. |
| 3149 | * |
| 3150 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3151 | */ |
| 3152 | static enum sci_status isci_smp_request_build(struct isci_request *ireq) |
| 3153 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3154 | struct sas_task *task = isci_request_access_task(ireq); |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3155 | struct device *dev = &ireq->isci_host->pdev->dev; |
Dan Williams | e9bf709 | 2011-06-16 16:59:56 -0700 | [diff] [blame] | 3156 | enum sci_status status = SCI_FAILURE; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3157 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3158 | status = sci_io_request_construct_smp(dev, ireq, task); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3159 | if (status != SCI_SUCCESS) |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3160 | dev_dbg(&ireq->isci_host->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3161 | "%s: failed with status = %d\n", |
| 3162 | __func__, |
| 3163 | status); |
| 3164 | |
| 3165 | return status; |
| 3166 | } |
| 3167 | |
| 3168 | /** |
| 3169 | * isci_io_request_build() - This function builds the io request object. |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3170 | * @ihost: This parameter specifies the ISCI host object |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3171 | * @request: This parameter points to the isci_request object allocated in the |
| 3172 | * request construct function. |
| 3173 | * @sci_device: This parameter is the handle for the sci core's remote device |
| 3174 | * object that is the destination for this request. |
| 3175 | * |
| 3176 | * SCI_SUCCESS on successfull completion, or specific failure code. |
| 3177 | */ |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3178 | static enum sci_status isci_io_request_build(struct isci_host *ihost, |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3179 | struct isci_request *request, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3180 | struct isci_remote_device *idev) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3181 | { |
| 3182 | enum sci_status status = SCI_SUCCESS; |
| 3183 | struct sas_task *task = isci_request_access_task(request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3184 | |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3185 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3186 | "%s: idev = 0x%p; request = %p, " |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3187 | "num_scatter = %d\n", |
| 3188 | __func__, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3189 | idev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3190 | request, |
| 3191 | task->num_scatter); |
| 3192 | |
| 3193 | /* map the sgl addresses, if present. |
| 3194 | * libata does the mapping for sata devices |
| 3195 | * before we get the request. |
| 3196 | */ |
| 3197 | if (task->num_scatter && |
| 3198 | !sas_protocol_ata(task->task_proto) && |
| 3199 | !(SAS_PROTOCOL_SMP & task->task_proto)) { |
| 3200 | |
| 3201 | request->num_sg_entries = dma_map_sg( |
Dan Williams | d9dcb4b | 2011-06-30 17:38:32 -0700 | [diff] [blame] | 3202 | &ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3203 | task->scatter, |
| 3204 | task->num_scatter, |
| 3205 | task->data_dir |
| 3206 | ); |
| 3207 | |
| 3208 | if (request->num_sg_entries == 0) |
| 3209 | return SCI_FAILURE_INSUFFICIENT_RESOURCES; |
| 3210 | } |
| 3211 | |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3212 | status = sci_io_request_construct(ihost, idev, request); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3213 | |
| 3214 | if (status != SCI_SUCCESS) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3215 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3216 | "%s: failed request construct\n", |
| 3217 | __func__); |
| 3218 | return SCI_FAILURE; |
| 3219 | } |
| 3220 | |
| 3221 | switch (task->task_proto) { |
| 3222 | case SAS_PROTOCOL_SMP: |
| 3223 | status = isci_smp_request_build(request); |
| 3224 | break; |
| 3225 | case SAS_PROTOCOL_SSP: |
| 3226 | status = isci_request_ssp_request_construct(request); |
| 3227 | break; |
| 3228 | case SAS_PROTOCOL_SATA: |
| 3229 | case SAS_PROTOCOL_STP: |
| 3230 | case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: |
| 3231 | status = isci_request_stp_request_construct(request); |
| 3232 | break; |
| 3233 | default: |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3234 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3235 | "%s: unknown protocol\n", __func__); |
| 3236 | return SCI_FAILURE; |
| 3237 | } |
| 3238 | |
| 3239 | return SCI_SUCCESS; |
| 3240 | } |
| 3241 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3242 | static struct isci_request *isci_request_from_tag(struct isci_host *ihost, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3243 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3244 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3245 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3246 | ireq = ihost->reqs[ISCI_TAG_TCI(tag)]; |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3247 | ireq->io_tag = tag; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3248 | ireq->io_request_completion = NULL; |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3249 | ireq->flags = 0; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3250 | ireq->num_sg_entries = 0; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3251 | INIT_LIST_HEAD(&ireq->completed_node); |
| 3252 | INIT_LIST_HEAD(&ireq->dev_node); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3253 | isci_request_change_state(ireq, allocated); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3254 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3255 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3256 | } |
| 3257 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3258 | static struct isci_request *isci_io_request_from_tag(struct isci_host *ihost, |
| 3259 | struct sas_task *task, |
| 3260 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3261 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3262 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3263 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3264 | ireq = isci_request_from_tag(ihost, tag); |
| 3265 | ireq->ttype_ptr.io_task_ptr = task; |
| 3266 | ireq->ttype = io_task; |
| 3267 | task->lldd_task = ireq; |
| 3268 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3269 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3270 | } |
| 3271 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3272 | struct isci_request *isci_tmf_request_from_tag(struct isci_host *ihost, |
| 3273 | struct isci_tmf *isci_tmf, |
| 3274 | u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3275 | { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3276 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3277 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3278 | ireq = isci_request_from_tag(ihost, tag); |
| 3279 | ireq->ttype_ptr.tmf_task_ptr = isci_tmf; |
| 3280 | ireq->ttype = tmf_task; |
| 3281 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3282 | return ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3283 | } |
| 3284 | |
Dan Williams | 209fae1 | 2011-06-13 17:39:44 -0700 | [diff] [blame] | 3285 | int isci_request_execute(struct isci_host *ihost, struct isci_remote_device *idev, |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3286 | struct sas_task *task, u16 tag) |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3287 | { |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3288 | enum sci_status status = SCI_FAILURE_UNSUPPORTED_PROTOCOL; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3289 | struct isci_request *ireq; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3290 | unsigned long flags; |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3291 | int ret = 0; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3292 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3293 | /* do common allocation and init of request object. */ |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3294 | ireq = isci_io_request_from_tag(ihost, task, tag); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3295 | |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3296 | status = isci_io_request_build(ihost, ireq, idev); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3297 | if (status != SCI_SUCCESS) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3298 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3299 | "%s: request_construct failed - status = 0x%x\n", |
| 3300 | __func__, |
| 3301 | status); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3302 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3303 | } |
| 3304 | |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3305 | spin_lock_irqsave(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3306 | |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3307 | if (test_bit(IDEV_IO_NCQERROR, &idev->flags)) { |
| 3308 | |
| 3309 | if (isci_task_is_ncq_recovery(task)) { |
| 3310 | |
| 3311 | /* The device is in an NCQ recovery state. Issue the |
| 3312 | * request on the task side. Note that it will |
| 3313 | * complete on the I/O request side because the |
| 3314 | * request was built that way (ie. |
| 3315 | * ireq->is_task_management_request is false). |
| 3316 | */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3317 | status = sci_controller_start_task(ihost, |
Dan Williams | 78a6f06 | 2011-06-30 16:31:37 -0700 | [diff] [blame] | 3318 | idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3319 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3320 | } else { |
| 3321 | status = SCI_FAILURE; |
| 3322 | } |
| 3323 | } else { |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3324 | /* send the request, let the core assign the IO TAG. */ |
Dan Williams | 89a7301 | 2011-06-30 19:14:33 -0700 | [diff] [blame] | 3325 | status = sci_controller_start_io(ihost, idev, |
Dan Williams | 5076a1a | 2011-06-27 14:57:03 -0700 | [diff] [blame] | 3326 | ireq); |
Jeff Skirvin | 9274f45 | 2011-06-23 17:09:02 -0700 | [diff] [blame] | 3327 | } |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3328 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3329 | if (status != SCI_SUCCESS && |
| 3330 | status != SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
Dan Williams | a8a0a13 | 2011-07-01 12:07:25 -0700 | [diff] [blame] | 3331 | dev_dbg(&ihost->pdev->dev, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3332 | "%s: failed request start (0x%x)\n", |
| 3333 | __func__, status); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3334 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | db05625 | 2011-06-17 14:18:39 -0700 | [diff] [blame] | 3335 | return status; |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3336 | } |
| 3337 | |
| 3338 | /* Either I/O started OK, or the core has signaled that |
| 3339 | * the device needs a target reset. |
| 3340 | * |
| 3341 | * In either case, hold onto the I/O for later. |
| 3342 | * |
| 3343 | * Update it's status and add it to the list in the |
| 3344 | * remote device object. |
| 3345 | */ |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3346 | list_add(&ireq->dev_node, &idev->reqs_in_process); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3347 | |
| 3348 | if (status == SCI_SUCCESS) { |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3349 | isci_request_change_state(ireq, started); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3350 | } else { |
| 3351 | /* The request did not really start in the |
| 3352 | * hardware, so clear the request handle |
| 3353 | * here so no terminations will be done. |
| 3354 | */ |
Dan Williams | 38d8879 | 2011-06-23 14:33:48 -0700 | [diff] [blame] | 3355 | set_bit(IREQ_TERMINATED, &ireq->flags); |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3356 | isci_request_change_state(ireq, completed); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3357 | } |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3358 | spin_unlock_irqrestore(&ihost->scic_lock, flags); |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3359 | |
| 3360 | if (status == |
| 3361 | SCI_FAILURE_REMOTE_DEVICE_RESET_REQUIRED) { |
| 3362 | /* Signal libsas that we need the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3363 | * handler thread to work on this I/O and that |
| 3364 | * we want a device reset. |
| 3365 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3366 | spin_lock_irqsave(&task->task_state_lock, flags); |
| 3367 | task->task_state_flags |= SAS_TASK_NEED_DEV_RESET; |
| 3368 | spin_unlock_irqrestore(&task->task_state_lock, flags); |
| 3369 | |
| 3370 | /* Cause this task to be scheduled in the SCSI error |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3371 | * handler thread. |
| 3372 | */ |
Dan Williams | 0d0cf14 | 2011-06-13 00:51:30 -0700 | [diff] [blame] | 3373 | isci_execpath_callback(ihost, task, |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3374 | sas_task_abort); |
| 3375 | |
| 3376 | /* Change the status, since we are holding |
Dan Williams | 312e0c2 | 2011-06-28 13:47:09 -0700 | [diff] [blame] | 3377 | * the I/O until it is managed by the SCSI |
| 3378 | * error handler. |
| 3379 | */ |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3380 | status = SCI_SUCCESS; |
| 3381 | } |
| 3382 | |
Dan Williams | f1f52e7 | 2011-05-10 02:28:45 -0700 | [diff] [blame] | 3383 | return ret; |
| 3384 | } |