Prasad Sodagudi | ed8df5b | 2012-09-28 13:49:59 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2012, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/linkage.h> |
| 14 | #include <asm/assembler.h> |
| 15 | |
| 16 | #define VERSION_ID 0x1 |
| 17 | #define MAGIC 0xDEAD0000 | VERSION_ID |
| 18 | .text |
| 19 | .align 3 |
| 20 | |
| 21 | ENTRY(msm7k_fiq_start) |
| 22 | sub r14, r14, #4 @return address |
| 23 | ldr r8, Lmsm_fiq_stack |
| 24 | ldr sp, [r8] @get stack |
| 25 | stmfa sp!, {r0-r7, lr} |
| 26 | stmfa sp!, {r8-r9} |
| 27 | ldr r8, Ldump_cpu_ctx |
| 28 | @ store magic to indicate a valid dump |
| 29 | ldr r9, Lmagic |
| 30 | str r9, [r8], #4 |
| 31 | @ get the current cpsr |
| 32 | mrs r9, cpsr |
| 33 | str r9, [r8],#4 |
| 34 | stmia r8!, {r0-r7} @ get the USR r0-r7 |
| 35 | mov r4, r8 |
| 36 | mov r5, #PSR_I_BIT | PSR_F_BIT | SYSTEM_MODE |
| 37 | msr cpsr_c, r5 @ select SYSTEM mode |
| 38 | stmia r4!, {r8-r14} |
| 39 | mov r5, #PSR_I_BIT | PSR_F_BIT | IRQ_MODE |
| 40 | msr cpsr_c, r5 @ select IRQ mode |
| 41 | mrs r5, spsr |
| 42 | str r5, [r4], #4 |
| 43 | stmia r4!, {r13-r14} |
| 44 | mov r5, #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
| 45 | msr cpsr_c, r5 @ select SVC mode |
| 46 | mrs r5, spsr |
| 47 | str r5, [r4], #4 |
| 48 | stmia r4!, {r13-r14} |
| 49 | mov r0, r13 |
| 50 | mov r1, r14 |
| 51 | mov r5, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE |
| 52 | msr cpsr_c, r5 @ select FIQ mode |
| 53 | stmfa sp!, {r0-r1} |
| 54 | mov r5, #PSR_I_BIT | PSR_F_BIT | ABT_MODE |
| 55 | msr cpsr_c, r5 @ select ABT mode |
| 56 | mrs r5, spsr |
| 57 | str r5, [r4], #4 |
| 58 | stmia r4!, {r13-r14} |
| 59 | mov r5, #PSR_I_BIT | PSR_F_BIT | UND_MODE |
| 60 | msr cpsr_c, r5 @ select UND mode |
| 61 | mrs r5, spsr |
| 62 | str r5, [r4], #4 |
| 63 | stmia r4!, {r13-r14} |
| 64 | mov r5, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE |
| 65 | msr cpsr_c, r5 @ select FIQ mode |
| 66 | mrs r5, spsr |
| 67 | str r5, [r4], #4 |
| 68 | stmia r4!, {r8-r14} |
| 69 | dsb |
| 70 | mov r5, #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
| 71 | msr cpsr_c, r5 @ select SVC mode |
| 72 | ldr r2, Lmsm_fiq_handler |
| 73 | blx r2 |
| 74 | mov r5, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE |
| 75 | msr cpsr_c, r5 @ select FIQ mode |
| 76 | ldmfa sp!, {r0, r1} |
| 77 | mov r5, #PSR_I_BIT | PSR_F_BIT | SVC_MODE |
| 78 | msr cpsr_c, r5 @ select SVC mode |
| 79 | mov r13, r0 |
| 80 | mov r14, r1 |
| 81 | mov r5, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE |
| 82 | msr cpsr_c, r5 @ select SVC mode |
| 83 | ldmfa sp!, {r8-r9} |
| 84 | ldmfa sp!, {r0-r7, pc}^ |
| 85 | Ldump_cpu_ctx: |
| 86 | .word msm_dump_cpu_ctx |
| 87 | Lmsm_fiq_stack: |
| 88 | .word msm7k_fiq_stack |
| 89 | Lmagic: |
| 90 | .word MAGIC |
| 91 | Lmsm_fiq_handler: |
| 92 | .word msm7k_fiq_handler |
| 93 | ENTRY(msm7k_fiq_length) |
| 94 | .word . - msm7k_fiq_start |