Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> |
| 3 | * Portions Copyright (C) 2001 Sun Microsystems, Inc. |
| 4 | * Portions Copyright (C) 2003 Red Hat Inc |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 5 | * Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz |
Sergei Shtylyov | 38b66f8 | 2007-04-20 22:16:58 +0200 | [diff] [blame] | 6 | * Portions Copyright (C) 2005-2007 MontaVista Software, Inc. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * |
| 8 | * Thanks to HighPoint Technologies for their assistance, and hardware. |
| 9 | * Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his |
| 10 | * donation of an ABit BP6 mainboard, processor, and memory acellerated |
| 11 | * development and support. |
| 12 | * |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 13 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 14 | * HighPoint has its own drivers (open source except for the RAID part) |
| 15 | * available from http://www.highpoint-tech.com/BIOS%20+%20Driver/. |
| 16 | * This may be useful to anyone wanting to work on this driver, however do not |
| 17 | * trust them too much since the code tends to become less and less meaningful |
| 18 | * as the time passes... :-/ |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 19 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | * Note that final HPT370 support was done by force extraction of GPL. |
| 21 | * |
| 22 | * - add function for getting/setting power status of drive |
| 23 | * - the HPT370's state machine can get confused. reset it before each dma |
| 24 | * xfer to prevent that from happening. |
| 25 | * - reset state engine whenever we get an error. |
| 26 | * - check for busmaster state at end of dma. |
| 27 | * - use new highpoint timings. |
| 28 | * - detect bus speed using highpoint register. |
| 29 | * - use pll if we don't have a clock table. added a 66MHz table that's |
| 30 | * just 2x the 33MHz table. |
| 31 | * - removed turnaround. NOTE: we never want to switch between pll and |
| 32 | * pci clocks as the chip can glitch in those cases. the highpoint |
| 33 | * approved workaround slows everything down too much to be useful. in |
| 34 | * addition, we would have to serialize access to each chip. |
| 35 | * Adrian Sun <a.sun@sun.com> |
| 36 | * |
| 37 | * add drive timings for 66MHz PCI bus, |
| 38 | * fix ATA Cable signal detection, fix incorrect /proc info |
| 39 | * add /proc display for per-drive PIO/DMA/UDMA mode and |
| 40 | * per-channel ATA-33/66 Cable detect. |
| 41 | * Duncan Laurie <void@sun.com> |
| 42 | * |
| 43 | * fixup /proc output for multiple controllers |
| 44 | * Tim Hockin <thockin@sun.com> |
| 45 | * |
| 46 | * On hpt366: |
| 47 | * Reset the hpt366 on error, reset on dma |
| 48 | * Fix disabling Fast Interrupt hpt366. |
| 49 | * Mike Waychison <crlf@sun.com> |
| 50 | * |
| 51 | * Added support for 372N clocking and clock switching. The 372N needs |
| 52 | * different clocks on read/write. This requires overloading rw_disk and |
| 53 | * other deeply crazy things. Thanks to <http://www.hoerstreich.de> for |
| 54 | * keeping me sane. |
| 55 | * Alan Cox <alan@redhat.com> |
| 56 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 57 | * - fix the clock turnaround code: it was writing to the wrong ports when |
| 58 | * called for the secondary channel, caching the current clock mode per- |
| 59 | * channel caused the cached register value to get out of sync with the |
| 60 | * actual one, the channels weren't serialized, the turnaround shouldn't |
| 61 | * be done on 66 MHz PCI bus |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 62 | * - disable UltraATA/100 for HPT370 by default as the 33 MHz clock being used |
| 63 | * does not allow for this speed anyway |
| 64 | * - avoid touching disabled channels (e.g. HPT371/N are single channel chips, |
| 65 | * their primary channel is kind of virtual, it isn't tied to any pins) |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 66 | * - fix/remove bad/unused timing tables and use one set of tables for the whole |
| 67 | * HPT37x chip family; save space by introducing the separate transfer mode |
| 68 | * table in which the mode lookup is done |
Sergei Shtylyov | 26c068d | 2006-12-13 00:35:52 -0800 | [diff] [blame] | 69 | * - use f_CNT value saved by the HighPoint BIOS as reading it directly gives |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 70 | * the wrong PCI frequency since DPLL has already been calibrated by BIOS; |
| 71 | * read it only from the function 0 of HPT374 chips |
Sergei Shtylyov | 33b18a6 | 2006-12-13 00:35:50 -0800 | [diff] [blame] | 72 | * - fix the hotswap code: it caused RESET- to glitch when tristating the bus, |
| 73 | * and for HPT36x the obsolete HDIO_TRISTATE_HWIF handler was called instead |
Sergei Shtylyov | 73d1dd9 | 2006-12-13 00:35:51 -0800 | [diff] [blame] | 74 | * - pass to init_chipset() handlers a copy of the IDE PCI device structure as |
| 75 | * they tamper with its fields |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 76 | * - pass to the init_setup handlers a copy of the ide_pci_device_t structure |
| 77 | * since they may tamper with its fields |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 78 | * - prefix the driver startup messages with the real chip name |
| 79 | * - claim the extra 240 bytes of I/O space for all chips |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 80 | * - optimize the UltraDMA filtering and the drive list lookup code |
Sergei Shtylyov | b458671 | 2007-02-07 18:17:54 +0100 | [diff] [blame] | 81 | * - use pci_get_slot() to get to the function 1 of HPT36x/374 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 82 | * - cache offset of the channel's misc. control registers (MCRs) being used |
| 83 | * throughout the driver |
| 84 | * - only touch the relevant MCR when detecting the cable type on HPT374's |
| 85 | * function 1 |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 86 | * - rename all the register related variables consistently |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 87 | * - move all the interrupt twiddling code from the speedproc handlers into |
| 88 | * init_hwif_hpt366(), also grouping all the DMA related code together there |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 89 | * - merge HPT36x/HPT37x speedproc handlers, fix PIO timing register mask and |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 90 | * separate the UltraDMA and MWDMA masks there to avoid changing PIO timings |
| 91 | * when setting an UltraDMA mode |
| 92 | * - fix hpt3xx_tune_drive() to set the PIO mode requested, not always select |
| 93 | * the best possible one |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 94 | * - clean up DMA timeout handling for HPT370 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 95 | * - switch to using the enumeration type to differ between the numerous chip |
| 96 | * variants, matching PCI device/revision ID with the chip type early, at the |
| 97 | * init_setup stage |
| 98 | * - extend the hpt_info structure to hold the DPLL and PCI clock frequencies, |
| 99 | * stop duplicating it for each channel by storing the pointer in the pci_dev |
| 100 | * structure: first, at the init_setup stage, point it to a static "template" |
| 101 | * with only the chip type and its specific base DPLL frequency, the highest |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 102 | * UltraDMA mode, and the chip settings table pointer filled, then, at the |
| 103 | * init_chipset stage, allocate per-chip instance and fill it with the rest |
| 104 | * of the necessary information |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 105 | * - get rid of the constant thresholds in the HPT37x PCI clock detection code, |
| 106 | * switch to calculating PCI clock frequency based on the chip's base DPLL |
| 107 | * frequency |
| 108 | * - switch to using the DPLL clock and enable UltraATA/133 mode by default on |
Sergei Shtylyov | 278978e | 2007-06-08 15:14:32 +0200 | [diff] [blame] | 109 | * anything newer than HPT370/A (except HPT374 that is not capable of this |
| 110 | * mode according to the manual) |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 111 | * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(), |
| 112 | * also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 113 | * unify HPT36x/37x timing setup code and the speedproc handlers by joining |
| 114 | * the register setting lists into the table indexed by the clock selected |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 115 | * - set the correct hwif->ultra_mask for each individual chip |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 116 | * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 117 | * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | */ |
| 119 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | #include <linux/types.h> |
| 121 | #include <linux/module.h> |
| 122 | #include <linux/kernel.h> |
| 123 | #include <linux/delay.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | #include <linux/blkdev.h> |
| 125 | #include <linux/hdreg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | #include <linux/interrupt.h> |
| 127 | #include <linux/pci.h> |
| 128 | #include <linux/init.h> |
| 129 | #include <linux/ide.h> |
| 130 | |
| 131 | #include <asm/uaccess.h> |
| 132 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | |
| 134 | /* various tuning parameters */ |
| 135 | #define HPT_RESET_STATE_ENGINE |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 136 | #undef HPT_DELAY_INTERRUPT |
| 137 | #define HPT_SERIALIZE_IO 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | |
| 139 | static const char *quirk_drives[] = { |
| 140 | "QUANTUM FIREBALLlct08 08", |
| 141 | "QUANTUM FIREBALLP KA6.4", |
| 142 | "QUANTUM FIREBALLP LM20.4", |
| 143 | "QUANTUM FIREBALLP LM20.5", |
| 144 | NULL |
| 145 | }; |
| 146 | |
| 147 | static const char *bad_ata100_5[] = { |
| 148 | "IBM-DTLA-307075", |
| 149 | "IBM-DTLA-307060", |
| 150 | "IBM-DTLA-307045", |
| 151 | "IBM-DTLA-307030", |
| 152 | "IBM-DTLA-307020", |
| 153 | "IBM-DTLA-307015", |
| 154 | "IBM-DTLA-305040", |
| 155 | "IBM-DTLA-305030", |
| 156 | "IBM-DTLA-305020", |
| 157 | "IC35L010AVER07-0", |
| 158 | "IC35L020AVER07-0", |
| 159 | "IC35L030AVER07-0", |
| 160 | "IC35L040AVER07-0", |
| 161 | "IC35L060AVER07-0", |
| 162 | "WDC AC310200R", |
| 163 | NULL |
| 164 | }; |
| 165 | |
| 166 | static const char *bad_ata66_4[] = { |
| 167 | "IBM-DTLA-307075", |
| 168 | "IBM-DTLA-307060", |
| 169 | "IBM-DTLA-307045", |
| 170 | "IBM-DTLA-307030", |
| 171 | "IBM-DTLA-307020", |
| 172 | "IBM-DTLA-307015", |
| 173 | "IBM-DTLA-305040", |
| 174 | "IBM-DTLA-305030", |
| 175 | "IBM-DTLA-305020", |
| 176 | "IC35L010AVER07-0", |
| 177 | "IC35L020AVER07-0", |
| 178 | "IC35L030AVER07-0", |
| 179 | "IC35L040AVER07-0", |
| 180 | "IC35L060AVER07-0", |
| 181 | "WDC AC310200R", |
Sergei Shtylyov | 783353b | 2007-07-03 22:28:35 +0200 | [diff] [blame] | 182 | "MAXTOR STM3320620A", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | NULL |
| 184 | }; |
| 185 | |
| 186 | static const char *bad_ata66_3[] = { |
| 187 | "WDC AC310200R", |
| 188 | NULL |
| 189 | }; |
| 190 | |
| 191 | static const char *bad_ata33[] = { |
| 192 | "Maxtor 92720U8", "Maxtor 92040U6", "Maxtor 91360U4", "Maxtor 91020U3", "Maxtor 90845U3", "Maxtor 90650U2", |
| 193 | "Maxtor 91360D8", "Maxtor 91190D7", "Maxtor 91020D6", "Maxtor 90845D5", "Maxtor 90680D4", "Maxtor 90510D3", "Maxtor 90340D2", |
| 194 | "Maxtor 91152D8", "Maxtor 91008D7", "Maxtor 90845D6", "Maxtor 90840D6", "Maxtor 90720D5", "Maxtor 90648D5", "Maxtor 90576D4", |
| 195 | "Maxtor 90510D4", |
| 196 | "Maxtor 90432D3", "Maxtor 90288D2", "Maxtor 90256D2", |
| 197 | "Maxtor 91000D8", "Maxtor 90910D8", "Maxtor 90875D7", "Maxtor 90840D7", "Maxtor 90750D6", "Maxtor 90625D5", "Maxtor 90500D4", |
| 198 | "Maxtor 91728D8", "Maxtor 91512D7", "Maxtor 91303D6", "Maxtor 91080D5", "Maxtor 90845D4", "Maxtor 90680D4", "Maxtor 90648D3", "Maxtor 90432D2", |
| 199 | NULL |
| 200 | }; |
| 201 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 202 | static u8 xfer_speeds[] = { |
| 203 | XFER_UDMA_6, |
| 204 | XFER_UDMA_5, |
| 205 | XFER_UDMA_4, |
| 206 | XFER_UDMA_3, |
| 207 | XFER_UDMA_2, |
| 208 | XFER_UDMA_1, |
| 209 | XFER_UDMA_0, |
| 210 | |
| 211 | XFER_MW_DMA_2, |
| 212 | XFER_MW_DMA_1, |
| 213 | XFER_MW_DMA_0, |
| 214 | |
| 215 | XFER_PIO_4, |
| 216 | XFER_PIO_3, |
| 217 | XFER_PIO_2, |
| 218 | XFER_PIO_1, |
| 219 | XFER_PIO_0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | }; |
| 221 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 222 | /* Key for bus clock timings |
| 223 | * 36x 37x |
| 224 | * bits bits |
| 225 | * 0:3 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA. |
| 226 | * cycles = value + 1 |
| 227 | * 4:7 4:8 data_low_time. Active time of DIOW_/DIOR_ for PIO and MW DMA. |
| 228 | * cycles = value + 1 |
| 229 | * 8:11 9:12 cmd_high_time. Inactive time of DIOW_/DIOR_ during task file |
| 230 | * register access. |
| 231 | * 12:15 13:17 cmd_low_time. Active time of DIOW_/DIOR_ during task file |
| 232 | * register access. |
| 233 | * 16:18 18:20 udma_cycle_time. Clock cycles for UDMA xfer. |
| 234 | * - 21 CLK frequency: 0=ATA clock, 1=dual ATA clock. |
| 235 | * 19:21 22:24 pre_high_time. Time to initialize the 1st cycle for PIO and |
| 236 | * MW DMA xfer. |
| 237 | * 22:24 25:27 cmd_pre_high_time. Time to initialize the 1st PIO cycle for |
| 238 | * task file register access. |
| 239 | * 28 28 UDMA enable. |
| 240 | * 29 29 DMA enable. |
| 241 | * 30 30 PIO MST enable. If set, the chip is in bus master mode during |
| 242 | * PIO xfer. |
| 243 | * 31 31 FIFO enable. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 246 | static u32 forty_base_hpt36x[] = { |
| 247 | /* XFER_UDMA_6 */ 0x900fd943, |
| 248 | /* XFER_UDMA_5 */ 0x900fd943, |
| 249 | /* XFER_UDMA_4 */ 0x900fd943, |
| 250 | /* XFER_UDMA_3 */ 0x900ad943, |
| 251 | /* XFER_UDMA_2 */ 0x900bd943, |
| 252 | /* XFER_UDMA_1 */ 0x9008d943, |
| 253 | /* XFER_UDMA_0 */ 0x9008d943, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 255 | /* XFER_MW_DMA_2 */ 0xa008d943, |
| 256 | /* XFER_MW_DMA_1 */ 0xa010d955, |
| 257 | /* XFER_MW_DMA_0 */ 0xa010d9fc, |
| 258 | |
| 259 | /* XFER_PIO_4 */ 0xc008d963, |
| 260 | /* XFER_PIO_3 */ 0xc010d974, |
| 261 | /* XFER_PIO_2 */ 0xc010d997, |
| 262 | /* XFER_PIO_1 */ 0xc010d9c7, |
| 263 | /* XFER_PIO_0 */ 0xc018d9d9 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | }; |
| 265 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 266 | static u32 thirty_three_base_hpt36x[] = { |
| 267 | /* XFER_UDMA_6 */ 0x90c9a731, |
| 268 | /* XFER_UDMA_5 */ 0x90c9a731, |
| 269 | /* XFER_UDMA_4 */ 0x90c9a731, |
| 270 | /* XFER_UDMA_3 */ 0x90cfa731, |
| 271 | /* XFER_UDMA_2 */ 0x90caa731, |
| 272 | /* XFER_UDMA_1 */ 0x90cba731, |
| 273 | /* XFER_UDMA_0 */ 0x90c8a731, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 275 | /* XFER_MW_DMA_2 */ 0xa0c8a731, |
| 276 | /* XFER_MW_DMA_1 */ 0xa0c8a732, /* 0xa0c8a733 */ |
| 277 | /* XFER_MW_DMA_0 */ 0xa0c8a797, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 279 | /* XFER_PIO_4 */ 0xc0c8a731, |
| 280 | /* XFER_PIO_3 */ 0xc0c8a742, |
| 281 | /* XFER_PIO_2 */ 0xc0d0a753, |
| 282 | /* XFER_PIO_1 */ 0xc0d0a7a3, /* 0xc0d0a793 */ |
| 283 | /* XFER_PIO_0 */ 0xc0d0a7aa /* 0xc0d0a7a7 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | }; |
| 285 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 286 | static u32 twenty_five_base_hpt36x[] = { |
| 287 | /* XFER_UDMA_6 */ 0x90c98521, |
| 288 | /* XFER_UDMA_5 */ 0x90c98521, |
| 289 | /* XFER_UDMA_4 */ 0x90c98521, |
| 290 | /* XFER_UDMA_3 */ 0x90cf8521, |
| 291 | /* XFER_UDMA_2 */ 0x90cf8521, |
| 292 | /* XFER_UDMA_1 */ 0x90cb8521, |
| 293 | /* XFER_UDMA_0 */ 0x90cb8521, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 294 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 295 | /* XFER_MW_DMA_2 */ 0xa0ca8521, |
| 296 | /* XFER_MW_DMA_1 */ 0xa0ca8532, |
| 297 | /* XFER_MW_DMA_0 */ 0xa0ca8575, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 298 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 299 | /* XFER_PIO_4 */ 0xc0ca8521, |
| 300 | /* XFER_PIO_3 */ 0xc0ca8532, |
| 301 | /* XFER_PIO_2 */ 0xc0ca8542, |
| 302 | /* XFER_PIO_1 */ 0xc0d08572, |
| 303 | /* XFER_PIO_0 */ 0xc0d08585 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | }; |
| 305 | |
Sergei Shtylyov | 809b53c | 2007-12-12 23:31:58 +0100 | [diff] [blame] | 306 | #if 0 |
| 307 | /* These are the timing tables from the HighPoint open source drivers... */ |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 308 | static u32 thirty_three_base_hpt37x[] = { |
| 309 | /* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */ |
| 310 | /* XFER_UDMA_5 */ 0x12446231, |
| 311 | /* XFER_UDMA_4 */ 0x12446231, |
| 312 | /* XFER_UDMA_3 */ 0x126c6231, |
| 313 | /* XFER_UDMA_2 */ 0x12486231, |
| 314 | /* XFER_UDMA_1 */ 0x124c6233, |
| 315 | /* XFER_UDMA_0 */ 0x12506297, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 317 | /* XFER_MW_DMA_2 */ 0x22406c31, |
| 318 | /* XFER_MW_DMA_1 */ 0x22406c33, |
| 319 | /* XFER_MW_DMA_0 */ 0x22406c97, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 321 | /* XFER_PIO_4 */ 0x06414e31, |
| 322 | /* XFER_PIO_3 */ 0x06414e42, |
| 323 | /* XFER_PIO_2 */ 0x06414e53, |
| 324 | /* XFER_PIO_1 */ 0x06814e93, |
| 325 | /* XFER_PIO_0 */ 0x06814ea7 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | }; |
| 327 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 328 | static u32 fifty_base_hpt37x[] = { |
| 329 | /* XFER_UDMA_6 */ 0x12848242, |
| 330 | /* XFER_UDMA_5 */ 0x12848242, |
| 331 | /* XFER_UDMA_4 */ 0x12ac8242, |
| 332 | /* XFER_UDMA_3 */ 0x128c8242, |
| 333 | /* XFER_UDMA_2 */ 0x120c8242, |
| 334 | /* XFER_UDMA_1 */ 0x12148254, |
| 335 | /* XFER_UDMA_0 */ 0x121882ea, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 336 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 337 | /* XFER_MW_DMA_2 */ 0x22808242, |
| 338 | /* XFER_MW_DMA_1 */ 0x22808254, |
| 339 | /* XFER_MW_DMA_0 */ 0x228082ea, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 341 | /* XFER_PIO_4 */ 0x0a81f442, |
| 342 | /* XFER_PIO_3 */ 0x0a81f443, |
| 343 | /* XFER_PIO_2 */ 0x0a81f454, |
| 344 | /* XFER_PIO_1 */ 0x0ac1f465, |
| 345 | /* XFER_PIO_0 */ 0x0ac1f48a |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 346 | }; |
| 347 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 348 | static u32 sixty_six_base_hpt37x[] = { |
| 349 | /* XFER_UDMA_6 */ 0x1c869c62, |
| 350 | /* XFER_UDMA_5 */ 0x1cae9c62, /* 0x1c8a9c62 */ |
| 351 | /* XFER_UDMA_4 */ 0x1c8a9c62, |
| 352 | /* XFER_UDMA_3 */ 0x1c8e9c62, |
| 353 | /* XFER_UDMA_2 */ 0x1c929c62, |
| 354 | /* XFER_UDMA_1 */ 0x1c9a9c62, |
| 355 | /* XFER_UDMA_0 */ 0x1c829c62, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 357 | /* XFER_MW_DMA_2 */ 0x2c829c62, |
| 358 | /* XFER_MW_DMA_1 */ 0x2c829c66, |
| 359 | /* XFER_MW_DMA_0 */ 0x2c829d2e, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 360 | |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 361 | /* XFER_PIO_4 */ 0x0c829c62, |
| 362 | /* XFER_PIO_3 */ 0x0c829c84, |
| 363 | /* XFER_PIO_2 */ 0x0c829ca6, |
| 364 | /* XFER_PIO_1 */ 0x0d029d26, |
| 365 | /* XFER_PIO_0 */ 0x0d029d5e |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 366 | }; |
Sergei Shtylyov | 809b53c | 2007-12-12 23:31:58 +0100 | [diff] [blame] | 367 | #else |
| 368 | /* |
| 369 | * The following are the new timing tables with PIO mode data/taskfile transfer |
| 370 | * overclocking fixed... |
| 371 | */ |
| 372 | |
| 373 | /* This table is taken from the HPT370 data manual rev. 1.02 */ |
| 374 | static u32 thirty_three_base_hpt37x[] = { |
| 375 | /* XFER_UDMA_6 */ 0x16455031, /* 0x16655031 ?? */ |
| 376 | /* XFER_UDMA_5 */ 0x16455031, |
| 377 | /* XFER_UDMA_4 */ 0x16455031, |
| 378 | /* XFER_UDMA_3 */ 0x166d5031, |
| 379 | /* XFER_UDMA_2 */ 0x16495031, |
| 380 | /* XFER_UDMA_1 */ 0x164d5033, |
| 381 | /* XFER_UDMA_0 */ 0x16515097, |
| 382 | |
| 383 | /* XFER_MW_DMA_2 */ 0x26515031, |
| 384 | /* XFER_MW_DMA_1 */ 0x26515033, |
| 385 | /* XFER_MW_DMA_0 */ 0x26515097, |
| 386 | |
| 387 | /* XFER_PIO_4 */ 0x06515021, |
| 388 | /* XFER_PIO_3 */ 0x06515022, |
| 389 | /* XFER_PIO_2 */ 0x06515033, |
| 390 | /* XFER_PIO_1 */ 0x06915065, |
| 391 | /* XFER_PIO_0 */ 0x06d1508a |
| 392 | }; |
| 393 | |
| 394 | static u32 fifty_base_hpt37x[] = { |
| 395 | /* XFER_UDMA_6 */ 0x1a861842, |
| 396 | /* XFER_UDMA_5 */ 0x1a861842, |
| 397 | /* XFER_UDMA_4 */ 0x1aae1842, |
| 398 | /* XFER_UDMA_3 */ 0x1a8e1842, |
| 399 | /* XFER_UDMA_2 */ 0x1a0e1842, |
| 400 | /* XFER_UDMA_1 */ 0x1a161854, |
| 401 | /* XFER_UDMA_0 */ 0x1a1a18ea, |
| 402 | |
| 403 | /* XFER_MW_DMA_2 */ 0x2a821842, |
| 404 | /* XFER_MW_DMA_1 */ 0x2a821854, |
| 405 | /* XFER_MW_DMA_0 */ 0x2a8218ea, |
| 406 | |
| 407 | /* XFER_PIO_4 */ 0x0a821842, |
| 408 | /* XFER_PIO_3 */ 0x0a821843, |
| 409 | /* XFER_PIO_2 */ 0x0a821855, |
| 410 | /* XFER_PIO_1 */ 0x0ac218a8, |
| 411 | /* XFER_PIO_0 */ 0x0b02190c |
| 412 | }; |
| 413 | |
| 414 | static u32 sixty_six_base_hpt37x[] = { |
| 415 | /* XFER_UDMA_6 */ 0x1c86fe62, |
| 416 | /* XFER_UDMA_5 */ 0x1caefe62, /* 0x1c8afe62 */ |
| 417 | /* XFER_UDMA_4 */ 0x1c8afe62, |
| 418 | /* XFER_UDMA_3 */ 0x1c8efe62, |
| 419 | /* XFER_UDMA_2 */ 0x1c92fe62, |
| 420 | /* XFER_UDMA_1 */ 0x1c9afe62, |
| 421 | /* XFER_UDMA_0 */ 0x1c82fe62, |
| 422 | |
| 423 | /* XFER_MW_DMA_2 */ 0x2c82fe62, |
| 424 | /* XFER_MW_DMA_1 */ 0x2c82fe66, |
| 425 | /* XFER_MW_DMA_0 */ 0x2c82ff2e, |
| 426 | |
| 427 | /* XFER_PIO_4 */ 0x0c82fe62, |
| 428 | /* XFER_PIO_3 */ 0x0c82fe84, |
| 429 | /* XFER_PIO_2 */ 0x0c82fea6, |
| 430 | /* XFER_PIO_1 */ 0x0d02ff26, |
| 431 | /* XFER_PIO_0 */ 0x0d42ff7f |
| 432 | }; |
| 433 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 435 | #define HPT366_DEBUG_DRIVE_INFO 0 |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 436 | #define HPT371_ALLOW_ATA133_6 1 |
| 437 | #define HPT302_ALLOW_ATA133_6 1 |
| 438 | #define HPT372_ALLOW_ATA133_6 1 |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 439 | #define HPT370_ALLOW_ATA100_5 0 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | #define HPT366_ALLOW_ATA66_4 1 |
| 441 | #define HPT366_ALLOW_ATA66_3 1 |
| 442 | #define HPT366_MAX_DEVS 8 |
| 443 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 444 | /* Supported ATA clock frequencies */ |
| 445 | enum ata_clock { |
| 446 | ATA_CLOCK_25MHZ, |
| 447 | ATA_CLOCK_33MHZ, |
| 448 | ATA_CLOCK_40MHZ, |
| 449 | ATA_CLOCK_50MHZ, |
| 450 | ATA_CLOCK_66MHZ, |
| 451 | NUM_ATA_CLOCKS |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 452 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 454 | struct hpt_timings { |
| 455 | u32 pio_mask; |
| 456 | u32 dma_mask; |
| 457 | u32 ultra_mask; |
| 458 | u32 *clock_table[NUM_ATA_CLOCKS]; |
| 459 | }; |
| 460 | |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 461 | /* |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 462 | * Hold all the HighPoint chip information in one place. |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 463 | */ |
| 464 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 465 | struct hpt_info { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 466 | char *chip_name; /* Chip name */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 467 | u8 chip_type; /* Chip type */ |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 468 | u8 udma_mask; /* Allowed UltraDMA modes mask. */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 469 | u8 dpll_clk; /* DPLL clock in MHz */ |
| 470 | u8 pci_clk; /* PCI clock in MHz */ |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 471 | struct hpt_timings *timings; /* Chipset timing data */ |
| 472 | u8 clock; /* ATA clock selected */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 473 | }; |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 474 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 475 | /* Supported HighPoint chips */ |
| 476 | enum { |
| 477 | HPT36x, |
| 478 | HPT370, |
| 479 | HPT370A, |
| 480 | HPT374, |
| 481 | HPT372, |
| 482 | HPT372A, |
| 483 | HPT302, |
| 484 | HPT371, |
| 485 | HPT372N, |
| 486 | HPT302N, |
| 487 | HPT371N |
| 488 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 490 | static struct hpt_timings hpt36x_timings = { |
| 491 | .pio_mask = 0xc1f8ffff, |
| 492 | .dma_mask = 0x303800ff, |
| 493 | .ultra_mask = 0x30070000, |
| 494 | .clock_table = { |
| 495 | [ATA_CLOCK_25MHZ] = twenty_five_base_hpt36x, |
| 496 | [ATA_CLOCK_33MHZ] = thirty_three_base_hpt36x, |
| 497 | [ATA_CLOCK_40MHZ] = forty_base_hpt36x, |
| 498 | [ATA_CLOCK_50MHZ] = NULL, |
| 499 | [ATA_CLOCK_66MHZ] = NULL |
| 500 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 501 | }; |
| 502 | |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 503 | static struct hpt_timings hpt37x_timings = { |
| 504 | .pio_mask = 0xcfc3ffff, |
| 505 | .dma_mask = 0x31c001ff, |
| 506 | .ultra_mask = 0x303c0000, |
| 507 | .clock_table = { |
| 508 | [ATA_CLOCK_25MHZ] = NULL, |
| 509 | [ATA_CLOCK_33MHZ] = thirty_three_base_hpt37x, |
| 510 | [ATA_CLOCK_40MHZ] = NULL, |
| 511 | [ATA_CLOCK_50MHZ] = fifty_base_hpt37x, |
| 512 | [ATA_CLOCK_66MHZ] = sixty_six_base_hpt37x |
| 513 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 514 | }; |
| 515 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 516 | static const struct hpt_info hpt36x __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 517 | .chip_name = "HPT36x", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 518 | .chip_type = HPT36x, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 519 | .udma_mask = HPT366_ALLOW_ATA66_3 ? (HPT366_ALLOW_ATA66_4 ? ATA_UDMA4 : ATA_UDMA3) : ATA_UDMA2, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 520 | .dpll_clk = 0, /* no DPLL */ |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 521 | .timings = &hpt36x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 522 | }; |
| 523 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 524 | static const struct hpt_info hpt370 __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 525 | .chip_name = "HPT370", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 526 | .chip_type = HPT370, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 527 | .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 528 | .dpll_clk = 48, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 529 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 530 | }; |
| 531 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 532 | static const struct hpt_info hpt370a __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 533 | .chip_name = "HPT370A", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 534 | .chip_type = HPT370A, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 535 | .udma_mask = HPT370_ALLOW_ATA100_5 ? ATA_UDMA5 : ATA_UDMA4, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 536 | .dpll_clk = 48, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 537 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 538 | }; |
| 539 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 540 | static const struct hpt_info hpt374 __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 541 | .chip_name = "HPT374", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 542 | .chip_type = HPT374, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 543 | .udma_mask = ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 544 | .dpll_clk = 48, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 545 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 546 | }; |
| 547 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 548 | static const struct hpt_info hpt372 __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 549 | .chip_name = "HPT372", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 550 | .chip_type = HPT372, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 551 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 552 | .dpll_clk = 55, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 553 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 554 | }; |
| 555 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 556 | static const struct hpt_info hpt372a __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 557 | .chip_name = "HPT372A", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 558 | .chip_type = HPT372A, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 559 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 560 | .dpll_clk = 66, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 561 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 562 | }; |
| 563 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 564 | static const struct hpt_info hpt302 __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 565 | .chip_name = "HPT302", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 566 | .chip_type = HPT302, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 567 | .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 568 | .dpll_clk = 66, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 569 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 570 | }; |
| 571 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 572 | static const struct hpt_info hpt371 __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 573 | .chip_name = "HPT371", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 574 | .chip_type = HPT371, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 575 | .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 576 | .dpll_clk = 66, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 577 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 578 | }; |
| 579 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 580 | static const struct hpt_info hpt372n __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 581 | .chip_name = "HPT372N", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 582 | .chip_type = HPT372N, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 583 | .udma_mask = HPT372_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 584 | .dpll_clk = 77, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 585 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 586 | }; |
| 587 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 588 | static const struct hpt_info hpt302n __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 589 | .chip_name = "HPT302N", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 590 | .chip_type = HPT302N, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 591 | .udma_mask = HPT302_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 592 | .dpll_clk = 77, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 593 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 594 | }; |
| 595 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 596 | static const struct hpt_info hpt371n __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 597 | .chip_name = "HPT371N", |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 598 | .chip_type = HPT371N, |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 599 | .udma_mask = HPT371_ALLOW_ATA133_6 ? ATA_UDMA6 : ATA_UDMA5, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 600 | .dpll_clk = 77, |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 601 | .timings = &hpt37x_timings |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 602 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 603 | |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 604 | static int check_in_drive_list(ide_drive_t *drive, const char **list) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 606 | struct hd_driveid *id = drive->id; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 608 | while (*list) |
| 609 | if (!strcmp(*list++,id->model)) |
| 610 | return 1; |
| 611 | return 0; |
| 612 | } |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 613 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | /* |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 615 | * The Marvell bridge chips used on the HighPoint SATA cards do not seem |
| 616 | * to support the UltraDMA modes 1, 2, and 3 as well as any MWDMA modes... |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | */ |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 618 | |
| 619 | static u8 hpt3xx_udma_filter(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 620 | { |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 621 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 622 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
| 623 | struct hpt_info *info = pci_get_drvdata(dev); |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 624 | u8 mask = hwif->ultra_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 626 | switch (info->chip_type) { |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 627 | case HPT36x: |
| 628 | if (!HPT366_ALLOW_ATA66_4 || |
| 629 | check_in_drive_list(drive, bad_ata66_4)) |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 630 | mask = ATA_UDMA3; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 631 | |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 632 | if (!HPT366_ALLOW_ATA66_3 || |
| 633 | check_in_drive_list(drive, bad_ata66_3)) |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 634 | mask = ATA_UDMA2; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 635 | break; |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 636 | case HPT370: |
| 637 | if (!HPT370_ALLOW_ATA100_5 || |
| 638 | check_in_drive_list(drive, bad_ata100_5)) |
| 639 | mask = ATA_UDMA4; |
| 640 | break; |
| 641 | case HPT370A: |
| 642 | if (!HPT370_ALLOW_ATA100_5 || |
| 643 | check_in_drive_list(drive, bad_ata100_5)) |
| 644 | return ATA_UDMA4; |
| 645 | case HPT372 : |
| 646 | case HPT372A: |
| 647 | case HPT372N: |
| 648 | case HPT374 : |
| 649 | if (ide_dev_is_sata(drive->id)) |
| 650 | mask &= ~0x0e; |
| 651 | /* Fall thru */ |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 652 | default: |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 653 | return mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | } |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 655 | |
| 656 | return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 657 | } |
| 658 | |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 659 | static u8 hpt3xx_mdma_filter(ide_drive_t *drive) |
| 660 | { |
| 661 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 662 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
| 663 | struct hpt_info *info = pci_get_drvdata(dev); |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 664 | |
| 665 | switch (info->chip_type) { |
| 666 | case HPT372 : |
| 667 | case HPT372A: |
| 668 | case HPT372N: |
| 669 | case HPT374 : |
| 670 | if (ide_dev_is_sata(drive->id)) |
| 671 | return 0x00; |
| 672 | /* Fall thru */ |
| 673 | default: |
| 674 | return 0x07; |
| 675 | } |
| 676 | } |
| 677 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 678 | static u32 get_speed_setting(u8 speed, struct hpt_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | { |
Sergei Shtylyov | 471a0bd | 2006-12-13 00:35:49 -0800 | [diff] [blame] | 680 | int i; |
| 681 | |
| 682 | /* |
| 683 | * Lookup the transfer mode table to get the index into |
| 684 | * the timing table. |
| 685 | * |
| 686 | * NOTE: For XFER_PIO_SLOW, PIO mode 0 timings will be used. |
| 687 | */ |
| 688 | for (i = 0; i < ARRAY_SIZE(xfer_speeds) - 1; i++) |
| 689 | if (xfer_speeds[i] == speed) |
| 690 | break; |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 691 | |
| 692 | return info->timings->clock_table[info->clock][i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 693 | } |
| 694 | |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 695 | static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | { |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 697 | struct pci_dev *dev = to_pci_dev(drive->hwif->dev); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 698 | struct hpt_info *info = pci_get_drvdata(dev); |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 699 | struct hpt_timings *t = info->timings; |
| 700 | u8 itr_addr = 0x40 + (drive->dn * 4); |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 701 | u32 old_itr = 0; |
Sergei Shtylyov | ceb1b2c | 2008-01-25 22:17:04 +0100 | [diff] [blame] | 702 | u32 new_itr = get_speed_setting(speed, info); |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 703 | u32 itr_mask = speed < XFER_MW_DMA_0 ? t->pio_mask : |
| 704 | (speed < XFER_UDMA_0 ? t->dma_mask : |
| 705 | t->ultra_mask); |
Bartlomiej Zolnierkiewicz | 2d5eaa6 | 2007-05-10 00:01:08 +0200 | [diff] [blame] | 706 | |
Sergei Shtylyov | ceb1b2c | 2008-01-25 22:17:04 +0100 | [diff] [blame] | 707 | pci_read_config_dword(dev, itr_addr, &old_itr); |
| 708 | new_itr = (old_itr & ~itr_mask) | (new_itr & itr_mask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 709 | /* |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 710 | * Disable on-chip PIO FIFO/buffer (and PIO MST mode as well) |
| 711 | * to avoid problems handling I/O errors later |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 713 | new_itr &= ~0xc0000000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 715 | pci_write_config_dword(dev, itr_addr, new_itr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | } |
| 717 | |
Bartlomiej Zolnierkiewicz | 26bcb87 | 2007-10-11 23:54:00 +0200 | [diff] [blame] | 718 | static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 719 | { |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 720 | hpt3xx_set_mode(drive, XFER_PIO_0 + pio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 721 | } |
| 722 | |
Bartlomiej Zolnierkiewicz | f01393e | 2008-01-26 20:13:03 +0100 | [diff] [blame] | 723 | static void hpt3xx_quirkproc(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | { |
Sergei Shtylyov | e139b0b | 2007-02-07 18:17:37 +0100 | [diff] [blame] | 725 | struct hd_driveid *id = drive->id; |
| 726 | const char **list = quirk_drives; |
| 727 | |
| 728 | while (*list) |
Bartlomiej Zolnierkiewicz | f01393e | 2008-01-26 20:13:03 +0100 | [diff] [blame] | 729 | if (strstr(id->model, *list++)) { |
| 730 | drive->quirk_list = 1; |
| 731 | return; |
| 732 | } |
| 733 | |
| 734 | drive->quirk_list = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | } |
| 736 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 737 | static void hpt3xx_maskproc(ide_drive_t *drive, int mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 738 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 739 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 740 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 741 | struct hpt_info *info = pci_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | |
| 743 | if (drive->quirk_list) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 744 | if (info->chip_type >= HPT370) { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 745 | u8 scr1 = 0; |
| 746 | |
| 747 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 748 | if (((scr1 & 0x10) >> 4) != mask) { |
| 749 | if (mask) |
| 750 | scr1 |= 0x10; |
| 751 | else |
| 752 | scr1 &= ~0x10; |
| 753 | pci_write_config_byte(dev, 0x5a, scr1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 754 | } |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 755 | } else { |
| 756 | if (mask) |
| 757 | disable_irq(hwif->irq); |
| 758 | else |
| 759 | enable_irq (hwif->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 760 | } |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 761 | } else |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 762 | outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2), |
Bartlomiej Zolnierkiewicz | 23579a2 | 2008-04-18 00:46:26 +0200 | [diff] [blame] | 763 | hwif->io_ports[IDE_CONTROL_OFFSET]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | } |
| 765 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | /* |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 767 | * This is specific to the HPT366 UDMA chipset |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 768 | * by HighPoint|Triones Technologies, Inc. |
| 769 | */ |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 770 | static void hpt366_dma_lost_irq(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 771 | { |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 772 | struct pci_dev *dev = to_pci_dev(drive->hwif->dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 773 | u8 mcr1 = 0, mcr3 = 0, scr1 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 774 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 775 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 776 | pci_read_config_byte(dev, 0x52, &mcr3); |
| 777 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 778 | printk("%s: (%s) mcr1=0x%02x, mcr3=0x%02x, scr1=0x%02x\n", |
| 779 | drive->name, __FUNCTION__, mcr1, mcr3, scr1); |
| 780 | if (scr1 & 0x10) |
| 781 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 782 | ide_dma_lost_irq(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 783 | } |
| 784 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 785 | static void hpt370_clear_engine(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | { |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 787 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 788 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 789 | |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 790 | pci_write_config_byte(dev, hwif->select_data, 0x37); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | udelay(10); |
| 792 | } |
| 793 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 794 | static void hpt370_irq_timeout(ide_drive_t *drive) |
| 795 | { |
| 796 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 797 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 798 | u16 bfifo = 0; |
| 799 | u8 dma_cmd; |
| 800 | |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 801 | pci_read_config_word(dev, hwif->select_data + 2, &bfifo); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 802 | printk(KERN_DEBUG "%s: %d bytes in FIFO\n", drive->name, bfifo & 0x1ff); |
| 803 | |
| 804 | /* get DMA command mode */ |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 805 | dma_cmd = inb(hwif->dma_command); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 806 | /* stop DMA */ |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 807 | outb(dma_cmd & ~0x1, hwif->dma_command); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 808 | hpt370_clear_engine(drive); |
| 809 | } |
| 810 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 811 | static void hpt370_ide_dma_start(ide_drive_t *drive) |
| 812 | { |
| 813 | #ifdef HPT_RESET_STATE_ENGINE |
| 814 | hpt370_clear_engine(drive); |
| 815 | #endif |
| 816 | ide_dma_start(drive); |
| 817 | } |
| 818 | |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 819 | static int hpt370_ide_dma_end(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | { |
| 821 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 822 | u8 dma_stat = inb(hwif->dma_status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | |
| 824 | if (dma_stat & 0x01) { |
| 825 | /* wait a little */ |
| 826 | udelay(20); |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 827 | dma_stat = inb(hwif->dma_status); |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 828 | if (dma_stat & 0x01) |
| 829 | hpt370_irq_timeout(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 830 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 831 | return __ide_dma_end(drive); |
| 832 | } |
| 833 | |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 834 | static void hpt370_dma_timeout(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | { |
Sergei Shtylyov | 4bf63de | 2007-02-07 18:18:13 +0100 | [diff] [blame] | 836 | hpt370_irq_timeout(drive); |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 837 | ide_dma_timeout(drive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 838 | } |
| 839 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | /* returns 1 if DMA IRQ issued, 0 otherwise */ |
| 841 | static int hpt374_ide_dma_test_irq(ide_drive_t *drive) |
| 842 | { |
| 843 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 844 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 845 | u16 bfifo = 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 846 | u8 dma_stat; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 847 | |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 848 | pci_read_config_word(dev, hwif->select_data + 2, &bfifo); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | if (bfifo & 0x1FF) { |
| 850 | // printk("%s: %d bytes in FIFO\n", drive->name, bfifo); |
| 851 | return 0; |
| 852 | } |
| 853 | |
Bartlomiej Zolnierkiewicz | 0ecdca2 | 2007-02-17 02:40:25 +0100 | [diff] [blame] | 854 | dma_stat = inb(hwif->dma_status); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 855 | /* return 1 if INTR asserted */ |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 856 | if (dma_stat & 4) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 857 | return 1; |
| 858 | |
| 859 | if (!drive->waiting_for_dma) |
| 860 | printk(KERN_WARNING "%s: (%s) called while not waiting\n", |
| 861 | drive->name, __FUNCTION__); |
| 862 | return 0; |
| 863 | } |
| 864 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 865 | static int hpt374_ide_dma_end(ide_drive_t *drive) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 866 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | ide_hwif_t *hwif = HWIF(drive); |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 868 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 869 | u8 mcr = 0, mcr_addr = hwif->select_data; |
| 870 | u8 bwsr = 0, mask = hwif->channel ? 0x02 : 0x01; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 871 | |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 872 | pci_read_config_byte(dev, 0x6a, &bwsr); |
| 873 | pci_read_config_byte(dev, mcr_addr, &mcr); |
| 874 | if (bwsr & mask) |
| 875 | pci_write_config_byte(dev, mcr_addr, mcr | 0x30); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | return __ide_dma_end(drive); |
| 877 | } |
| 878 | |
| 879 | /** |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 880 | * hpt3xxn_set_clock - perform clock switching dance |
| 881 | * @hwif: hwif to switch |
| 882 | * @mode: clocking mode (0x21 for write, 0x23 otherwise) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 884 | * Switch the DPLL clock on the HPT3xxN devices. This is a right mess. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | */ |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 886 | |
| 887 | static void hpt3xxn_set_clock(ide_hwif_t *hwif, u8 mode) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 888 | { |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 889 | unsigned long base = hwif->extra_base; |
| 890 | u8 scr2 = inb(base + 0x6b); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 891 | |
| 892 | if ((scr2 & 0x7f) == mode) |
| 893 | return; |
| 894 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | /* Tristate the bus */ |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 896 | outb(0x80, base + 0x63); |
| 897 | outb(0x80, base + 0x67); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 898 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 899 | /* Switch clock and reset channels */ |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 900 | outb(mode, base + 0x6b); |
| 901 | outb(0xc0, base + 0x69); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 902 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 903 | /* |
| 904 | * Reset the state machines. |
| 905 | * NOTE: avoid accidentally enabling the disabled channels. |
| 906 | */ |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 907 | outb(inb(base + 0x60) | 0x32, base + 0x60); |
| 908 | outb(inb(base + 0x64) | 0x32, base + 0x64); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 909 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 910 | /* Complete reset */ |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 911 | outb(0x00, base + 0x69); |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 912 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 913 | /* Reconnect channels to bus */ |
Bartlomiej Zolnierkiewicz | 1c029fd | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 914 | outb(0x00, base + 0x63); |
| 915 | outb(0x00, base + 0x67); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 916 | } |
| 917 | |
| 918 | /** |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 919 | * hpt3xxn_rw_disk - prepare for I/O |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | * @drive: drive for command |
| 921 | * @rq: block request structure |
| 922 | * |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 923 | * This is called when a disk I/O is issued to HPT3xxN. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | * We need it because of the clock switching. |
| 925 | */ |
| 926 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 927 | static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 928 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 929 | hpt3xxn_set_clock(HWIF(drive), rq_data_dir(rq) ? 0x23 : 0x21); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | } |
| 931 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 932 | /** |
| 933 | * hpt37x_calibrate_dpll - calibrate the DPLL |
| 934 | * @dev: PCI device |
| 935 | * |
| 936 | * Perform a calibration cycle on the DPLL. |
| 937 | * Returns 1 if this succeeds |
| 938 | */ |
| 939 | static int __devinit hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 940 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 941 | u32 dpll = (f_high << 16) | f_low | 0x100; |
| 942 | u8 scr2; |
| 943 | int i; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 944 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 945 | pci_write_config_dword(dev, 0x5c, dpll); |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 946 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 947 | /* Wait for oscillator ready */ |
| 948 | for(i = 0; i < 0x5000; ++i) { |
| 949 | udelay(50); |
| 950 | pci_read_config_byte(dev, 0x5b, &scr2); |
| 951 | if (scr2 & 0x80) |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 952 | break; |
| 953 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 954 | /* See if it stays ready (we'll just bail out if it's not yet) */ |
| 955 | for(i = 0; i < 0x1000; ++i) { |
| 956 | pci_read_config_byte(dev, 0x5b, &scr2); |
| 957 | /* DPLL destabilized? */ |
| 958 | if(!(scr2 & 0x80)) |
| 959 | return 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 960 | } |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 961 | /* Turn off tuning, we have the DPLL set */ |
| 962 | pci_read_config_dword (dev, 0x5c, &dpll); |
| 963 | pci_write_config_dword(dev, 0x5c, (dpll & ~0x100)); |
| 964 | return 1; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 965 | } |
| 966 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 967 | static unsigned int __devinit init_chipset_hpt366(struct pci_dev *dev, const char *name) |
| 968 | { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 969 | struct hpt_info *info = kmalloc(sizeof(struct hpt_info), GFP_KERNEL); |
| 970 | unsigned long io_base = pci_resource_start(dev, 4); |
| 971 | u8 pci_clk, dpll_clk = 0; /* PCI and DPLL clock in MHz */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 972 | u8 chip_type; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 973 | enum ata_clock clock; |
| 974 | |
| 975 | if (info == NULL) { |
| 976 | printk(KERN_ERR "%s: out of memory!\n", name); |
| 977 | return -ENOMEM; |
| 978 | } |
| 979 | |
| 980 | /* |
| 981 | * Copy everything from a static "template" structure |
| 982 | * to just allocated per-chip hpt_info structure. |
| 983 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 984 | memcpy(info, pci_get_drvdata(dev), sizeof(struct hpt_info)); |
| 985 | chip_type = info->chip_type; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 986 | |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 987 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, (L1_CACHE_BYTES / 4)); |
| 988 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x78); |
| 989 | pci_write_config_byte(dev, PCI_MIN_GNT, 0x08); |
| 990 | pci_write_config_byte(dev, PCI_MAX_LAT, 0x08); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 991 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 992 | /* |
| 993 | * First, try to estimate the PCI clock frequency... |
| 994 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 995 | if (chip_type >= HPT370) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 996 | u8 scr1 = 0; |
| 997 | u16 f_cnt = 0; |
| 998 | u32 temp = 0; |
Alan Cox | b39b01f | 2005-06-27 15:24:27 -0700 | [diff] [blame] | 999 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1000 | /* Interrupt force enable. */ |
| 1001 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 1002 | if (scr1 & 0x10) |
| 1003 | pci_write_config_byte(dev, 0x5a, scr1 & ~0x10); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1004 | |
| 1005 | /* |
| 1006 | * HighPoint does this for HPT372A. |
| 1007 | * NOTE: This register is only writeable via I/O space. |
| 1008 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1009 | if (chip_type == HPT372A) |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1010 | outb(0x0e, io_base + 0x9c); |
| 1011 | |
| 1012 | /* |
| 1013 | * Default to PCI clock. Make sure MA15/16 are set to output |
| 1014 | * to prevent drives having problems with 40-pin cables. |
| 1015 | */ |
| 1016 | pci_write_config_byte(dev, 0x5b, 0x23); |
| 1017 | |
| 1018 | /* |
| 1019 | * We'll have to read f_CNT value in order to determine |
| 1020 | * the PCI clock frequency according to the following ratio: |
| 1021 | * |
| 1022 | * f_CNT = Fpci * 192 / Fdpll |
| 1023 | * |
| 1024 | * First try reading the register in which the HighPoint BIOS |
| 1025 | * saves f_CNT value before reprogramming the DPLL from its |
| 1026 | * default setting (which differs for the various chips). |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1027 | * |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1028 | * NOTE: This register is only accessible via I/O space; |
| 1029 | * HPT374 BIOS only saves it for the function 0, so we have to |
| 1030 | * always read it from there -- no need to check the result of |
| 1031 | * pci_get_slot() for the function 0 as the whole device has |
| 1032 | * been already "pinned" (via function 1) in init_setup_hpt374() |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1033 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1034 | if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { |
| 1035 | struct pci_dev *dev1 = pci_get_slot(dev->bus, |
| 1036 | dev->devfn - 1); |
| 1037 | unsigned long io_base = pci_resource_start(dev1, 4); |
| 1038 | |
| 1039 | temp = inl(io_base + 0x90); |
| 1040 | pci_dev_put(dev1); |
| 1041 | } else |
| 1042 | temp = inl(io_base + 0x90); |
| 1043 | |
| 1044 | /* |
| 1045 | * In case the signature check fails, we'll have to |
| 1046 | * resort to reading the f_CNT register itself in hopes |
| 1047 | * that nobody has touched the DPLL yet... |
| 1048 | */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1049 | if ((temp & 0xFFFFF000) != 0xABCDE000) { |
| 1050 | int i; |
| 1051 | |
| 1052 | printk(KERN_WARNING "%s: no clock data saved by BIOS\n", |
| 1053 | name); |
| 1054 | |
| 1055 | /* Calculate the average value of f_CNT. */ |
| 1056 | for (temp = i = 0; i < 128; i++) { |
| 1057 | pci_read_config_word(dev, 0x78, &f_cnt); |
| 1058 | temp += f_cnt & 0x1ff; |
| 1059 | mdelay(1); |
| 1060 | } |
| 1061 | f_cnt = temp / 128; |
| 1062 | } else |
| 1063 | f_cnt = temp & 0x1ff; |
| 1064 | |
| 1065 | dpll_clk = info->dpll_clk; |
| 1066 | pci_clk = (f_cnt * dpll_clk) / 192; |
| 1067 | |
| 1068 | /* Clamp PCI clock to bands. */ |
| 1069 | if (pci_clk < 40) |
| 1070 | pci_clk = 33; |
| 1071 | else if(pci_clk < 45) |
| 1072 | pci_clk = 40; |
| 1073 | else if(pci_clk < 55) |
| 1074 | pci_clk = 50; |
| 1075 | else |
| 1076 | pci_clk = 66; |
| 1077 | |
| 1078 | printk(KERN_INFO "%s: DPLL base: %d MHz, f_CNT: %d, " |
| 1079 | "assuming %d MHz PCI\n", name, dpll_clk, f_cnt, pci_clk); |
| 1080 | } else { |
| 1081 | u32 itr1 = 0; |
| 1082 | |
| 1083 | pci_read_config_dword(dev, 0x40, &itr1); |
| 1084 | |
| 1085 | /* Detect PCI clock by looking at cmd_high_time. */ |
| 1086 | switch((itr1 >> 8) & 0x07) { |
| 1087 | case 0x09: |
| 1088 | pci_clk = 40; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1089 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1090 | case 0x05: |
| 1091 | pci_clk = 25; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1092 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1093 | case 0x07: |
| 1094 | default: |
| 1095 | pci_clk = 33; |
Sergei Shtylyov | 6273d26 | 2007-02-07 18:18:20 +0100 | [diff] [blame] | 1096 | break; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1097 | } |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1098 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1099 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1100 | /* Let's assume we'll use PCI clock for the ATA clock... */ |
| 1101 | switch (pci_clk) { |
| 1102 | case 25: |
| 1103 | clock = ATA_CLOCK_25MHZ; |
| 1104 | break; |
| 1105 | case 33: |
| 1106 | default: |
| 1107 | clock = ATA_CLOCK_33MHZ; |
| 1108 | break; |
| 1109 | case 40: |
| 1110 | clock = ATA_CLOCK_40MHZ; |
| 1111 | break; |
| 1112 | case 50: |
| 1113 | clock = ATA_CLOCK_50MHZ; |
| 1114 | break; |
| 1115 | case 66: |
| 1116 | clock = ATA_CLOCK_66MHZ; |
| 1117 | break; |
| 1118 | } |
| 1119 | |
| 1120 | /* |
| 1121 | * Only try the DPLL if we don't have a table for the PCI clock that |
| 1122 | * we are running at for HPT370/A, always use it for anything newer... |
| 1123 | * |
| 1124 | * NOTE: Using the internal DPLL results in slow reads on 33 MHz PCI. |
| 1125 | * We also don't like using the DPLL because this causes glitches |
| 1126 | * on PRST-/SRST- when the state engine gets reset... |
| 1127 | */ |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 1128 | if (chip_type >= HPT374 || info->timings->clock_table[clock] == NULL) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1129 | u16 f_low, delta = pci_clk < 50 ? 2 : 4; |
| 1130 | int adjust; |
| 1131 | |
| 1132 | /* |
| 1133 | * Select 66 MHz DPLL clock only if UltraATA/133 mode is |
| 1134 | * supported/enabled, use 50 MHz DPLL clock otherwise... |
| 1135 | */ |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1136 | if (info->udma_mask == ATA_UDMA6) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1137 | dpll_clk = 66; |
| 1138 | clock = ATA_CLOCK_66MHZ; |
| 1139 | } else if (dpll_clk) { /* HPT36x chips don't have DPLL */ |
| 1140 | dpll_clk = 50; |
| 1141 | clock = ATA_CLOCK_50MHZ; |
| 1142 | } |
| 1143 | |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 1144 | if (info->timings->clock_table[clock] == NULL) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1145 | printk(KERN_ERR "%s: unknown bus timing!\n", name); |
| 1146 | kfree(info); |
| 1147 | return -EIO; |
| 1148 | } |
| 1149 | |
| 1150 | /* Select the DPLL clock. */ |
| 1151 | pci_write_config_byte(dev, 0x5b, 0x21); |
| 1152 | |
| 1153 | /* |
| 1154 | * Adjust the DPLL based upon PCI clock, enable it, |
| 1155 | * and wait for stabilization... |
| 1156 | */ |
| 1157 | f_low = (pci_clk * 48) / dpll_clk; |
| 1158 | |
| 1159 | for (adjust = 0; adjust < 8; adjust++) { |
| 1160 | if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta)) |
| 1161 | break; |
| 1162 | |
| 1163 | /* |
| 1164 | * See if it'll settle at a fractionally different clock |
| 1165 | */ |
| 1166 | if (adjust & 1) |
| 1167 | f_low -= adjust >> 1; |
| 1168 | else |
| 1169 | f_low += adjust >> 1; |
| 1170 | } |
| 1171 | if (adjust == 8) { |
| 1172 | printk(KERN_ERR "%s: DPLL did not stabilize!\n", name); |
| 1173 | kfree(info); |
| 1174 | return -EIO; |
| 1175 | } |
| 1176 | |
| 1177 | printk("%s: using %d MHz DPLL clock\n", name, dpll_clk); |
| 1178 | } else { |
| 1179 | /* Mark the fact that we're not using the DPLL. */ |
| 1180 | dpll_clk = 0; |
| 1181 | |
| 1182 | printk("%s: using %d MHz PCI clock\n", name, pci_clk); |
| 1183 | } |
| 1184 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1185 | /* Store the clock frequencies. */ |
| 1186 | info->dpll_clk = dpll_clk; |
| 1187 | info->pci_clk = pci_clk; |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 1188 | info->clock = clock; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1189 | |
| 1190 | /* Point to this chip's own instance of the hpt_info structure. */ |
| 1191 | pci_set_drvdata(dev, info); |
| 1192 | |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1193 | if (chip_type >= HPT370) { |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1194 | u8 mcr1, mcr4; |
| 1195 | |
| 1196 | /* |
| 1197 | * Reset the state engines. |
| 1198 | * NOTE: Avoid accidentally enabling the disabled channels. |
| 1199 | */ |
| 1200 | pci_read_config_byte (dev, 0x50, &mcr1); |
| 1201 | pci_read_config_byte (dev, 0x54, &mcr4); |
| 1202 | pci_write_config_byte(dev, 0x50, (mcr1 | 0x32)); |
| 1203 | pci_write_config_byte(dev, 0x54, (mcr4 | 0x32)); |
| 1204 | udelay(100); |
| 1205 | } |
| 1206 | |
| 1207 | /* |
| 1208 | * On HPT371N, if ATA clock is 66 MHz we must set bit 2 in |
| 1209 | * the MISC. register to stretch the UltraDMA Tss timing. |
| 1210 | * NOTE: This register is only writeable via I/O space. |
| 1211 | */ |
Sergei Shtylyov | 7293136 | 2007-09-11 22:28:35 +0200 | [diff] [blame] | 1212 | if (chip_type == HPT371N && clock == ATA_CLOCK_66MHZ) |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1213 | |
| 1214 | outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c); |
| 1215 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1216 | return dev->irq; |
| 1217 | } |
| 1218 | |
Bartlomiej Zolnierkiewicz | bfa14b4 | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1219 | static u8 __devinit hpt3xx_cable_detect(ide_hwif_t *hwif) |
| 1220 | { |
| 1221 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
| 1222 | struct hpt_info *info = pci_get_drvdata(dev); |
| 1223 | u8 chip_type = info->chip_type; |
| 1224 | u8 scr1 = 0, ata66 = hwif->channel ? 0x01 : 0x02; |
| 1225 | |
| 1226 | /* |
| 1227 | * The HPT37x uses the CBLID pins as outputs for MA15/MA16 |
| 1228 | * address lines to access an external EEPROM. To read valid |
| 1229 | * cable detect state the pins must be enabled as inputs. |
| 1230 | */ |
| 1231 | if (chip_type == HPT374 && (PCI_FUNC(dev->devfn) & 1)) { |
| 1232 | /* |
| 1233 | * HPT374 PCI function 1 |
| 1234 | * - set bit 15 of reg 0x52 to enable TCBLID as input |
| 1235 | * - set bit 15 of reg 0x56 to enable FCBLID as input |
| 1236 | */ |
| 1237 | u8 mcr_addr = hwif->select_data + 2; |
| 1238 | u16 mcr; |
| 1239 | |
| 1240 | pci_read_config_word(dev, mcr_addr, &mcr); |
| 1241 | pci_write_config_word(dev, mcr_addr, (mcr | 0x8000)); |
| 1242 | /* now read cable id register */ |
| 1243 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 1244 | pci_write_config_word(dev, mcr_addr, mcr); |
| 1245 | } else if (chip_type >= HPT370) { |
| 1246 | /* |
| 1247 | * HPT370/372 and 374 pcifn 0 |
| 1248 | * - clear bit 0 of reg 0x5b to enable P/SCBLID as inputs |
| 1249 | */ |
| 1250 | u8 scr2 = 0; |
| 1251 | |
| 1252 | pci_read_config_byte(dev, 0x5b, &scr2); |
| 1253 | pci_write_config_byte(dev, 0x5b, (scr2 & ~1)); |
| 1254 | /* now read cable id register */ |
| 1255 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 1256 | pci_write_config_byte(dev, 0x5b, scr2); |
| 1257 | } else |
| 1258 | pci_read_config_byte(dev, 0x5a, &scr1); |
| 1259 | |
| 1260 | return (scr1 & ata66) ? ATA_CBL_PATA40 : ATA_CBL_PATA80; |
| 1261 | } |
| 1262 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1263 | static void __devinit init_hwif_hpt366(ide_hwif_t *hwif) |
| 1264 | { |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 1265 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1266 | struct hpt_info *info = pci_get_drvdata(dev); |
| 1267 | int serialize = HPT_SERIALIZE_IO; |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1268 | u8 chip_type = info->chip_type; |
| 1269 | u8 new_mcr, old_mcr = 0; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1270 | |
| 1271 | /* Cache the channel's MISC. control registers' offset */ |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1272 | hwif->select_data = hwif->channel ? 0x54 : 0x50; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1273 | |
Bartlomiej Zolnierkiewicz | 26bcb87 | 2007-10-11 23:54:00 +0200 | [diff] [blame] | 1274 | hwif->set_pio_mode = &hpt3xx_set_pio_mode; |
Sergei Shtylyov | 866664d | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 1275 | hwif->set_dma_mode = &hpt3xx_set_mode; |
Sergei Shtylyov | a488f34 | 2008-01-25 22:17:05 +0100 | [diff] [blame] | 1276 | |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1277 | hwif->quirkproc = &hpt3xx_quirkproc; |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1278 | hwif->maskproc = &hpt3xx_maskproc; |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1279 | |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1280 | hwif->udma_filter = &hpt3xx_udma_filter; |
Sergei Shtylyov | b4e4436 | 2007-10-11 23:53:58 +0200 | [diff] [blame] | 1281 | hwif->mdma_filter = &hpt3xx_mdma_filter; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1282 | |
Bartlomiej Zolnierkiewicz | bfa14b4 | 2008-02-02 19:56:31 +0100 | [diff] [blame] | 1283 | hwif->cable_detect = hpt3xx_cable_detect; |
| 1284 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1285 | /* |
| 1286 | * HPT3xxN chips have some complications: |
| 1287 | * |
| 1288 | * - on 33 MHz PCI we must clock switch |
| 1289 | * - on 66 MHz PCI we must NOT use the PCI clock |
| 1290 | */ |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1291 | if (chip_type >= HPT372N && info->dpll_clk && info->pci_clk < 66) { |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1292 | /* |
| 1293 | * Clock is shared between the channels, |
| 1294 | * so we'll have to serialize them... :-( |
| 1295 | */ |
| 1296 | serialize = 1; |
| 1297 | hwif->rw_disk = &hpt3xxn_rw_disk; |
| 1298 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1300 | /* Serialize access to this device if needed */ |
| 1301 | if (serialize && hwif->mate) |
| 1302 | hwif->serialized = hwif->mate->serialized = 1; |
| 1303 | |
| 1304 | /* |
| 1305 | * Disable the "fast interrupt" prediction. Don't hold off |
| 1306 | * on interrupts. (== 0x01 despite what the docs say) |
| 1307 | */ |
| 1308 | pci_read_config_byte(dev, hwif->select_data + 1, &old_mcr); |
| 1309 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1310 | if (info->chip_type >= HPT374) |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1311 | new_mcr = old_mcr & ~0x07; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1312 | else if (info->chip_type >= HPT370) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1313 | new_mcr = old_mcr; |
| 1314 | new_mcr &= ~0x02; |
| 1315 | |
| 1316 | #ifdef HPT_DELAY_INTERRUPT |
| 1317 | new_mcr &= ~0x01; |
| 1318 | #else |
| 1319 | new_mcr |= 0x01; |
| 1320 | #endif |
| 1321 | } else /* HPT366 and HPT368 */ |
| 1322 | new_mcr = old_mcr & ~0x80; |
| 1323 | |
| 1324 | if (new_mcr != old_mcr) |
| 1325 | pci_write_config_byte(dev, hwif->select_data + 1, new_mcr); |
| 1326 | |
Bartlomiej Zolnierkiewicz | a29ec3b | 2007-10-16 22:29:52 +0200 | [diff] [blame] | 1327 | if (hwif->dma_base == 0) |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1328 | return; |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1329 | |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1330 | if (chip_type >= HPT374) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1331 | hwif->ide_dma_test_irq = &hpt374_ide_dma_test_irq; |
| 1332 | hwif->ide_dma_end = &hpt374_ide_dma_end; |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1333 | } else if (chip_type >= HPT370) { |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1334 | hwif->dma_start = &hpt370_ide_dma_start; |
| 1335 | hwif->ide_dma_end = &hpt370_ide_dma_end; |
Sergei Shtylyov | c283f5d | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 1336 | hwif->dma_timeout = &hpt370_dma_timeout; |
Sergei Shtylyov | 26ccb80 | 2007-02-07 18:18:11 +0100 | [diff] [blame] | 1337 | } else |
Sergei Shtylyov | 841d2a9 | 2007-07-09 23:17:54 +0200 | [diff] [blame] | 1338 | hwif->dma_lost_irq = &hpt366_dma_lost_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1339 | } |
| 1340 | |
| 1341 | static void __devinit init_dma_hpt366(ide_hwif_t *hwif, unsigned long dmabase) |
| 1342 | { |
Bartlomiej Zolnierkiewicz | 3650165 | 2008-02-01 23:09:31 +0100 | [diff] [blame] | 1343 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1344 | u8 masterdma = 0, slavedma = 0; |
| 1345 | u8 dma_new = 0, dma_old = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1346 | unsigned long flags; |
| 1347 | |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 1348 | dma_old = inb(dmabase + 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1349 | |
| 1350 | local_irq_save(flags); |
| 1351 | |
| 1352 | dma_new = dma_old; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1353 | pci_read_config_byte(dev, hwif->channel ? 0x4b : 0x43, &masterdma); |
| 1354 | pci_read_config_byte(dev, hwif->channel ? 0x4f : 0x47, &slavedma); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1355 | |
| 1356 | if (masterdma & 0x30) dma_new |= 0x20; |
Sergei Shtylyov | abc4ad4 | 2007-02-07 18:18:05 +0100 | [diff] [blame] | 1357 | if ( slavedma & 0x30) dma_new |= 0x40; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1358 | if (dma_new != dma_old) |
Bartlomiej Zolnierkiewicz | 31e8a46 | 2007-10-19 00:30:08 +0200 | [diff] [blame] | 1359 | outb(dma_new, dmabase + 2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1360 | |
| 1361 | local_irq_restore(flags); |
| 1362 | |
Sergei Shtylyov | ecf32796 | 2008-02-01 23:09:30 +0100 | [diff] [blame] | 1363 | ide_setup_dma(hwif, dmabase); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1364 | } |
| 1365 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1366 | static void __devinit hpt374_init(struct pci_dev *dev, struct pci_dev *dev2) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1367 | { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1368 | if (dev2->irq != dev->irq) { |
| 1369 | /* FIXME: we need a core pci_set_interrupt() */ |
| 1370 | dev2->irq = dev->irq; |
| 1371 | printk(KERN_INFO "HPT374: PCI config space interrupt fixed\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1372 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1373 | } |
| 1374 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1375 | static void __devinit hpt371_init(struct pci_dev *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1376 | { |
Auke Kok | 44c1013 | 2007-06-08 15:46:36 -0700 | [diff] [blame] | 1377 | u8 mcr1 = 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1378 | |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1379 | /* |
| 1380 | * HPT371 chips physically have only one channel, the secondary one, |
| 1381 | * but the primary channel registers do exist! Go figure... |
| 1382 | * So, we manually disable the non-existing channel here |
| 1383 | * (if the BIOS hasn't done this already). |
| 1384 | */ |
| 1385 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 1386 | if (mcr1 & 0x04) |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1387 | pci_write_config_byte(dev, 0x50, mcr1 & ~0x04); |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1388 | } |
| 1389 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1390 | static int __devinit hpt36x_init(struct pci_dev *dev, struct pci_dev *dev2) |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1391 | { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1392 | u8 mcr1 = 0, pin1 = 0, pin2 = 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1393 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1394 | /* |
| 1395 | * Now we'll have to force both channels enabled if |
| 1396 | * at least one of them has been enabled by BIOS... |
| 1397 | */ |
| 1398 | pci_read_config_byte(dev, 0x50, &mcr1); |
| 1399 | if (mcr1 & 0x30) |
| 1400 | pci_write_config_byte(dev, 0x50, mcr1 | 0x30); |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1401 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1402 | pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin1); |
| 1403 | pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin2); |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1404 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1405 | if (pin1 != pin2 && dev->irq == dev2->irq) { |
| 1406 | printk(KERN_INFO "HPT36x: onboard version of chipset, " |
| 1407 | "pin1=%d pin2=%d\n", pin1, pin2); |
| 1408 | return 1; |
| 1409 | } |
| 1410 | |
| 1411 | return 0; |
Sergei Shtylyov | 9077857 | 2007-02-07 18:17:51 +0100 | [diff] [blame] | 1412 | } |
| 1413 | |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1414 | #define IDE_HFLAGS_HPT3XX \ |
| 1415 | (IDE_HFLAG_NO_ATAPI_DMA | \ |
| 1416 | IDE_HFLAG_ABUSE_SET_DMA_MODE | \ |
| 1417 | IDE_HFLAG_OFF_BOARD) |
| 1418 | |
Bartlomiej Zolnierkiewicz | 8562043 | 2007-10-20 00:32:34 +0200 | [diff] [blame] | 1419 | static const struct ide_port_info hpt366_chipsets[] __devinitdata = { |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1420 | { /* 0 */ |
| 1421 | .name = "HPT36x", |
| 1422 | .init_chipset = init_chipset_hpt366, |
| 1423 | .init_hwif = init_hwif_hpt366, |
| 1424 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 2648e5d | 2007-07-09 23:17:55 +0200 | [diff] [blame] | 1425 | /* |
| 1426 | * HPT36x chips have one channel per function and have |
| 1427 | * both channel enable bits located differently and visible |
| 1428 | * to both functions -- really stupid design decision... :-( |
| 1429 | * Bit 4 is for the primary channel, bit 5 for the secondary. |
| 1430 | */ |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1431 | .enablebits = {{0x50,0x10,0x10}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1432 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1433 | .host_flags = IDE_HFLAGS_HPT3XX | IDE_HFLAG_SINGLE, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1434 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1435 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1436 | },{ /* 1 */ |
| 1437 | .name = "HPT372A", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1438 | .init_chipset = init_chipset_hpt366, |
| 1439 | .init_hwif = init_hwif_hpt366, |
| 1440 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1441 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1442 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1443 | .host_flags = IDE_HFLAGS_HPT3XX, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1444 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1445 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1446 | },{ /* 2 */ |
| 1447 | .name = "HPT302", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1448 | .init_chipset = init_chipset_hpt366, |
| 1449 | .init_hwif = init_hwif_hpt366, |
| 1450 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1451 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1452 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1453 | .host_flags = IDE_HFLAGS_HPT3XX, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1454 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1455 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1456 | },{ /* 3 */ |
| 1457 | .name = "HPT371", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1458 | .init_chipset = init_chipset_hpt366, |
| 1459 | .init_hwif = init_hwif_hpt366, |
| 1460 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 836c006 | 2006-12-13 00:35:47 -0800 | [diff] [blame] | 1461 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1462 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1463 | .host_flags = IDE_HFLAGS_HPT3XX, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1464 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1465 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1466 | },{ /* 4 */ |
| 1467 | .name = "HPT374", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1468 | .init_chipset = init_chipset_hpt366, |
| 1469 | .init_hwif = init_hwif_hpt366, |
| 1470 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1471 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Sergei Shtylyov | 2808b0a | 2007-09-11 22:28:36 +0200 | [diff] [blame] | 1472 | .udma_mask = ATA_UDMA5, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1473 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1474 | .host_flags = IDE_HFLAGS_HPT3XX, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1475 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1476 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1477 | },{ /* 5 */ |
| 1478 | .name = "HPT372N", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1479 | .init_chipset = init_chipset_hpt366, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1480 | .init_hwif = init_hwif_hpt366, |
| 1481 | .init_dma = init_dma_hpt366, |
Sergei Shtylyov | 7b73ee0 | 2007-02-07 18:18:16 +0100 | [diff] [blame] | 1482 | .enablebits = {{0x50,0x04,0x04}, {0x54,0x04,0x04}}, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1483 | .extra = 240, |
Bartlomiej Zolnierkiewicz | 4db90a1 | 2008-01-25 22:17:18 +0100 | [diff] [blame] | 1484 | .host_flags = IDE_HFLAGS_HPT3XX, |
Bartlomiej Zolnierkiewicz | 4099d14 | 2007-07-20 01:11:59 +0200 | [diff] [blame] | 1485 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | 5f8b6c3 | 2007-10-19 00:30:07 +0200 | [diff] [blame] | 1486 | .mwdma_mask = ATA_MWDMA2, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1487 | } |
| 1488 | }; |
| 1489 | |
| 1490 | /** |
| 1491 | * hpt366_init_one - called when an HPT366 is found |
| 1492 | * @dev: the hpt366 device |
| 1493 | * @id: the matching pci id |
| 1494 | * |
| 1495 | * Called when the PCI registration layer (or the IDE initialization) |
| 1496 | * finds a device matching our IDE device tables. |
| 1497 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1498 | static int __devinit hpt366_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 1499 | { |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 1500 | const struct hpt_info *info = NULL; |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1501 | struct pci_dev *dev2 = NULL; |
Bartlomiej Zolnierkiewicz | 039788e | 2007-10-20 00:32:34 +0200 | [diff] [blame] | 1502 | struct ide_port_info d; |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1503 | u8 idx = id->driver_data; |
| 1504 | u8 rev = dev->revision; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1505 | |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1506 | if ((idx == 0 || idx == 4) && (PCI_FUNC(dev->devfn) & 1)) |
| 1507 | return -ENODEV; |
| 1508 | |
| 1509 | switch (idx) { |
| 1510 | case 0: |
| 1511 | if (rev < 3) |
| 1512 | info = &hpt36x; |
| 1513 | else { |
Sam Ravnborg | b66cae7 | 2008-02-26 21:50:33 +0100 | [diff] [blame] | 1514 | switch (min_t(u8, rev, 6)) { |
| 1515 | case 3: info = &hpt370; break; |
| 1516 | case 4: info = &hpt370a; break; |
| 1517 | case 5: info = &hpt372; break; |
| 1518 | case 6: info = &hpt372n; break; |
| 1519 | } |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1520 | idx++; |
| 1521 | } |
| 1522 | break; |
| 1523 | case 1: |
| 1524 | info = (rev > 1) ? &hpt372n : &hpt372a; |
| 1525 | break; |
| 1526 | case 2: |
| 1527 | info = (rev > 1) ? &hpt302n : &hpt302; |
| 1528 | break; |
| 1529 | case 3: |
| 1530 | hpt371_init(dev); |
| 1531 | info = (rev > 1) ? &hpt371n : &hpt371; |
| 1532 | break; |
| 1533 | case 4: |
| 1534 | info = &hpt374; |
| 1535 | break; |
| 1536 | case 5: |
| 1537 | info = &hpt372n; |
| 1538 | break; |
| 1539 | } |
| 1540 | |
| 1541 | d = hpt366_chipsets[idx]; |
| 1542 | |
| 1543 | d.name = info->chip_name; |
| 1544 | d.udma_mask = info->udma_mask; |
| 1545 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 1546 | pci_set_drvdata(dev, (void *)info); |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1547 | |
| 1548 | if (info == &hpt36x || info == &hpt374) |
| 1549 | dev2 = pci_get_slot(dev->bus, dev->devfn + 1); |
| 1550 | |
| 1551 | if (dev2) { |
| 1552 | int ret; |
| 1553 | |
Bartlomiej Zolnierkiewicz | 282037f | 2007-10-26 20:31:15 +0200 | [diff] [blame] | 1554 | pci_set_drvdata(dev2, (void *)info); |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1555 | |
| 1556 | if (info == &hpt374) |
| 1557 | hpt374_init(dev, dev2); |
| 1558 | else { |
| 1559 | if (hpt36x_init(dev, dev2)) |
Bartlomiej Zolnierkiewicz | 5e71d9c | 2008-04-26 17:36:35 +0200 | [diff] [blame^] | 1560 | d.host_flags &= ~IDE_HFLAG_NON_BOOTABLE; |
Bartlomiej Zolnierkiewicz | fbf4784 | 2007-10-19 00:30:09 +0200 | [diff] [blame] | 1561 | } |
| 1562 | |
| 1563 | ret = ide_setup_pci_devices(dev, dev2, &d); |
| 1564 | if (ret < 0) |
| 1565 | pci_dev_put(dev2); |
| 1566 | return ret; |
| 1567 | } |
| 1568 | |
| 1569 | return ide_setup_pci_device(dev, &d); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1570 | } |
| 1571 | |
Sam Ravnborg | b66cae7 | 2008-02-26 21:50:33 +0100 | [diff] [blame] | 1572 | static const struct pci_device_id hpt366_pci_tbl[] __devinitconst = { |
Bartlomiej Zolnierkiewicz | 9cbcc5e | 2007-10-16 22:29:56 +0200 | [diff] [blame] | 1573 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT366), 0 }, |
| 1574 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372), 1 }, |
| 1575 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT302), 2 }, |
| 1576 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT371), 3 }, |
| 1577 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT374), 4 }, |
| 1578 | { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT372N), 5 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | { 0, }, |
| 1580 | }; |
| 1581 | MODULE_DEVICE_TABLE(pci, hpt366_pci_tbl); |
| 1582 | |
| 1583 | static struct pci_driver driver = { |
| 1584 | .name = "HPT366_IDE", |
| 1585 | .id_table = hpt366_pci_tbl, |
| 1586 | .probe = hpt366_init_one, |
| 1587 | }; |
| 1588 | |
Bartlomiej Zolnierkiewicz | 82ab1ee | 2007-01-27 13:46:56 +0100 | [diff] [blame] | 1589 | static int __init hpt366_ide_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1590 | { |
| 1591 | return ide_pci_register_driver(&driver); |
| 1592 | } |
| 1593 | |
| 1594 | module_init(hpt366_ide_init); |
| 1595 | |
| 1596 | MODULE_AUTHOR("Andre Hedrick"); |
| 1597 | MODULE_DESCRIPTION("PCI driver module for Highpoint HPT366 IDE"); |
| 1598 | MODULE_LICENSE("GPL"); |