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Brian Swetlandbcc0f6a2008-09-10 14:00:53 -07001/* linux/arch/arm/mach-msm/devices.c
2 *
3 * Copyright (C) 2008 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/interrupt.h>
19#include <linux/dma-mapping.h>
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070020
Russell King80b02c12009-01-08 10:01:47 +000021#include <mach/irqs.h>
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070022#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023#include <mach/dma.h>
Steve Mucklef132c6c2012-06-06 18:30:57 -070024#include <mach/proc_comm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070025#include <asm/clkdev.h>
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070026#include "devices.h"
27
28#include <asm/mach/flash.h>
29#include <linux/mtd/nand.h>
30#include <linux/mtd/partitions.h>
31
San Mehat5d4f77f2008-11-10 16:30:27 -080032#include <mach/mmc.h>
33
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070034static struct resource resources_uart1[] = {
35 {
36 .start = INT_UART1,
37 .end = INT_UART1,
38 .flags = IORESOURCE_IRQ,
39 },
40 {
41 .start = MSM_UART1_PHYS,
42 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
43 .flags = IORESOURCE_MEM,
Stepan Moskovchenkod41cb8c2011-01-17 20:33:32 -080044 .name = "uart_resource"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070045 },
46};
47
48static struct resource resources_uart2[] = {
49 {
50 .start = INT_UART2,
51 .end = INT_UART2,
52 .flags = IORESOURCE_IRQ,
53 },
54 {
55 .start = MSM_UART2_PHYS,
56 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
57 .flags = IORESOURCE_MEM,
Stepan Moskovchenkod41cb8c2011-01-17 20:33:32 -080058 .name = "uart_resource"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070059 },
60};
61
62static struct resource resources_uart3[] = {
63 {
64 .start = INT_UART3,
65 .end = INT_UART3,
66 .flags = IORESOURCE_IRQ,
67 },
68 {
69 .start = MSM_UART3_PHYS,
70 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
71 .flags = IORESOURCE_MEM,
Stepan Moskovchenkod41cb8c2011-01-17 20:33:32 -080072 .name = "uart_resource"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -070073 },
74};
75
76struct platform_device msm_device_uart1 = {
77 .name = "msm_serial",
78 .id = 0,
79 .num_resources = ARRAY_SIZE(resources_uart1),
80 .resource = resources_uart1,
81};
82
83struct platform_device msm_device_uart2 = {
84 .name = "msm_serial",
85 .id = 1,
86 .num_resources = ARRAY_SIZE(resources_uart2),
87 .resource = resources_uart2,
88};
89
90struct platform_device msm_device_uart3 = {
91 .name = "msm_serial",
92 .id = 2,
93 .num_resources = ARRAY_SIZE(resources_uart3),
94 .resource = resources_uart3,
95};
96
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097static struct resource msm_uart1_dm_resources[] = {
98 {
99 .start = MSM_UART1DM_PHYS,
100 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
101 .flags = IORESOURCE_MEM,
102 },
103 {
104 .start = INT_UART1DM_IRQ,
105 .end = INT_UART1DM_IRQ,
106 .flags = IORESOURCE_IRQ,
107 },
108 {
109 .start = INT_UART1DM_RX,
110 .end = INT_UART1DM_RX,
111 .flags = IORESOURCE_IRQ,
112 },
113 {
114 .start = DMOV_HSUART1_TX_CHAN,
115 .end = DMOV_HSUART1_RX_CHAN,
116 .name = "uartdm_channels",
117 .flags = IORESOURCE_DMA,
118 },
119 {
120 .start = DMOV_HSUART1_TX_CRCI,
121 .end = DMOV_HSUART1_RX_CRCI,
122 .name = "uartdm_crci",
123 .flags = IORESOURCE_DMA,
124 },
125};
126
127static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
128
129struct platform_device msm_device_uart_dm1 = {
130 .name = "msm_serial_hs",
131 .id = 0,
132 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
133 .resource = msm_uart1_dm_resources,
134 .dev = {
135 .dma_mask = &msm_uart_dm1_dma_mask,
136 .coherent_dma_mask = DMA_BIT_MASK(32),
137 },
138};
139
140static struct resource msm_uart2_dm_resources[] = {
141 {
142 .start = MSM_UART2DM_PHYS,
143 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
144 .flags = IORESOURCE_MEM,
145 },
146 {
147 .start = INT_UART2DM_IRQ,
148 .end = INT_UART2DM_IRQ,
149 .flags = IORESOURCE_IRQ,
150 },
151 {
152 .start = INT_UART2DM_RX,
153 .end = INT_UART2DM_RX,
154 .flags = IORESOURCE_IRQ,
155 },
156 {
157 .start = DMOV_HSUART2_TX_CHAN,
158 .end = DMOV_HSUART2_RX_CHAN,
159 .name = "uartdm_channels",
160 .flags = IORESOURCE_DMA,
161 },
162 {
163 .start = DMOV_HSUART2_TX_CRCI,
164 .end = DMOV_HSUART2_RX_CRCI,
165 .name = "uartdm_crci",
166 .flags = IORESOURCE_DMA,
167 },
168};
169
170static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
171
172struct platform_device msm_device_uart_dm2 = {
173 .name = "msm_serial_hs",
174 .id = 1,
175 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
176 .resource = msm_uart2_dm_resources,
177 .dev = {
178 .dma_mask = &msm_uart_dm2_dma_mask,
179 .coherent_dma_mask = DMA_BIT_MASK(32),
180 },
181};
182
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700183static struct resource resources_i2c[] = {
184 {
185 .start = MSM_I2C_PHYS,
186 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
187 .flags = IORESOURCE_MEM,
188 },
189 {
190 .start = INT_PWB_I2C,
191 .end = INT_PWB_I2C,
192 .flags = IORESOURCE_IRQ,
193 },
194};
195
196struct platform_device msm_device_i2c = {
197 .name = "msm_i2c",
198 .id = 0,
199 .num_resources = ARRAY_SIZE(resources_i2c),
200 .resource = resources_i2c,
201};
202
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700203#define GPIO_I2C_CLK 60
204#define GPIO_I2C_DAT 61
205void msm_set_i2c_mux(bool gpio, int *gpio_clk, int *gpio_dat)
206{
207 unsigned id;
208 if (gpio) {
209 id = PCOM_GPIO_CFG(GPIO_I2C_CLK, 0, GPIO_OUTPUT,
210 GPIO_NO_PULL, GPIO_2MA);
211 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
212 id = PCOM_GPIO_CFG(GPIO_I2C_DAT, 0, GPIO_OUTPUT,
213 GPIO_NO_PULL, GPIO_2MA);
214 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
215 *gpio_clk = GPIO_I2C_CLK;
216 *gpio_dat = GPIO_I2C_DAT;
217 } else {
218 id = PCOM_GPIO_CFG(GPIO_I2C_CLK, 1, GPIO_INPUT,
219 GPIO_NO_PULL, GPIO_8MA);
220 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
221 id = PCOM_GPIO_CFG(GPIO_I2C_DAT , 1, GPIO_INPUT,
222 GPIO_NO_PULL, GPIO_8MA);
223 msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &id, 0);
224 }
225}
226
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700227static struct resource resources_hsusb[] = {
228 {
229 .start = MSM_HSUSB_PHYS,
230 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
231 .flags = IORESOURCE_MEM,
232 },
233 {
234 .start = INT_USB_HS,
235 .end = INT_USB_HS,
236 .flags = IORESOURCE_IRQ,
237 },
238};
239
240struct platform_device msm_device_hsusb = {
241 .name = "msm_hsusb",
242 .id = -1,
243 .num_resources = ARRAY_SIZE(resources_hsusb),
244 .resource = resources_hsusb,
245 .dev = {
246 .coherent_dma_mask = 0xffffffff,
247 },
248};
249
250struct flash_platform_data msm_nand_data = {
251 .parts = NULL,
252 .nr_parts = 0,
253};
254
255static struct resource resources_nand[] = {
256 [0] = {
257 .start = 7,
258 .end = 7,
259 .flags = IORESOURCE_DMA,
260 },
261};
262
263struct platform_device msm_device_nand = {
264 .name = "msm_nand",
265 .id = -1,
266 .num_resources = ARRAY_SIZE(resources_nand),
267 .resource = resources_nand,
268 .dev = {
269 .platform_data = &msm_nand_data,
270 },
271};
272
273struct platform_device msm_device_smd = {
274 .name = "msm_smd",
275 .id = -1,
276};
277
278static struct resource resources_sdc1[] = {
279 {
280 .start = MSM_SDC1_PHYS,
281 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
282 .flags = IORESOURCE_MEM,
283 },
284 {
285 .start = INT_SDC1_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700286 .end = INT_SDC1_0,
287 .flags = IORESOURCE_IRQ,
288 .name = "cmd_irq",
289 },
290 {
Dima Zavin830d8432009-05-22 20:21:50 -0700291 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
292 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700293 },
294 {
295 .start = 8,
296 .end = 8,
297 .flags = IORESOURCE_DMA,
298 },
299};
300
301static struct resource resources_sdc2[] = {
302 {
303 .start = MSM_SDC2_PHYS,
304 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
305 .flags = IORESOURCE_MEM,
306 },
307 {
308 .start = INT_SDC2_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700309 .end = INT_SDC2_0,
310 .flags = IORESOURCE_IRQ,
311 .name = "cmd_irq",
312 },
Dima Zavin830d8432009-05-22 20:21:50 -0700313 {
314 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
315 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700316 },
317 {
318 .start = 8,
319 .end = 8,
320 .flags = IORESOURCE_DMA,
321 },
322};
323
324static struct resource resources_sdc3[] = {
325 {
326 .start = MSM_SDC3_PHYS,
327 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
328 .flags = IORESOURCE_MEM,
329 },
330 {
331 .start = INT_SDC3_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700332 .end = INT_SDC3_0,
333 .flags = IORESOURCE_IRQ,
334 .name = "cmd_irq",
335 },
Dima Zavin830d8432009-05-22 20:21:50 -0700336 {
337 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
338 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700339 },
340 {
341 .start = 8,
342 .end = 8,
343 .flags = IORESOURCE_DMA,
344 },
345};
346
347static struct resource resources_sdc4[] = {
348 {
349 .start = MSM_SDC4_PHYS,
350 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
351 .flags = IORESOURCE_MEM,
352 },
353 {
354 .start = INT_SDC4_0,
Dima Zavin830d8432009-05-22 20:21:50 -0700355 .end = INT_SDC4_0,
356 .flags = IORESOURCE_IRQ,
357 .name = "cmd_irq",
358 },
Dima Zavin830d8432009-05-22 20:21:50 -0700359 {
360 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
361 .name = "status_irq"
Brian Swetlandbcc0f6a2008-09-10 14:00:53 -0700362 },
363 {
364 .start = 8,
365 .end = 8,
366 .flags = IORESOURCE_DMA,
367 },
368};
369
370struct platform_device msm_device_sdc1 = {
371 .name = "msm_sdcc",
372 .id = 1,
373 .num_resources = ARRAY_SIZE(resources_sdc1),
374 .resource = resources_sdc1,
375 .dev = {
376 .coherent_dma_mask = 0xffffffff,
377 },
378};
379
380struct platform_device msm_device_sdc2 = {
381 .name = "msm_sdcc",
382 .id = 2,
383 .num_resources = ARRAY_SIZE(resources_sdc2),
384 .resource = resources_sdc2,
385 .dev = {
386 .coherent_dma_mask = 0xffffffff,
387 },
388};
389
390struct platform_device msm_device_sdc3 = {
391 .name = "msm_sdcc",
392 .id = 3,
393 .num_resources = ARRAY_SIZE(resources_sdc3),
394 .resource = resources_sdc3,
395 .dev = {
396 .coherent_dma_mask = 0xffffffff,
397 },
398};
399
400struct platform_device msm_device_sdc4 = {
401 .name = "msm_sdcc",
402 .id = 4,
403 .num_resources = ARRAY_SIZE(resources_sdc4),
404 .resource = resources_sdc4,
405 .dev = {
406 .coherent_dma_mask = 0xffffffff,
407 },
408};
San Mehat5d4f77f2008-11-10 16:30:27 -0800409
410static struct platform_device *msm_sdcc_devices[] __initdata = {
411 &msm_device_sdc1,
412 &msm_device_sdc2,
413 &msm_device_sdc3,
414 &msm_device_sdc4,
415};
416
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700417int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat,
Dima Zavin830d8432009-05-22 20:21:50 -0700418 unsigned int stat_irq, unsigned long stat_irq_flags)
San Mehat5d4f77f2008-11-10 16:30:27 -0800419{
420 struct platform_device *pdev;
Dima Zavin830d8432009-05-22 20:21:50 -0700421 struct resource *res;
San Mehat5d4f77f2008-11-10 16:30:27 -0800422
423 if (controller < 1 || controller > 4)
424 return -EINVAL;
425
426 pdev = msm_sdcc_devices[controller-1];
427 pdev->dev.platform_data = plat;
Dima Zavin830d8432009-05-22 20:21:50 -0700428
429 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
430 if (!res)
431 return -EINVAL;
432 else if (stat_irq) {
433 res->start = res->end = stat_irq;
434 res->flags &= ~IORESOURCE_DISABLED;
435 res->flags |= stat_irq_flags;
436 }
437
San Mehat5d4f77f2008-11-10 16:30:27 -0800438 return platform_device_register(pdev);
439}
440
Daniel Walker50bc0ef2010-12-13 14:35:11 -0800441static struct resource resources_mddi0[] = {
442 {
443 .start = MSM_PMDH_PHYS,
444 .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
445 .flags = IORESOURCE_MEM,
446 },
447 {
448 .start = INT_MDDI_PRI,
449 .end = INT_MDDI_PRI,
450 .flags = IORESOURCE_IRQ,
451 },
452};
453
454static struct resource resources_mddi1[] = {
455 {
456 .start = MSM_EMDH_PHYS,
457 .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
458 .flags = IORESOURCE_MEM,
459 },
460 {
461 .start = INT_MDDI_EXT,
462 .end = INT_MDDI_EXT,
463 .flags = IORESOURCE_IRQ,
464 },
465};
466
467struct platform_device msm_device_mddi0 = {
468 .name = "msm_mddi",
469 .id = 0,
470 .num_resources = ARRAY_SIZE(resources_mddi0),
471 .resource = resources_mddi0,
472 .dev = {
473 .coherent_dma_mask = 0xffffffff,
474 },
475};
476
477struct platform_device msm_device_mddi1 = {
478 .name = "msm_mddi",
479 .id = 1,
480 .num_resources = ARRAY_SIZE(resources_mddi1),
481 .resource = resources_mddi1,
482 .dev = {
483 .coherent_dma_mask = 0xffffffff,
484 },
485};
486
487static struct resource resources_mdp[] = {
488 {
489 .start = MSM_MDP_PHYS,
490 .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
491 .name = "mdp",
492 .flags = IORESOURCE_MEM
493 },
494 {
495 .start = INT_MDP,
496 .end = INT_MDP,
497 .flags = IORESOURCE_IRQ,
498 },
499};
500
501struct platform_device msm_device_mdp = {
502 .name = "msm_mdp",
503 .id = 0,
504 .num_resources = ARRAY_SIZE(resources_mdp),
505 .resource = resources_mdp,
506};
507
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700508static struct resource resources_tssc[] = {
509 {
510 .start = MSM_TSSC_PHYS,
511 .end = MSM_TSSC_PHYS + MSM_TSSC_SIZE - 1,
512 .name = "tssc",
513 .flags = IORESOURCE_MEM,
514 },
515 {
516 .start = INT_TCHSCRN1,
517 .end = INT_TCHSCRN1,
518 .name = "tssc1",
519 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
520 },
521 {
522 .start = INT_TCHSCRN2,
523 .end = INT_TCHSCRN2,
524 .name = "tssc2",
525 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
526 },
Daniel Walker5e96da52010-05-12 13:43:28 -0700527};
528
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700529struct platform_device msm_device_touchscreen = {
530 .name = "msm_touchscreen",
531 .id = 0,
532 .num_resources = ARRAY_SIZE(resources_tssc),
533 .resource = resources_tssc,
534};