| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/asm-arm/arch-pxa/hardware.h |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * Created: Jun 15, 2001 |
| 6 | * Copyright: MontaVista Software Inc. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __ASM_ARCH_HARDWARE_H |
| 14 | #define __ASM_ARCH_HARDWARE_H |
| 15 | |
| 16 | /* |
| 17 | * We requires absolute addresses. |
| 18 | */ |
| 19 | #define PCIO_BASE 0 |
| 20 | |
| 21 | /* |
| 22 | * Workarounds for at least 2 errata so far require this. |
| 23 | * The mapping is set in mach-pxa/generic.c. |
| 24 | */ |
| 25 | #define UNCACHED_PHYS_0 0xff000000 |
| 26 | #define UNCACHED_ADDR UNCACHED_PHYS_0 |
| 27 | |
| 28 | /* |
| 29 | * Intel PXA2xx internal register mapping: |
| 30 | * |
| 31 | * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff |
| 32 | * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff |
| 33 | * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff |
| 34 | * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff |
| 35 | * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff |
| 36 | * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff |
| 37 | * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff |
| 38 | * |
| 39 | * Note that not all PXA2xx chips implement all those addresses, and the |
| 40 | * kernel only maps the minimum needed range of this mapping. |
| 41 | */ |
| 42 | #define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) |
| 43 | #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) |
| 44 | |
| 45 | #ifndef __ASSEMBLY__ |
| 46 | |
| 47 | #if 0 |
| 48 | # define __REG(x) (*((volatile u32 *)io_p2v(x))) |
| 49 | #else |
| 50 | /* |
| 51 | * This __REG() version gives the same results as the one above, except |
| 52 | * that we are fooling gcc somehow so it generates far better and smaller |
| 53 | * assembly code for access to contigous registers. It's a shame that gcc |
| 54 | * doesn't guess this by itself. |
| 55 | */ |
| 56 | #include <asm/types.h> |
| 57 | typedef struct { volatile u32 offset[4096]; } __regbase; |
| 58 | # define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] |
| 59 | # define __REG(x) __REGP(io_p2v(x)) |
| 60 | #endif |
| 61 | |
| 62 | /* With indexed regs we don't want to feed the index through io_p2v() |
| 63 | especially if it is a variable, otherwise horrible code will result. */ |
| 64 | # define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) |
| 65 | |
| 66 | # define __PREG(x) (io_v2p((u32)&(x))) |
| 67 | |
| 68 | #else |
| 69 | |
| 70 | # define __REG(x) io_p2v(x) |
| 71 | # define __PREG(x) io_v2p(x) |
| 72 | |
| 73 | #endif |
| 74 | |
| 75 | #ifndef __ASSEMBLY__ |
| 76 | |
| 77 | /* |
| 78 | * Handy routine to set GPIO alternate functions |
| 79 | */ |
| 80 | extern void pxa_gpio_mode( int gpio_mode ); |
| 81 | |
| 82 | /* |
| 83 | * Routine to enable or disable CKEN |
| 84 | */ |
| 85 | extern void pxa_set_cken(int clock, int enable); |
| 86 | |
| 87 | /* |
| 88 | * return current memory and LCD clock frequency in units of 10kHz |
| 89 | */ |
| 90 | extern unsigned int get_memclk_frequency_10khz(void); |
| 91 | extern unsigned int get_lcdclk_frequency_10khz(void); |
| 92 | |
| 93 | #endif |
| 94 | |
| 95 | #endif /* _ASM_ARCH_HARDWARE_H */ |