Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _ASM_IO_H |
| 2 | #define _ASM_IO_H |
| 3 | |
| 4 | #include <linux/config.h> |
| 5 | #include <linux/string.h> |
| 6 | #include <linux/compiler.h> |
| 7 | |
| 8 | /* |
| 9 | * This file contains the definitions for the x86 IO instructions |
| 10 | * inb/inw/inl/outb/outw/outl and the "string versions" of the same |
| 11 | * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" |
| 12 | * versions of the single-IO instructions (inb_p/inw_p/..). |
| 13 | * |
| 14 | * This file is not meant to be obfuscating: it's just complicated |
| 15 | * to (a) handle it all in a way that makes gcc able to optimize it |
| 16 | * as well as possible and (b) trying to avoid writing the same thing |
| 17 | * over and over again with slight variations and possibly making a |
| 18 | * mistake somewhere. |
| 19 | */ |
| 20 | |
| 21 | /* |
| 22 | * Thanks to James van Artsdalen for a better timing-fix than |
| 23 | * the two short jumps: using outb's to a nonexistent port seems |
| 24 | * to guarantee better timings even on fast machines. |
| 25 | * |
| 26 | * On the other hand, I'd like to be sure of a non-existent port: |
| 27 | * I feel a bit unsafe about using 0x80 (should be safe, though) |
| 28 | * |
| 29 | * Linus |
| 30 | */ |
| 31 | |
| 32 | /* |
| 33 | * Bit simplified and optimized by Jan Hubicka |
| 34 | * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999. |
| 35 | * |
| 36 | * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added, |
| 37 | * isa_read[wl] and isa_write[wl] fixed |
| 38 | * - Arnaldo Carvalho de Melo <acme@conectiva.com.br> |
| 39 | */ |
| 40 | |
| 41 | #define IO_SPACE_LIMIT 0xffff |
| 42 | |
| 43 | #define XQUAD_PORTIO_BASE 0xfe400000 |
| 44 | #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */ |
| 45 | |
| 46 | #ifdef __KERNEL__ |
| 47 | |
| 48 | #include <asm-generic/iomap.h> |
| 49 | |
| 50 | #include <linux/vmalloc.h> |
| 51 | |
| 52 | /* |
| 53 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem |
| 54 | * access |
| 55 | */ |
| 56 | #define xlate_dev_mem_ptr(p) __va(p) |
| 57 | |
| 58 | /* |
| 59 | * Convert a virtual cached pointer to an uncached pointer |
| 60 | */ |
| 61 | #define xlate_dev_kmem_ptr(p) p |
| 62 | |
| 63 | /** |
| 64 | * virt_to_phys - map virtual addresses to physical |
| 65 | * @address: address to remap |
| 66 | * |
| 67 | * The returned physical address is the physical (CPU) mapping for |
| 68 | * the memory address given. It is only valid to use this function on |
| 69 | * addresses directly mapped or allocated via kmalloc. |
| 70 | * |
| 71 | * This function does not give bus mappings for DMA transfers. In |
| 72 | * almost all conceivable cases a device driver should not be using |
| 73 | * this function |
| 74 | */ |
| 75 | |
| 76 | static inline unsigned long virt_to_phys(volatile void * address) |
| 77 | { |
| 78 | return __pa(address); |
| 79 | } |
| 80 | |
| 81 | /** |
| 82 | * phys_to_virt - map physical address to virtual |
| 83 | * @address: address to remap |
| 84 | * |
| 85 | * The returned virtual address is a current CPU mapping for |
| 86 | * the memory address given. It is only valid to use this function on |
| 87 | * addresses that have a kernel mapping |
| 88 | * |
| 89 | * This function does not handle bus mappings for DMA transfers. In |
| 90 | * almost all conceivable cases a device driver should not be using |
| 91 | * this function |
| 92 | */ |
| 93 | |
| 94 | static inline void * phys_to_virt(unsigned long address) |
| 95 | { |
| 96 | return __va(address); |
| 97 | } |
| 98 | |
| 99 | /* |
| 100 | * Change "struct page" to physical address. |
| 101 | */ |
| 102 | #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT) |
| 103 | |
| 104 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); |
| 105 | |
| 106 | /** |
| 107 | * ioremap - map bus memory into CPU space |
| 108 | * @offset: bus address of the memory |
| 109 | * @size: size of the resource to map |
| 110 | * |
| 111 | * ioremap performs a platform specific sequence of operations to |
| 112 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ |
| 113 | * writew/writel functions and the other mmio helpers. The returned |
| 114 | * address is not guaranteed to be usable directly as a virtual |
| 115 | * address. |
| 116 | */ |
| 117 | |
| 118 | static inline void __iomem * ioremap(unsigned long offset, unsigned long size) |
| 119 | { |
| 120 | return __ioremap(offset, size, 0); |
| 121 | } |
| 122 | |
| 123 | extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size); |
| 124 | extern void iounmap(volatile void __iomem *addr); |
| 125 | |
| 126 | /* |
| 127 | * bt_ioremap() and bt_iounmap() are for temporary early boot-time |
| 128 | * mappings, before the real ioremap() is functional. |
| 129 | * A boot-time mapping is currently limited to at most 16 pages. |
| 130 | */ |
| 131 | extern void *bt_ioremap(unsigned long offset, unsigned long size); |
| 132 | extern void bt_iounmap(void *addr, unsigned long size); |
| 133 | |
| 134 | /* |
| 135 | * ISA I/O bus memory addresses are 1:1 with the physical address. |
| 136 | */ |
| 137 | #define isa_virt_to_bus virt_to_phys |
| 138 | #define isa_page_to_bus page_to_phys |
| 139 | #define isa_bus_to_virt phys_to_virt |
| 140 | |
| 141 | /* |
| 142 | * However PCI ones are not necessarily 1:1 and therefore these interfaces |
| 143 | * are forbidden in portable PCI drivers. |
| 144 | * |
| 145 | * Allow them on x86 for legacy drivers, though. |
| 146 | */ |
| 147 | #define virt_to_bus virt_to_phys |
| 148 | #define bus_to_virt phys_to_virt |
| 149 | |
| 150 | /* |
| 151 | * readX/writeX() are used to access memory mapped devices. On some |
| 152 | * architectures the memory mapped IO stuff needs to be accessed |
| 153 | * differently. On the x86 architecture, we just read/write the |
| 154 | * memory location directly. |
| 155 | */ |
| 156 | |
| 157 | static inline unsigned char readb(const volatile void __iomem *addr) |
| 158 | { |
| 159 | return *(volatile unsigned char __force *) addr; |
| 160 | } |
| 161 | static inline unsigned short readw(const volatile void __iomem *addr) |
| 162 | { |
| 163 | return *(volatile unsigned short __force *) addr; |
| 164 | } |
| 165 | static inline unsigned int readl(const volatile void __iomem *addr) |
| 166 | { |
| 167 | return *(volatile unsigned int __force *) addr; |
| 168 | } |
| 169 | #define readb_relaxed(addr) readb(addr) |
| 170 | #define readw_relaxed(addr) readw(addr) |
| 171 | #define readl_relaxed(addr) readl(addr) |
| 172 | #define __raw_readb readb |
| 173 | #define __raw_readw readw |
| 174 | #define __raw_readl readl |
| 175 | |
| 176 | static inline void writeb(unsigned char b, volatile void __iomem *addr) |
| 177 | { |
| 178 | *(volatile unsigned char __force *) addr = b; |
| 179 | } |
| 180 | static inline void writew(unsigned short b, volatile void __iomem *addr) |
| 181 | { |
| 182 | *(volatile unsigned short __force *) addr = b; |
| 183 | } |
| 184 | static inline void writel(unsigned int b, volatile void __iomem *addr) |
| 185 | { |
| 186 | *(volatile unsigned int __force *) addr = b; |
| 187 | } |
| 188 | #define __raw_writeb writeb |
| 189 | #define __raw_writew writew |
| 190 | #define __raw_writel writel |
| 191 | |
| 192 | #define mmiowb() |
| 193 | |
| 194 | static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) |
| 195 | { |
| 196 | memset((void __force *) addr, val, count); |
| 197 | } |
| 198 | static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) |
| 199 | { |
| 200 | __memcpy(dst, (void __force *) src, count); |
| 201 | } |
| 202 | static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) |
| 203 | { |
| 204 | __memcpy((void __force *) dst, src, count); |
| 205 | } |
| 206 | |
| 207 | /* |
| 208 | * ISA space is 'always mapped' on a typical x86 system, no need to |
| 209 | * explicitly ioremap() it. The fact that the ISA IO space is mapped |
| 210 | * to PAGE_OFFSET is pure coincidence - it does not mean ISA values |
| 211 | * are physical addresses. The following constant pointer can be |
| 212 | * used as the IO-area pointer (it can be iounmapped as well, so the |
| 213 | * analogy with PCI is quite large): |
| 214 | */ |
| 215 | #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET)) |
| 216 | |
| 217 | #define isa_readb(a) readb(__ISA_IO_base + (a)) |
| 218 | #define isa_readw(a) readw(__ISA_IO_base + (a)) |
| 219 | #define isa_readl(a) readl(__ISA_IO_base + (a)) |
| 220 | #define isa_writeb(b,a) writeb(b,__ISA_IO_base + (a)) |
| 221 | #define isa_writew(w,a) writew(w,__ISA_IO_base + (a)) |
| 222 | #define isa_writel(l,a) writel(l,__ISA_IO_base + (a)) |
| 223 | #define isa_memset_io(a,b,c) memset_io(__ISA_IO_base + (a),(b),(c)) |
| 224 | #define isa_memcpy_fromio(a,b,c) memcpy_fromio((a),__ISA_IO_base + (b),(c)) |
| 225 | #define isa_memcpy_toio(a,b,c) memcpy_toio(__ISA_IO_base + (a),(b),(c)) |
| 226 | |
| 227 | |
| 228 | /* |
| 229 | * Again, i386 does not require mem IO specific function. |
| 230 | */ |
| 231 | |
| 232 | #define eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(b),(c),(d)) |
| 233 | #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(void __force *)(__ISA_IO_base + (b)),(c),(d)) |
| 234 | |
| 235 | /** |
| 236 | * check_signature - find BIOS signatures |
| 237 | * @io_addr: mmio address to check |
| 238 | * @signature: signature block |
| 239 | * @length: length of signature |
| 240 | * |
| 241 | * Perform a signature comparison with the mmio address io_addr. This |
| 242 | * address should have been obtained by ioremap. |
| 243 | * Returns 1 on a match. |
| 244 | */ |
| 245 | |
| 246 | static inline int check_signature(volatile void __iomem * io_addr, |
| 247 | const unsigned char *signature, int length) |
| 248 | { |
| 249 | int retval = 0; |
| 250 | do { |
| 251 | if (readb(io_addr) != *signature) |
| 252 | goto out; |
| 253 | io_addr++; |
| 254 | signature++; |
| 255 | length--; |
| 256 | } while (length); |
| 257 | retval = 1; |
| 258 | out: |
| 259 | return retval; |
| 260 | } |
| 261 | |
| 262 | /* |
| 263 | * Cache management |
| 264 | * |
| 265 | * This needed for two cases |
| 266 | * 1. Out of order aware processors |
| 267 | * 2. Accidentally out of order processors (PPro errata #51) |
| 268 | */ |
| 269 | |
| 270 | #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE) |
| 271 | |
| 272 | static inline void flush_write_buffers(void) |
| 273 | { |
| 274 | __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory"); |
| 275 | } |
| 276 | |
| 277 | #define dma_cache_inv(_start,_size) flush_write_buffers() |
| 278 | #define dma_cache_wback(_start,_size) flush_write_buffers() |
| 279 | #define dma_cache_wback_inv(_start,_size) flush_write_buffers() |
| 280 | |
| 281 | #else |
| 282 | |
| 283 | /* Nothing to do */ |
| 284 | |
| 285 | #define dma_cache_inv(_start,_size) do { } while (0) |
| 286 | #define dma_cache_wback(_start,_size) do { } while (0) |
| 287 | #define dma_cache_wback_inv(_start,_size) do { } while (0) |
| 288 | #define flush_write_buffers() |
| 289 | |
| 290 | #endif |
| 291 | |
| 292 | #endif /* __KERNEL__ */ |
| 293 | |
| 294 | #ifdef SLOW_IO_BY_JUMPING |
| 295 | #define __SLOW_DOWN_IO "jmp 1f; 1: jmp 1f; 1:" |
| 296 | #else |
| 297 | #define __SLOW_DOWN_IO "outb %%al,$0x80;" |
| 298 | #endif |
| 299 | |
| 300 | static inline void slow_down_io(void) { |
| 301 | __asm__ __volatile__( |
| 302 | __SLOW_DOWN_IO |
| 303 | #ifdef REALLY_SLOW_IO |
| 304 | __SLOW_DOWN_IO __SLOW_DOWN_IO __SLOW_DOWN_IO |
| 305 | #endif |
| 306 | : : ); |
| 307 | } |
| 308 | |
| 309 | #ifdef CONFIG_X86_NUMAQ |
| 310 | extern void *xquad_portio; /* Where the IO area was mapped */ |
| 311 | #define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port) |
| 312 | #define __BUILDIO(bwl,bw,type) \ |
| 313 | static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \ |
| 314 | if (xquad_portio) \ |
| 315 | write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \ |
| 316 | else \ |
| 317 | out##bwl##_local(value, port); \ |
| 318 | } \ |
| 319 | static inline void out##bwl(unsigned type value, int port) { \ |
| 320 | out##bwl##_quad(value, port, 0); \ |
| 321 | } \ |
| 322 | static inline unsigned type in##bwl##_quad(int port, int quad) { \ |
| 323 | if (xquad_portio) \ |
| 324 | return read##bwl(XQUAD_PORT_ADDR(port, quad)); \ |
| 325 | else \ |
| 326 | return in##bwl##_local(port); \ |
| 327 | } \ |
| 328 | static inline unsigned type in##bwl(int port) { \ |
| 329 | return in##bwl##_quad(port, 0); \ |
| 330 | } |
| 331 | #else |
| 332 | #define __BUILDIO(bwl,bw,type) \ |
| 333 | static inline void out##bwl(unsigned type value, int port) { \ |
| 334 | out##bwl##_local(value, port); \ |
| 335 | } \ |
| 336 | static inline unsigned type in##bwl(int port) { \ |
| 337 | return in##bwl##_local(port); \ |
| 338 | } |
| 339 | #endif |
| 340 | |
| 341 | |
| 342 | #define BUILDIO(bwl,bw,type) \ |
| 343 | static inline void out##bwl##_local(unsigned type value, int port) { \ |
| 344 | __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \ |
| 345 | } \ |
| 346 | static inline unsigned type in##bwl##_local(int port) { \ |
| 347 | unsigned type value; \ |
| 348 | __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \ |
| 349 | return value; \ |
| 350 | } \ |
| 351 | static inline void out##bwl##_local_p(unsigned type value, int port) { \ |
| 352 | out##bwl##_local(value, port); \ |
| 353 | slow_down_io(); \ |
| 354 | } \ |
| 355 | static inline unsigned type in##bwl##_local_p(int port) { \ |
| 356 | unsigned type value = in##bwl##_local(port); \ |
| 357 | slow_down_io(); \ |
| 358 | return value; \ |
| 359 | } \ |
| 360 | __BUILDIO(bwl,bw,type) \ |
| 361 | static inline void out##bwl##_p(unsigned type value, int port) { \ |
| 362 | out##bwl(value, port); \ |
| 363 | slow_down_io(); \ |
| 364 | } \ |
| 365 | static inline unsigned type in##bwl##_p(int port) { \ |
| 366 | unsigned type value = in##bwl(port); \ |
| 367 | slow_down_io(); \ |
| 368 | return value; \ |
| 369 | } \ |
| 370 | static inline void outs##bwl(int port, const void *addr, unsigned long count) { \ |
| 371 | __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \ |
| 372 | } \ |
| 373 | static inline void ins##bwl(int port, void *addr, unsigned long count) { \ |
| 374 | __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \ |
| 375 | } |
| 376 | |
| 377 | BUILDIO(b,b,char) |
| 378 | BUILDIO(w,w,short) |
| 379 | BUILDIO(l,,int) |
| 380 | |
| 381 | #endif |