Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-ppc/open_pic.h -- OpenPIC Interrupt Handling |
| 3 | * |
| 4 | * Copyright (C) 1997 Geert Uytterhoeven |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file COPYING in the main directory of this archive |
| 8 | * for more details. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #ifndef _PPC_KERNEL_OPEN_PIC_H |
| 13 | #define _PPC_KERNEL_OPEN_PIC_H |
| 14 | |
| 15 | #include <linux/config.h> |
| 16 | #include <linux/irq.h> |
| 17 | |
| 18 | #define OPENPIC_SIZE 0x40000 |
| 19 | |
| 20 | /* |
| 21 | * Non-offset'ed vector numbers |
| 22 | */ |
| 23 | |
| 24 | #define OPENPIC_VEC_TIMER 110 /* and up */ |
| 25 | #define OPENPIC_VEC_IPI 118 /* and up */ |
| 26 | #define OPENPIC_VEC_SPURIOUS 255 |
| 27 | |
| 28 | /* OpenPIC IRQ controller structure */ |
| 29 | extern struct hw_interrupt_type open_pic; |
| 30 | |
| 31 | /* OpenPIC IPI controller structure */ |
| 32 | #ifdef CONFIG_SMP |
| 33 | extern struct hw_interrupt_type open_pic_ipi; |
| 34 | #endif /* CONFIG_SMP */ |
| 35 | |
| 36 | extern u_int OpenPIC_NumInitSenses; |
| 37 | extern u_char *OpenPIC_InitSenses; |
| 38 | extern void __iomem * OpenPIC_Addr; |
| 39 | extern int epic_serial_mode; |
| 40 | |
| 41 | /* Exported functions */ |
| 42 | extern void openpic_set_sources(int first_irq, int num_irqs, void __iomem *isr); |
| 43 | extern void openpic_init(int linux_irq_offset); |
| 44 | extern void openpic_init_nmi_irq(u_int irq); |
| 45 | extern void openpic_hookup_cascade(u_int irq, char *name, |
| 46 | int (*cascade_fn)(struct pt_regs *)); |
| 47 | extern u_int openpic_irq(void); |
| 48 | extern void openpic_eoi(void); |
| 49 | extern void openpic_request_IPIs(void); |
| 50 | extern void do_openpic_setup_cpu(void); |
| 51 | extern int openpic_get_irq(struct pt_regs *regs); |
| 52 | extern void openpic_reset_processor_phys(u_int cpumask); |
| 53 | extern void openpic_setup_ISU(int isu_num, unsigned long addr); |
| 54 | extern void openpic_cause_IPI(u_int ipi, cpumask_t cpumask); |
| 55 | extern void smp_openpic_message_pass(int target, int msg, unsigned long data, |
| 56 | int wait); |
| 57 | extern void openpic_set_k2_cascade(int irq); |
| 58 | extern void openpic_set_priority(u_int pri); |
Benjamin Herrenschmidt | 7a648b9 | 2005-04-16 15:24:18 -0700 | [diff] [blame] | 59 | extern u_int openpic_get_priority(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
| 61 | extern inline int openpic_to_irq(int irq) |
| 62 | { |
| 63 | /* IRQ 0 usually means 'disabled'.. don't mess with it |
| 64 | * exceptions to this (sandpoint maybe?) |
| 65 | * shouldn't use openpic_to_irq |
| 66 | */ |
| 67 | if (irq != 0){ |
| 68 | return irq += NUM_8259_INTERRUPTS; |
| 69 | } else { |
| 70 | return 0; |
| 71 | } |
| 72 | } |
| 73 | /* Support for second openpic on G5 macs */ |
| 74 | |
| 75 | // FIXME: To be replaced by sane cascaded controller management */ |
| 76 | |
| 77 | #define PMAC_OPENPIC2_OFFSET 128 |
| 78 | |
| 79 | #define OPENPIC2_VEC_TIMER 110 /* and up */ |
| 80 | #define OPENPIC2_VEC_IPI 118 /* and up */ |
| 81 | #define OPENPIC2_VEC_SPURIOUS 127 |
| 82 | |
| 83 | |
| 84 | extern void* OpenPIC2_Addr; |
| 85 | |
| 86 | /* Exported functions */ |
| 87 | extern void openpic2_set_sources(int first_irq, int num_irqs, void *isr); |
| 88 | extern void openpic2_init(int linux_irq_offset); |
| 89 | extern void openpic2_init_nmi_irq(u_int irq); |
| 90 | extern u_int openpic2_irq(void); |
| 91 | extern void openpic2_eoi(void); |
| 92 | extern int openpic2_get_irq(struct pt_regs *regs); |
| 93 | extern void openpic2_setup_ISU(int isu_num, unsigned long addr); |
| 94 | #endif /* _PPC_KERNEL_OPEN_PIC_H */ |