blob: b05b5d9cae2009288069b1075543adb20dbee2d7 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifdef __KERNEL__
2#ifndef __ASM_PPC_PROCESSOR_H
3#define __ASM_PPC_PROCESSOR_H
4
5/*
6 * Default implementation of macro that returns current
7 * instruction pointer ("program counter").
8 */
9#define current_text_addr() ({ __label__ _l; _l: &&_l;})
10
11#include <linux/config.h>
12#include <linux/stringify.h>
13
14#include <asm/ptrace.h>
15#include <asm/types.h>
16#include <asm/mpc8xx.h>
17#include <asm/reg.h>
18
19/* We only need to define a new _MACH_xxx for machines which are part of
20 * a configuration which supports more than one type of different machine.
21 * This is currently limited to CONFIG_PPC_MULTIPLATFORM and CHRP/PReP/PMac.
22 * -- Tom
23 */
24#define _MACH_prep 0x00000001
25#define _MACH_Pmac 0x00000002 /* pmac or pmac clone (non-chrp) */
26#define _MACH_chrp 0x00000004 /* chrp machine */
27
28/* see residual.h for these */
29#define _PREP_Motorola 0x01 /* motorola prep */
30#define _PREP_Firm 0x02 /* firmworks prep */
31#define _PREP_IBM 0x00 /* ibm prep */
32#define _PREP_Bull 0x03 /* bull prep */
33
34/* these are arbitrary */
35#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */
36#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
37#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
38
39#define _GLOBAL(n)\
40 .stabs __stringify(n:F-1),N_FUN,0,0,n;\
41 .globl n;\
42n:
43
44/*
45 * this is the minimum allowable io space due to the location
46 * of the io areas on prep (first one at 0x80000000) but
47 * as soon as I get around to remapping the io areas with the BATs
48 * to match the mac we can raise this. -- Cort
49 */
50#define TASK_SIZE (CONFIG_TASK_SIZE)
51
52#ifndef __ASSEMBLY__
53#ifdef CONFIG_PPC_MULTIPLATFORM
54extern int _machine;
55
56/* what kind of prep workstation we are */
57extern int _prep_type;
58extern int _chrp_type;
59
60/*
61 * This is used to identify the board type from a given PReP board
62 * vendor. Board revision is also made available.
63 */
64extern unsigned char ucSystemType;
65extern unsigned char ucBoardRev;
66extern unsigned char ucBoardRevMaj, ucBoardRevMin;
67#else
68#define _machine 0
69#endif /* CONFIG_PPC_MULTIPLATFORM */
70
71struct task_struct;
72void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp);
73void release_thread(struct task_struct *);
74
75/* Prepare to copy thread state - unlazy all lazy status */
76extern void prepare_to_copy(struct task_struct *tsk);
77
78/*
79 * Create a new kernel thread.
80 */
81extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
82
83/* Lazy FPU handling on uni-processor */
84extern struct task_struct *last_task_used_math;
85extern struct task_struct *last_task_used_altivec;
86extern struct task_struct *last_task_used_spe;
87
88/* This decides where the kernel will search for a free chunk of vm
89 * space during mmap's.
90 */
91#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3)
92
93typedef struct {
94 unsigned long seg;
95} mm_segment_t;
96
97struct thread_struct {
98 unsigned long ksp; /* Kernel stack pointer */
99 struct pt_regs *regs; /* Pointer to saved register state */
100 mm_segment_t fs; /* for get_fs() validation */
101 void *pgdir; /* root of page-table tree */
102 int fpexc_mode; /* floating-point exception mode */
103 signed long last_syscall;
104#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE)
105 unsigned long dbcr0; /* debug control register values */
106 unsigned long dbcr1;
107#endif
108 double fpr[32]; /* Complete floating point set */
109 unsigned long fpscr_pad; /* fpr ... fpscr must be contiguous */
110 unsigned long fpscr; /* Floating point status */
111#ifdef CONFIG_ALTIVEC
112 /* Complete AltiVec register set */
113 vector128 vr[32] __attribute((aligned(16)));
114 /* AltiVec status */
115 vector128 vscr __attribute((aligned(16)));
116 unsigned long vrsave;
117 int used_vr; /* set if process has used altivec */
118#endif /* CONFIG_ALTIVEC */
119#ifdef CONFIG_SPE
120 unsigned long evr[32]; /* upper 32-bits of SPE regs */
121 u64 acc; /* Accumulator */
122 unsigned long spefscr; /* SPE & eFP status */
123 int used_spe; /* set if process has used spe */
124#endif /* CONFIG_SPE */
125};
126
127#define ARCH_MIN_TASKALIGN 16
128
129#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack)
130
131#define INIT_THREAD { \
132 .ksp = INIT_SP, \
133 .fs = KERNEL_DS, \
134 .pgdir = swapper_pg_dir, \
135 .fpexc_mode = MSR_FE0 | MSR_FE1, \
136}
137
138/*
139 * Return saved PC of a blocked thread. For now, this is the "user" PC
140 */
141#define thread_saved_pc(tsk) \
142 ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
143
144unsigned long get_wchan(struct task_struct *p);
145
146#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0)
147#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0)
148
149/* Get/set floating-point exception mode */
150#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr))
151#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val))
152
153extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr);
154extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val);
155
156static inline unsigned int __unpack_fe01(unsigned int msr_bits)
157{
158 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8);
159}
160
161static inline unsigned int __pack_fe01(unsigned int fpmode)
162{
163 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1);
164}
165
166/* in process.c - for early bootup debug -- Cort */
167int ll_printk(const char *, ...);
168void ll_puts(const char *);
169
170/* In misc.c */
171void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
172
173#define have_of (_machine == _MACH_chrp || _machine == _MACH_Pmac)
174
175#define cpu_relax() barrier()
176
177/*
178 * Prefetch macros.
179 */
180#define ARCH_HAS_PREFETCH
181#define ARCH_HAS_PREFETCHW
182#define ARCH_HAS_SPINLOCK_PREFETCH
183
184extern inline void prefetch(const void *x)
185{
186 __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x));
187}
188
189extern inline void prefetchw(const void *x)
190{
191 __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
192}
193
194#define spin_lock_prefetch(x) prefetchw(x)
195
196extern int emulate_altivec(struct pt_regs *regs);
197
198#endif /* !__ASSEMBLY__ */
199
200#endif /* __ASM_PPC_PROCESSOR_H */
201#endif /* __KERNEL__ */