Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * patch_intelhdmi.c - Patch for Intel HDMI codecs |
| 4 | * |
| 5 | * Copyright(c) 2008 Intel Corporation. All rights reserved. |
| 6 | * |
| 7 | * Authors: |
| 8 | * Jiang Zhe <zhe.jiang@intel.com> |
| 9 | * Wu Fengguang <wfg@linux.intel.com> |
| 10 | * |
| 11 | * Maintained by: |
| 12 | * Wu Fengguang <wfg@linux.intel.com> |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify it |
| 15 | * under the terms of the GNU General Public License as published by the Free |
| 16 | * Software Foundation; either version 2 of the License, or (at your option) |
| 17 | * any later version. |
| 18 | * |
| 19 | * This program is distributed in the hope that it will be useful, but |
| 20 | * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY |
| 21 | * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
| 22 | * for more details. |
| 23 | * |
| 24 | * You should have received a copy of the GNU General Public License |
| 25 | * along with this program; if not, write to the Free Software Foundation, |
| 26 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 27 | */ |
| 28 | |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/slab.h> |
| 32 | #include <sound/core.h> |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 33 | #include "hda_codec.h" |
| 34 | #include "hda_local.h" |
| 35 | #include "hda_patch.h" |
| 36 | |
| 37 | #define CVT_NID 0x02 /* audio converter */ |
| 38 | #define PIN_NID 0x03 /* HDMI output pin */ |
| 39 | |
| 40 | #define INTEL_HDMI_EVENT_TAG 0x08 |
| 41 | |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 42 | struct intel_hdmi_spec { |
| 43 | struct hda_multi_out multiout; |
| 44 | struct hda_pcm pcm_rec; |
| 45 | struct sink_eld sink; |
| 46 | }; |
| 47 | |
| 48 | static struct hda_verb pinout_enable_verb[] = { |
| 49 | {PIN_NID, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT}, |
| 50 | {} /* terminator */ |
| 51 | }; |
| 52 | |
| 53 | static struct hda_verb pinout_disable_verb[] = { |
| 54 | {PIN_NID, AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00}, |
| 55 | {} |
| 56 | }; |
| 57 | |
| 58 | static struct hda_verb unsolicited_response_verb[] = { |
| 59 | {PIN_NID, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | |
| 60 | INTEL_HDMI_EVENT_TAG}, |
| 61 | {} |
| 62 | }; |
| 63 | |
| 64 | static struct hda_verb def_chan_map[] = { |
| 65 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x00}, |
| 66 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x11}, |
| 67 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x22}, |
| 68 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x33}, |
| 69 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x44}, |
| 70 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x55}, |
| 71 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x66}, |
| 72 | {CVT_NID, AC_VERB_SET_HDMI_CHAN_SLOT, 0x77}, |
| 73 | {} |
| 74 | }; |
| 75 | |
| 76 | |
| 77 | struct hdmi_audio_infoframe { |
| 78 | u8 type; /* 0x84 */ |
| 79 | u8 ver; /* 0x01 */ |
| 80 | u8 len; /* 0x0a */ |
| 81 | |
| 82 | u8 checksum; /* PB0 */ |
| 83 | u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ |
| 84 | u8 SS01_SF24; |
| 85 | u8 CXT04; |
| 86 | u8 CA; |
| 87 | u8 LFEPBL01_LSV36_DM_INH7; |
| 88 | u8 reserved[5]; /* PB6 - PB10 */ |
| 89 | }; |
| 90 | |
| 91 | /* |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 92 | * HDMI routines |
| 93 | */ |
| 94 | |
Takashi Iwai | beb0b9c | 2008-11-05 07:58:25 +0100 | [diff] [blame] | 95 | #ifdef BE_PARANOID |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 96 | static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t nid, |
| 97 | int *packet_index, int *byte_index) |
| 98 | { |
| 99 | int val; |
| 100 | |
| 101 | val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_INDEX, 0); |
| 102 | |
| 103 | *packet_index = val >> 5; |
| 104 | *byte_index = val & 0x1f; |
| 105 | } |
Takashi Iwai | beb0b9c | 2008-11-05 07:58:25 +0100 | [diff] [blame] | 106 | #endif |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 107 | |
| 108 | static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t nid, |
| 109 | int packet_index, int byte_index) |
| 110 | { |
| 111 | int val; |
| 112 | |
| 113 | val = (packet_index << 5) | (byte_index & 0x1f); |
| 114 | |
| 115 | snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); |
| 116 | } |
| 117 | |
| 118 | static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t nid, |
| 119 | unsigned char val) |
| 120 | { |
| 121 | snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); |
| 122 | } |
| 123 | |
| 124 | static void hdmi_enable_output(struct hda_codec *codec) |
| 125 | { |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 126 | /* Enable Audio InfoFrame Transmission */ |
| 127 | hdmi_set_dip_index(codec, PIN_NID, 0x0, 0x0); |
| 128 | snd_hda_codec_write(codec, PIN_NID, 0, AC_VERB_SET_HDMI_DIP_XMIT, |
| 129 | AC_DIPXMIT_BEST); |
Wu Fengguang | 796359d | 2008-11-17 16:57:33 +0800 | [diff] [blame] | 130 | /* Unmute */ |
| 131 | if (get_wcaps(codec, PIN_NID) & AC_WCAP_OUT_AMP) |
| 132 | snd_hda_codec_write(codec, PIN_NID, 0, |
| 133 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); |
| 134 | /* Enable pin out */ |
| 135 | snd_hda_sequence_write(codec, pinout_enable_verb); |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | static void hdmi_disable_output(struct hda_codec *codec) |
| 139 | { |
| 140 | snd_hda_sequence_write(codec, pinout_disable_verb); |
| 141 | if (get_wcaps(codec, PIN_NID) & AC_WCAP_OUT_AMP) |
| 142 | snd_hda_codec_write(codec, PIN_NID, 0, |
| 143 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); |
| 144 | |
| 145 | /* |
| 146 | * FIXME: noises may arise when playing music after reloading the |
| 147 | * kernel module, until the next X restart or monitor repower. |
| 148 | */ |
| 149 | } |
| 150 | |
| 151 | static int hdmi_get_channel_count(struct hda_codec *codec) |
| 152 | { |
| 153 | return 1 + snd_hda_codec_read(codec, CVT_NID, 0, |
| 154 | AC_VERB_GET_CVT_CHAN_COUNT, 0); |
| 155 | } |
| 156 | |
| 157 | static void hdmi_set_channel_count(struct hda_codec *codec, int chs) |
| 158 | { |
| 159 | snd_hda_codec_write(codec, CVT_NID, 0, |
| 160 | AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); |
| 161 | |
| 162 | if (chs != hdmi_get_channel_count(codec)) |
| 163 | snd_printd(KERN_INFO "Channel count expect=%d, real=%d\n", |
| 164 | chs, hdmi_get_channel_count(codec)); |
| 165 | } |
| 166 | |
| 167 | static void hdmi_debug_slot_mapping(struct hda_codec *codec) |
| 168 | { |
| 169 | #ifdef CONFIG_SND_DEBUG_VERBOSE |
| 170 | int i; |
| 171 | int slot; |
| 172 | |
| 173 | for (i = 0; i < 8; i++) { |
| 174 | slot = snd_hda_codec_read(codec, CVT_NID, 0, |
| 175 | AC_VERB_GET_HDMI_CHAN_SLOT, i); |
| 176 | printk(KERN_DEBUG "ASP channel %d => slot %d\n", |
| 177 | slot >> 4, slot & 0x7); |
| 178 | } |
| 179 | #endif |
| 180 | } |
| 181 | |
| 182 | static void hdmi_setup_channel_mapping(struct hda_codec *codec) |
| 183 | { |
| 184 | snd_hda_sequence_write(codec, def_chan_map); |
| 185 | hdmi_debug_slot_mapping(codec); |
| 186 | } |
| 187 | |
| 188 | |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 189 | static void hdmi_parse_eld(struct hda_codec *codec) |
| 190 | { |
Wu Fengguang | 7f4a9f4 | 2008-11-18 11:47:52 +0800 | [diff] [blame] | 191 | struct intel_hdmi_spec *spec = codec->spec; |
| 192 | struct sink_eld *eld = &spec->sink; |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 193 | |
Wu Fengguang | 7f4a9f4 | 2008-11-18 11:47:52 +0800 | [diff] [blame] | 194 | if (!snd_hdmi_get_eld(eld, codec, PIN_NID)) |
| 195 | snd_hdmi_show_eld(eld); |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 196 | } |
| 197 | |
| 198 | |
| 199 | /* |
| 200 | * Audio Infoframe routines |
| 201 | */ |
| 202 | |
| 203 | static void hdmi_debug_dip_size(struct hda_codec *codec) |
| 204 | { |
| 205 | #ifdef CONFIG_SND_DEBUG_VERBOSE |
| 206 | int i; |
| 207 | int size; |
| 208 | |
Wu Fengguang | 7f4a9f4 | 2008-11-18 11:47:52 +0800 | [diff] [blame] | 209 | size = snd_hdmi_get_eld_size(codec, PIN_NID); |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 210 | printk(KERN_DEBUG "ELD buf size is %d\n", size); |
| 211 | |
| 212 | for (i = 0; i < 8; i++) { |
| 213 | size = snd_hda_codec_read(codec, PIN_NID, 0, |
| 214 | AC_VERB_GET_HDMI_DIP_SIZE, i); |
| 215 | printk(KERN_DEBUG "DIP GP[%d] buf size is %d\n", i, size); |
| 216 | } |
| 217 | #endif |
| 218 | } |
| 219 | |
| 220 | static void hdmi_clear_dip_buffers(struct hda_codec *codec) |
| 221 | { |
| 222 | #ifdef BE_PARANOID |
| 223 | int i, j; |
| 224 | int size; |
| 225 | int pi, bi; |
| 226 | for (i = 0; i < 8; i++) { |
| 227 | size = snd_hda_codec_read(codec, PIN_NID, 0, |
| 228 | AC_VERB_GET_HDMI_DIP_SIZE, i); |
| 229 | if (size == 0) |
| 230 | continue; |
| 231 | |
| 232 | hdmi_set_dip_index(codec, PIN_NID, i, 0x0); |
| 233 | for (j = 1; j < 1000; j++) { |
| 234 | hdmi_write_dip_byte(codec, PIN_NID, 0x0); |
| 235 | hdmi_get_dip_index(codec, PIN_NID, &pi, &bi); |
| 236 | if (pi != i) |
| 237 | snd_printd(KERN_INFO "dip index %d: %d != %d\n", |
| 238 | bi, pi, i); |
| 239 | if (bi == 0) /* byte index wrapped around */ |
| 240 | break; |
| 241 | } |
| 242 | snd_printd(KERN_INFO |
| 243 | "DIP GP[%d] buf reported size=%d, written=%d\n", |
| 244 | i, size, j); |
| 245 | } |
| 246 | #endif |
| 247 | } |
| 248 | |
| 249 | static void hdmi_setup_audio_infoframe(struct hda_codec *codec, |
| 250 | struct snd_pcm_substream *substream) |
| 251 | { |
| 252 | struct hdmi_audio_infoframe audio_infoframe = { |
| 253 | .type = 0x84, |
| 254 | .ver = 0x01, |
| 255 | .len = 0x0a, |
| 256 | .CC02_CT47 = substream->runtime->channels - 1, |
| 257 | }; |
| 258 | u8 *params = (u8 *)&audio_infoframe; |
| 259 | int i; |
| 260 | |
| 261 | hdmi_debug_dip_size(codec); |
| 262 | hdmi_clear_dip_buffers(codec); /* be paranoid */ |
| 263 | |
| 264 | hdmi_set_dip_index(codec, PIN_NID, 0x0, 0x0); |
| 265 | for (i = 0; i < sizeof(audio_infoframe); i++) |
| 266 | hdmi_write_dip_byte(codec, PIN_NID, params[i]); |
| 267 | } |
| 268 | |
| 269 | |
| 270 | /* |
| 271 | * Unsolicited events |
| 272 | */ |
| 273 | |
| 274 | static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) |
| 275 | { |
| 276 | int pind = !!(res & AC_UNSOL_RES_PD); |
| 277 | int eldv = !!(res & AC_UNSOL_RES_ELDV); |
| 278 | |
| 279 | printk(KERN_INFO "HDMI intrinsic event: PD=%d ELDV=%d\n", pind, eldv); |
| 280 | |
| 281 | if (pind && eldv) { |
| 282 | hdmi_parse_eld(codec); |
| 283 | /* TODO: do real things about ELD */ |
| 284 | } |
| 285 | } |
| 286 | |
| 287 | static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) |
| 288 | { |
| 289 | int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; |
| 290 | int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); |
| 291 | int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); |
| 292 | |
| 293 | printk(KERN_INFO "HDMI non-intrinsic event: " |
| 294 | "SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", |
| 295 | subtag, |
| 296 | cp_state, |
| 297 | cp_ready); |
| 298 | |
| 299 | /* who cares? */ |
| 300 | if (cp_state) |
| 301 | ; |
| 302 | if (cp_ready) |
| 303 | ; |
| 304 | } |
| 305 | |
| 306 | |
| 307 | static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res) |
| 308 | { |
| 309 | int tag = res >> AC_UNSOL_RES_TAG_SHIFT; |
| 310 | int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; |
| 311 | |
| 312 | if (tag != INTEL_HDMI_EVENT_TAG) { |
| 313 | snd_printd(KERN_INFO |
| 314 | "Unexpected HDMI unsolicited event tag 0x%x\n", |
| 315 | tag); |
| 316 | return; |
| 317 | } |
| 318 | |
| 319 | if (subtag == 0) |
| 320 | hdmi_intrinsic_event(codec, res); |
| 321 | else |
| 322 | hdmi_non_intrinsic_event(codec, res); |
| 323 | } |
| 324 | |
| 325 | /* |
| 326 | * Callbacks |
| 327 | */ |
| 328 | |
| 329 | static int intel_hdmi_playback_pcm_open(struct hda_pcm_stream *hinfo, |
| 330 | struct hda_codec *codec, |
| 331 | struct snd_pcm_substream *substream) |
| 332 | { |
| 333 | struct intel_hdmi_spec *spec = codec->spec; |
| 334 | |
| 335 | return snd_hda_multi_out_dig_open(codec, &spec->multiout); |
| 336 | } |
| 337 | |
| 338 | static int intel_hdmi_playback_pcm_close(struct hda_pcm_stream *hinfo, |
| 339 | struct hda_codec *codec, |
| 340 | struct snd_pcm_substream *substream) |
| 341 | { |
| 342 | struct intel_hdmi_spec *spec = codec->spec; |
| 343 | |
| 344 | hdmi_disable_output(codec); |
| 345 | |
| 346 | return snd_hda_multi_out_dig_close(codec, &spec->multiout); |
| 347 | } |
| 348 | |
| 349 | static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, |
| 350 | struct hda_codec *codec, |
| 351 | unsigned int stream_tag, |
| 352 | unsigned int format, |
| 353 | struct snd_pcm_substream *substream) |
| 354 | { |
| 355 | struct intel_hdmi_spec *spec = codec->spec; |
| 356 | |
| 357 | snd_hda_multi_out_dig_prepare(codec, &spec->multiout, stream_tag, |
| 358 | format, substream); |
| 359 | |
| 360 | hdmi_set_channel_count(codec, substream->runtime->channels); |
| 361 | |
| 362 | /* wfg: channel mapping not supported by DEVCTG */ |
| 363 | hdmi_setup_channel_mapping(codec); |
| 364 | |
| 365 | hdmi_setup_audio_infoframe(codec, substream); |
| 366 | |
| 367 | hdmi_enable_output(codec); |
| 368 | |
| 369 | return 0; |
| 370 | } |
| 371 | |
| 372 | static struct hda_pcm_stream intel_hdmi_pcm_playback = { |
| 373 | .substreams = 1, |
| 374 | .channels_min = 2, |
| 375 | .channels_max = 8, |
| 376 | .nid = CVT_NID, /* NID to query formats and rates and setup streams */ |
| 377 | .ops = { |
| 378 | .open = intel_hdmi_playback_pcm_open, |
| 379 | .close = intel_hdmi_playback_pcm_close, |
| 380 | .prepare = intel_hdmi_playback_pcm_prepare |
| 381 | }, |
| 382 | }; |
| 383 | |
| 384 | static int intel_hdmi_build_pcms(struct hda_codec *codec) |
| 385 | { |
| 386 | struct intel_hdmi_spec *spec = codec->spec; |
| 387 | struct hda_pcm *info = &spec->pcm_rec; |
| 388 | |
| 389 | codec->num_pcms = 1; |
| 390 | codec->pcm_info = info; |
| 391 | |
| 392 | info->name = "INTEL HDMI"; |
| 393 | info->pcm_type = HDA_PCM_TYPE_HDMI; |
| 394 | info->stream[SNDRV_PCM_STREAM_PLAYBACK] = intel_hdmi_pcm_playback; |
| 395 | |
| 396 | return 0; |
| 397 | } |
| 398 | |
| 399 | static int intel_hdmi_build_controls(struct hda_codec *codec) |
| 400 | { |
| 401 | struct intel_hdmi_spec *spec = codec->spec; |
| 402 | int err; |
| 403 | |
| 404 | err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid); |
| 405 | if (err < 0) |
| 406 | return err; |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | static int intel_hdmi_init(struct hda_codec *codec) |
| 412 | { |
| 413 | /* disable audio output as early as possible */ |
| 414 | hdmi_disable_output(codec); |
| 415 | |
| 416 | snd_hda_sequence_write(codec, unsolicited_response_verb); |
| 417 | |
| 418 | return 0; |
| 419 | } |
| 420 | |
| 421 | static void intel_hdmi_free(struct hda_codec *codec) |
| 422 | { |
| 423 | kfree(codec->spec); |
| 424 | } |
| 425 | |
| 426 | static struct hda_codec_ops intel_hdmi_patch_ops = { |
| 427 | .init = intel_hdmi_init, |
| 428 | .free = intel_hdmi_free, |
| 429 | .build_pcms = intel_hdmi_build_pcms, |
| 430 | .build_controls = intel_hdmi_build_controls, |
| 431 | .unsol_event = intel_hdmi_unsol_event, |
| 432 | }; |
| 433 | |
| 434 | static int patch_intel_hdmi(struct hda_codec *codec) |
| 435 | { |
| 436 | struct intel_hdmi_spec *spec; |
| 437 | |
| 438 | spec = kzalloc(sizeof(*spec), GFP_KERNEL); |
| 439 | if (spec == NULL) |
| 440 | return -ENOMEM; |
| 441 | |
| 442 | spec->multiout.num_dacs = 0; /* no analog */ |
| 443 | spec->multiout.max_channels = 8; |
| 444 | spec->multiout.dig_out_nid = CVT_NID; |
| 445 | |
| 446 | codec->spec = spec; |
| 447 | codec->patch_ops = intel_hdmi_patch_ops; |
| 448 | |
Wu Fengguang | 5f1e71b | 2008-11-18 11:47:53 +0800 | [diff] [blame^] | 449 | snd_hda_eld_proc_new(codec, &spec->sink); |
| 450 | |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | struct hda_codec_preset snd_hda_preset_intelhdmi[] = { |
| 455 | { .id = 0x808629fb, .name = "INTEL G45 DEVCL", .patch = patch_intel_hdmi }, |
| 456 | { .id = 0x80862801, .name = "INTEL G45 DEVBLC", .patch = patch_intel_hdmi }, |
| 457 | { .id = 0x80862802, .name = "INTEL G45 DEVCTG", .patch = patch_intel_hdmi }, |
| 458 | { .id = 0x80862803, .name = "INTEL G45 DEVELK", .patch = patch_intel_hdmi }, |
Wu Fengguang | 3a95cb9 | 2008-11-13 10:19:38 +0800 | [diff] [blame] | 459 | { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi }, |
Wu, Fengguang | 9150487 | 2008-11-05 11:16:56 +0800 | [diff] [blame] | 460 | {} /* terminator */ |
| 461 | }; |