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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
3 * Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
4 * receive by Dan Dennedy <dan@dennedy.org>
5 *
6 * based on:
7 * video1394.c - video driver for OHCI 1394 boards
8 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 */
24
25/*
26 OVERVIEW
27
28 I designed dv1394 as a "pipe" that you can use to shoot DV onto a
29 FireWire bus. In transmission mode, dv1394 does the following:
30
31 1. accepts contiguous frames of DV data from user-space, via write()
32 or mmap() (see dv1394.h for the complete API)
33 2. wraps IEC 61883 packets around the DV data, inserting
34 empty synchronization packets as necessary
35 3. assigns accurate SYT timestamps to the outgoing packets
36 4. shoots them out using the OHCI card's IT DMA engine
37
38 Thanks to Dan Dennedy, we now have a receive mode that does the following:
39
40 1. accepts raw IEC 61883 packets from the OHCI card
41 2. re-assembles the DV data payloads into contiguous frames,
42 discarding empty packets
43 3. sends the DV data to user-space via read() or mmap()
44*/
45
46/*
47 TODO:
48
49 - tunable frame-drop behavior: either loop last frame, or halt transmission
50
51 - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
52 so that we don't rely on allocating 64KB of contiguous kernel memory
53 via pci_alloc_consistent()
54
55 DONE:
56 - during reception, better handling of dropped frames and continuity errors
57 - during reception, prevent DMA from bypassing the irq tasklets
58 - reduce irq rate during reception (1/250 packets).
59 - add many more internal buffers during reception with scatter/gather dma.
60 - add dbc (continuity) checking on receive, increment status.dropped_frames
61 if not continuous.
62 - restart IT DMA after a bus reset
63 - safely obtain and release ISO Tx channels in cooperation with OHCI driver
64 - map received DIF blocks to their proper location in DV frame (ensure
65 recovery if dropped packet)
66 - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
67 - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
68 - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
69 - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
70 - set video->id correctly
71 - store video_cards in an array indexed by OHCI card ID, rather than a list
72 - implement DMA context allocation to cooperate with other users of the OHCI
73 - fix all XXX showstoppers
74 - disable IR/IT DMA interrupts on shutdown
75 - flush pci writes to the card by issuing a read
76 - devfs and character device dispatching (* needs testing with Linux 2.2.x)
77 - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
78 - keep all video_cards in a list (for open() via chardev), set file->private_data = video
79 - dv1394_poll should indicate POLLIN when receiving buffers are available
80 - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
81 - expose xmit and recv as separate devices (not exclusive)
82 - expose NTSC and PAL as separate devices (can be overridden)
83
84*/
85
86#include <linux/config.h>
87#include <linux/kernel.h>
88#include <linux/list.h>
89#include <linux/slab.h>
90#include <linux/interrupt.h>
91#include <linux/wait.h>
92#include <linux/errno.h>
93#include <linux/module.h>
94#include <linux/init.h>
95#include <linux/pci.h>
96#include <linux/fs.h>
97#include <linux/poll.h>
98#include <linux/smp_lock.h>
99#include <linux/bitops.h>
100#include <asm/byteorder.h>
101#include <asm/atomic.h>
102#include <asm/io.h>
103#include <asm/uaccess.h>
104#include <linux/delay.h>
105#include <asm/pgtable.h>
106#include <asm/page.h>
107#include <linux/sched.h>
108#include <linux/types.h>
109#include <linux/vmalloc.h>
110#include <linux/string.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111#include <linux/compat.h>
112#include <linux/cdev.h>
113
114#include "ieee1394.h"
115#include "ieee1394_types.h"
116#include "nodemgr.h"
117#include "hosts.h"
118#include "ieee1394_core.h"
119#include "highlevel.h"
120#include "dv1394.h"
121#include "dv1394-private.h"
122
123#include "ohci1394.h"
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125/* DEBUG LEVELS:
126 0 - no debugging messages
127 1 - some debugging messages, but none during DMA frame transmission
128 2 - lots of messages, including during DMA frame transmission
129 (will cause undeflows if your machine is too slow!)
130*/
131
132#define DV1394_DEBUG_LEVEL 0
133
134/* for debugging use ONLY: allow more than one open() of the device */
135/* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
136
137#if DV1394_DEBUG_LEVEL >= 2
138#define irq_printk( args... ) printk( args )
139#else
140#define irq_printk( args... )
141#endif
142
143#if DV1394_DEBUG_LEVEL >= 1
144#define debug_printk( args... ) printk( args)
145#else
146#define debug_printk( args... )
147#endif
148
149/* issue a dummy PCI read to force the preceding write
150 to be posted to the PCI bus immediately */
151
152static inline void flush_pci_write(struct ti_ohci *ohci)
153{
154 mb();
155 reg_read(ohci, OHCI1394_IsochronousCycleTimer);
156}
157
158static void it_tasklet_func(unsigned long data);
159static void ir_tasklet_func(unsigned long data);
160
161#ifdef CONFIG_COMPAT
162static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
163 unsigned long arg);
164#endif
165
166/* GLOBAL DATA */
167
168/* list of all video_cards */
169static LIST_HEAD(dv1394_cards);
170static DEFINE_SPINLOCK(dv1394_cards_lock);
171
172/* translate from a struct file* to the corresponding struct video_card* */
173
174static inline struct video_card* file_to_video_card(struct file *file)
175{
176 return (struct video_card*) file->private_data;
177}
178
179/*** FRAME METHODS *********************************************************/
180
181static void frame_reset(struct frame *f)
182{
183 f->state = FRAME_CLEAR;
184 f->done = 0;
185 f->n_packets = 0;
186 f->frame_begin_timestamp = NULL;
187 f->assigned_timestamp = 0;
188 f->cip_syt1 = NULL;
189 f->cip_syt2 = NULL;
190 f->mid_frame_timestamp = NULL;
191 f->frame_end_timestamp = NULL;
192 f->frame_end_branch = NULL;
193}
194
195static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
196{
197 struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
198 if (!f)
199 return NULL;
200
201 f->video = video;
202 f->frame_num = frame_num;
203
204 f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
205 if (!f->header_pool) {
206 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
207 kfree(f);
208 return NULL;
209 }
210
211 debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
212 (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
213
214 f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
215 /* make it an even # of pages */
216 f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
217
218 f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
219 f->descriptor_pool_size,
220 &f->descriptor_pool_dma);
221 if (!f->descriptor_pool) {
222 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
223 kfree(f);
224 return NULL;
225 }
226
227 debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
228 (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
229
230 f->data = 0;
231 frame_reset(f);
232
233 return f;
234}
235
236static void frame_delete(struct frame *f)
237{
238 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
239 pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
240 kfree(f);
241}
242
243
244
245
246/*
247 frame_prepare() - build the DMA program for transmitting
248
249 Frame_prepare() must be called OUTSIDE the video->spinlock.
250 However, frame_prepare() must still be serialized, so
251 it should be called WITH the video->sem taken.
252 */
253
254static void frame_prepare(struct video_card *video, unsigned int this_frame)
255{
256 struct frame *f = video->frames[this_frame];
257 int last_frame;
258
259 struct DMA_descriptor_block *block;
260 dma_addr_t block_dma;
261 struct CIP_header *cip;
262 dma_addr_t cip_dma;
263
264 unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
265
266 /* these flags denote packets that need special attention */
267 int empty_packet, first_packet, last_packet, mid_packet;
268
269 u32 *branch_address, *last_branch_address = NULL;
270 unsigned long data_p;
271 int first_packet_empty = 0;
272 u32 cycleTimer, ct_sec, ct_cyc, ct_off;
273 unsigned long irq_flags;
274
275 irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
276
277 full_packets = 0;
278
279
280
281 if (video->pal_or_ntsc == DV1394_PAL)
282 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
283 else
284 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
285
286 while ( full_packets < packets_per_frame ) {
287 empty_packet = first_packet = last_packet = mid_packet = 0;
288
289 data_p = f->data + full_packets * 480;
290
291 /************************************************/
292 /* allocate a descriptor block and a CIP header */
293 /************************************************/
294
295 /* note: these should NOT cross a page boundary (DMA restriction) */
296
297 if (f->n_packets >= MAX_PACKETS) {
298 printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
299 return;
300 }
301
302 /* the block surely won't cross a page boundary,
303 since an even number of descriptor_blocks fit on a page */
304 block = &(f->descriptor_pool[f->n_packets]);
305
306 /* DMA address of the block = offset of block relative
307 to the kernel base address of the descriptor pool
308 + DMA base address of the descriptor pool */
309 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
310
311
312 /* the whole CIP pool fits on one page, so no worries about boundaries */
313 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
314 > PAGE_SIZE) {
315 printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
316 return;
317 }
318
319 cip = &(f->header_pool[f->n_packets]);
320
321 /* DMA address of the CIP header = offset of cip
322 relative to kernel base address of the header pool
323 + DMA base address of the header pool */
324 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
325
326 /* is this an empty packet? */
327
328 if (video->cip_accum > (video->cip_d - video->cip_n)) {
329 empty_packet = 1;
330 payload_size = 8;
331 video->cip_accum -= (video->cip_d - video->cip_n);
332 } else {
333 payload_size = 488;
334 video->cip_accum += video->cip_n;
335 }
336
337 /* there are three important packets each frame:
338
339 the first packet in the frame - we ask the card to record the timestamp when
340 this packet is actually sent, so we can monitor
341 how accurate our timestamps are. Also, the first
342 packet serves as a semaphore to let us know that
343 it's OK to free the *previous* frame's DMA buffer
344
345 the last packet in the frame - this packet is used to detect buffer underflows.
346 if this is the last ready frame, the last DMA block
347 will have a branch back to the beginning of the frame
348 (so that the card will re-send the frame on underflow).
349 if this branch gets taken, we know that at least one
350 frame has been dropped. When the next frame is ready,
351 the branch is pointed to its first packet, and the
352 semaphore is disabled.
353
354 a "mid" packet slightly before the end of the frame - this packet should trigger
355 an interrupt so we can go and assign a timestamp to the first packet
356 in the next frame. We don't use the very last packet in the frame
357 for this purpose, because that would leave very little time to set
358 the timestamp before DMA starts on the next frame.
359 */
360
361 if (f->n_packets == 0) {
362 first_packet = 1;
363 } else if ( full_packets == (packets_per_frame-1) ) {
364 last_packet = 1;
365 } else if (f->n_packets == packets_per_frame) {
366 mid_packet = 1;
367 }
368
369
370 /********************/
371 /* setup CIP header */
372 /********************/
373
374 /* the timestamp will be written later from the
375 mid-frame interrupt handler. For now we just
376 store the address of the CIP header(s) that
377 need a timestamp. */
378
379 /* first packet in the frame needs a timestamp */
380 if (first_packet) {
381 f->cip_syt1 = cip;
382 if (empty_packet)
383 first_packet_empty = 1;
384
385 } else if (first_packet_empty && (f->n_packets == 1) ) {
386 /* if the first packet was empty, the second
387 packet's CIP header also needs a timestamp */
388 f->cip_syt2 = cip;
389 }
390
391 fill_cip_header(cip,
392 /* the node ID number of the OHCI card */
393 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
394 video->continuity_counter,
395 video->pal_or_ntsc,
396 0xFFFF /* the timestamp is filled in later */);
397
398 /* advance counter, only for full packets */
399 if ( ! empty_packet )
400 video->continuity_counter++;
401
402 /******************************/
403 /* setup DMA descriptor block */
404 /******************************/
405
406 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
407 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
408
409 if (empty_packet) {
410 /* second descriptor - OUTPUT_LAST for CIP header */
411 fill_output_last( &(block->u.out.u.empty.ol),
412
413 /* want completion status on all interesting packets */
414 (first_packet || mid_packet || last_packet) ? 1 : 0,
415
416 /* want interrupts on all interesting packets */
417 (first_packet || mid_packet || last_packet) ? 1 : 0,
418
419 sizeof(struct CIP_header), /* data size */
420 cip_dma);
421
422 if (first_packet)
423 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
424 else if (mid_packet)
425 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
426 else if (last_packet) {
427 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
428 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
429 }
430
431 branch_address = &(block->u.out.u.empty.ol.q[2]);
432 n_descriptors = 3;
433 if (first_packet)
434 f->first_n_descriptors = n_descriptors;
435
436 } else { /* full packet */
437
438 /* second descriptor - OUTPUT_MORE for CIP header */
439 fill_output_more( &(block->u.out.u.full.om),
440 sizeof(struct CIP_header), /* data size */
441 cip_dma);
442
443
444 /* third (and possibly fourth) descriptor - for DV data */
445 /* the 480-byte payload can cross a page boundary; if so,
446 we need to split it into two DMA descriptors */
447
448 /* does the 480-byte data payload cross a page boundary? */
449 if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
450
451 /* page boundary crossed */
452
453 fill_output_more( &(block->u.out.u.full.u.cross.om),
454 /* data size - how much of data_p fits on the first page */
455 PAGE_SIZE - (data_p % PAGE_SIZE),
456
457 /* DMA address of data_p */
458 dma_region_offset_to_bus(&video->dv_buf,
459 data_p - (unsigned long) video->dv_buf.kvirt));
460
461 fill_output_last( &(block->u.out.u.full.u.cross.ol),
462
463 /* want completion status on all interesting packets */
464 (first_packet || mid_packet || last_packet) ? 1 : 0,
465
466 /* want interrupt on all interesting packets */
467 (first_packet || mid_packet || last_packet) ? 1 : 0,
468
469 /* data size - remaining portion of data_p */
470 480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
471
472 /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
473 dma_region_offset_to_bus(&video->dv_buf,
474 data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
475
476 if (first_packet)
477 f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
478 else if (mid_packet)
479 f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
480 else if (last_packet) {
481 f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
482 f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
483 }
484
485 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
486
487 n_descriptors = 5;
488 if (first_packet)
489 f->first_n_descriptors = n_descriptors;
490
491 full_packets++;
492
493 } else {
494 /* fits on one page */
495
496 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
497
498 /* want completion status on all interesting packets */
499 (first_packet || mid_packet || last_packet) ? 1 : 0,
500
501 /* want interrupt on all interesting packets */
502 (first_packet || mid_packet || last_packet) ? 1 : 0,
503
504 480, /* data size (480 bytes of DV data) */
505
506
507 /* DMA address of data_p */
508 dma_region_offset_to_bus(&video->dv_buf,
509 data_p - (unsigned long) video->dv_buf.kvirt));
510
511 if (first_packet)
512 f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
513 else if (mid_packet)
514 f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
515 else if (last_packet) {
516 f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
517 f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
518 }
519
520 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
521
522 n_descriptors = 4;
523 if (first_packet)
524 f->first_n_descriptors = n_descriptors;
525
526 full_packets++;
527 }
528 }
529
530 /* link this descriptor block into the DMA program by filling in
531 the branch address of the previous block */
532
533 /* note: we are not linked into the active DMA chain yet */
534
535 if (last_branch_address) {
536 *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
537 }
538
539 last_branch_address = branch_address;
540
541
542 f->n_packets++;
543
544 }
545
546 /* when we first assemble a new frame, set the final branch
547 to loop back up to the top */
548 *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
549
550 /* make the latest version of this frame visible to the PCI card */
551 dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
552
553 /* lock against DMA interrupt */
554 spin_lock_irqsave(&video->spinlock, irq_flags);
555
556 f->state = FRAME_READY;
557
558 video->n_clear_frames--;
559
560 last_frame = video->first_clear_frame - 1;
561 if (last_frame == -1)
562 last_frame = video->n_frames-1;
563
564 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
565
566 irq_printk(" frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
567 this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
568
569 irq_printk(" begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
570 (unsigned long) f->frame_begin_timestamp,
571 (unsigned long) f->mid_frame_timestamp,
572 (unsigned long) f->frame_end_timestamp,
573 (unsigned long) f->frame_end_branch);
574
575 if (video->active_frame != -1) {
576
577 /* if DMA is already active, we are almost done */
578 /* just link us onto the active DMA chain */
579 if (video->frames[last_frame]->frame_end_branch) {
580 u32 temp;
581
582 /* point the previous frame's tail to this frame's head */
583 *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
584
585 /* this write MUST precede the next one, or we could silently drop frames */
586 wmb();
587
588 /* disable the want_status semaphore on the last packet */
589 temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
590 temp &= 0xF7CFFFFF;
591 *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
592
593 /* flush these writes to memory ASAP */
594 flush_pci_write(video->ohci);
595
596 /* NOTE:
597 ideally the writes should be "atomic": if
598 the OHCI card reads the want_status flag in
599 between them, we'll falsely report a
600 dropped frame. Hopefully this window is too
601 small to really matter, and the consequence
602 is rather harmless. */
603
604
605 irq_printk(" new frame %d linked onto DMA chain\n", this_frame);
606
607 } else {
608 printk(KERN_ERR "dv1394: last frame not ready???\n");
609 }
610
611 } else {
612
613 u32 transmit_sec, transmit_cyc;
614 u32 ts_cyc, ts_off;
615
616 /* DMA is stopped, so this is the very first frame */
617 video->active_frame = this_frame;
618
619 /* set CommandPtr to address and size of first descriptor block */
620 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
621 video->frames[video->active_frame]->descriptor_pool_dma |
622 f->first_n_descriptors);
623
624 /* assign a timestamp based on the current cycle time...
625 We'll tell the card to begin DMA 100 cycles from now,
626 and assign a timestamp 103 cycles from now */
627
628 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
629
630 ct_sec = cycleTimer >> 25;
631 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
632 ct_off = cycleTimer & 0xFFF;
633
634 transmit_sec = ct_sec;
635 transmit_cyc = ct_cyc + 100;
636
637 transmit_sec += transmit_cyc/8000;
638 transmit_cyc %= 8000;
639
640 ts_off = ct_off;
641 ts_cyc = transmit_cyc + 3;
642 ts_cyc %= 8000;
643
644 f->assigned_timestamp = (ts_cyc&0xF) << 12;
645
646 /* now actually write the timestamp into the appropriate CIP headers */
647 if (f->cip_syt1) {
648 f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
649 f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
650 }
651 if (f->cip_syt2) {
652 f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
653 f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
654 }
655
656 /* --- start DMA --- */
657
658 /* clear all bits in ContextControl register */
659
660 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
661 wmb();
662
663 /* the OHCI card has the ability to start ISO transmission on a
664 particular cycle (start-on-cycle). This way we can ensure that
665 the first DV frame will have an accurate timestamp.
666
667 However, start-on-cycle only appears to work if the OHCI card
668 is cycle master! Since the consequences of messing up the first
669 timestamp are minimal*, just disable start-on-cycle for now.
670
671 * my DV deck drops the first few frames before it "locks in;"
672 so the first frame having an incorrect timestamp is inconsequential.
673 */
674
675#if 0
676 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
677 (1 << 31) /* enable start-on-cycle */
678 | ( (transmit_sec & 0x3) << 29)
679 | (transmit_cyc << 16));
680 wmb();
681#endif
682
683 video->dma_running = 1;
684
685 /* set the 'run' bit */
686 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
687 flush_pci_write(video->ohci);
688
689 /* --- DMA should be running now --- */
690
691 debug_printk(" Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
692 (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
693 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
694 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
695
696 debug_printk(" DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
697 ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
698
699#if DV1394_DEBUG_LEVEL >= 2
700 {
701 /* check if DMA is really running */
702 int i = 0;
703 while (i < 20) {
704 mb();
705 mdelay(1);
706 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
707 printk("DMA ACTIVE after %d msec\n", i);
708 break;
709 }
710 i++;
711 }
712
713 printk("set = %08x, cmdPtr = %08x\n",
714 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
715 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
716 );
717
718 if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
719 printk("DMA did NOT go active after 20ms, event = %x\n",
720 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
721 } else
722 printk("DMA is RUNNING!\n");
723 }
724#endif
725
726 }
727
728
729 spin_unlock_irqrestore(&video->spinlock, irq_flags);
730}
731
732
733
734/*** RECEIVE FUNCTIONS *****************************************************/
735
736/*
737 frame method put_packet
738
739 map and copy the packet data to its location in the frame
740 based upon DIF section and sequence
741*/
742
743static void inline
744frame_put_packet (struct frame *f, struct packet *p)
745{
746 int section_type = p->data[0] >> 5; /* section type is in bits 5 - 7 */
747 int dif_sequence = p->data[1] >> 4; /* dif sequence number is in bits 4 - 7 */
748 int dif_block = p->data[2];
749
750 /* sanity check */
751 if (dif_sequence > 11 || dif_block > 149) return;
752
753 switch (section_type) {
754 case 0: /* 1 Header block */
755 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
756 break;
757
758 case 1: /* 2 Subcode blocks */
759 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
760 break;
761
762 case 2: /* 3 VAUX blocks */
763 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
764 break;
765
766 case 3: /* 9 Audio blocks interleaved with video */
767 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
768 break;
769
770 case 4: /* 135 Video blocks interleaved with audio */
771 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
772 break;
773
774 default: /* we can not handle any other data */
775 break;
776 }
777}
778
779
780static void start_dma_receive(struct video_card *video)
781{
782 if (video->first_run == 1) {
783 video->first_run = 0;
784
785 /* start DMA once all of the frames are READY */
786 video->n_clear_frames = 0;
787 video->first_clear_frame = -1;
788 video->current_packet = 0;
789 video->active_frame = 0;
790
791 /* reset iso recv control register */
792 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
793 wmb();
794
795 /* clear bufferFill, set isochHeader and speed (0=100) */
796 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
797
798 /* match on all tags, listen on channel */
799 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
800
801 /* address and first descriptor block + Z=1 */
802 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
803 video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
804 wmb();
805
806 video->dma_running = 1;
807
808 /* run */
809 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
810 flush_pci_write(video->ohci);
811
812 debug_printk("dv1394: DMA started\n");
813
814#if DV1394_DEBUG_LEVEL >= 2
815 {
816 int i;
817
818 for (i = 0; i < 1000; ++i) {
819 mdelay(1);
820 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
821 printk("DMA ACTIVE after %d msec\n", i);
822 break;
823 }
824 }
825 if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
826 printk("DEAD, event = %x\n",
827 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
828 } else
829 printk("RUNNING!\n");
830 }
831#endif
832 } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
833 debug_printk("DEAD, event = %x\n",
834 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
835
836 /* wake */
837 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
838 }
839}
840
841
842/*
843 receive_packets() - build the DMA program for receiving
844*/
845
846static void receive_packets(struct video_card *video)
847{
848 struct DMA_descriptor_block *block = NULL;
849 dma_addr_t block_dma = 0;
850 struct packet *data = NULL;
851 dma_addr_t data_dma = 0;
852 u32 *last_branch_address = NULL;
853 unsigned long irq_flags;
854 int want_interrupt = 0;
855 struct frame *f = NULL;
856 int i, j;
857
858 spin_lock_irqsave(&video->spinlock, irq_flags);
859
860 for (j = 0; j < video->n_frames; j++) {
861
862 /* connect frames */
863 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
864 *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
865
866 f = video->frames[j];
867
868 for (i = 0; i < MAX_PACKETS; i++) {
869 /* locate a descriptor block and packet from the buffer */
870 block = &(f->descriptor_pool[i]);
871 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
872
873 data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
874 data_dma = dma_region_offset_to_bus( &video->packet_buf,
875 ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
876
877 /* setup DMA descriptor block */
878 want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
879 fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
880
881 /* link descriptors */
882 last_branch_address = f->frame_end_branch;
883
884 if (last_branch_address != NULL)
885 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
886
887 f->frame_end_branch = &(block->u.in.il.q[2]);
888 }
889
890 } /* next j */
891
892 spin_unlock_irqrestore(&video->spinlock, irq_flags);
893
894}
895
896
897
898/*** MANAGEMENT FUNCTIONS **************************************************/
899
900static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
901{
902 unsigned long flags, new_buf_size;
903 int i;
904 u64 chan_mask;
905 int retval = -EINVAL;
906
907 debug_printk("dv1394: initialising %d\n", video->id);
908 if (init->api_version != DV1394_API_VERSION)
909 return -EINVAL;
910
911 /* first sanitize all the parameters */
912 if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
913 return -EINVAL;
914
915 if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
916 return -EINVAL;
917
918 if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
919 /* default SYT offset is 3 cycles */
920 init->syt_offset = 3;
921
922 if ( (init->channel > 63) || (init->channel < 0) )
923 init->channel = 63;
924
925 chan_mask = (u64)1 << init->channel;
926
927 /* calculate what size DMA buffer is needed */
928 if (init->format == DV1394_NTSC)
929 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
930 else
931 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
932
933 /* round up to PAGE_SIZE */
934 if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
935
936 /* don't allow the user to allocate the DMA buffer more than once */
937 if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
938 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
939 return -EINVAL;
940 }
941
942 /* shutdown the card if it's currently active */
943 /* (the card should not be reset if the parameters are screwy) */
944
945 do_dv1394_shutdown(video, 0);
946
947 /* try to claim the ISO channel */
948 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
949 if (video->ohci->ISO_channel_usage & chan_mask) {
950 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
951 retval = -EBUSY;
952 goto err;
953 }
954 video->ohci->ISO_channel_usage |= chan_mask;
955 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
956
957 video->channel = init->channel;
958
959 /* initialize misc. fields of video */
960 video->n_frames = init->n_frames;
961 video->pal_or_ntsc = init->format;
962
963 video->cip_accum = 0;
964 video->continuity_counter = 0;
965
966 video->active_frame = -1;
967 video->first_clear_frame = 0;
968 video->n_clear_frames = video->n_frames;
969 video->dropped_frames = 0;
970
971 video->write_off = 0;
972
973 video->first_run = 1;
974 video->current_packet = -1;
975 video->first_frame = 0;
976
977 if (video->pal_or_ntsc == DV1394_NTSC) {
978 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
979 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
980 video->frame_size = DV1394_NTSC_FRAME_SIZE;
981 } else {
982 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
983 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
984 video->frame_size = DV1394_PAL_FRAME_SIZE;
985 }
986
987 video->syt_offset = init->syt_offset;
988
989 /* find and claim DMA contexts on the OHCI card */
990
991 if (video->ohci_it_ctx == -1) {
992 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
993 it_tasklet_func, (unsigned long) video);
994
995 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
996 printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
997 retval = -EBUSY;
998 goto err;
999 }
1000
1001 video->ohci_it_ctx = video->it_tasklet.context;
1002 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1003 }
1004
1005 if (video->ohci_ir_ctx == -1) {
1006 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1007 ir_tasklet_func, (unsigned long) video);
1008
1009 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1010 printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1011 retval = -EBUSY;
1012 goto err;
1013 }
1014 video->ohci_ir_ctx = video->ir_tasklet.context;
1015 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1016 }
1017
1018 /* allocate struct frames */
1019 for (i = 0; i < init->n_frames; i++) {
1020 video->frames[i] = frame_new(i, video);
1021
1022 if (!video->frames[i]) {
1023 printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1024 retval = -ENOMEM;
1025 goto err;
1026 }
1027 }
1028
1029 if (!video->dv_buf.kvirt) {
1030 /* allocate the ringbuffer */
1031 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1032 if (retval)
1033 goto err;
1034
1035 video->dv_buf_size = new_buf_size;
1036
1037 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1038 video->n_frames, video->dv_buf.n_pages,
1039 video->dv_buf.n_dma_pages, video->dv_buf_size);
1040 }
1041
1042 /* set up the frame->data pointers */
1043 for (i = 0; i < video->n_frames; i++)
1044 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1045
1046 if (!video->packet_buf.kvirt) {
1047 /* allocate packet buffer */
1048 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1049 if (video->packet_buf_size % PAGE_SIZE)
1050 video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1051
1052 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1053 video->ohci->dev, PCI_DMA_FROMDEVICE);
1054 if (retval)
1055 goto err;
1056
1057 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1058 video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1059 video->packet_buf.n_dma_pages, video->packet_buf_size);
1060 }
1061
1062 /* set up register offsets for IT context */
1063 /* IT DMA context registers are spaced 16 bytes apart */
1064 video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1065 video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1066 video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1067
1068 /* enable interrupts for IT context */
1069 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1070 debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1071
1072 /* set up register offsets for IR context */
1073 /* IR DMA context registers are spaced 32 bytes apart */
1074 video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1075 video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1076 video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1077 video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1078
1079 /* enable interrupts for IR context */
1080 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1081 debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1082
1083 return 0;
1084
1085err:
1086 do_dv1394_shutdown(video, 1);
1087 return retval;
1088}
1089
1090/* if the user doesn't bother to call ioctl(INIT) before starting
1091 mmap() or read()/write(), just give him some default values */
1092
1093static int do_dv1394_init_default(struct video_card *video)
1094{
1095 struct dv1394_init init;
1096
1097 init.api_version = DV1394_API_VERSION;
1098 init.n_frames = DV1394_MAX_FRAMES / 4;
1099 /* the following are now set via devfs */
1100 init.channel = video->channel;
1101 init.format = video->pal_or_ntsc;
1102 init.cip_n = video->cip_n;
1103 init.cip_d = video->cip_d;
1104 init.syt_offset = video->syt_offset;
1105
1106 return do_dv1394_init(video, &init);
1107}
1108
1109/* do NOT call from interrupt context */
1110static void stop_dma(struct video_card *video)
1111{
1112 unsigned long flags;
1113 int i;
1114
1115 /* no interrupts */
1116 spin_lock_irqsave(&video->spinlock, flags);
1117
1118 video->dma_running = 0;
1119
1120 if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1121 goto out;
1122
1123 /* stop DMA if in progress */
1124 if ( (video->active_frame != -1) ||
1125 (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1126 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1127
1128 /* clear the .run bits */
1129 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1130 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1131 flush_pci_write(video->ohci);
1132
1133 video->active_frame = -1;
1134 video->first_run = 1;
1135
1136 /* wait until DMA really stops */
1137 i = 0;
1138 while (i < 1000) {
1139
1140 /* wait 0.1 millisecond */
1141 udelay(100);
1142
1143 if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1144 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1145 /* still active */
1146 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1147 mb();
1148 } else {
1149 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1150 break;
1151 }
1152
1153 i++;
1154 }
1155
1156 if (i == 1000) {
1157 printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1158 }
1159 }
1160 else
1161 debug_printk("dv1394: stop_dma: already stopped.\n");
1162
1163out:
1164 spin_unlock_irqrestore(&video->spinlock, flags);
1165}
1166
1167
1168
1169static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1170{
1171 int i;
1172
1173 debug_printk("dv1394: shutdown...\n");
1174
1175 /* stop DMA if in progress */
1176 stop_dma(video);
1177
1178 /* release the DMA contexts */
1179 if (video->ohci_it_ctx != -1) {
1180 video->ohci_IsoXmitContextControlSet = 0;
1181 video->ohci_IsoXmitContextControlClear = 0;
1182 video->ohci_IsoXmitCommandPtr = 0;
1183
1184 /* disable interrupts for IT context */
1185 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1186
1187 /* remove tasklet */
1188 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1189 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1190 video->ohci_it_ctx = -1;
1191 }
1192
1193 if (video->ohci_ir_ctx != -1) {
1194 video->ohci_IsoRcvContextControlSet = 0;
1195 video->ohci_IsoRcvContextControlClear = 0;
1196 video->ohci_IsoRcvCommandPtr = 0;
1197 video->ohci_IsoRcvContextMatch = 0;
1198
1199 /* disable interrupts for IR context */
1200 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1201
1202 /* remove tasklet */
1203 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1204 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1205 video->ohci_ir_ctx = -1;
1206 }
1207
1208 /* release the ISO channel */
1209 if (video->channel != -1) {
1210 u64 chan_mask;
1211 unsigned long flags;
1212
1213 chan_mask = (u64)1 << video->channel;
1214
1215 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1216 video->ohci->ISO_channel_usage &= ~(chan_mask);
1217 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1218
1219 video->channel = -1;
1220 }
1221
1222 /* free the frame structs */
1223 for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1224 if (video->frames[i])
1225 frame_delete(video->frames[i]);
1226 video->frames[i] = NULL;
1227 }
1228
1229 video->n_frames = 0;
1230
1231 /* we can't free the DMA buffer unless it is guaranteed that
1232 no more user-space mappings exist */
1233
1234 if (free_dv_buf) {
1235 dma_region_free(&video->dv_buf);
1236 video->dv_buf_size = 0;
1237 }
1238
1239 /* free packet buffer */
1240 dma_region_free(&video->packet_buf);
1241 video->packet_buf_size = 0;
1242
1243 debug_printk("dv1394: shutdown OK\n");
1244}
1245
1246/*
1247 **********************************
1248 *** MMAP() THEORY OF OPERATION ***
1249 **********************************
1250
1251 The ringbuffer cannot be re-allocated or freed while
1252 a user program maintains a mapping of it. (note that a mapping
1253 can persist even after the device fd is closed!)
1254
1255 So, only let the user process allocate the DMA buffer once.
1256 To resize or deallocate it, you must close the device file
1257 and open it again.
1258
1259 Previously Dan M. hacked out a scheme that allowed the DMA
1260 buffer to change by forcefully unmapping it from the user's
1261 address space. It was prone to error because it's very hard to
1262 track all the places the buffer could have been mapped (we
1263 would have had to walk the vma list of every process in the
1264 system to be sure we found all the mappings!). Instead, we
1265 force the user to choose one buffer size and stick with
1266 it. This small sacrifice is worth the huge reduction in
1267 error-prone code in dv1394.
1268*/
1269
1270static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1271{
1272 struct video_card *video = file_to_video_card(file);
1273 int retval = -EINVAL;
1274
1275 /* serialize mmap */
1276 down(&video->sem);
1277
1278 if ( ! video_card_initialized(video) ) {
1279 retval = do_dv1394_init_default(video);
1280 if (retval)
1281 goto out;
1282 }
1283
1284 retval = dma_region_mmap(&video->dv_buf, file, vma);
1285out:
1286 up(&video->sem);
1287 return retval;
1288}
1289
1290/*** DEVICE FILE INTERFACE *************************************************/
1291
1292/* no need to serialize, multiple threads OK */
1293static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1294{
1295 struct video_card *video = file_to_video_card(file);
1296 unsigned int mask = 0;
1297 unsigned long flags;
1298
1299 poll_wait(file, &video->waitq, wait);
1300
1301 spin_lock_irqsave(&video->spinlock, flags);
1302 if ( video->n_frames == 0 ) {
1303
1304 } else if ( video->active_frame == -1 ) {
1305 /* nothing going on */
1306 mask |= POLLOUT;
1307 } else {
1308 /* any clear/ready buffers? */
1309 if (video->n_clear_frames >0)
1310 mask |= POLLOUT | POLLIN;
1311 }
1312 spin_unlock_irqrestore(&video->spinlock, flags);
1313
1314 return mask;
1315}
1316
1317static int dv1394_fasync(int fd, struct file *file, int on)
1318{
1319 /* I just copied this code verbatim from Alan Cox's mouse driver example
1320 (Documentation/DocBook/) */
1321
1322 struct video_card *video = file_to_video_card(file);
1323
1324 int retval = fasync_helper(fd, file, on, &video->fasync);
1325
1326 if (retval < 0)
1327 return retval;
1328 return 0;
1329}
1330
1331static ssize_t dv1394_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1332{
1333 struct video_card *video = file_to_video_card(file);
1334 DECLARE_WAITQUEUE(wait, current);
1335 ssize_t ret;
1336 size_t cnt;
1337 unsigned long flags;
1338 int target_frame;
1339
1340 /* serialize this to prevent multi-threaded mayhem */
1341 if (file->f_flags & O_NONBLOCK) {
1342 if (down_trylock(&video->sem))
1343 return -EAGAIN;
1344 } else {
1345 if (down_interruptible(&video->sem))
1346 return -ERESTARTSYS;
1347 }
1348
1349 if ( !video_card_initialized(video) ) {
1350 ret = do_dv1394_init_default(video);
1351 if (ret) {
1352 up(&video->sem);
1353 return ret;
1354 }
1355 }
1356
1357 ret = 0;
1358 add_wait_queue(&video->waitq, &wait);
1359
1360 while (count > 0) {
1361
1362 /* must set TASK_INTERRUPTIBLE *before* checking for free
1363 buffers; otherwise we could miss a wakeup if the interrupt
1364 fires between the check and the schedule() */
1365
1366 set_current_state(TASK_INTERRUPTIBLE);
1367
1368 spin_lock_irqsave(&video->spinlock, flags);
1369
1370 target_frame = video->first_clear_frame;
1371
1372 spin_unlock_irqrestore(&video->spinlock, flags);
1373
1374 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1375
1376 /* how much room is left in the target frame buffer */
1377 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1378
1379 } else {
1380 /* buffer is already used */
1381 cnt = 0;
1382 }
1383
1384 if (cnt > count)
1385 cnt = count;
1386
1387 if (cnt <= 0) {
1388 /* no room left, gotta wait */
1389 if (file->f_flags & O_NONBLOCK) {
1390 if (!ret)
1391 ret = -EAGAIN;
1392 break;
1393 }
1394 if (signal_pending(current)) {
1395 if (!ret)
1396 ret = -ERESTARTSYS;
1397 break;
1398 }
1399
1400 schedule();
1401
1402 continue; /* start over from 'while(count > 0)...' */
1403 }
1404
1405 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1406 if (!ret)
1407 ret = -EFAULT;
1408 break;
1409 }
1410
1411 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1412
1413 count -= cnt;
1414 buffer += cnt;
1415 ret += cnt;
1416
1417 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1418 frame_prepare(video, target_frame);
1419 }
1420
1421 remove_wait_queue(&video->waitq, &wait);
1422 set_current_state(TASK_RUNNING);
1423 up(&video->sem);
1424 return ret;
1425}
1426
1427
1428static ssize_t dv1394_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1429{
1430 struct video_card *video = file_to_video_card(file);
1431 DECLARE_WAITQUEUE(wait, current);
1432 ssize_t ret;
1433 size_t cnt;
1434 unsigned long flags;
1435 int target_frame;
1436
1437 /* serialize this to prevent multi-threaded mayhem */
1438 if (file->f_flags & O_NONBLOCK) {
1439 if (down_trylock(&video->sem))
1440 return -EAGAIN;
1441 } else {
1442 if (down_interruptible(&video->sem))
1443 return -ERESTARTSYS;
1444 }
1445
1446 if ( !video_card_initialized(video) ) {
1447 ret = do_dv1394_init_default(video);
1448 if (ret) {
1449 up(&video->sem);
1450 return ret;
1451 }
1452 video->continuity_counter = -1;
1453
1454 receive_packets(video);
1455
1456 start_dma_receive(video);
1457 }
1458
1459 ret = 0;
1460 add_wait_queue(&video->waitq, &wait);
1461
1462 while (count > 0) {
1463
1464 /* must set TASK_INTERRUPTIBLE *before* checking for free
1465 buffers; otherwise we could miss a wakeup if the interrupt
1466 fires between the check and the schedule() */
1467
1468 set_current_state(TASK_INTERRUPTIBLE);
1469
1470 spin_lock_irqsave(&video->spinlock, flags);
1471
1472 target_frame = video->first_clear_frame;
1473
1474 spin_unlock_irqrestore(&video->spinlock, flags);
1475
1476 if (target_frame >= 0 &&
1477 video->n_clear_frames > 0 &&
1478 video->frames[target_frame]->state == FRAME_CLEAR) {
1479
1480 /* how much room is left in the target frame buffer */
1481 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1482
1483 } else {
1484 /* buffer is already used */
1485 cnt = 0;
1486 }
1487
1488 if (cnt > count)
1489 cnt = count;
1490
1491 if (cnt <= 0) {
1492 /* no room left, gotta wait */
1493 if (file->f_flags & O_NONBLOCK) {
1494 if (!ret)
1495 ret = -EAGAIN;
1496 break;
1497 }
1498 if (signal_pending(current)) {
1499 if (!ret)
1500 ret = -ERESTARTSYS;
1501 break;
1502 }
1503
1504 schedule();
1505
1506 continue; /* start over from 'while(count > 0)...' */
1507 }
1508
1509 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1510 if (!ret)
1511 ret = -EFAULT;
1512 break;
1513 }
1514
1515 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1516
1517 count -= cnt;
1518 buffer += cnt;
1519 ret += cnt;
1520
1521 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1522 spin_lock_irqsave(&video->spinlock, flags);
1523 video->n_clear_frames--;
1524 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1525 spin_unlock_irqrestore(&video->spinlock, flags);
1526 }
1527 }
1528
1529 remove_wait_queue(&video->waitq, &wait);
1530 set_current_state(TASK_RUNNING);
1531 up(&video->sem);
1532 return ret;
1533}
1534
1535
1536/*** DEVICE IOCTL INTERFACE ************************************************/
1537
1538static long dv1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1539{
1540 struct video_card *video;
1541 unsigned long flags;
1542 int ret = -EINVAL;
1543 void __user *argp = (void __user *)arg;
1544
1545 DECLARE_WAITQUEUE(wait, current);
1546
1547 lock_kernel();
1548 video = file_to_video_card(file);
1549
1550 /* serialize this to prevent multi-threaded mayhem */
1551 if (file->f_flags & O_NONBLOCK) {
1552 if (down_trylock(&video->sem)) {
1553 unlock_kernel();
1554 return -EAGAIN;
1555 }
1556 } else {
1557 if (down_interruptible(&video->sem)) {
1558 unlock_kernel();
1559 return -ERESTARTSYS;
1560 }
1561 }
1562
1563 switch(cmd)
1564 {
1565 case DV1394_IOC_SUBMIT_FRAMES: {
1566 unsigned int n_submit;
1567
1568 if ( !video_card_initialized(video) ) {
1569 ret = do_dv1394_init_default(video);
1570 if (ret)
1571 goto out;
1572 }
1573
1574 n_submit = (unsigned int) arg;
1575
1576 if (n_submit > video->n_frames) {
1577 ret = -EINVAL;
1578 goto out;
1579 }
1580
1581 while (n_submit > 0) {
1582
1583 add_wait_queue(&video->waitq, &wait);
1584 set_current_state(TASK_INTERRUPTIBLE);
1585
1586 spin_lock_irqsave(&video->spinlock, flags);
1587
1588 /* wait until video->first_clear_frame is really CLEAR */
1589 while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1590
1591 spin_unlock_irqrestore(&video->spinlock, flags);
1592
1593 if (signal_pending(current)) {
1594 remove_wait_queue(&video->waitq, &wait);
1595 set_current_state(TASK_RUNNING);
1596 ret = -EINTR;
1597 goto out;
1598 }
1599
1600 schedule();
1601 set_current_state(TASK_INTERRUPTIBLE);
1602
1603 spin_lock_irqsave(&video->spinlock, flags);
1604 }
1605 spin_unlock_irqrestore(&video->spinlock, flags);
1606
1607 remove_wait_queue(&video->waitq, &wait);
1608 set_current_state(TASK_RUNNING);
1609
1610 frame_prepare(video, video->first_clear_frame);
1611
1612 n_submit--;
1613 }
1614
1615 ret = 0;
1616 break;
1617 }
1618
1619 case DV1394_IOC_WAIT_FRAMES: {
1620 unsigned int n_wait;
1621
1622 if ( !video_card_initialized(video) ) {
1623 ret = -EINVAL;
1624 goto out;
1625 }
1626
1627 n_wait = (unsigned int) arg;
1628
1629 /* since we re-run the last frame on underflow, we will
1630 never actually have n_frames clear frames; at most only
1631 n_frames - 1 */
1632
1633 if (n_wait > (video->n_frames-1) ) {
1634 ret = -EINVAL;
1635 goto out;
1636 }
1637
1638 add_wait_queue(&video->waitq, &wait);
1639 set_current_state(TASK_INTERRUPTIBLE);
1640
1641 spin_lock_irqsave(&video->spinlock, flags);
1642
1643 while (video->n_clear_frames < n_wait) {
1644
1645 spin_unlock_irqrestore(&video->spinlock, flags);
1646
1647 if (signal_pending(current)) {
1648 remove_wait_queue(&video->waitq, &wait);
1649 set_current_state(TASK_RUNNING);
1650 ret = -EINTR;
1651 goto out;
1652 }
1653
1654 schedule();
1655 set_current_state(TASK_INTERRUPTIBLE);
1656
1657 spin_lock_irqsave(&video->spinlock, flags);
1658 }
1659
1660 spin_unlock_irqrestore(&video->spinlock, flags);
1661
1662 remove_wait_queue(&video->waitq, &wait);
1663 set_current_state(TASK_RUNNING);
1664 ret = 0;
1665 break;
1666 }
1667
1668 case DV1394_IOC_RECEIVE_FRAMES: {
1669 unsigned int n_recv;
1670
1671 if ( !video_card_initialized(video) ) {
1672 ret = -EINVAL;
1673 goto out;
1674 }
1675
1676 n_recv = (unsigned int) arg;
1677
1678 /* at least one frame must be active */
1679 if (n_recv > (video->n_frames-1) ) {
1680 ret = -EINVAL;
1681 goto out;
1682 }
1683
1684 spin_lock_irqsave(&video->spinlock, flags);
1685
1686 /* release the clear frames */
1687 video->n_clear_frames -= n_recv;
1688
1689 /* advance the clear frame cursor */
1690 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1691
1692 /* reset dropped_frames */
1693 video->dropped_frames = 0;
1694
1695 spin_unlock_irqrestore(&video->spinlock, flags);
1696
1697 ret = 0;
1698 break;
1699 }
1700
1701 case DV1394_IOC_START_RECEIVE: {
1702 if ( !video_card_initialized(video) ) {
1703 ret = do_dv1394_init_default(video);
1704 if (ret)
1705 goto out;
1706 }
1707
1708 video->continuity_counter = -1;
1709
1710 receive_packets(video);
1711
1712 start_dma_receive(video);
1713
1714 ret = 0;
1715 break;
1716 }
1717
1718 case DV1394_IOC_INIT: {
1719 struct dv1394_init init;
1720 if (!argp) {
1721 ret = do_dv1394_init_default(video);
1722 } else {
1723 if (copy_from_user(&init, argp, sizeof(init))) {
1724 ret = -EFAULT;
1725 goto out;
1726 }
1727 ret = do_dv1394_init(video, &init);
1728 }
1729 break;
1730 }
1731
1732 case DV1394_IOC_SHUTDOWN:
1733 do_dv1394_shutdown(video, 0);
1734 ret = 0;
1735 break;
1736
1737
1738 case DV1394_IOC_GET_STATUS: {
1739 struct dv1394_status status;
1740
1741 if ( !video_card_initialized(video) ) {
1742 ret = -EINVAL;
1743 goto out;
1744 }
1745
1746 status.init.api_version = DV1394_API_VERSION;
1747 status.init.channel = video->channel;
1748 status.init.n_frames = video->n_frames;
1749 status.init.format = video->pal_or_ntsc;
1750 status.init.cip_n = video->cip_n;
1751 status.init.cip_d = video->cip_d;
1752 status.init.syt_offset = video->syt_offset;
1753
1754 status.first_clear_frame = video->first_clear_frame;
1755
1756 /* the rest of the fields need to be locked against the interrupt */
1757 spin_lock_irqsave(&video->spinlock, flags);
1758
1759 status.active_frame = video->active_frame;
1760 status.n_clear_frames = video->n_clear_frames;
1761
1762 status.dropped_frames = video->dropped_frames;
1763
1764 /* reset dropped_frames */
1765 video->dropped_frames = 0;
1766
1767 spin_unlock_irqrestore(&video->spinlock, flags);
1768
1769 if (copy_to_user(argp, &status, sizeof(status))) {
1770 ret = -EFAULT;
1771 goto out;
1772 }
1773
1774 ret = 0;
1775 break;
1776 }
1777
1778 default:
1779 break;
1780 }
1781
1782 out:
1783 up(&video->sem);
1784 unlock_kernel();
1785 return ret;
1786}
1787
1788/*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1789
1790static int dv1394_open(struct inode *inode, struct file *file)
1791{
1792 struct video_card *video = NULL;
1793
1794 /* if the device was opened through devfs, then file->private_data
1795 has already been set to video by devfs */
1796 if (file->private_data) {
1797 video = (struct video_card*) file->private_data;
1798
1799 } else {
1800 /* look up the card by ID */
1801 unsigned long flags;
1802
1803 spin_lock_irqsave(&dv1394_cards_lock, flags);
1804 if (!list_empty(&dv1394_cards)) {
1805 struct video_card *p;
1806 list_for_each_entry(p, &dv1394_cards, list) {
1807 if ((p->id) == ieee1394_file_to_instance(file)) {
1808 video = p;
1809 break;
1810 }
1811 }
1812 }
1813 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1814
1815 if (!video) {
1816 debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1817 return -ENODEV;
1818 }
1819
1820 file->private_data = (void*) video;
1821 }
1822
1823#ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1824
1825 if ( test_and_set_bit(0, &video->open) ) {
1826 /* video is already open by someone else */
1827 return -EBUSY;
1828 }
1829
1830#endif
1831
1832 return 0;
1833}
1834
1835
1836static int dv1394_release(struct inode *inode, struct file *file)
1837{
1838 struct video_card *video = file_to_video_card(file);
1839
1840 /* OK to free the DMA buffer, no more mappings can exist */
1841 do_dv1394_shutdown(video, 1);
1842
1843 /* clean up async I/O users */
1844 dv1394_fasync(-1, file, 0);
1845
1846 /* give someone else a turn */
1847 clear_bit(0, &video->open);
1848
1849 return 0;
1850}
1851
1852
1853/*** DEVICE DRIVER HANDLERS ************************************************/
1854
1855static void it_tasklet_func(unsigned long data)
1856{
1857 int wake = 0;
1858 struct video_card *video = (struct video_card*) data;
1859
1860 spin_lock(&video->spinlock);
1861
1862 if (!video->dma_running)
1863 goto out;
1864
1865 irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1866 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1867 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1868 );
1869
1870
1871 if ( (video->ohci_it_ctx != -1) &&
1872 (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1873
1874 struct frame *f;
1875 unsigned int frame, i;
1876
1877
1878 if (video->active_frame == -1)
1879 frame = 0;
1880 else
1881 frame = video->active_frame;
1882
1883 /* check all the DMA-able frames */
1884 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1885
1886 irq_printk("IRQ checking frame %d...", frame);
1887 f = video->frames[frame];
1888 if (f->state != FRAME_READY) {
1889 irq_printk("clear, skipping\n");
1890 /* we don't own this frame */
1891 continue;
1892 }
1893
1894 irq_printk("DMA\n");
1895
1896 /* check the frame begin semaphore to see if we can free the previous frame */
1897 if ( *(f->frame_begin_timestamp) ) {
1898 int prev_frame;
1899 struct frame *prev_f;
1900
1901
1902
1903 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1904 irq_printk(" BEGIN\n");
1905
1906 prev_frame = frame - 1;
1907 if (prev_frame == -1)
1908 prev_frame += video->n_frames;
1909 prev_f = video->frames[prev_frame];
1910
1911 /* make sure we can actually garbage collect
1912 this frame */
1913 if ( (prev_f->state == FRAME_READY) &&
1914 prev_f->done && (!f->done) )
1915 {
1916 frame_reset(prev_f);
1917 video->n_clear_frames++;
1918 wake = 1;
1919 video->active_frame = frame;
1920
1921 irq_printk(" BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1922 } else {
1923 irq_printk(" BEGIN - can't free yet\n");
1924 }
1925
1926 f->done = 1;
1927 }
1928
1929
1930 /* see if we need to set the timestamp for the next frame */
1931 if ( *(f->mid_frame_timestamp) ) {
1932 struct frame *next_frame;
1933 u32 begin_ts, ts_cyc, ts_off;
1934
1935 *(f->mid_frame_timestamp) = 0;
1936
1937 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1938
1939 irq_printk(" MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1940 begin_ts & 0x1FFF, begin_ts & 0xF,
1941 f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1942
1943 /* prepare next frame and assign timestamp */
1944 next_frame = video->frames[ (frame+1) % video->n_frames ];
1945
1946 if (next_frame->state == FRAME_READY) {
1947 irq_printk(" MIDDLE - next frame is ready, good\n");
1948 } else {
1949 debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1950 next_frame = f;
1951 }
1952
1953 /* set the timestamp to the timestamp of the last frame sent,
1954 plus the length of the last frame sent, plus the syt latency */
1955 ts_cyc = begin_ts & 0xF;
1956 /* advance one frame, plus syt latency (typically 2-3) */
1957 ts_cyc += f->n_packets + video->syt_offset ;
1958
1959 ts_off = 0;
1960
1961 ts_cyc += ts_off/3072;
1962 ts_off %= 3072;
1963
1964 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1965 if (next_frame->cip_syt1) {
1966 next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1967 next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1968 }
1969 if (next_frame->cip_syt2) {
1970 next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1971 next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1972 }
1973
1974 }
1975
1976 /* see if the frame looped */
1977 if ( *(f->frame_end_timestamp) ) {
1978
1979 *(f->frame_end_timestamp) = 0;
1980
1981 debug_printk(" END - the frame looped at least once\n");
1982
1983 video->dropped_frames++;
1984 }
1985
1986 } /* for (each frame) */
1987 }
1988
1989 if (wake) {
1990 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
1991
1992 /* wake readers/writers/ioctl'ers */
1993 wake_up_interruptible(&video->waitq);
1994 }
1995
1996out:
1997 spin_unlock(&video->spinlock);
1998}
1999
2000static void ir_tasklet_func(unsigned long data)
2001{
2002 int wake = 0;
2003 struct video_card *video = (struct video_card*) data;
2004
2005 spin_lock(&video->spinlock);
2006
2007 if (!video->dma_running)
2008 goto out;
2009
2010 if ( (video->ohci_ir_ctx != -1) &&
2011 (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2012
2013 int sof=0; /* start-of-frame flag */
2014 struct frame *f;
2015 u16 packet_length, packet_time;
2016 int i, dbc=0;
2017 struct DMA_descriptor_block *block = NULL;
2018 u16 xferstatus;
2019
2020 int next_i, prev_i;
2021 struct DMA_descriptor_block *next = NULL;
2022 dma_addr_t next_dma = 0;
2023 struct DMA_descriptor_block *prev = NULL;
2024
2025 /* loop over all descriptors in all frames */
2026 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2027 struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2028
2029 /* make sure we are seeing the latest changes to p */
2030 dma_region_sync_for_cpu(&video->packet_buf,
2031 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2032 sizeof(struct packet));
2033
2034 packet_length = le16_to_cpu(p->data_length);
2035 packet_time = le16_to_cpu(p->timestamp);
2036
2037 irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2038 packet_time, packet_length,
2039 p->data[0], p->data[1]);
2040
2041 /* get the descriptor based on packet_buffer cursor */
2042 f = video->frames[video->current_packet / MAX_PACKETS];
2043 block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2044 xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2045 xferstatus &= 0x1F;
2046 irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2047
2048 /* get the current frame */
2049 f = video->frames[video->active_frame];
2050
2051 /* exclude empty packet */
2052 if (packet_length > 8 && xferstatus == 0x11) {
2053 /* check for start of frame */
2054 /* DRD> Changed to check section type ([0]>>5==0)
2055 and dif sequence ([1]>>4==0) */
2056 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2057
2058 dbc = (int) (p->cip_h1 >> 24);
2059 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2060 {
2061 printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2062 video->dropped_frames += video->n_clear_frames + 1;
2063 video->first_frame = 0;
2064 video->n_clear_frames = 0;
2065 video->first_clear_frame = -1;
2066 }
2067 video->continuity_counter = dbc;
2068
2069 if (!video->first_frame) {
2070 if (sof) {
2071 video->first_frame = 1;
2072 }
2073
2074 } else if (sof) {
2075 /* close current frame */
2076 frame_reset(f); /* f->state = STATE_CLEAR */
2077 video->n_clear_frames++;
2078 if (video->n_clear_frames > video->n_frames) {
2079 video->dropped_frames++;
2080 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2081 video->n_clear_frames = video->n_frames-1;
2082 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2083 }
2084 if (video->first_clear_frame == -1)
2085 video->first_clear_frame = video->active_frame;
2086
2087 /* get the next frame */
2088 video->active_frame = (video->active_frame + 1) % video->n_frames;
2089 f = video->frames[video->active_frame];
2090 irq_printk(" frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2091 video->active_frame, video->n_clear_frames, video->first_clear_frame);
2092 }
2093 if (video->first_frame) {
2094 if (sof) {
2095 /* open next frame */
2096 f->state = FRAME_READY;
2097 }
2098
2099 /* copy to buffer */
2100 if (f->n_packets > (video->frame_size / 480)) {
2101 printk(KERN_ERR "frame buffer overflow during receive\n");
2102 }
2103
2104 frame_put_packet(f, p);
2105
2106 } /* first_frame */
2107 }
2108
2109 /* stop, end of ready packets */
2110 else if (xferstatus == 0) {
2111 break;
2112 }
2113
2114 /* reset xferStatus & resCount */
2115 block->u.in.il.q[3] = cpu_to_le32(512);
2116
2117 /* terminate dma chain at this (next) packet */
2118 next_i = video->current_packet;
2119 f = video->frames[next_i / MAX_PACKETS];
2120 next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2121 next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2122 next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2123 next->u.in.il.q[2] = 0; /* disable branch */
2124
2125 /* link previous to next */
2126 prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2127 f = video->frames[prev_i / MAX_PACKETS];
2128 prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2129 if (prev_i % (MAX_PACKETS/2)) {
2130 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2131 } else {
2132 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2133 }
2134 prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2135 wmb();
2136
2137 /* wake up DMA in case it fell asleep */
2138 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2139
2140 /* advance packet_buffer cursor */
2141 video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2142
2143 } /* for all packets */
2144
2145 wake = 1; /* why the hell not? */
2146
2147 } /* receive interrupt */
2148
2149 if (wake) {
2150 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2151
2152 /* wake readers/writers/ioctl'ers */
2153 wake_up_interruptible(&video->waitq);
2154 }
2155
2156out:
2157 spin_unlock(&video->spinlock);
2158}
2159
2160static struct cdev dv1394_cdev;
2161static struct file_operations dv1394_fops=
2162{
2163 .owner = THIS_MODULE,
2164 .poll = dv1394_poll,
2165 .unlocked_ioctl = dv1394_ioctl,
2166#ifdef CONFIG_COMPAT
2167 .compat_ioctl = dv1394_compat_ioctl,
2168#endif
2169 .mmap = dv1394_mmap,
2170 .open = dv1394_open,
2171 .write = dv1394_write,
2172 .read = dv1394_read,
2173 .release = dv1394_release,
2174 .fasync = dv1394_fasync,
2175};
2176
2177
2178/*** HOTPLUG STUFF **********************************************************/
2179/*
2180 * Export information about protocols/devices supported by this driver.
2181 */
2182static struct ieee1394_device_id dv1394_id_table[] = {
2183 {
2184 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2185 .specifier_id = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2186 .version = AVC_SW_VERSION_ENTRY & 0xffffff
2187 },
2188 { }
2189};
2190
2191MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2192
2193static struct hpsb_protocol_driver dv1394_driver = {
2194 .name = "DV/1394 Driver",
2195 .id_table = dv1394_id_table,
2196 .driver = {
2197 .name = "dv1394",
2198 .bus = &ieee1394_bus_type,
2199 },
2200};
2201
2202
2203/*** IEEE1394 HPSB CALLBACKS ***********************************************/
2204
2205static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2206{
2207 struct video_card *video;
2208 unsigned long flags;
2209 int i;
2210
Stefan Richter85511582005-11-07 06:31:45 -05002211 video = kzalloc(sizeof(*video), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002212 if (!video) {
2213 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2214 goto err;
2215 }
2216
Linus Torvalds1da177e2005-04-16 15:20:36 -07002217 video->ohci = ohci;
2218 /* lower 2 bits of id indicate which of four "plugs"
2219 per host */
2220 video->id = ohci->host->id << 2;
2221 if (format == DV1394_NTSC)
2222 video->id |= mode;
2223 else
2224 video->id |= 2 + mode;
2225
2226 video->ohci_it_ctx = -1;
2227 video->ohci_ir_ctx = -1;
2228
2229 video->ohci_IsoXmitContextControlSet = 0;
2230 video->ohci_IsoXmitContextControlClear = 0;
2231 video->ohci_IsoXmitCommandPtr = 0;
2232
2233 video->ohci_IsoRcvContextControlSet = 0;
2234 video->ohci_IsoRcvContextControlClear = 0;
2235 video->ohci_IsoRcvCommandPtr = 0;
2236 video->ohci_IsoRcvContextMatch = 0;
2237
2238 video->n_frames = 0; /* flag that video is not initialized */
2239 video->channel = 63; /* default to broadcast channel */
2240 video->active_frame = -1;
2241
2242 /* initialize the following */
2243 video->pal_or_ntsc = format;
2244 video->cip_n = 0; /* 0 = use builtin default */
2245 video->cip_d = 0;
2246 video->syt_offset = 0;
2247 video->mode = mode;
2248
2249 for (i = 0; i < DV1394_MAX_FRAMES; i++)
2250 video->frames[i] = NULL;
2251
2252 dma_region_init(&video->dv_buf);
2253 video->dv_buf_size = 0;
2254 dma_region_init(&video->packet_buf);
2255 video->packet_buf_size = 0;
2256
2257 clear_bit(0, &video->open);
2258 spin_lock_init(&video->spinlock);
2259 video->dma_running = 0;
2260 init_MUTEX(&video->sem);
2261 init_waitqueue_head(&video->waitq);
2262 video->fasync = NULL;
2263
2264 spin_lock_irqsave(&dv1394_cards_lock, flags);
2265 INIT_LIST_HEAD(&video->list);
2266 list_add_tail(&video->list, &dv1394_cards);
2267 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2268
2269 if (devfs_mk_cdev(MKDEV(IEEE1394_MAJOR,
2270 IEEE1394_MINOR_BLOCK_DV1394*16 + video->id),
2271 S_IFCHR|S_IRUGO|S_IWUGO,
2272 "ieee1394/dv/host%d/%s/%s",
2273 (video->id>>2),
2274 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2275 (video->mode == MODE_RECEIVE ? "in" : "out")) < 0)
2276 goto err_free;
2277
2278 debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2279
2280 return 0;
2281
2282 err_free:
2283 kfree(video);
2284 err:
2285 return -1;
2286}
2287
2288static void dv1394_un_init(struct video_card *video)
2289{
2290 char buf[32];
2291
2292 /* obviously nobody has the driver open at this point */
2293 do_dv1394_shutdown(video, 1);
2294 snprintf(buf, sizeof(buf), "dv/host%d/%s/%s", (video->id >> 2),
2295 (video->pal_or_ntsc == DV1394_NTSC ? "NTSC" : "PAL"),
2296 (video->mode == MODE_RECEIVE ? "in" : "out")
2297 );
2298
2299 devfs_remove("ieee1394/%s", buf);
2300 kfree(video);
2301}
2302
2303
2304static void dv1394_remove_host (struct hpsb_host *host)
2305{
2306 struct video_card *video;
2307 unsigned long flags;
2308 int id = host->id;
2309
2310 /* We only work with the OHCI-1394 driver */
2311 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2312 return;
2313
2314 /* find the corresponding video_cards */
2315 do {
2316 struct video_card *tmp_vid;
2317
2318 video = NULL;
2319
2320 spin_lock_irqsave(&dv1394_cards_lock, flags);
2321 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2322 if ((tmp_vid->id >> 2) == id) {
2323 list_del(&tmp_vid->list);
2324 video = tmp_vid;
2325 break;
2326 }
2327 }
2328 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2329
2330 if (video)
2331 dv1394_un_init(video);
2332 } while (video != NULL);
2333
gregkh@suse.de7e25ab92005-03-23 09:53:36 -08002334 class_device_destroy(hpsb_protocol_class,
2335 MKDEV(IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002336 devfs_remove("ieee1394/dv/host%d/NTSC", id);
2337 devfs_remove("ieee1394/dv/host%d/PAL", id);
2338 devfs_remove("ieee1394/dv/host%d", id);
2339}
2340
2341static void dv1394_add_host (struct hpsb_host *host)
2342{
2343 struct ti_ohci *ohci;
2344 int id = host->id;
2345
2346 /* We only work with the OHCI-1394 driver */
2347 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2348 return;
2349
2350 ohci = (struct ti_ohci *)host->hostdata;
2351
Greg Kroah-Hartman53f46542005-10-27 22:25:43 -07002352 class_device_create(hpsb_protocol_class, NULL, MKDEV(
Linus Torvalds1da177e2005-04-16 15:20:36 -07002353 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)),
2354 NULL, "dv1394-%d", id);
2355 devfs_mk_dir("ieee1394/dv/host%d", id);
2356 devfs_mk_dir("ieee1394/dv/host%d/NTSC", id);
2357 devfs_mk_dir("ieee1394/dv/host%d/PAL", id);
2358
2359 dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2360 dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2361 dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2362 dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2363}
2364
2365
2366/* Bus reset handler. In the event of a bus reset, we may need to
2367 re-start the DMA contexts - otherwise the user program would
2368 end up waiting forever.
2369*/
2370
2371static void dv1394_host_reset(struct hpsb_host *host)
2372{
2373 struct ti_ohci *ohci;
2374 struct video_card *video = NULL, *tmp_vid;
2375 unsigned long flags;
2376
2377 /* We only work with the OHCI-1394 driver */
2378 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2379 return;
2380
2381 ohci = (struct ti_ohci *)host->hostdata;
2382
2383
2384 /* find the corresponding video_cards */
2385 spin_lock_irqsave(&dv1394_cards_lock, flags);
2386 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2387 if ((tmp_vid->id >> 2) == host->id) {
2388 video = tmp_vid;
2389 break;
2390 }
2391 }
2392 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2393
2394 if (!video)
2395 return;
2396
2397
2398 spin_lock_irqsave(&video->spinlock, flags);
2399
2400 if (!video->dma_running)
2401 goto out;
2402
2403 /* check IT context */
2404 if (video->ohci_it_ctx != -1) {
2405 u32 ctx;
2406
2407 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2408
2409 /* if (RUN but not ACTIVE) */
2410 if ( (ctx & (1<<15)) &&
2411 !(ctx & (1<<10)) ) {
2412
2413 debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2414
2415 /* to be safe, assume a frame has been dropped. User-space programs
2416 should handle this condition like an underflow. */
2417 video->dropped_frames++;
2418
2419 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2420
2421 /* clear RUN */
2422 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2423 flush_pci_write(video->ohci);
2424
2425 /* set RUN */
2426 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2427 flush_pci_write(video->ohci);
2428
2429 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2430 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2431 flush_pci_write(video->ohci);
2432
2433 irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2434 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2435 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2436 }
2437 }
2438
2439 /* check IR context */
2440 if (video->ohci_ir_ctx != -1) {
2441 u32 ctx;
2442
2443 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2444
2445 /* if (RUN but not ACTIVE) */
2446 if ( (ctx & (1<<15)) &&
2447 !(ctx & (1<<10)) ) {
2448
2449 debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2450
2451 /* to be safe, assume a frame has been dropped. User-space programs
2452 should handle this condition like an overflow. */
2453 video->dropped_frames++;
2454
2455 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2456 /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2457
2458 /* clear RUN */
2459 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2460 flush_pci_write(video->ohci);
2461
2462 /* set RUN */
2463 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2464 flush_pci_write(video->ohci);
2465
2466 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2467 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2468 flush_pci_write(video->ohci);
2469
2470 irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2471 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2472 reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2473 }
2474 }
2475
2476out:
2477 spin_unlock_irqrestore(&video->spinlock, flags);
2478
2479 /* wake readers/writers/ioctl'ers */
2480 wake_up_interruptible(&video->waitq);
2481}
2482
2483static struct hpsb_highlevel dv1394_highlevel = {
2484 .name = "dv1394",
2485 .add_host = dv1394_add_host,
2486 .remove_host = dv1394_remove_host,
2487 .host_reset = dv1394_host_reset,
2488};
2489
2490#ifdef CONFIG_COMPAT
2491
2492#define DV1394_IOC32_INIT _IOW('#', 0x06, struct dv1394_init32)
2493#define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2494
2495struct dv1394_init32 {
2496 u32 api_version;
2497 u32 channel;
2498 u32 n_frames;
2499 u32 format;
2500 u32 cip_n;
2501 u32 cip_d;
2502 u32 syt_offset;
2503};
2504
2505struct dv1394_status32 {
2506 struct dv1394_init32 init;
2507 s32 active_frame;
2508 u32 first_clear_frame;
2509 u32 n_clear_frames;
2510 u32 dropped_frames;
2511};
2512
2513/* RED-PEN: this should use compat_alloc_userspace instead */
2514
2515static int handle_dv1394_init(struct file *file, unsigned int cmd, unsigned long arg)
2516{
2517 struct dv1394_init32 dv32;
2518 struct dv1394_init dv;
2519 mm_segment_t old_fs;
2520 int ret;
2521
2522 if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2523 return -EFAULT;
2524
2525 if (copy_from_user(&dv32, (void __user *)arg, sizeof(dv32)))
2526 return -EFAULT;
2527
2528 dv.api_version = dv32.api_version;
2529 dv.channel = dv32.channel;
2530 dv.n_frames = dv32.n_frames;
2531 dv.format = dv32.format;
2532 dv.cip_n = (unsigned long)dv32.cip_n;
2533 dv.cip_d = (unsigned long)dv32.cip_d;
2534 dv.syt_offset = dv32.syt_offset;
2535
2536 old_fs = get_fs();
2537 set_fs(KERNEL_DS);
2538 ret = dv1394_ioctl(file, DV1394_IOC_INIT, (unsigned long)&dv);
2539 set_fs(old_fs);
2540
2541 return ret;
2542}
2543
2544static int handle_dv1394_get_status(struct file *file, unsigned int cmd, unsigned long arg)
2545{
2546 struct dv1394_status32 dv32;
2547 struct dv1394_status dv;
2548 mm_segment_t old_fs;
2549 int ret;
2550
2551 if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2552 return -EFAULT;
2553
2554 old_fs = get_fs();
2555 set_fs(KERNEL_DS);
2556 ret = dv1394_ioctl(file, DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2557 set_fs(old_fs);
2558
2559 if (!ret) {
2560 dv32.init.api_version = dv.init.api_version;
2561 dv32.init.channel = dv.init.channel;
2562 dv32.init.n_frames = dv.init.n_frames;
2563 dv32.init.format = dv.init.format;
2564 dv32.init.cip_n = (u32)dv.init.cip_n;
2565 dv32.init.cip_d = (u32)dv.init.cip_d;
2566 dv32.init.syt_offset = dv.init.syt_offset;
2567 dv32.active_frame = dv.active_frame;
2568 dv32.first_clear_frame = dv.first_clear_frame;
2569 dv32.n_clear_frames = dv.n_clear_frames;
2570 dv32.dropped_frames = dv.dropped_frames;
2571
2572 if (copy_to_user((struct dv1394_status32 __user *)arg, &dv32, sizeof(dv32)))
2573 ret = -EFAULT;
2574 }
2575
2576 return ret;
2577}
2578
2579
2580
2581static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
2582 unsigned long arg)
2583{
2584 switch (cmd) {
2585 case DV1394_IOC_SHUTDOWN:
2586 case DV1394_IOC_SUBMIT_FRAMES:
2587 case DV1394_IOC_WAIT_FRAMES:
2588 case DV1394_IOC_RECEIVE_FRAMES:
2589 case DV1394_IOC_START_RECEIVE:
2590 return dv1394_ioctl(file, cmd, arg);
2591
2592 case DV1394_IOC32_INIT:
2593 return handle_dv1394_init(file, cmd, arg);
2594 case DV1394_IOC32_GET_STATUS:
2595 return handle_dv1394_get_status(file, cmd, arg);
2596 default:
2597 return -ENOIOCTLCMD;
2598 }
2599}
2600
2601#endif /* CONFIG_COMPAT */
2602
2603
2604/*** KERNEL MODULE HANDLERS ************************************************/
2605
2606MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2607MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2608MODULE_SUPPORTED_DEVICE("dv1394");
2609MODULE_LICENSE("GPL");
2610
2611static void __exit dv1394_exit_module(void)
2612{
2613 hpsb_unregister_protocol(&dv1394_driver);
2614
2615 hpsb_unregister_highlevel(&dv1394_highlevel);
2616 cdev_del(&dv1394_cdev);
2617 devfs_remove("ieee1394/dv");
2618}
2619
2620static int __init dv1394_init_module(void)
2621{
2622 int ret;
2623
2624 cdev_init(&dv1394_cdev, &dv1394_fops);
2625 dv1394_cdev.owner = THIS_MODULE;
2626 kobject_set_name(&dv1394_cdev.kobj, "dv1394");
2627 ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2628 if (ret) {
2629 printk(KERN_ERR "dv1394: unable to register character device\n");
2630 return ret;
2631 }
2632
2633 devfs_mk_dir("ieee1394/dv");
2634
2635 hpsb_register_highlevel(&dv1394_highlevel);
2636
2637 ret = hpsb_register_protocol(&dv1394_driver);
2638 if (ret) {
2639 printk(KERN_ERR "dv1394: failed to register protocol\n");
2640 hpsb_unregister_highlevel(&dv1394_highlevel);
2641 devfs_remove("ieee1394/dv");
2642 cdev_del(&dv1394_cdev);
2643 return ret;
2644 }
2645
2646 return 0;
2647}
2648
2649module_init(dv1394_init_module);
2650module_exit(dv1394_exit_module);