Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/gpio_event.h> |
Pankaj Kumar | 6f84174 | 2011-10-10 15:52:14 +0530 | [diff] [blame] | 16 | #include <linux/usb/android.h> |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/gpio.h> |
| 20 | #include <linux/mtd/nand.h> |
| 21 | #include <linux/mtd/partitions.h> |
| 22 | #include <linux/i2c.h> |
| 23 | #include <linux/android_pmem.h> |
| 24 | #include <linux/bootmem.h> |
| 25 | #include <linux/mfd/marimba.h> |
| 26 | #include <linux/power_supply.h> |
| 27 | #include <asm/mach/mmc.h> |
| 28 | #include <asm/mach-types.h> |
| 29 | #include <asm/mach/arch.h> |
| 30 | #include <mach/board.h> |
| 31 | #include <mach/msm_iomap.h> |
| 32 | #include <mach/msm_hsusb.h> |
| 33 | #include <mach/rpc_hsusb.h> |
| 34 | #include <mach/rpc_pmapp.h> |
| 35 | #include <mach/usbdiag.h> |
| 36 | #include <mach/usb_gadget_fserial.h> |
| 37 | #include <mach/msm_memtypes.h> |
| 38 | #include <mach/msm_serial_hs.h> |
| 39 | #include <mach/vreg.h> |
| 40 | #include <mach/pmic.h> |
| 41 | #include <mach/socinfo.h> |
| 42 | #include <mach/vreg.h> |
| 43 | #include <mach/rpc_pmapp.h> |
| 44 | #include <mach/msm_battery.h> |
| 45 | #include <mach/rpc_server_handset.h> |
| 46 | #include <mach/socinfo.h> |
| 47 | |
| 48 | #include "devices.h" |
| 49 | #include "devices-msm7x2xa.h" |
| 50 | #include "pm.h" |
| 51 | #include "timer.h" |
| 52 | |
| 53 | #define PMEM_KERNEL_EBI1_SIZE 0x3A000 |
| 54 | #define MSM_PMEM_AUDIO_SIZE 0x5B000 |
| 55 | #define BAHAMA_SLAVE_ID_FM_ADDR 0x2A |
| 56 | #define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B |
| 57 | #define BAHAMA_SLAVE_ID_FM_REG 0x02 |
| 58 | #define FM_GPIO 83 |
| 59 | |
| 60 | enum { |
| 61 | GPIO_HOST_VBUS_EN = 107, |
| 62 | GPIO_BT_SYS_REST_EN = 114, |
| 63 | GPIO_WAKE_ON_WIRELESS, |
| 64 | GPIO_BACKLIGHT_EN, |
| 65 | GPIO_CAM_3MP_PWDN, |
| 66 | GPIO_WLAN_EN, |
| 67 | GPIO_CAM_5MP_SHDN_EN, |
| 68 | GPIO_CAM_5MP_RESET, |
| 69 | }; |
| 70 | |
| 71 | /* FM Platform power and shutdown routines */ |
| 72 | #define FPGA_MSM_CNTRL_REG2 0x90008010 |
| 73 | |
| 74 | static void config_pcm_i2s_mode(int mode) |
| 75 | { |
| 76 | void __iomem *cfg_ptr; |
| 77 | u8 reg2; |
| 78 | |
| 79 | cfg_ptr = ioremap_nocache(FPGA_MSM_CNTRL_REG2, sizeof(char)); |
| 80 | |
| 81 | if (!cfg_ptr) |
| 82 | return; |
| 83 | if (mode) { |
| 84 | /*enable the pcm mode in FPGA*/ |
| 85 | reg2 = readb_relaxed(cfg_ptr); |
| 86 | if (reg2 == 0) { |
| 87 | reg2 = 1; |
| 88 | writeb_relaxed(reg2, cfg_ptr); |
| 89 | } |
| 90 | } else { |
| 91 | /*enable i2s mode in FPGA*/ |
| 92 | reg2 = readb_relaxed(cfg_ptr); |
| 93 | if (reg2 == 1) { |
| 94 | reg2 = 0; |
| 95 | writeb_relaxed(reg2, cfg_ptr); |
| 96 | } |
| 97 | } |
| 98 | iounmap(cfg_ptr); |
| 99 | } |
| 100 | |
| 101 | static unsigned fm_i2s_config_power_on[] = { |
| 102 | /*FM_I2S_SD*/ |
| 103 | GPIO_CFG(68, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 104 | /*FM_I2S_WS*/ |
| 105 | GPIO_CFG(70, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 106 | /*FM_I2S_SCK*/ |
| 107 | GPIO_CFG(71, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 108 | }; |
| 109 | |
| 110 | static unsigned fm_i2s_config_power_off[] = { |
| 111 | /*FM_I2S_SD*/ |
| 112 | GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 113 | /*FM_I2S_WS*/ |
| 114 | GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 115 | /*FM_I2S_SCK*/ |
| 116 | GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 117 | }; |
| 118 | |
| 119 | static unsigned bt_config_power_on[] = { |
| 120 | /*RFR*/ |
| 121 | GPIO_CFG(43, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 122 | /*CTS*/ |
| 123 | GPIO_CFG(44, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 124 | /*RX*/ |
| 125 | GPIO_CFG(45, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 126 | /*TX*/ |
| 127 | GPIO_CFG(46, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 128 | }; |
| 129 | static unsigned bt_config_pcm_on[] = { |
| 130 | /*PCM_DOUT*/ |
| 131 | GPIO_CFG(68, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 132 | /*PCM_DIN*/ |
| 133 | GPIO_CFG(69, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 134 | /*PCM_SYNC*/ |
| 135 | GPIO_CFG(70, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 136 | /*PCM_CLK*/ |
| 137 | GPIO_CFG(71, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA), |
| 138 | }; |
| 139 | static unsigned bt_config_power_off[] = { |
| 140 | /*RFR*/ |
| 141 | GPIO_CFG(43, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 142 | /*CTS*/ |
| 143 | GPIO_CFG(44, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 144 | /*RX*/ |
| 145 | GPIO_CFG(45, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 146 | /*TX*/ |
| 147 | GPIO_CFG(46, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 148 | }; |
| 149 | static unsigned bt_config_pcm_off[] = { |
| 150 | /*PCM_DOUT*/ |
| 151 | GPIO_CFG(68, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 152 | /*PCM_DIN*/ |
| 153 | GPIO_CFG(69, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 154 | /*PCM_SYNC*/ |
| 155 | GPIO_CFG(70, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 156 | /*PCM_CLK*/ |
| 157 | GPIO_CFG(71, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 158 | }; |
| 159 | |
| 160 | |
| 161 | static int config_i2s(int mode) |
| 162 | { |
| 163 | int pin, rc = 0; |
| 164 | |
| 165 | if (mode == FM_I2S_ON) { |
| 166 | if (machine_is_msm7627a_qrd1()) |
| 167 | config_pcm_i2s_mode(0); |
| 168 | pr_err("%s mode = FM_I2S_ON", __func__); |
| 169 | for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_on); |
| 170 | pin++) { |
| 171 | rc = gpio_tlmm_config( |
| 172 | fm_i2s_config_power_on[pin], |
| 173 | GPIO_CFG_ENABLE |
| 174 | ); |
| 175 | if (rc < 0) |
| 176 | return rc; |
| 177 | } |
| 178 | } else if (mode == FM_I2S_OFF) { |
| 179 | pr_err("%s mode = FM_I2S_OFF", __func__); |
| 180 | for (pin = 0; pin < ARRAY_SIZE(fm_i2s_config_power_off); |
| 181 | pin++) { |
| 182 | rc = gpio_tlmm_config( |
| 183 | fm_i2s_config_power_off[pin], |
| 184 | GPIO_CFG_ENABLE |
| 185 | ); |
| 186 | if (rc < 0) |
| 187 | return rc; |
| 188 | } |
| 189 | } |
| 190 | return rc; |
| 191 | } |
| 192 | static int config_pcm(int mode) |
| 193 | { |
| 194 | int pin, rc = 0; |
| 195 | |
| 196 | if (mode == BT_PCM_ON) { |
| 197 | if (machine_is_msm7627a_qrd1()) |
| 198 | config_pcm_i2s_mode(1); |
| 199 | pr_err("%s mode =BT_PCM_ON", __func__); |
| 200 | for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_on); |
| 201 | pin++) { |
| 202 | rc = gpio_tlmm_config(bt_config_pcm_on[pin], |
| 203 | GPIO_CFG_ENABLE); |
| 204 | if (rc < 0) |
| 205 | return rc; |
| 206 | } |
| 207 | } else if (mode == BT_PCM_OFF) { |
| 208 | pr_err("%s mode =BT_PCM_OFF", __func__); |
| 209 | for (pin = 0; pin < ARRAY_SIZE(bt_config_pcm_off); |
| 210 | pin++) { |
| 211 | rc = gpio_tlmm_config(bt_config_pcm_off[pin], |
| 212 | GPIO_CFG_ENABLE); |
| 213 | if (rc < 0) |
| 214 | return rc; |
| 215 | } |
| 216 | |
| 217 | } |
| 218 | |
| 219 | return rc; |
| 220 | } |
| 221 | |
| 222 | static int msm_bahama_setup_pcm_i2s(int mode) |
| 223 | { |
| 224 | int fm_state = 0, bt_state = 0; |
| 225 | int rc = 0; |
| 226 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 227 | |
| 228 | fm_state = marimba_get_fm_status(&config); |
| 229 | bt_state = marimba_get_bt_status(&config); |
| 230 | |
| 231 | switch (mode) { |
| 232 | case BT_PCM_ON: |
| 233 | case BT_PCM_OFF: |
| 234 | if (!fm_state) |
| 235 | rc = config_pcm(mode); |
| 236 | break; |
| 237 | case FM_I2S_ON: |
| 238 | rc = config_i2s(mode); |
| 239 | break; |
| 240 | case FM_I2S_OFF: |
| 241 | if (bt_state) |
| 242 | rc = config_pcm(BT_PCM_ON); |
| 243 | else |
| 244 | rc = config_i2s(mode); |
| 245 | break; |
| 246 | default: |
| 247 | rc = -EIO; |
| 248 | pr_err("%s:Unsupported mode", __func__); |
| 249 | } |
| 250 | return rc; |
| 251 | } |
| 252 | |
| 253 | static int bt_set_gpio(int on) |
| 254 | { |
| 255 | int rc = 0; |
| 256 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 257 | |
| 258 | if (on) { |
| 259 | rc = gpio_direction_output(GPIO_BT_SYS_REST_EN, 1); |
| 260 | msleep(100); |
| 261 | } else { |
| 262 | if (!marimba_get_fm_status(&config) && |
| 263 | !marimba_get_bt_status(&config)) { |
| 264 | gpio_set_value_cansleep(GPIO_BT_SYS_REST_EN, 0); |
| 265 | rc = gpio_direction_input(GPIO_BT_SYS_REST_EN); |
| 266 | msleep(100); |
| 267 | } |
| 268 | } |
| 269 | if (rc) |
| 270 | pr_err("%s: BT sys_reset_en GPIO : Error", __func__); |
| 271 | |
| 272 | return rc; |
| 273 | } |
| 274 | static struct vreg *fm_regulator; |
| 275 | static int fm_radio_setup(struct marimba_fm_platform_data *pdata) |
| 276 | { |
| 277 | int rc = 0; |
| 278 | const char *id = "FMPW"; |
| 279 | uint32_t irqcfg; |
| 280 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 281 | u8 value; |
| 282 | |
| 283 | /* Voting for 1.8V Regulator */ |
| 284 | fm_regulator = vreg_get(NULL , "msme1"); |
| 285 | if (IS_ERR(fm_regulator)) { |
| 286 | pr_err("%s: vreg get failed with : (%ld)\n", |
| 287 | __func__, PTR_ERR(fm_regulator)); |
| 288 | return -EINVAL; |
| 289 | } |
| 290 | |
| 291 | /* Set the voltage level to 1.8V */ |
| 292 | rc = vreg_set_level(fm_regulator, 1800); |
| 293 | if (rc < 0) { |
| 294 | pr_err("%s: set regulator level failed with :(%d)\n", |
| 295 | __func__, rc); |
| 296 | goto fm_vreg_fail; |
| 297 | } |
| 298 | |
| 299 | /* Enabling the 1.8V regulator */ |
| 300 | rc = vreg_enable(fm_regulator); |
| 301 | if (rc) { |
| 302 | pr_err("%s: enable regulator failed with :(%d)\n", |
| 303 | __func__, rc); |
| 304 | goto fm_vreg_fail; |
| 305 | } |
| 306 | |
| 307 | /* Voting for 19.2MHz clock */ |
| 308 | rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 309 | PMAPP_CLOCK_VOTE_ON); |
| 310 | if (rc < 0) { |
| 311 | pr_err("%s: clock vote failed with :(%d)\n", |
| 312 | __func__, rc); |
| 313 | goto fm_clock_vote_fail; |
| 314 | } |
| 315 | |
| 316 | rc = bt_set_gpio(1); |
| 317 | if (rc) { |
| 318 | pr_err("%s: bt_set_gpio = %d", __func__, rc); |
| 319 | goto fm_gpio_config_fail; |
| 320 | } |
| 321 | /*re-write FM Slave Id, after reset*/ |
| 322 | value = BAHAMA_SLAVE_ID_FM_ADDR; |
| 323 | rc = marimba_write_bit_mask(&config, |
| 324 | BAHAMA_SLAVE_ID_FM_REG, &value, 1, 0xFF); |
| 325 | if (rc < 0) { |
| 326 | pr_err("%s: FM Slave ID rewrite Failed = %d", __func__, rc); |
| 327 | goto fm_gpio_config_fail; |
| 328 | } |
| 329 | /* Configuring the FM GPIO */ |
| 330 | irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, |
| 331 | GPIO_CFG_2MA); |
| 332 | |
| 333 | rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE); |
| 334 | if (rc) { |
| 335 | pr_err("%s: gpio_tlmm_config(%#x)=%d\n", |
| 336 | __func__, irqcfg, rc); |
| 337 | goto fm_gpio_config_fail; |
| 338 | } |
| 339 | |
| 340 | return 0; |
| 341 | |
| 342 | fm_gpio_config_fail: |
| 343 | pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 344 | PMAPP_CLOCK_VOTE_OFF); |
| 345 | bt_set_gpio(0); |
| 346 | fm_clock_vote_fail: |
| 347 | vreg_disable(fm_regulator); |
| 348 | |
| 349 | fm_vreg_fail: |
| 350 | vreg_put(fm_regulator); |
| 351 | |
| 352 | return rc; |
| 353 | }; |
| 354 | |
| 355 | static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata) |
| 356 | { |
| 357 | int rc; |
| 358 | const char *id = "FMPW"; |
| 359 | |
| 360 | /* Releasing the GPIO line used by FM */ |
| 361 | uint32_t irqcfg = GPIO_CFG(FM_GPIO, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, |
| 362 | GPIO_CFG_2MA); |
| 363 | |
| 364 | rc = gpio_tlmm_config(irqcfg, GPIO_CFG_ENABLE); |
| 365 | if (rc) |
| 366 | pr_err("%s: gpio_tlmm_config(%#x)=%d\n", |
| 367 | __func__, irqcfg, rc); |
| 368 | |
| 369 | /* Releasing the 1.8V Regulator */ |
| 370 | if (fm_regulator != NULL) { |
| 371 | rc = vreg_disable(fm_regulator); |
| 372 | if (rc) |
| 373 | pr_err("%s: disable regulator failed:(%d)\n", |
| 374 | __func__, rc); |
| 375 | fm_regulator = NULL; |
| 376 | } |
| 377 | |
| 378 | /* Voting off the clock */ |
| 379 | rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 380 | PMAPP_CLOCK_VOTE_OFF); |
| 381 | if (rc < 0) |
| 382 | pr_err("%s: voting off failed with :(%d)\n", |
| 383 | __func__, rc); |
| 384 | rc = bt_set_gpio(0); |
| 385 | if (rc) |
| 386 | pr_err("%s: bt_set_gpio = %d", __func__, rc); |
| 387 | } |
| 388 | |
| 389 | static struct marimba_fm_platform_data marimba_fm_pdata = { |
| 390 | .fm_setup = fm_radio_setup, |
| 391 | .fm_shutdown = fm_radio_shutdown, |
| 392 | .irq = MSM_GPIO_TO_INT(FM_GPIO), |
| 393 | .vreg_s2 = NULL, |
| 394 | .vreg_xo_out = NULL, |
| 395 | /* Configuring the FM SoC as I2S Master */ |
| 396 | .is_fm_soc_i2s_master = true, |
| 397 | .config_i2s_gpio = msm_bahama_setup_pcm_i2s, |
| 398 | }; |
| 399 | |
| 400 | static struct platform_device msm_wlan_ar6000_pm_device = { |
| 401 | .name = "wlan_ar6000_pm_dev", |
| 402 | .id = -1, |
| 403 | }; |
| 404 | |
| 405 | #if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE) |
| 406 | |
| 407 | static struct platform_device msm_bt_power_device = { |
| 408 | .name = "bt_power", |
| 409 | }; |
| 410 | struct bahama_config_register { |
| 411 | u8 reg; |
| 412 | u8 value; |
| 413 | u8 mask; |
| 414 | }; |
| 415 | struct bt_vreg_info { |
| 416 | const char *name; |
| 417 | unsigned int pmapp_id; |
| 418 | unsigned int level; |
| 419 | unsigned int is_pin_controlled; |
| 420 | struct vreg *vregs; |
| 421 | }; |
| 422 | static struct bt_vreg_info bt_vregs[] = { |
| 423 | {"msme1", 2, 1800, 0, NULL}, |
| 424 | {"bt", 21, 2900, 1, NULL} |
| 425 | }; |
| 426 | |
| 427 | static int bahama_bt(int on) |
| 428 | { |
| 429 | |
| 430 | int rc = 0; |
| 431 | int i; |
| 432 | |
| 433 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 434 | |
| 435 | struct bahama_variant_register { |
| 436 | const size_t size; |
| 437 | const struct bahama_config_register *set; |
| 438 | }; |
| 439 | |
| 440 | const struct bahama_config_register *p; |
| 441 | |
| 442 | u8 version; |
| 443 | |
| 444 | const struct bahama_config_register v10_bt_on[] = { |
| 445 | { 0xE9, 0x00, 0xFF }, |
| 446 | { 0xF4, 0x80, 0xFF }, |
| 447 | { 0xE4, 0x00, 0xFF }, |
| 448 | { 0xE5, 0x00, 0x0F }, |
| 449 | #ifdef CONFIG_WLAN |
| 450 | { 0xE6, 0x38, 0x7F }, |
| 451 | { 0xE7, 0x06, 0xFF }, |
| 452 | #endif |
| 453 | { 0xE9, 0x21, 0xFF }, |
| 454 | { 0x01, 0x0C, 0x1F }, |
| 455 | { 0x01, 0x08, 0x1F }, |
| 456 | }; |
| 457 | |
| 458 | const struct bahama_config_register v20_bt_on_fm_off[] = { |
| 459 | { 0x11, 0x0C, 0xFF }, |
| 460 | { 0x13, 0x01, 0xFF }, |
| 461 | { 0xF4, 0x80, 0xFF }, |
| 462 | { 0xF0, 0x00, 0xFF }, |
| 463 | { 0xE9, 0x00, 0xFF }, |
| 464 | #ifdef CONFIG_WLAN |
| 465 | { 0x81, 0x00, 0x7F }, |
| 466 | { 0x82, 0x00, 0xFF }, |
| 467 | { 0xE6, 0x38, 0x7F }, |
| 468 | { 0xE7, 0x06, 0xFF }, |
| 469 | #endif |
| 470 | { 0x8E, 0x15, 0xFF }, |
| 471 | { 0x8F, 0x15, 0xFF }, |
| 472 | { 0x90, 0x15, 0xFF }, |
| 473 | |
| 474 | { 0xE9, 0x21, 0xFF }, |
| 475 | }; |
| 476 | |
| 477 | const struct bahama_config_register v20_bt_on_fm_on[] = { |
| 478 | { 0x11, 0x0C, 0xFF }, |
| 479 | { 0x13, 0x01, 0xFF }, |
| 480 | { 0xF4, 0x86, 0xFF }, |
| 481 | { 0xF0, 0x06, 0xFF }, |
| 482 | { 0xE9, 0x00, 0xFF }, |
| 483 | #ifdef CONFIG_WLAN |
| 484 | { 0x81, 0x00, 0x7F }, |
| 485 | { 0x82, 0x00, 0xFF }, |
| 486 | { 0xE6, 0x38, 0x7F }, |
| 487 | { 0xE7, 0x06, 0xFF }, |
| 488 | #endif |
| 489 | { 0xE9, 0x21, 0xFF }, |
| 490 | }; |
| 491 | |
| 492 | const struct bahama_config_register v10_bt_off[] = { |
| 493 | { 0xE9, 0x00, 0xFF }, |
| 494 | }; |
| 495 | |
| 496 | const struct bahama_config_register v20_bt_off_fm_off[] = { |
| 497 | { 0xF4, 0x84, 0xFF }, |
| 498 | { 0xF0, 0x04, 0xFF }, |
| 499 | { 0xE9, 0x00, 0xFF } |
| 500 | }; |
| 501 | |
| 502 | const struct bahama_config_register v20_bt_off_fm_on[] = { |
| 503 | { 0xF4, 0x86, 0xFF }, |
| 504 | { 0xF0, 0x06, 0xFF }, |
| 505 | { 0xE9, 0x00, 0xFF } |
| 506 | }; |
| 507 | const struct bahama_variant_register bt_bahama[2][3] = { |
| 508 | { |
| 509 | { ARRAY_SIZE(v10_bt_off), v10_bt_off }, |
| 510 | { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off }, |
| 511 | { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on } |
| 512 | }, |
| 513 | { |
| 514 | { ARRAY_SIZE(v10_bt_on), v10_bt_on }, |
| 515 | { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off }, |
| 516 | { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on } |
| 517 | } |
| 518 | }; |
| 519 | |
| 520 | u8 offset = 0; /* index into bahama configs */ |
| 521 | on = on ? 1 : 0; |
| 522 | version = marimba_read_bahama_ver(&config); |
| 523 | if ((int)version < 0 || version == BAHAMA_VER_UNSUPPORTED) { |
| 524 | dev_err(&msm_bt_power_device.dev, "%s: Bahama \ |
| 525 | version read Error, version = %d \n", |
| 526 | __func__, version); |
| 527 | return -EIO; |
| 528 | } |
| 529 | |
| 530 | if (version == BAHAMA_VER_2_0) { |
| 531 | if (marimba_get_fm_status(&config)) |
| 532 | offset = 0x01; |
| 533 | } |
| 534 | |
| 535 | p = bt_bahama[on][version + offset].set; |
| 536 | |
| 537 | dev_info(&msm_bt_power_device.dev, |
| 538 | "%s: found version %d\n", __func__, version); |
| 539 | |
| 540 | for (i = 0; i < bt_bahama[on][version + offset].size; i++) { |
| 541 | u8 value = (p+i)->value; |
| 542 | rc = marimba_write_bit_mask(&config, |
| 543 | (p+i)->reg, |
| 544 | &value, |
| 545 | sizeof((p+i)->value), |
| 546 | (p+i)->mask); |
| 547 | if (rc < 0) { |
| 548 | dev_err(&msm_bt_power_device.dev, |
| 549 | "%s: reg %x write failed: %d\n", |
| 550 | __func__, (p+i)->reg, rc); |
| 551 | return rc; |
| 552 | } |
| 553 | dev_dbg(&msm_bt_power_device.dev, |
| 554 | "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n", |
| 555 | __func__, (p+i)->reg, |
| 556 | value, (p+i)->mask); |
| 557 | value = 0; |
| 558 | rc = marimba_read_bit_mask(&config, |
| 559 | (p+i)->reg, &value, |
| 560 | sizeof((p+i)->value), (p+i)->mask); |
| 561 | if (rc < 0) |
| 562 | dev_err(&msm_bt_power_device.dev, "%s marimba_read_bit_mask- error", |
| 563 | __func__); |
| 564 | dev_dbg(&msm_bt_power_device.dev, |
| 565 | "%s: reg 0x%02x read value 0x%02x mask 0x%02x\n", |
| 566 | __func__, (p+i)->reg, |
| 567 | value, (p+i)->mask); |
| 568 | } |
| 569 | /* Update BT Status */ |
| 570 | if (on) |
| 571 | marimba_set_bt_status(&config, true); |
| 572 | else |
| 573 | marimba_set_bt_status(&config, false); |
| 574 | return rc; |
| 575 | } |
| 576 | static int bluetooth_switch_regulators(int on) |
| 577 | { |
| 578 | int i, rc = 0; |
| 579 | const char *id = "BTPW"; |
| 580 | |
| 581 | for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) { |
| 582 | if (!bt_vregs[i].vregs) { |
| 583 | pr_err("%s: vreg_get %s failed(%d)\n", |
| 584 | __func__, bt_vregs[i].name, rc); |
| 585 | goto vreg_fail; |
| 586 | } |
| 587 | rc = on ? vreg_set_level(bt_vregs[i].vregs, |
| 588 | bt_vregs[i].level) : 0; |
| 589 | |
| 590 | if (rc < 0) { |
| 591 | pr_err("%s: vreg set level failed (%d)\n", |
| 592 | __func__, rc); |
| 593 | goto vreg_set_level_fail; |
| 594 | } |
| 595 | if (bt_vregs[i].is_pin_controlled == 1) { |
| 596 | rc = pmapp_vreg_pincntrl_vote(id, |
| 597 | bt_vregs[i].pmapp_id, |
| 598 | PMAPP_CLOCK_ID_D1, |
| 599 | on ? PMAPP_CLOCK_VOTE_ON : |
| 600 | PMAPP_CLOCK_VOTE_OFF); |
| 601 | } else { |
| 602 | rc = on ? vreg_enable(bt_vregs[i].vregs) : |
| 603 | vreg_disable(bt_vregs[i].vregs); |
| 604 | } |
| 605 | |
| 606 | if (rc < 0) { |
| 607 | pr_err("%s: vreg %s %s failed(%d)\n", |
| 608 | __func__, bt_vregs[i].name, |
| 609 | on ? "enable" : "disable", rc); |
| 610 | goto vreg_fail; |
| 611 | } |
| 612 | } |
| 613 | |
| 614 | return rc; |
| 615 | |
| 616 | vreg_fail: |
| 617 | while (i) { |
| 618 | if (on) |
| 619 | vreg_disable(bt_vregs[--i].vregs); |
| 620 | } |
| 621 | vreg_set_level_fail: |
| 622 | vreg_put(bt_vregs[0].vregs); |
| 623 | vreg_put(bt_vregs[1].vregs); |
| 624 | return rc; |
| 625 | } |
| 626 | |
| 627 | static unsigned int msm_bahama_setup_power(void) |
| 628 | { |
| 629 | int rc = 0; |
| 630 | struct vreg *vreg_s3 = NULL; |
| 631 | |
| 632 | vreg_s3 = vreg_get(NULL, "msme1"); |
| 633 | if (IS_ERR(vreg_s3)) { |
| 634 | pr_err("%s: vreg get failed (%ld)\n", |
| 635 | __func__, PTR_ERR(vreg_s3)); |
| 636 | return PTR_ERR(vreg_s3); |
| 637 | } |
| 638 | rc = vreg_set_level(vreg_s3, 1800); |
| 639 | if (rc < 0) { |
| 640 | pr_err("%s: vreg set level failed (%d)\n", |
| 641 | __func__, rc); |
| 642 | goto vreg_fail; |
| 643 | } |
| 644 | rc = vreg_enable(vreg_s3); |
| 645 | if (rc < 0) { |
| 646 | pr_err("%s: vreg enable failed (%d)\n", |
| 647 | __func__, rc); |
| 648 | goto vreg_fail; |
| 649 | } |
| 650 | |
| 651 | /*setup Bahama_sys_reset_n*/ |
| 652 | rc = gpio_request(GPIO_BT_SYS_REST_EN, "bahama sys_rst_n"); |
| 653 | if (rc < 0) { |
| 654 | pr_err("%s: gpio_request %d = %d\n", __func__, |
| 655 | GPIO_BT_SYS_REST_EN, rc); |
| 656 | goto vreg_fail; |
| 657 | } |
| 658 | rc = bt_set_gpio(1); |
| 659 | if (rc < 0) { |
| 660 | pr_err("%s: bt_set_gpio %d = %d\n", __func__, |
| 661 | GPIO_BT_SYS_REST_EN, rc); |
| 662 | goto gpio_fail; |
| 663 | } |
| 664 | return rc; |
| 665 | |
| 666 | gpio_fail: |
| 667 | gpio_free(GPIO_BT_SYS_REST_EN); |
| 668 | vreg_fail: |
| 669 | vreg_put(vreg_s3); |
| 670 | return rc; |
| 671 | } |
| 672 | |
| 673 | static unsigned int msm_bahama_shutdown_power(int value) |
| 674 | { |
| 675 | int rc = 0; |
| 676 | struct vreg *vreg_s3 = NULL; |
| 677 | |
| 678 | vreg_s3 = vreg_get(NULL, "msme1"); |
| 679 | if (IS_ERR(vreg_s3)) { |
| 680 | pr_err("%s: vreg get failed (%ld)\n", |
| 681 | __func__, PTR_ERR(vreg_s3)); |
| 682 | return PTR_ERR(vreg_s3); |
| 683 | } |
| 684 | rc = vreg_disable(vreg_s3); |
| 685 | if (rc) { |
| 686 | pr_err("%s: vreg disable failed (%d)\n", |
| 687 | __func__, rc); |
| 688 | vreg_put(vreg_s3); |
| 689 | return rc; |
| 690 | } |
| 691 | if (value == BAHAMA_ID) { |
| 692 | rc = bt_set_gpio(0); |
| 693 | if (rc) { |
| 694 | pr_err("%s: bt_set_gpio = %d\n", |
| 695 | __func__, rc); |
| 696 | } |
| 697 | } |
| 698 | return rc; |
| 699 | } |
| 700 | |
| 701 | static unsigned int msm_bahama_core_config(int type) |
| 702 | { |
| 703 | int rc = 0; |
| 704 | |
| 705 | if (type == BAHAMA_ID) { |
| 706 | int i; |
| 707 | struct marimba config = { .mod_id = SLAVE_ID_BAHAMA}; |
| 708 | const struct bahama_config_register v20_init[] = { |
| 709 | /* reg, value, mask */ |
| 710 | { 0xF4, 0x84, 0xFF }, /* AREG */ |
| 711 | { 0xF0, 0x04, 0xFF } /* DREG */ |
| 712 | }; |
| 713 | if (marimba_read_bahama_ver(&config) == BAHAMA_VER_2_0) { |
| 714 | for (i = 0; i < ARRAY_SIZE(v20_init); i++) { |
| 715 | u8 value = v20_init[i].value; |
| 716 | rc = marimba_write_bit_mask(&config, |
| 717 | v20_init[i].reg, |
| 718 | &value, |
| 719 | sizeof(v20_init[i].value), |
| 720 | v20_init[i].mask); |
| 721 | if (rc < 0) { |
| 722 | pr_err("%s: reg %d write failed: %d\n", |
| 723 | __func__, v20_init[i].reg, rc); |
| 724 | return rc; |
| 725 | } |
| 726 | pr_debug("%s: reg 0x%02x value 0x%02x" |
| 727 | " mask 0x%02x\n", |
| 728 | __func__, v20_init[i].reg, |
| 729 | v20_init[i].value, v20_init[i].mask); |
| 730 | } |
| 731 | } |
| 732 | } |
| 733 | rc = bt_set_gpio(0); |
| 734 | if (rc) { |
| 735 | pr_err("%s: bt_set_gpio = %d\n", |
| 736 | __func__, rc); |
| 737 | } |
| 738 | pr_debug("core type: %d\n", type); |
| 739 | return rc; |
| 740 | } |
| 741 | |
| 742 | static int bluetooth_power(int on) |
| 743 | { |
| 744 | int pin, rc = 0; |
| 745 | const char *id = "BTPW"; |
| 746 | int cid = 0; |
| 747 | |
| 748 | cid = adie_get_detected_connectivity_type(); |
| 749 | if (cid != BAHAMA_ID) { |
| 750 | pr_err("%s: unexpected adie connectivity type: %d\n", |
| 751 | __func__, cid); |
| 752 | return -ENODEV; |
| 753 | } |
| 754 | if (on) { |
| 755 | /*setup power for BT SOC*/ |
| 756 | rc = bt_set_gpio(on); |
| 757 | if (rc) { |
| 758 | pr_err("%s: bt_set_gpio = %d\n", |
| 759 | __func__, rc); |
| 760 | goto exit; |
| 761 | } |
| 762 | rc = bluetooth_switch_regulators(on); |
| 763 | if (rc < 0) { |
| 764 | pr_err("%s: bluetooth_switch_regulators rc = %d", |
| 765 | __func__, rc); |
| 766 | goto exit; |
| 767 | } |
| 768 | /*setup BT GPIO lines*/ |
| 769 | for (pin = 0; pin < ARRAY_SIZE(bt_config_power_on); |
| 770 | pin++) { |
| 771 | rc = gpio_tlmm_config(bt_config_power_on[pin], |
| 772 | GPIO_CFG_ENABLE); |
| 773 | if (rc < 0) { |
| 774 | pr_err("%s: gpio_tlmm_config(%#x)=%d\n", |
| 775 | __func__, |
| 776 | bt_config_power_on[pin], |
| 777 | rc); |
| 778 | goto fail_power; |
| 779 | } |
| 780 | } |
| 781 | /*Setup BT clocks*/ |
| 782 | rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 783 | PMAPP_CLOCK_VOTE_ON); |
| 784 | if (rc < 0) { |
| 785 | pr_err("Failed to vote for TCXO_D1 ON\n"); |
| 786 | goto fail_clock; |
| 787 | } |
| 788 | msleep(20); |
| 789 | |
| 790 | /*I2C config for Bahama*/ |
| 791 | rc = bahama_bt(1); |
| 792 | if (rc < 0) { |
| 793 | pr_err("%s: bahama_bt rc = %d", __func__, rc); |
| 794 | goto fail_i2c; |
| 795 | } |
| 796 | msleep(20); |
| 797 | |
| 798 | /*setup BT PCM lines*/ |
| 799 | rc = msm_bahama_setup_pcm_i2s(BT_PCM_ON); |
| 800 | if (rc < 0) { |
| 801 | pr_err("%s: msm_bahama_setup_pcm_i2s , rc =%d\n", |
| 802 | __func__, rc); |
| 803 | goto fail_power; |
| 804 | } |
| 805 | rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 806 | PMAPP_CLOCK_VOTE_PIN_CTRL); |
| 807 | if (rc < 0) |
| 808 | pr_err("%s:Pin Control Failed, rc = %d", |
| 809 | __func__, rc); |
| 810 | |
| 811 | } else { |
| 812 | rc = bahama_bt(0); |
| 813 | if (rc < 0) |
| 814 | pr_err("%s: bahama_bt rc = %d", __func__, rc); |
| 815 | |
| 816 | rc = bt_set_gpio(on); |
| 817 | if (rc) { |
| 818 | pr_err("%s: bt_set_gpio = %d\n", |
| 819 | __func__, rc); |
| 820 | } |
| 821 | fail_i2c: |
| 822 | rc = pmapp_clock_vote(id, PMAPP_CLOCK_ID_D1, |
| 823 | PMAPP_CLOCK_VOTE_OFF); |
| 824 | if (rc < 0) |
| 825 | pr_err("%s: Failed to vote Off D1\n", __func__); |
| 826 | fail_clock: |
| 827 | for (pin = 0; pin < ARRAY_SIZE(bt_config_power_off); |
| 828 | pin++) { |
| 829 | rc = gpio_tlmm_config(bt_config_power_off[pin], |
| 830 | GPIO_CFG_ENABLE); |
| 831 | if (rc < 0) { |
| 832 | pr_err("%s: gpio_tlmm_config(%#x)=%d\n", |
| 833 | __func__, bt_config_power_off[pin], rc); |
| 834 | } |
| 835 | } |
| 836 | rc = msm_bahama_setup_pcm_i2s(BT_PCM_OFF); |
| 837 | if (rc < 0) { |
| 838 | pr_err("%s: msm_bahama_setup_pcm_i2s, rc =%d\n", |
| 839 | __func__, rc); |
| 840 | } |
| 841 | fail_power: |
| 842 | rc = bluetooth_switch_regulators(0); |
| 843 | if (rc < 0) { |
| 844 | pr_err("%s: switch_regulators : rc = %d",\ |
| 845 | __func__, rc); |
| 846 | goto exit; |
| 847 | } |
| 848 | } |
| 849 | return rc; |
| 850 | exit: |
| 851 | pr_err("%s: failed with rc = %d", __func__, rc); |
| 852 | return rc; |
| 853 | } |
| 854 | |
| 855 | static int __init bt_power_init(void) |
| 856 | { |
| 857 | int i, rc = 0; |
| 858 | for (i = 0; i < ARRAY_SIZE(bt_vregs); i++) { |
| 859 | bt_vregs[i].vregs = vreg_get(NULL, |
| 860 | bt_vregs[i].name); |
| 861 | if (IS_ERR(bt_vregs[i].vregs)) { |
| 862 | pr_err("%s: vreg get %s failed (%ld)\n", |
| 863 | __func__, bt_vregs[i].name, |
| 864 | PTR_ERR(bt_vregs[i].vregs)); |
| 865 | rc = PTR_ERR(bt_vregs[i].vregs); |
| 866 | goto vreg_get_fail; |
| 867 | } |
| 868 | } |
| 869 | |
| 870 | msm_bt_power_device.dev.platform_data = &bluetooth_power; |
| 871 | |
| 872 | return rc; |
| 873 | |
| 874 | vreg_get_fail: |
| 875 | while (i) |
| 876 | vreg_put(bt_vregs[--i].vregs); |
| 877 | return rc; |
| 878 | } |
| 879 | |
| 880 | static struct marimba_platform_data marimba_pdata = { |
| 881 | .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR, |
| 882 | .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR, |
| 883 | .bahama_setup = msm_bahama_setup_power, |
| 884 | .bahama_shutdown = msm_bahama_shutdown_power, |
| 885 | .bahama_core_config = msm_bahama_core_config, |
| 886 | .fm = &marimba_fm_pdata, |
| 887 | }; |
| 888 | |
| 889 | #endif |
| 890 | |
| 891 | #if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE) |
| 892 | static struct i2c_board_info bahama_devices[] = { |
| 893 | { |
| 894 | I2C_BOARD_INFO("marimba", 0xc), |
| 895 | .platform_data = &marimba_pdata, |
| 896 | }, |
| 897 | }; |
| 898 | #endif |
| 899 | |
| 900 | static struct msm_gpio qup_i2c_gpios_io[] = { |
| 901 | { GPIO_CFG(60, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 902 | "qup_scl" }, |
| 903 | { GPIO_CFG(61, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 904 | "qup_sda" }, |
| 905 | { GPIO_CFG(131, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 906 | "qup_scl" }, |
| 907 | { GPIO_CFG(132, 0, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 908 | "qup_sda" }, |
| 909 | }; |
| 910 | |
| 911 | static struct msm_gpio qup_i2c_gpios_hw[] = { |
| 912 | { GPIO_CFG(60, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 913 | "qup_scl" }, |
| 914 | { GPIO_CFG(61, 1, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 915 | "qup_sda" }, |
| 916 | { GPIO_CFG(131, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 917 | "qup_scl" }, |
| 918 | { GPIO_CFG(132, 2, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 919 | "qup_sda" }, |
| 920 | }; |
| 921 | |
| 922 | static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type) |
| 923 | { |
| 924 | int rc; |
| 925 | |
| 926 | if (adap_id < 0 || adap_id > 1) |
| 927 | return; |
| 928 | |
| 929 | /* Each adapter gets 2 lines from the table */ |
| 930 | if (config_type) |
| 931 | rc = msm_gpios_request_enable(&qup_i2c_gpios_hw[adap_id*2], 2); |
| 932 | else |
| 933 | rc = msm_gpios_request_enable(&qup_i2c_gpios_io[adap_id*2], 2); |
| 934 | if (rc < 0) |
| 935 | pr_err("QUP GPIO request/enable failed: %d\n", rc); |
| 936 | } |
| 937 | |
| 938 | static struct msm_i2c_platform_data msm_gsbi0_qup_i2c_pdata = { |
| 939 | .clk_freq = 100000, |
| 940 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 941 | }; |
| 942 | |
| 943 | static struct msm_i2c_platform_data msm_gsbi1_qup_i2c_pdata = { |
| 944 | .clk_freq = 100000, |
| 945 | .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config, |
| 946 | }; |
| 947 | |
| 948 | #ifdef CONFIG_ARCH_MSM7X27A |
| 949 | #define MSM_PMEM_MDP_SIZE 0x1DD1000 |
| 950 | #define MSM_PMEM_ADSP_SIZE 0x1000000 |
| 951 | |
| 952 | #ifdef CONFIG_FB_MSM_TRIPLE_BUFFER |
| 953 | #define MSM_FB_SIZE 0x260000 |
| 954 | #else |
| 955 | #define MSM_FB_SIZE 0x195000 |
| 956 | #endif |
| 957 | |
| 958 | #endif |
| 959 | |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 960 | static struct android_usb_platform_data android_usb_pdata = { |
Pankaj Kumar | 6f84174 | 2011-10-10 15:52:14 +0530 | [diff] [blame] | 961 | .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num, |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 962 | }; |
| 963 | |
| 964 | static struct platform_device android_usb_device = { |
| 965 | .name = "android_usb", |
| 966 | .id = -1, |
| 967 | .dev = { |
| 968 | .platform_data = &android_usb_pdata, |
| 969 | }, |
| 970 | }; |
| 971 | |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 972 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 973 | static void msm_hsusb_vbus_power(unsigned phy_info, int on) |
| 974 | { |
| 975 | int rc = 0; |
| 976 | unsigned gpio; |
| 977 | |
| 978 | gpio = GPIO_HOST_VBUS_EN; |
| 979 | |
| 980 | rc = gpio_request(gpio, "i2c_host_vbus_en"); |
| 981 | if (rc < 0) { |
| 982 | pr_err("failed to request %d GPIO\n", gpio); |
| 983 | return; |
| 984 | } |
| 985 | gpio_direction_output(gpio, !!on); |
| 986 | gpio_set_value_cansleep(gpio, !!on); |
| 987 | gpio_free(gpio); |
| 988 | } |
| 989 | |
| 990 | static struct msm_usb_host_platform_data msm_usb_host_pdata = { |
| 991 | .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM), |
| 992 | }; |
| 993 | |
| 994 | static void __init msm7627a_init_host(void) |
| 995 | { |
| 996 | msm_add_host(0, &msm_usb_host_pdata); |
| 997 | } |
| 998 | #endif |
| 999 | |
| 1000 | #ifdef CONFIG_USB_MSM_OTG_72K |
| 1001 | static int hsusb_rpc_connect(int connect) |
| 1002 | { |
| 1003 | if (connect) |
| 1004 | return msm_hsusb_rpc_connect(); |
| 1005 | else |
| 1006 | return msm_hsusb_rpc_close(); |
| 1007 | } |
| 1008 | |
| 1009 | static struct vreg *vreg_3p3; |
| 1010 | static int msm_hsusb_ldo_init(int init) |
| 1011 | { |
| 1012 | if (init) { |
| 1013 | vreg_3p3 = vreg_get(NULL, "usb"); |
| 1014 | if (IS_ERR(vreg_3p3)) |
| 1015 | return PTR_ERR(vreg_3p3); |
| 1016 | } else |
| 1017 | vreg_put(vreg_3p3); |
| 1018 | |
| 1019 | return 0; |
| 1020 | } |
| 1021 | |
| 1022 | static int msm_hsusb_ldo_enable(int enable) |
| 1023 | { |
| 1024 | static int ldo_status; |
| 1025 | |
| 1026 | if (!vreg_3p3 || IS_ERR(vreg_3p3)) |
| 1027 | return -ENODEV; |
| 1028 | |
| 1029 | if (ldo_status == enable) |
| 1030 | return 0; |
| 1031 | |
| 1032 | ldo_status = enable; |
| 1033 | |
| 1034 | if (enable) |
| 1035 | return vreg_enable(vreg_3p3); |
| 1036 | |
| 1037 | return vreg_disable(vreg_3p3); |
| 1038 | } |
| 1039 | |
| 1040 | #ifndef CONFIG_USB_EHCI_MSM_72K |
| 1041 | static int msm_hsusb_pmic_notif_init(void (*callback)(int online), int init) |
| 1042 | { |
| 1043 | int ret = 0; |
| 1044 | |
| 1045 | if (init) |
| 1046 | ret = msm_pm_app_rpc_init(callback); |
| 1047 | else |
| 1048 | msm_pm_app_rpc_deinit(callback); |
| 1049 | |
| 1050 | return ret; |
| 1051 | } |
| 1052 | #endif |
| 1053 | |
| 1054 | static struct msm_otg_platform_data msm_otg_pdata = { |
| 1055 | #ifndef CONFIG_USB_EHCI_MSM_72K |
| 1056 | .pmic_vbus_notif_init = msm_hsusb_pmic_notif_init, |
| 1057 | #else |
| 1058 | .vbus_power = msm_hsusb_vbus_power, |
| 1059 | #endif |
| 1060 | .rpc_connect = hsusb_rpc_connect, |
| 1061 | .core_clk = 1, |
| 1062 | .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT, |
| 1063 | .cdr_autoreset = CDR_AUTO_RESET_DISABLE, |
| 1064 | .drv_ampl = HS_DRV_AMPLITUDE_DEFAULT, |
| 1065 | .se1_gating = SE1_GATING_DISABLE, |
| 1066 | .ldo_init = msm_hsusb_ldo_init, |
| 1067 | .ldo_enable = msm_hsusb_ldo_enable, |
| 1068 | .chg_init = hsusb_chg_init, |
| 1069 | .chg_connected = hsusb_chg_connected, |
| 1070 | .chg_vbus_draw = hsusb_chg_vbus_draw, |
| 1071 | }; |
| 1072 | #endif |
| 1073 | |
| 1074 | static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = { |
| 1075 | .is_phy_status_timer_on = 1, |
| 1076 | }; |
| 1077 | |
| 1078 | #if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\ |
| 1079 | || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\ |
| 1080 | || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\ |
| 1081 | || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)) |
| 1082 | |
| 1083 | static unsigned long vreg_sts, gpio_sts; |
| 1084 | static struct vreg *vreg_mmc; |
| 1085 | static struct vreg *vreg_emmc; |
| 1086 | |
| 1087 | struct sdcc_vreg { |
| 1088 | struct vreg *vreg_data; |
| 1089 | unsigned level; |
| 1090 | }; |
| 1091 | |
| 1092 | static struct sdcc_vreg sdcc_vreg_data[4]; |
| 1093 | |
| 1094 | struct sdcc_gpio { |
| 1095 | struct msm_gpio *cfg_data; |
| 1096 | uint32_t size; |
| 1097 | struct msm_gpio *sleep_cfg_data; |
| 1098 | }; |
| 1099 | |
| 1100 | /** |
| 1101 | * Due to insufficient drive strengths for SDC GPIO lines some old versioned |
| 1102 | * SD/MMC cards may cause data CRC errors. Hence, set optimal values |
| 1103 | * for SDC slots based on timing closure and marginality. SDC1 slot |
| 1104 | * require higher value since it should handle bad signal quality due |
| 1105 | * to size of T-flash adapters. |
| 1106 | */ |
| 1107 | static struct msm_gpio sdc1_cfg_data[] = { |
| 1108 | {GPIO_CFG(51, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA), |
| 1109 | "sdc1_dat_3"}, |
| 1110 | {GPIO_CFG(52, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA), |
| 1111 | "sdc1_dat_2"}, |
| 1112 | {GPIO_CFG(53, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA), |
| 1113 | "sdc1_dat_1"}, |
| 1114 | {GPIO_CFG(54, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA), |
| 1115 | "sdc1_dat_0"}, |
| 1116 | {GPIO_CFG(55, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_14MA), |
| 1117 | "sdc1_cmd"}, |
| 1118 | {GPIO_CFG(56, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_14MA), |
| 1119 | "sdc1_clk"}, |
| 1120 | }; |
| 1121 | |
| 1122 | static struct msm_gpio sdc2_cfg_data[] = { |
| 1123 | {GPIO_CFG(62, 2, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 1124 | "sdc2_clk"}, |
| 1125 | {GPIO_CFG(63, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1126 | "sdc2_cmd"}, |
| 1127 | {GPIO_CFG(64, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1128 | "sdc2_dat_3"}, |
| 1129 | {GPIO_CFG(65, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1130 | "sdc2_dat_2"}, |
| 1131 | {GPIO_CFG(66, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1132 | "sdc2_dat_1"}, |
| 1133 | {GPIO_CFG(67, 2, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1134 | "sdc2_dat_0"}, |
| 1135 | }; |
| 1136 | |
| 1137 | static struct msm_gpio sdc2_sleep_cfg_data[] = { |
| 1138 | {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1139 | "sdc2_clk"}, |
| 1140 | {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1141 | "sdc2_cmd"}, |
| 1142 | {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1143 | "sdc2_dat_3"}, |
| 1144 | {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1145 | "sdc2_dat_2"}, |
| 1146 | {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1147 | "sdc2_dat_1"}, |
| 1148 | {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA), |
| 1149 | "sdc2_dat_0"}, |
| 1150 | }; |
| 1151 | static struct msm_gpio sdc3_cfg_data[] = { |
| 1152 | {GPIO_CFG(88, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 1153 | "sdc3_clk"}, |
| 1154 | {GPIO_CFG(89, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1155 | "sdc3_cmd"}, |
| 1156 | {GPIO_CFG(90, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1157 | "sdc3_dat_3"}, |
| 1158 | {GPIO_CFG(91, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1159 | "sdc3_dat_2"}, |
| 1160 | {GPIO_CFG(92, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1161 | "sdc3_dat_1"}, |
| 1162 | {GPIO_CFG(93, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1163 | "sdc3_dat_0"}, |
| 1164 | #ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT |
| 1165 | {GPIO_CFG(19, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1166 | "sdc3_dat_7"}, |
| 1167 | {GPIO_CFG(20, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1168 | "sdc3_dat_6"}, |
| 1169 | {GPIO_CFG(21, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1170 | "sdc3_dat_5"}, |
| 1171 | {GPIO_CFG(108, 3, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1172 | "sdc3_dat_4"}, |
| 1173 | #endif |
| 1174 | }; |
| 1175 | |
| 1176 | static struct msm_gpio sdc4_cfg_data[] = { |
| 1177 | {GPIO_CFG(19, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1178 | "sdc4_dat_3"}, |
| 1179 | {GPIO_CFG(20, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1180 | "sdc4_dat_2"}, |
| 1181 | {GPIO_CFG(21, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1182 | "sdc4_dat_1"}, |
| 1183 | {GPIO_CFG(107, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1184 | "sdc4_cmd"}, |
| 1185 | {GPIO_CFG(108, 1, GPIO_CFG_OUTPUT, GPIO_CFG_PULL_UP, GPIO_CFG_10MA), |
| 1186 | "sdc4_dat_0"}, |
| 1187 | {GPIO_CFG(109, 1, GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_8MA), |
| 1188 | "sdc4_clk"}, |
| 1189 | }; |
| 1190 | |
| 1191 | static struct sdcc_gpio sdcc_cfg_data[] = { |
| 1192 | { |
| 1193 | .cfg_data = sdc1_cfg_data, |
| 1194 | .size = ARRAY_SIZE(sdc1_cfg_data), |
| 1195 | }, |
| 1196 | { |
| 1197 | .cfg_data = sdc2_cfg_data, |
| 1198 | .size = ARRAY_SIZE(sdc2_cfg_data), |
| 1199 | .sleep_cfg_data = sdc2_sleep_cfg_data, |
| 1200 | }, |
| 1201 | { |
| 1202 | .cfg_data = sdc3_cfg_data, |
| 1203 | .size = ARRAY_SIZE(sdc3_cfg_data), |
| 1204 | }, |
| 1205 | { |
| 1206 | .cfg_data = sdc4_cfg_data, |
| 1207 | .size = ARRAY_SIZE(sdc4_cfg_data), |
| 1208 | }, |
| 1209 | }; |
| 1210 | |
| 1211 | static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable) |
| 1212 | { |
| 1213 | int rc = 0; |
| 1214 | struct sdcc_gpio *curr; |
| 1215 | |
| 1216 | curr = &sdcc_cfg_data[dev_id - 1]; |
| 1217 | if (!(test_bit(dev_id, &gpio_sts)^enable)) |
| 1218 | return rc; |
| 1219 | |
| 1220 | if (enable) { |
| 1221 | set_bit(dev_id, &gpio_sts); |
| 1222 | rc = msm_gpios_request_enable(curr->cfg_data, curr->size); |
| 1223 | if (rc) |
| 1224 | pr_err("%s: Failed to turn on GPIOs for slot %d\n", |
| 1225 | __func__, dev_id); |
| 1226 | } else { |
| 1227 | clear_bit(dev_id, &gpio_sts); |
| 1228 | if (curr->sleep_cfg_data) { |
| 1229 | rc = msm_gpios_enable(curr->sleep_cfg_data, curr->size); |
| 1230 | msm_gpios_free(curr->sleep_cfg_data, curr->size); |
| 1231 | return rc; |
| 1232 | } |
| 1233 | msm_gpios_disable_free(curr->cfg_data, curr->size); |
| 1234 | } |
| 1235 | return rc; |
| 1236 | } |
| 1237 | |
| 1238 | static int msm_sdcc_setup_vreg(int dev_id, unsigned int enable) |
| 1239 | { |
| 1240 | int rc = 0; |
| 1241 | struct sdcc_vreg *curr; |
| 1242 | |
| 1243 | curr = &sdcc_vreg_data[dev_id - 1]; |
| 1244 | |
| 1245 | if (!(test_bit(dev_id, &vreg_sts)^enable)) |
| 1246 | return rc; |
| 1247 | |
| 1248 | if (enable) { |
| 1249 | set_bit(dev_id, &vreg_sts); |
| 1250 | rc = vreg_set_level(curr->vreg_data, curr->level); |
| 1251 | if (rc) |
| 1252 | pr_err("%s: vreg_set_level() = %d\n", __func__, rc); |
| 1253 | |
| 1254 | rc = vreg_enable(curr->vreg_data); |
| 1255 | if (rc) |
| 1256 | pr_err("%s: vreg_enable() = %d\n", __func__, rc); |
| 1257 | } else { |
| 1258 | clear_bit(dev_id, &vreg_sts); |
| 1259 | rc = vreg_disable(curr->vreg_data); |
| 1260 | if (rc) |
| 1261 | pr_err("%s: vreg_disable() = %d\n", __func__, rc); |
| 1262 | } |
| 1263 | return rc; |
| 1264 | } |
| 1265 | |
| 1266 | static uint32_t msm_sdcc_setup_power(struct device *dv, unsigned int vdd) |
| 1267 | { |
| 1268 | int rc = 0; |
| 1269 | struct platform_device *pdev; |
| 1270 | |
| 1271 | pdev = container_of(dv, struct platform_device, dev); |
| 1272 | |
| 1273 | rc = msm_sdcc_setup_gpio(pdev->id, !!vdd); |
| 1274 | if (rc) |
| 1275 | goto out; |
| 1276 | |
| 1277 | rc = msm_sdcc_setup_vreg(pdev->id, !!vdd); |
| 1278 | out: |
| 1279 | return rc; |
| 1280 | } |
| 1281 | |
| 1282 | #define GPIO_SDC1_HW_DET 85 |
| 1283 | |
| 1284 | #if defined(CONFIG_MMC_MSM_SDC1_SUPPORT) \ |
| 1285 | && defined(CONFIG_MMC_MSM_CARD_HW_DETECTION) |
| 1286 | static unsigned int msm7627a_sdcc_slot_status(struct device *dev) |
| 1287 | { |
| 1288 | int status; |
| 1289 | |
| 1290 | status = gpio_tlmm_config(GPIO_CFG(GPIO_SDC1_HW_DET, 2, GPIO_CFG_INPUT, |
| 1291 | GPIO_CFG_PULL_UP, GPIO_CFG_8MA), GPIO_CFG_ENABLE); |
| 1292 | if (status) |
| 1293 | pr_err("%s:Failed to configure tlmm for GPIO %d\n", __func__, |
| 1294 | GPIO_SDC1_HW_DET); |
| 1295 | |
| 1296 | status = gpio_request(GPIO_SDC1_HW_DET, "SD_HW_Detect"); |
| 1297 | if (status) { |
| 1298 | pr_err("%s:Failed to request GPIO %d\n", __func__, |
| 1299 | GPIO_SDC1_HW_DET); |
| 1300 | } else { |
| 1301 | status = gpio_direction_input(GPIO_SDC1_HW_DET); |
| 1302 | if (!status) |
| 1303 | status = gpio_get_value(GPIO_SDC1_HW_DET); |
| 1304 | gpio_free(GPIO_SDC1_HW_DET); |
| 1305 | } |
| 1306 | return status; |
| 1307 | } |
| 1308 | #endif |
| 1309 | |
| 1310 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 1311 | static struct mmc_platform_data sdc1_plat_data = { |
| 1312 | .ocr_mask = MMC_VDD_28_29, |
| 1313 | .translate_vdd = msm_sdcc_setup_power, |
| 1314 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 1315 | .msmsdcc_fmin = 144000, |
| 1316 | .msmsdcc_fmid = 24576000, |
| 1317 | .msmsdcc_fmax = 49152000, |
| 1318 | #ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION |
| 1319 | .status = msm7627a_sdcc_slot_status, |
| 1320 | .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET), |
| 1321 | .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
| 1322 | #endif |
| 1323 | }; |
| 1324 | #endif |
| 1325 | |
| 1326 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 1327 | static struct mmc_platform_data sdc2_plat_data = { |
| 1328 | /* |
| 1329 | * SDC2 supports only 1.8V, claim for 2.85V range is just |
| 1330 | * for allowing buggy cards who advertise 2.8V even though |
| 1331 | * they can operate at 1.8V supply. |
| 1332 | */ |
| 1333 | .ocr_mask = MMC_VDD_28_29 | MMC_VDD_165_195, |
| 1334 | .translate_vdd = msm_sdcc_setup_power, |
| 1335 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 1336 | #ifdef CONFIG_MMC_MSM_SDIO_SUPPORT |
| 1337 | .sdiowakeup_irq = MSM_GPIO_TO_INT(66), |
| 1338 | #endif |
| 1339 | .msmsdcc_fmin = 144000, |
| 1340 | .msmsdcc_fmid = 24576000, |
| 1341 | .msmsdcc_fmax = 49152000, |
| 1342 | #ifdef CONFIG_MMC_MSM_SDC2_DUMMY52_REQUIRED |
| 1343 | .dummy52_required = 1, |
| 1344 | #endif |
| 1345 | }; |
| 1346 | #endif |
| 1347 | |
| 1348 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 1349 | static struct mmc_platform_data sdc3_plat_data = { |
| 1350 | .ocr_mask = MMC_VDD_28_29, |
| 1351 | .translate_vdd = msm_sdcc_setup_power, |
| 1352 | #ifdef CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT |
| 1353 | .mmc_bus_width = MMC_CAP_8_BIT_DATA, |
| 1354 | #else |
| 1355 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 1356 | #endif |
| 1357 | .msmsdcc_fmin = 144000, |
| 1358 | .msmsdcc_fmid = 24576000, |
| 1359 | .msmsdcc_fmax = 49152000, |
| 1360 | .nonremovable = 1, |
| 1361 | }; |
| 1362 | #endif |
| 1363 | |
| 1364 | #if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\ |
| 1365 | && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT)) |
| 1366 | static struct mmc_platform_data sdc4_plat_data = { |
| 1367 | .ocr_mask = MMC_VDD_28_29, |
| 1368 | .translate_vdd = msm_sdcc_setup_power, |
| 1369 | .mmc_bus_width = MMC_CAP_4_BIT_DATA, |
| 1370 | .msmsdcc_fmin = 144000, |
| 1371 | .msmsdcc_fmid = 24576000, |
| 1372 | .msmsdcc_fmax = 49152000, |
| 1373 | }; |
| 1374 | #endif |
| 1375 | #endif |
| 1376 | |
| 1377 | #ifdef CONFIG_SERIAL_MSM_HS |
| 1378 | static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = { |
| 1379 | .inject_rx_on_wakeup = 1, |
| 1380 | .rx_to_inject = 0xFD, |
| 1381 | }; |
| 1382 | #endif |
| 1383 | static struct msm_pm_platform_data msm7627a_pm_data[MSM_PM_SLEEP_MODE_NR] = { |
| 1384 | [MSM_PM_SLEEP_MODE_POWER_COLLAPSE] = { |
| 1385 | .idle_supported = 1, |
| 1386 | .suspend_supported = 1, |
| 1387 | .idle_enabled = 1, |
| 1388 | .suspend_enabled = 1, |
| 1389 | .latency = 16000, |
| 1390 | .residency = 20000, |
| 1391 | }, |
| 1392 | [MSM_PM_SLEEP_MODE_POWER_COLLAPSE_NO_XO_SHUTDOWN] = { |
| 1393 | .idle_supported = 1, |
| 1394 | .suspend_supported = 1, |
| 1395 | .idle_enabled = 1, |
| 1396 | .suspend_enabled = 1, |
| 1397 | .latency = 12000, |
| 1398 | .residency = 20000, |
| 1399 | }, |
| 1400 | [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT] = { |
| 1401 | .idle_supported = 1, |
| 1402 | .suspend_supported = 1, |
| 1403 | .idle_enabled = 0, |
| 1404 | .suspend_enabled = 1, |
| 1405 | .latency = 2000, |
| 1406 | .residency = 0, |
| 1407 | }, |
| 1408 | [MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT] = { |
| 1409 | .idle_supported = 1, |
| 1410 | .suspend_supported = 1, |
| 1411 | .idle_enabled = 1, |
| 1412 | .suspend_enabled = 1, |
| 1413 | .latency = 2, |
| 1414 | .residency = 0, |
| 1415 | }, |
| 1416 | }; |
| 1417 | |
| 1418 | static struct android_pmem_platform_data android_pmem_adsp_pdata = { |
| 1419 | .name = "pmem_adsp", |
| 1420 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 1421 | .cached = 1, |
| 1422 | .memory_type = MEMTYPE_EBI1, |
| 1423 | }; |
| 1424 | |
| 1425 | static struct platform_device android_pmem_adsp_device = { |
| 1426 | .name = "android_pmem", |
| 1427 | .id = 1, |
| 1428 | .dev = { .platform_data = &android_pmem_adsp_pdata }, |
| 1429 | }; |
| 1430 | |
| 1431 | static unsigned pmem_mdp_size = MSM_PMEM_MDP_SIZE; |
| 1432 | static int __init pmem_mdp_size_setup(char *p) |
| 1433 | { |
| 1434 | pmem_mdp_size = memparse(p, NULL); |
| 1435 | return 0; |
| 1436 | } |
| 1437 | |
| 1438 | early_param("pmem_mdp_size", pmem_mdp_size_setup); |
| 1439 | |
| 1440 | static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE; |
| 1441 | static int __init pmem_adsp_size_setup(char *p) |
| 1442 | { |
| 1443 | pmem_adsp_size = memparse(p, NULL); |
| 1444 | return 0; |
| 1445 | } |
| 1446 | |
| 1447 | early_param("pmem_adsp_size", pmem_adsp_size_setup); |
| 1448 | |
| 1449 | static unsigned fb_size = MSM_FB_SIZE; |
| 1450 | static int __init fb_size_setup(char *p) |
| 1451 | { |
| 1452 | fb_size = memparse(p, NULL); |
| 1453 | return 0; |
| 1454 | } |
| 1455 | |
| 1456 | early_param("fb_size", fb_size_setup); |
| 1457 | |
| 1458 | static void __init msm7627a_init_mmc(void) |
| 1459 | { |
| 1460 | vreg_emmc = vreg_get(NULL, "emmc"); |
| 1461 | if (IS_ERR(vreg_emmc)) { |
| 1462 | pr_err("%s: vreg get failed (%ld)\n", |
| 1463 | __func__, PTR_ERR(vreg_emmc)); |
| 1464 | return; |
| 1465 | } |
| 1466 | |
| 1467 | vreg_mmc = vreg_get(NULL, "mmc"); |
| 1468 | if (IS_ERR(vreg_mmc)) { |
| 1469 | pr_err("%s: vreg get failed (%ld)\n", |
| 1470 | __func__, PTR_ERR(vreg_mmc)); |
| 1471 | return; |
| 1472 | } |
| 1473 | |
| 1474 | /* eMMC slot */ |
| 1475 | #ifdef CONFIG_MMC_MSM_SDC3_SUPPORT |
| 1476 | sdcc_vreg_data[2].vreg_data = vreg_emmc; |
| 1477 | sdcc_vreg_data[2].level = 3000; |
| 1478 | msm_add_sdcc(3, &sdc3_plat_data); |
| 1479 | #endif |
| 1480 | /* Micro-SD slot */ |
| 1481 | #ifdef CONFIG_MMC_MSM_SDC1_SUPPORT |
| 1482 | sdcc_vreg_data[0].vreg_data = vreg_mmc; |
| 1483 | sdcc_vreg_data[0].level = 2850; |
| 1484 | msm_add_sdcc(1, &sdc1_plat_data); |
| 1485 | #endif |
| 1486 | /* SDIO WLAN slot */ |
| 1487 | #ifdef CONFIG_MMC_MSM_SDC2_SUPPORT |
| 1488 | sdcc_vreg_data[1].vreg_data = vreg_mmc; |
| 1489 | sdcc_vreg_data[1].level = 2850; |
| 1490 | msm_add_sdcc(2, &sdc2_plat_data); |
| 1491 | #endif |
| 1492 | /* Not Used */ |
| 1493 | #if (defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\ |
| 1494 | && !defined(CONFIG_MMC_MSM_SDC3_8_BIT_SUPPORT)) |
| 1495 | sdcc_vreg_data[3].vreg_data = vreg_mmc; |
| 1496 | sdcc_vreg_data[3].level = 2850; |
| 1497 | msm_add_sdcc(4, &sdc4_plat_data); |
| 1498 | #endif |
| 1499 | } |
| 1500 | |
| 1501 | #define SND(desc, num) { .name = #desc, .id = num } |
| 1502 | static struct snd_endpoint snd_endpoints_list[] = { |
| 1503 | SND(HANDSET, 0), |
| 1504 | SND(MONO_HEADSET, 2), |
| 1505 | SND(HEADSET, 3), |
| 1506 | SND(SPEAKER, 6), |
| 1507 | SND(TTY_HEADSET, 8), |
| 1508 | SND(TTY_VCO, 9), |
| 1509 | SND(TTY_HCO, 10), |
| 1510 | SND(BT, 12), |
| 1511 | SND(IN_S_SADC_OUT_HANDSET, 16), |
| 1512 | SND(IN_S_SADC_OUT_SPEAKER_PHONE, 25), |
| 1513 | SND(FM_DIGITAL_STEREO_HEADSET, 26), |
| 1514 | SND(FM_DIGITAL_SPEAKER_PHONE, 27), |
| 1515 | SND(FM_DIGITAL_BT_A2DP_HEADSET, 28), |
Shashi Kumar | 64e0760 | 2011-10-11 13:18:57 +0530 | [diff] [blame^] | 1516 | SND(STEREO_HEADSET_AND_SPEAKER, 31), |
Phani Kumar Allada | d697125 | 2011-10-19 10:50:15 +0530 | [diff] [blame] | 1517 | SND(CURRENT, 0x7FFFFFFE), |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 1518 | SND(FM_ANALOG_STEREO_HEADSET, 35), |
| 1519 | SND(FM_ANALOG_STEREO_HEADSET_CODEC, 36), |
| 1520 | }; |
| 1521 | #undef SND |
| 1522 | |
| 1523 | static struct msm_snd_endpoints msm_device_snd_endpoints = { |
| 1524 | .endpoints = snd_endpoints_list, |
| 1525 | .num = sizeof(snd_endpoints_list) / sizeof(struct snd_endpoint) |
| 1526 | }; |
| 1527 | |
| 1528 | static struct platform_device msm_device_snd = { |
| 1529 | .name = "msm_snd", |
| 1530 | .id = -1, |
| 1531 | .dev = { |
| 1532 | .platform_data = &msm_device_snd_endpoints |
| 1533 | }, |
| 1534 | }; |
| 1535 | |
| 1536 | #define DEC0_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ |
| 1537 | (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ |
| 1538 | (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ |
| 1539 | (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ |
| 1540 | (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ |
| 1541 | (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) |
| 1542 | #define DEC1_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ |
| 1543 | (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ |
| 1544 | (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ |
| 1545 | (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ |
| 1546 | (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ |
| 1547 | (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) |
| 1548 | #define DEC2_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ |
| 1549 | (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ |
| 1550 | (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ |
| 1551 | (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ |
| 1552 | (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ |
| 1553 | (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) |
| 1554 | #define DEC3_FORMAT ((1<<MSM_ADSP_CODEC_MP3)| \ |
| 1555 | (1<<MSM_ADSP_CODEC_AAC)|(1<<MSM_ADSP_CODEC_WMA)| \ |
| 1556 | (1<<MSM_ADSP_CODEC_WMAPRO)|(1<<MSM_ADSP_CODEC_AMRWB)| \ |
| 1557 | (1<<MSM_ADSP_CODEC_AMRNB)|(1<<MSM_ADSP_CODEC_WAV)| \ |
| 1558 | (1<<MSM_ADSP_CODEC_ADPCM)|(1<<MSM_ADSP_CODEC_YADPCM)| \ |
| 1559 | (1<<MSM_ADSP_CODEC_EVRC)|(1<<MSM_ADSP_CODEC_QCELP)) |
| 1560 | #define DEC4_FORMAT (1<<MSM_ADSP_CODEC_MIDI) |
| 1561 | |
| 1562 | static unsigned int dec_concurrency_table[] = { |
| 1563 | /* Audio LP */ |
| 1564 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DMA)), 0, |
| 1565 | 0, 0, 0, |
| 1566 | |
| 1567 | /* Concurrency 1 */ |
| 1568 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1569 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1570 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1571 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1572 | (DEC4_FORMAT), |
| 1573 | |
| 1574 | /* Concurrency 2 */ |
| 1575 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1576 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1577 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1578 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1579 | (DEC4_FORMAT), |
| 1580 | |
| 1581 | /* Concurrency 3 */ |
| 1582 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1583 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1584 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1585 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1586 | (DEC4_FORMAT), |
| 1587 | |
| 1588 | /* Concurrency 4 */ |
| 1589 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1590 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1591 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1592 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1593 | (DEC4_FORMAT), |
| 1594 | |
| 1595 | /* Concurrency 5 */ |
| 1596 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_TUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1597 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1598 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1599 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1600 | (DEC4_FORMAT), |
| 1601 | |
| 1602 | /* Concurrency 6 */ |
| 1603 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1604 | 0, 0, 0, 0, |
| 1605 | |
| 1606 | /* Concurrency 7 */ |
| 1607 | (DEC0_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1608 | (DEC1_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1609 | (DEC2_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1610 | (DEC3_FORMAT|(1<<MSM_ADSP_MODE_NONTUNNEL)|(1<<MSM_ADSP_OP_DM)), |
| 1611 | (DEC4_FORMAT), |
| 1612 | }; |
| 1613 | |
| 1614 | #define DEC_INFO(name, queueid, decid, nr_codec) { .module_name = name, \ |
| 1615 | .module_queueid = queueid, .module_decid = decid, \ |
| 1616 | .nr_codec_support = nr_codec} |
| 1617 | |
| 1618 | static struct msm_adspdec_info dec_info_list[] = { |
| 1619 | DEC_INFO("AUDPLAY0TASK", 13, 0, 11), /* AudPlay0BitStreamCtrlQueue */ |
| 1620 | DEC_INFO("AUDPLAY1TASK", 14, 1, 11), /* AudPlay1BitStreamCtrlQueue */ |
| 1621 | DEC_INFO("AUDPLAY2TASK", 15, 2, 11), /* AudPlay2BitStreamCtrlQueue */ |
| 1622 | DEC_INFO("AUDPLAY3TASK", 16, 3, 11), /* AudPlay3BitStreamCtrlQueue */ |
| 1623 | DEC_INFO("AUDPLAY4TASK", 17, 4, 1), /* AudPlay4BitStreamCtrlQueue */ |
| 1624 | }; |
| 1625 | |
| 1626 | static struct msm_adspdec_database msm_device_adspdec_database = { |
| 1627 | .num_dec = ARRAY_SIZE(dec_info_list), |
| 1628 | .num_concurrency_support = (ARRAY_SIZE(dec_concurrency_table) / \ |
| 1629 | ARRAY_SIZE(dec_info_list)), |
| 1630 | .dec_concurrency_table = dec_concurrency_table, |
| 1631 | .dec_info_list = dec_info_list, |
| 1632 | }; |
| 1633 | |
| 1634 | static struct platform_device msm_device_adspdec = { |
| 1635 | .name = "msm_adspdec", |
| 1636 | .id = -1, |
| 1637 | .dev = { |
| 1638 | .platform_data = &msm_device_adspdec_database |
| 1639 | }, |
| 1640 | }; |
| 1641 | |
| 1642 | static struct android_pmem_platform_data android_pmem_audio_pdata = { |
| 1643 | .name = "pmem_audio", |
| 1644 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 1645 | .cached = 0, |
| 1646 | .memory_type = MEMTYPE_EBI1, |
| 1647 | }; |
| 1648 | |
| 1649 | static struct platform_device android_pmem_audio_device = { |
| 1650 | .name = "android_pmem", |
| 1651 | .id = 2, |
| 1652 | .dev = { .platform_data = &android_pmem_audio_pdata }, |
| 1653 | }; |
| 1654 | |
| 1655 | static struct android_pmem_platform_data android_pmem_pdata = { |
| 1656 | .name = "pmem", |
| 1657 | .allocator_type = PMEM_ALLOCATORTYPE_BITMAP, |
| 1658 | .cached = 1, |
| 1659 | .memory_type = MEMTYPE_EBI1, |
| 1660 | }; |
| 1661 | static struct platform_device android_pmem_device = { |
| 1662 | .name = "android_pmem", |
| 1663 | .id = 0, |
| 1664 | .dev = { .platform_data = &android_pmem_pdata }, |
| 1665 | }; |
| 1666 | |
| 1667 | static u32 msm_calculate_batt_capacity(u32 current_voltage); |
| 1668 | |
| 1669 | static struct msm_psy_batt_pdata msm_psy_batt_data = { |
| 1670 | .voltage_min_design = 2800, |
| 1671 | .voltage_max_design = 4300, |
| 1672 | .avail_chg_sources = AC_CHG | USB_CHG , |
| 1673 | .batt_technology = POWER_SUPPLY_TECHNOLOGY_LION, |
| 1674 | .calculate_capacity = &msm_calculate_batt_capacity, |
| 1675 | }; |
| 1676 | |
| 1677 | static u32 msm_calculate_batt_capacity(u32 current_voltage) |
| 1678 | { |
| 1679 | u32 low_voltage = msm_psy_batt_data.voltage_min_design; |
| 1680 | u32 high_voltage = msm_psy_batt_data.voltage_max_design; |
| 1681 | |
| 1682 | return (current_voltage - low_voltage) * 100 |
| 1683 | / (high_voltage - low_voltage); |
| 1684 | } |
| 1685 | |
| 1686 | static struct platform_device msm_batt_device = { |
| 1687 | .name = "msm-battery", |
| 1688 | .id = -1, |
| 1689 | .dev.platform_data = &msm_psy_batt_data, |
| 1690 | }; |
| 1691 | |
| 1692 | static struct platform_device *qrd1_devices[] __initdata = { |
| 1693 | &msm_device_dmov, |
| 1694 | &msm_device_smd, |
| 1695 | &msm_device_uart1, |
| 1696 | &msm_device_uart_dm1, |
| 1697 | &msm_gsbi0_qup_i2c_device, |
| 1698 | &msm_gsbi1_qup_i2c_device, |
| 1699 | &msm_device_otg, |
| 1700 | &msm_device_gadget_peripheral, |
| 1701 | &android_usb_device, |
| 1702 | &android_pmem_device, |
| 1703 | &android_pmem_adsp_device, |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 1704 | &android_pmem_audio_device, |
| 1705 | &msm_device_snd, |
| 1706 | &msm_device_adspdec, |
| 1707 | &msm_batt_device, |
| 1708 | &msm_kgsl_3d0, |
| 1709 | #ifdef CONFIG_BT |
| 1710 | &msm_bt_power_device, |
| 1711 | #endif |
| 1712 | &msm_wlan_ar6000_pm_device, |
| 1713 | &asoc_msm_pcm, |
| 1714 | &asoc_msm_dai0, |
| 1715 | &asoc_msm_dai1, |
| 1716 | }; |
| 1717 | |
| 1718 | static unsigned pmem_kernel_ebi1_size = PMEM_KERNEL_EBI1_SIZE; |
| 1719 | static int __init pmem_kernel_ebi1_size_setup(char *p) |
| 1720 | { |
| 1721 | pmem_kernel_ebi1_size = memparse(p, NULL); |
| 1722 | return 0; |
| 1723 | } |
| 1724 | early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup); |
| 1725 | |
| 1726 | static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE; |
| 1727 | static int __init pmem_audio_size_setup(char *p) |
| 1728 | { |
| 1729 | pmem_audio_size = memparse(p, NULL); |
| 1730 | return 0; |
| 1731 | } |
| 1732 | early_param("pmem_audio_size", pmem_audio_size_setup); |
| 1733 | |
| 1734 | static void __init msm_msm7627a_allocate_memory_regions(void) |
| 1735 | { |
| 1736 | pr_info("Dummy allocation for fb\n"); |
| 1737 | } |
| 1738 | |
| 1739 | static struct memtype_reserve msm7627a_reserve_table[] __initdata = { |
| 1740 | [MEMTYPE_SMI] = { |
| 1741 | }, |
| 1742 | [MEMTYPE_EBI0] = { |
| 1743 | .flags = MEMTYPE_FLAGS_1M_ALIGN, |
| 1744 | }, |
| 1745 | [MEMTYPE_EBI1] = { |
| 1746 | .flags = MEMTYPE_FLAGS_1M_ALIGN, |
| 1747 | }, |
| 1748 | }; |
| 1749 | |
| 1750 | static void __init size_pmem_devices(void) |
| 1751 | { |
| 1752 | #ifdef CONFIG_ANDROID_PMEM |
| 1753 | android_pmem_adsp_pdata.size = pmem_adsp_size; |
| 1754 | android_pmem_pdata.size = pmem_mdp_size; |
| 1755 | android_pmem_audio_pdata.size = pmem_audio_size; |
| 1756 | #endif |
| 1757 | } |
| 1758 | |
| 1759 | static void __init reserve_memory_for(struct android_pmem_platform_data *p) |
| 1760 | { |
| 1761 | msm7627a_reserve_table[p->memory_type].size += p->size; |
| 1762 | } |
| 1763 | |
| 1764 | static void __init reserve_pmem_memory(void) |
| 1765 | { |
| 1766 | #ifdef CONFIG_ANDROID_PMEM |
| 1767 | reserve_memory_for(&android_pmem_adsp_pdata); |
| 1768 | reserve_memory_for(&android_pmem_pdata); |
| 1769 | reserve_memory_for(&android_pmem_audio_pdata); |
| 1770 | msm7627a_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size; |
| 1771 | #endif |
| 1772 | } |
| 1773 | |
| 1774 | static void __init msm7627a_calculate_reserve_sizes(void) |
| 1775 | { |
| 1776 | size_pmem_devices(); |
| 1777 | reserve_pmem_memory(); |
| 1778 | } |
| 1779 | |
| 1780 | static int msm7627a_paddr_to_memtype(unsigned int paddr) |
| 1781 | { |
| 1782 | return MEMTYPE_EBI1; |
| 1783 | } |
| 1784 | |
| 1785 | static struct reserve_info msm7627a_reserve_info __initdata = { |
| 1786 | .memtype_reserve_table = msm7627a_reserve_table, |
| 1787 | .calculate_reserve_sizes = msm7627a_calculate_reserve_sizes, |
| 1788 | .paddr_to_memtype = msm7627a_paddr_to_memtype, |
| 1789 | }; |
| 1790 | |
| 1791 | static void __init msm7627a_reserve(void) |
| 1792 | { |
| 1793 | reserve_info = &msm7627a_reserve_info; |
| 1794 | msm_reserve(); |
| 1795 | } |
| 1796 | |
| 1797 | static void __init msm_device_i2c_init(void) |
| 1798 | { |
| 1799 | msm_gsbi0_qup_i2c_device.dev.platform_data = &msm_gsbi0_qup_i2c_pdata; |
| 1800 | msm_gsbi1_qup_i2c_device.dev.platform_data = &msm_gsbi1_qup_i2c_pdata; |
| 1801 | } |
| 1802 | |
| 1803 | static struct msm_handset_platform_data hs_platform_data = { |
| 1804 | .hs_name = "7k_handset", |
| 1805 | .pwr_key_delay_ms = 500, /* 0 will disable end key */ |
| 1806 | }; |
| 1807 | |
| 1808 | static struct platform_device hs_pdev = { |
| 1809 | .name = "msm-handset", |
| 1810 | .id = -1, |
| 1811 | .dev = { |
| 1812 | .platform_data = &hs_platform_data, |
| 1813 | }, |
| 1814 | }; |
| 1815 | |
| 1816 | #define UART1DM_RX_GPIO 45 |
| 1817 | static void __init msm_qrd1_init(void) |
| 1818 | { |
| 1819 | msm7x2x_misc_init(); |
| 1820 | msm_device_i2c_init(); |
| 1821 | msm7627a_init_mmc(); |
| 1822 | |
| 1823 | #ifdef CONFIG_SERIAL_MSM_HS |
| 1824 | msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(UART1DM_RX_GPIO); |
| 1825 | msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata; |
| 1826 | #endif |
| 1827 | |
| 1828 | #ifdef CONFIG_USB_MSM_OTG_72K |
| 1829 | msm_otg_pdata.swfi_latency = msm7627a_pm_data |
| 1830 | [MSM_PM_SLEEP_MODE_RAMP_DOWN_AND_WAIT_FOR_INTERRUPT].latency; |
| 1831 | msm_device_otg.dev.platform_data = &msm_otg_pdata; |
| 1832 | #endif |
| 1833 | msm_device_gadget_peripheral.dev.platform_data = |
| 1834 | &msm_gadget_pdata; |
| 1835 | platform_add_devices(qrd1_devices, |
| 1836 | ARRAY_SIZE(qrd1_devices)); |
| 1837 | #ifdef CONFIG_USB_EHCI_MSM_72K |
| 1838 | msm7627a_init_host(); |
| 1839 | #endif |
| 1840 | msm_pm_set_platform_data(msm7627a_pm_data, |
| 1841 | ARRAY_SIZE(msm7627a_pm_data)); |
| 1842 | |
| 1843 | #if defined(CONFIG_BT) && defined(CONFIG_MARIMBA_CORE) |
| 1844 | i2c_register_board_info(MSM_GSBI1_QUP_I2C_BUS_ID, |
| 1845 | bahama_devices, |
| 1846 | ARRAY_SIZE(bahama_devices)); |
| 1847 | bt_power_init(); |
| 1848 | #endif |
| 1849 | platform_device_register(&hs_pdev); |
| 1850 | |
| 1851 | #ifdef CONFIG_MSM_RPC_VIBRATOR |
| 1852 | msm_init_pmic_vibrator(); |
| 1853 | #endif |
| 1854 | } |
| 1855 | |
| 1856 | static void __init qrd7627a_init_early(void) |
| 1857 | { |
| 1858 | msm_msm7627a_allocate_memory_regions(); |
| 1859 | } |
| 1860 | |
| 1861 | MACHINE_START(MSM7627A_QRD1, "QRD MSM7627a QRD1") |
| 1862 | .boot_params = PHYS_OFFSET + 0x100, |
| 1863 | .map_io = msm_common_io_init, |
| 1864 | .reserve = msm7627a_reserve, |
| 1865 | .init_irq = msm_init_irq, |
| 1866 | .init_machine = msm_qrd1_init, |
| 1867 | .timer = &msm_timer, |
| 1868 | .init_early = qrd7627a_init_early, |
Pankaj Kumar | bf8a2a3 | 2011-10-21 11:47:21 +0530 | [diff] [blame] | 1869 | .handle_irq = vic_handle_irq, |
Taniya Das | c98bfbc | 2011-08-23 09:58:55 +0530 | [diff] [blame] | 1870 | MACHINE_END |