David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 1 | /* |
Duy Truong | 790f06d | 2013-02-13 16:38:12 -0800 | [diff] [blame] | 2 | * Copyright (c) 2012, The Linux Foundation. All rights reserved. |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | /* |
| 15 | * This file contains regulator configuration and mappings for targets |
| 16 | * consisting of MSM8930 and PM8917. |
| 17 | */ |
| 18 | |
| 19 | #include <linux/regulator/pm8xxx-regulator.h> |
| 20 | |
| 21 | #include "board-8930.h" |
| 22 | |
| 23 | #define VREG_CONSUMERS(_id) \ |
| 24 | static struct regulator_consumer_supply vreg_consumers_##_id[] |
| 25 | |
| 26 | /* |
| 27 | * Consumer specific regulator names: |
| 28 | * regulator name consumer dev_name |
| 29 | */ |
| 30 | VREG_CONSUMERS(L1) = { |
| 31 | REGULATOR_SUPPLY("8917_l1", NULL), |
| 32 | }; |
| 33 | VREG_CONSUMERS(L2) = { |
| 34 | REGULATOR_SUPPLY("8917_l2", NULL), |
| 35 | REGULATOR_SUPPLY("iris_vdddig", "wcnss_wlan.0"), |
| 36 | REGULATOR_SUPPLY("dsi_vdda", "mipi_dsi.1"), |
Nagamalleswararao Ganji | c2e5752 | 2012-10-29 12:25:08 -0700 | [diff] [blame] | 37 | REGULATOR_SUPPLY("dsi_pll_vdda", "mdp.0"), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 38 | REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.0"), |
| 39 | REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.1"), |
| 40 | REGULATOR_SUPPLY("mipi_csi_vdd", "msm_csid.2"), |
| 41 | }; |
| 42 | VREG_CONSUMERS(L3) = { |
| 43 | REGULATOR_SUPPLY("8917_l3", NULL), |
| 44 | REGULATOR_SUPPLY("HSUSB_3p3", "msm_otg"), |
| 45 | }; |
| 46 | VREG_CONSUMERS(L4) = { |
| 47 | REGULATOR_SUPPLY("8917_l4", NULL), |
| 48 | REGULATOR_SUPPLY("HSUSB_1p8", "msm_otg"), |
| 49 | REGULATOR_SUPPLY("iris_vddxo", "wcnss_wlan.0"), |
| 50 | }; |
| 51 | VREG_CONSUMERS(L5) = { |
| 52 | REGULATOR_SUPPLY("8917_l5", NULL), |
| 53 | REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.1"), |
| 54 | }; |
| 55 | VREG_CONSUMERS(L6) = { |
| 56 | REGULATOR_SUPPLY("8917_l6", NULL), |
| 57 | REGULATOR_SUPPLY("sdc_vdd", "msm_sdcc.3"), |
| 58 | }; |
| 59 | VREG_CONSUMERS(L7) = { |
| 60 | REGULATOR_SUPPLY("8917_l7", NULL), |
| 61 | REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.3"), |
| 62 | }; |
| 63 | VREG_CONSUMERS(L8) = { |
| 64 | REGULATOR_SUPPLY("8917_l8", NULL), |
| 65 | REGULATOR_SUPPLY("dsi_vdc", "mipi_dsi.1"), |
| 66 | }; |
| 67 | VREG_CONSUMERS(L9) = { |
| 68 | REGULATOR_SUPPLY("8917_l9", NULL), |
| 69 | REGULATOR_SUPPLY("vdd_ana", "3-004a"), |
| 70 | REGULATOR_SUPPLY("vdd", "3-0024"), |
| 71 | REGULATOR_SUPPLY("vdd", "12-0018"), |
| 72 | REGULATOR_SUPPLY("vdd", "12-0068"), |
| 73 | }; |
| 74 | VREG_CONSUMERS(L10) = { |
| 75 | REGULATOR_SUPPLY("8917_l10", NULL), |
| 76 | REGULATOR_SUPPLY("iris_vddpa", "wcnss_wlan.0"), |
| 77 | }; |
| 78 | VREG_CONSUMERS(L11) = { |
| 79 | REGULATOR_SUPPLY("8917_l11", NULL), |
| 80 | REGULATOR_SUPPLY("cam_vana", "4-001a"), |
| 81 | REGULATOR_SUPPLY("cam_vana", "4-006c"), |
| 82 | REGULATOR_SUPPLY("cam_vana", "4-0048"), |
| 83 | REGULATOR_SUPPLY("cam_vana", "4-0020"), |
| 84 | }; |
| 85 | VREG_CONSUMERS(L12) = { |
| 86 | REGULATOR_SUPPLY("8917_l12", NULL), |
| 87 | REGULATOR_SUPPLY("cam_vdig", "4-001a"), |
| 88 | REGULATOR_SUPPLY("cam_vdig", "4-006c"), |
| 89 | REGULATOR_SUPPLY("cam_vdig", "4-0048"), |
| 90 | REGULATOR_SUPPLY("cam_vdig", "4-0020"), |
| 91 | }; |
| 92 | VREG_CONSUMERS(L14) = { |
| 93 | REGULATOR_SUPPLY("8917_l14", NULL), |
| 94 | REGULATOR_SUPPLY("pa_therm", "pm8xxx-adc"), |
| 95 | }; |
| 96 | VREG_CONSUMERS(L15) = { |
| 97 | REGULATOR_SUPPLY("8917_l15", NULL), |
| 98 | }; |
| 99 | VREG_CONSUMERS(L16) = { |
| 100 | REGULATOR_SUPPLY("8917_l16", NULL), |
| 101 | REGULATOR_SUPPLY("cam_vaf", "4-001a"), |
| 102 | REGULATOR_SUPPLY("cam_vaf", "4-006c"), |
| 103 | REGULATOR_SUPPLY("cam_vaf", "4-0048"), |
| 104 | REGULATOR_SUPPLY("cam_vaf", "4-0020"), |
| 105 | }; |
| 106 | VREG_CONSUMERS(L17) = { |
| 107 | REGULATOR_SUPPLY("8917_l17", NULL), |
| 108 | }; |
| 109 | VREG_CONSUMERS(L18) = { |
| 110 | REGULATOR_SUPPLY("8917_l18", NULL), |
| 111 | }; |
| 112 | VREG_CONSUMERS(L21) = { |
| 113 | REGULATOR_SUPPLY("8917_l21", NULL), |
| 114 | }; |
| 115 | VREG_CONSUMERS(L22) = { |
| 116 | REGULATOR_SUPPLY("8917_l22", NULL), |
| 117 | }; |
| 118 | VREG_CONSUMERS(L23) = { |
| 119 | REGULATOR_SUPPLY("8917_l23", NULL), |
| 120 | REGULATOR_SUPPLY("dsi_vddio", "mipi_dsi.1"), |
Nagamalleswararao Ganji | c2e5752 | 2012-10-29 12:25:08 -0700 | [diff] [blame] | 121 | REGULATOR_SUPPLY("dsi_pll_vddio", "mdp.0"), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 122 | REGULATOR_SUPPLY("hdmi_avdd", "hdmi_msm.0"), |
| 123 | REGULATOR_SUPPLY("hdmi_vcc", "hdmi_msm.0"), |
| 124 | REGULATOR_SUPPLY("pll_vdd", "pil_riva"), |
| 125 | REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.1"), |
| 126 | REGULATOR_SUPPLY("pll_vdd", "pil_qdsp6v4.2"), |
| 127 | }; |
| 128 | VREG_CONSUMERS(L24) = { |
| 129 | REGULATOR_SUPPLY("8917_l24", NULL), |
| 130 | REGULATOR_SUPPLY("riva_vddmx", "wcnss_wlan.0"), |
| 131 | }; |
| 132 | VREG_CONSUMERS(L25) = { |
| 133 | REGULATOR_SUPPLY("8917_l25", NULL), |
| 134 | REGULATOR_SUPPLY("VDDD_CDC_D", "sitar-slim"), |
| 135 | REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar-slim"), |
| 136 | REGULATOR_SUPPLY("VDDD_CDC_D", "sitar1p1-slim"), |
| 137 | REGULATOR_SUPPLY("CDC_VDDA_A_1P2V", "sitar1p1-slim"), |
| 138 | REGULATOR_SUPPLY("mhl_avcc12", "0-0039"), |
| 139 | }; |
| 140 | VREG_CONSUMERS(L26) = { |
| 141 | REGULATOR_SUPPLY("8921_l26", NULL), |
| 142 | REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.0"), |
| 143 | }; |
| 144 | VREG_CONSUMERS(L27) = { |
| 145 | REGULATOR_SUPPLY("8921_l27", NULL), |
| 146 | REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.2"), |
| 147 | }; |
| 148 | VREG_CONSUMERS(L28) = { |
| 149 | REGULATOR_SUPPLY("8921_l28", NULL), |
| 150 | REGULATOR_SUPPLY("core_vdd", "pil_qdsp6v4.1"), |
| 151 | }; |
| 152 | VREG_CONSUMERS(L29) = { |
| 153 | REGULATOR_SUPPLY("8921_l29", NULL), |
| 154 | }; |
| 155 | VREG_CONSUMERS(L30) = { |
| 156 | REGULATOR_SUPPLY("8917_l30", NULL), |
| 157 | }; |
| 158 | VREG_CONSUMERS(L31) = { |
| 159 | REGULATOR_SUPPLY("8917_l31", NULL), |
| 160 | }; |
| 161 | VREG_CONSUMERS(L32) = { |
| 162 | REGULATOR_SUPPLY("8917_l32", NULL), |
| 163 | }; |
| 164 | VREG_CONSUMERS(L33) = { |
| 165 | REGULATOR_SUPPLY("8917_l33", NULL), |
| 166 | }; |
| 167 | VREG_CONSUMERS(L34) = { |
| 168 | REGULATOR_SUPPLY("8917_l34", NULL), |
| 169 | }; |
| 170 | VREG_CONSUMERS(L35) = { |
| 171 | REGULATOR_SUPPLY("8917_l35", NULL), |
| 172 | }; |
| 173 | VREG_CONSUMERS(L36) = { |
| 174 | REGULATOR_SUPPLY("8917_l36", NULL), |
| 175 | }; |
| 176 | VREG_CONSUMERS(S1) = { |
| 177 | REGULATOR_SUPPLY("8917_s1", NULL), |
| 178 | }; |
| 179 | VREG_CONSUMERS(S2) = { |
| 180 | REGULATOR_SUPPLY("8917_s2", NULL), |
| 181 | REGULATOR_SUPPLY("iris_vddrfa", "wcnss_wlan.0"), |
| 182 | }; |
| 183 | VREG_CONSUMERS(S3) = { |
| 184 | REGULATOR_SUPPLY("8917_s3", NULL), |
| 185 | REGULATOR_SUPPLY("riva_vddcx", "wcnss_wlan.0"), |
| 186 | }; |
| 187 | VREG_CONSUMERS(S4) = { |
| 188 | REGULATOR_SUPPLY("8917_s4", NULL), |
| 189 | REGULATOR_SUPPLY("vdd_dig", "3-004a"), |
| 190 | REGULATOR_SUPPLY("sdc_vdd_io", "msm_sdcc.1"), |
| 191 | REGULATOR_SUPPLY("VDDIO_CDC", "sitar-slim"), |
| 192 | REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar-slim"), |
| 193 | REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar-slim"), |
| 194 | REGULATOR_SUPPLY("VDDIO_CDC", "sitar1p1-slim"), |
| 195 | REGULATOR_SUPPLY("CDC_VDDA_TX", "sitar1p1-slim"), |
| 196 | REGULATOR_SUPPLY("CDC_VDDA_RX", "sitar1p1-slim"), |
| 197 | REGULATOR_SUPPLY("vddp", "0-0048"), |
| 198 | REGULATOR_SUPPLY("mhl_iovcc18", "0-0039"), |
| 199 | REGULATOR_SUPPLY("CDC_VDD_CP", "sitar-slim"), |
| 200 | REGULATOR_SUPPLY("CDC_VDD_CP", "sitar1p1-slim"), |
Stepan Moskovchenko | 22083ab | 2012-09-11 12:41:48 -0700 | [diff] [blame] | 201 | REGULATOR_SUPPLY("vdd-io", "spi0.0"), |
| 202 | REGULATOR_SUPPLY("vdd-phy", "spi0.0"), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 203 | }; |
| 204 | VREG_CONSUMERS(S5) = { |
| 205 | REGULATOR_SUPPLY("8917_s5", NULL), |
| 206 | REGULATOR_SUPPLY("krait0", "acpuclk-8627"), |
| 207 | REGULATOR_SUPPLY("krait0", "acpuclk-8930"), |
| 208 | REGULATOR_SUPPLY("krait0", "acpuclk-8930aa"), |
Tianyi Gou | 2520b6e | 2012-10-29 19:13:53 -0700 | [diff] [blame] | 209 | REGULATOR_SUPPLY("krait0", "acpuclk-8930ab"), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 210 | }; |
| 211 | VREG_CONSUMERS(S6) = { |
| 212 | REGULATOR_SUPPLY("8917_s6", NULL), |
| 213 | REGULATOR_SUPPLY("krait1", "acpuclk-8627"), |
| 214 | REGULATOR_SUPPLY("krait1", "acpuclk-8930"), |
| 215 | REGULATOR_SUPPLY("krait1", "acpuclk-8930aa"), |
Tianyi Gou | 2520b6e | 2012-10-29 19:13:53 -0700 | [diff] [blame] | 216 | REGULATOR_SUPPLY("krait1", "acpuclk-8930ab"), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 217 | }; |
| 218 | VREG_CONSUMERS(S7) = { |
| 219 | REGULATOR_SUPPLY("8917_s7", NULL), |
| 220 | }; |
| 221 | VREG_CONSUMERS(S8) = { |
| 222 | REGULATOR_SUPPLY("8917_s8", NULL), |
| 223 | }; |
| 224 | VREG_CONSUMERS(LVS1) = { |
| 225 | REGULATOR_SUPPLY("8917_lvs1", NULL), |
| 226 | REGULATOR_SUPPLY("iris_vddio", "wcnss_wlan.0"), |
| 227 | REGULATOR_SUPPLY("riva_vddpx", "wcnss_wlan.0"), |
| 228 | }; |
| 229 | VREG_CONSUMERS(LVS3) = { |
| 230 | REGULATOR_SUPPLY("8917_lvs3", NULL), |
| 231 | }; |
| 232 | VREG_CONSUMERS(LVS4) = { |
| 233 | REGULATOR_SUPPLY("8917_lvs4", NULL), |
| 234 | REGULATOR_SUPPLY("vcc_i2c", "3-004a"), |
| 235 | REGULATOR_SUPPLY("vcc_i2c", "3-0024"), |
| 236 | REGULATOR_SUPPLY("vcc_i2c", "0-0048"), |
| 237 | REGULATOR_SUPPLY("vddio", "12-0018"), |
| 238 | REGULATOR_SUPPLY("vlogic", "12-0068"), |
| 239 | }; |
| 240 | VREG_CONSUMERS(LVS5) = { |
| 241 | REGULATOR_SUPPLY("8917_lvs5", NULL), |
| 242 | REGULATOR_SUPPLY("cam_vio", "4-001a"), |
| 243 | REGULATOR_SUPPLY("cam_vio", "4-006c"), |
| 244 | REGULATOR_SUPPLY("cam_vio", "4-0048"), |
| 245 | REGULATOR_SUPPLY("cam_vio", "4-0020"), |
| 246 | }; |
| 247 | VREG_CONSUMERS(LVS6) = { |
| 248 | REGULATOR_SUPPLY("8917_lvs6", NULL), |
| 249 | }; |
| 250 | VREG_CONSUMERS(LVS7) = { |
| 251 | REGULATOR_SUPPLY("8917_lvs7", NULL), |
| 252 | }; |
| 253 | VREG_CONSUMERS(USB_OTG) = { |
| 254 | REGULATOR_SUPPLY("8921_usb_otg", NULL), |
| 255 | REGULATOR_SUPPLY("vbus_otg", "msm_otg"), |
| 256 | }; |
| 257 | VREG_CONSUMERS(BOOST) = { |
| 258 | REGULATOR_SUPPLY("8917_boost", NULL), |
| 259 | REGULATOR_SUPPLY("hdmi_mvs", "hdmi_msm.0"), |
| 260 | REGULATOR_SUPPLY("mhl_usb_hs_switch", "msm_otg"), |
| 261 | }; |
| 262 | VREG_CONSUMERS(VDD_DIG_CORNER) = { |
| 263 | REGULATOR_SUPPLY("vdd_dig_corner", NULL), |
| 264 | REGULATOR_SUPPLY("hsusb_vdd_dig", "msm_otg"), |
| 265 | }; |
| 266 | |
| 267 | |
| 268 | #define PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, _modes, _ops, \ |
| 269 | _apply_uV, _pull_down, _always_on, _supply_regulator, \ |
| 270 | _system_uA, _enable_time, _reg_id) \ |
| 271 | { \ |
| 272 | .init_data = { \ |
| 273 | .constraints = { \ |
| 274 | .valid_modes_mask = _modes, \ |
| 275 | .valid_ops_mask = _ops, \ |
| 276 | .min_uV = _min_uV, \ |
| 277 | .max_uV = _max_uV, \ |
| 278 | .input_uV = _max_uV, \ |
| 279 | .apply_uV = _apply_uV, \ |
| 280 | .always_on = _always_on, \ |
| 281 | .name = _name, \ |
| 282 | }, \ |
| 283 | .num_consumer_supplies = \ |
| 284 | ARRAY_SIZE(vreg_consumers_##_id), \ |
| 285 | .consumer_supplies = vreg_consumers_##_id, \ |
| 286 | .supply_regulator = _supply_regulator, \ |
| 287 | }, \ |
| 288 | .id = _reg_id, \ |
| 289 | .pull_down_enable = _pull_down, \ |
| 290 | .system_uA = _system_uA, \ |
| 291 | .enable_time = _enable_time, \ |
| 292 | } |
| 293 | |
| 294 | #define PM8XXX_LDO(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ |
| 295 | _enable_time, _supply_regulator, _system_uA, _reg_id) \ |
| 296 | PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ |
| 297 | | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ |
| 298 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 299 | REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ |
| 300 | _supply_regulator, _system_uA, _enable_time, _reg_id) |
| 301 | |
| 302 | #define PM8XXX_NLDO1200(_id, _name, _always_on, _pull_down, _min_uV, \ |
| 303 | _max_uV, _enable_time, _supply_regulator, _system_uA, _reg_id) \ |
| 304 | PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ |
| 305 | | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ |
| 306 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 307 | REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ |
| 308 | _supply_regulator, _system_uA, _enable_time, _reg_id) |
| 309 | |
| 310 | #define PM8XXX_SMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ |
| 311 | _enable_time, _supply_regulator, _system_uA, _reg_id) \ |
| 312 | PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ |
| 313 | | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE | \ |
| 314 | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \ |
| 315 | REGULATOR_CHANGE_DRMS, 0, _pull_down, _always_on, \ |
| 316 | _supply_regulator, _system_uA, _enable_time, _reg_id) |
| 317 | |
| 318 | #define PM8XXX_FTSMPS(_id, _name, _always_on, _pull_down, _min_uV, _max_uV, \ |
| 319 | _enable_time, _supply_regulator, _system_uA, _reg_id) \ |
| 320 | PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \ |
| 321 | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS \ |
| 322 | | REGULATOR_CHANGE_MODE, 0, _pull_down, _always_on, \ |
| 323 | _supply_regulator, _system_uA, _enable_time, _reg_id) |
| 324 | |
| 325 | #define PM8XXX_VS(_id, _name, _always_on, _pull_down, _enable_time, \ |
| 326 | _supply_regulator, _reg_id) \ |
| 327 | PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \ |
| 328 | _pull_down, _always_on, _supply_regulator, 0, _enable_time, \ |
| 329 | _reg_id) |
| 330 | |
| 331 | #define PM8XXX_VS300(_id, _name, _always_on, _pull_down, _enable_time, \ |
| 332 | _supply_regulator, _reg_id) \ |
| 333 | PM8XXX_VREG_INIT(_id, _name, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, \ |
| 334 | _pull_down, _always_on, _supply_regulator, 0, _enable_time, \ |
| 335 | _reg_id) |
| 336 | |
| 337 | #define PM8XXX_BOOST(_id, _name, _always_on, _min_uV, _max_uV, _enable_time, \ |
| 338 | _supply_regulator, _reg_id) \ |
| 339 | PM8XXX_VREG_INIT(_id, _name, _min_uV, _max_uV, 0, \ |
| 340 | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, 0, \ |
| 341 | _always_on, _supply_regulator, 0, _enable_time, _reg_id) |
| 342 | |
| 343 | /* Pin control initialization */ |
| 344 | #define PM8XXX_PC(_id, _name, _always_on, _pin_fn, _pin_ctrl, \ |
| 345 | _supply_regulator, _reg_id) \ |
| 346 | { \ |
| 347 | .init_data = { \ |
| 348 | .constraints = { \ |
| 349 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ |
| 350 | .always_on = _always_on, \ |
| 351 | .name = _name, \ |
| 352 | }, \ |
| 353 | .num_consumer_supplies = \ |
| 354 | ARRAY_SIZE(vreg_consumers_##_id##_PC), \ |
| 355 | .consumer_supplies = vreg_consumers_##_id##_PC, \ |
| 356 | .supply_regulator = _supply_regulator, \ |
| 357 | }, \ |
| 358 | .id = _reg_id, \ |
| 359 | .pin_fn = PM8XXX_VREG_PIN_FN_##_pin_fn, \ |
| 360 | .pin_ctrl = _pin_ctrl, \ |
| 361 | } |
| 362 | |
| 363 | #define RPM_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, _default_uV, \ |
| 364 | _peak_uA, _avg_uA, _pull_down, _pin_ctrl, _freq, _pin_fn, \ |
| 365 | _force_mode, _sleep_set_force_mode, _power_mode, _state, \ |
| 366 | _sleep_selectable, _always_on, _supply_regulator, _system_uA) \ |
| 367 | { \ |
| 368 | .init_data = { \ |
| 369 | .constraints = { \ |
| 370 | .valid_modes_mask = _modes, \ |
| 371 | .valid_ops_mask = _ops, \ |
| 372 | .min_uV = _min_uV, \ |
| 373 | .max_uV = _max_uV, \ |
| 374 | .input_uV = _min_uV, \ |
| 375 | .apply_uV = _apply_uV, \ |
| 376 | .always_on = _always_on, \ |
| 377 | }, \ |
| 378 | .num_consumer_supplies = \ |
| 379 | ARRAY_SIZE(vreg_consumers_##_id), \ |
| 380 | .consumer_supplies = vreg_consumers_##_id, \ |
| 381 | .supply_regulator = _supply_regulator, \ |
| 382 | }, \ |
| 383 | .id = RPM_VREG_ID_PM8917_##_id, \ |
| 384 | .default_uV = _default_uV, \ |
| 385 | .peak_uA = _peak_uA, \ |
| 386 | .avg_uA = _avg_uA, \ |
| 387 | .pull_down_enable = _pull_down, \ |
| 388 | .pin_ctrl = _pin_ctrl, \ |
| 389 | .freq = RPM_VREG_FREQ_##_freq, \ |
| 390 | .pin_fn = _pin_fn, \ |
| 391 | .force_mode = _force_mode, \ |
| 392 | .sleep_set_force_mode = _sleep_set_force_mode, \ |
| 393 | .power_mode = _power_mode, \ |
| 394 | .state = _state, \ |
| 395 | .sleep_selectable = _sleep_selectable, \ |
| 396 | .system_uA = _system_uA, \ |
| 397 | } |
| 398 | |
| 399 | #define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \ |
| 400 | _supply_regulator, _system_uA, _init_peak_uA) \ |
| 401 | RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ |
| 402 | | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \ |
| 403 | | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \ |
| 404 | | REGULATOR_CHANGE_DRMS, 0, _max_uV, _init_peak_uA, 0, _pd, \ |
| 405 | RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \ |
| 406 | RPM_VREG_FORCE_MODE_8930_NONE, \ |
| 407 | RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \ |
| 408 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ |
| 409 | _supply_regulator, _system_uA) |
| 410 | |
| 411 | #define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \ |
| 412 | _supply_regulator, _system_uA, _freq, _force_mode, \ |
| 413 | _sleep_set_force_mode) \ |
| 414 | RPM_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL \ |
| 415 | | REGULATOR_MODE_IDLE, REGULATOR_CHANGE_VOLTAGE \ |
| 416 | | REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE \ |
| 417 | | REGULATOR_CHANGE_DRMS, 0, _min_uV, _system_uA, 0, _pd, \ |
| 418 | RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \ |
| 419 | RPM_VREG_FORCE_MODE_8930_##_force_mode, \ |
| 420 | RPM_VREG_FORCE_MODE_8930_##_sleep_set_force_mode, \ |
| 421 | RPM_VREG_POWER_MODE_8930_PWM, RPM_VREG_STATE_OFF, \ |
| 422 | _sleep_selectable, _always_on, _supply_regulator, _system_uA) |
| 423 | |
| 424 | #define RPM_VS(_id, _always_on, _pd, _sleep_selectable, _supply_regulator) \ |
| 425 | RPM_INIT(_id, 0, 0, 0, REGULATOR_CHANGE_STATUS, 0, 0, 1000, 1000, _pd, \ |
| 426 | RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \ |
| 427 | RPM_VREG_FORCE_MODE_8930_NONE, \ |
| 428 | RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \ |
| 429 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ |
| 430 | _supply_regulator, 0) |
| 431 | |
| 432 | #define RPM_NCP(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \ |
| 433 | _supply_regulator, _freq) \ |
| 434 | RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \ |
| 435 | | REGULATOR_CHANGE_STATUS, 0, _max_uV, 1000, 1000, 0, \ |
| 436 | RPM_VREG_PIN_CTRL_NONE, _freq, RPM_VREG_PIN_FN_8930_NONE, \ |
| 437 | RPM_VREG_FORCE_MODE_8930_NONE, \ |
| 438 | RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \ |
| 439 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ |
| 440 | _supply_regulator, 0) |
| 441 | |
| 442 | #define RPM_CORNER(_id, _always_on, _sleep_selectable, _min_uV, _max_uV, \ |
| 443 | _supply_regulator) \ |
| 444 | RPM_INIT(_id, _min_uV, _max_uV, 0, REGULATOR_CHANGE_VOLTAGE \ |
| 445 | | REGULATOR_CHANGE_STATUS, 0, _max_uV, 0, 0, 0, \ |
| 446 | RPM_VREG_PIN_CTRL_NONE, NONE, RPM_VREG_PIN_FN_8930_NONE, \ |
| 447 | RPM_VREG_FORCE_MODE_8930_NONE, \ |
| 448 | RPM_VREG_FORCE_MODE_8930_NONE, RPM_VREG_POWER_MODE_8930_PWM, \ |
| 449 | RPM_VREG_STATE_OFF, _sleep_selectable, _always_on, \ |
| 450 | _supply_regulator, 0) |
| 451 | |
| 452 | /* Pin control initialization */ |
| 453 | #define RPM_PC_INIT(_id, _always_on, _pin_fn, _pin_ctrl, _supply_regulator) \ |
| 454 | { \ |
| 455 | .init_data = { \ |
| 456 | .constraints = { \ |
| 457 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ |
| 458 | .always_on = _always_on, \ |
| 459 | }, \ |
| 460 | .num_consumer_supplies = \ |
| 461 | ARRAY_SIZE(vreg_consumers_##_id##_PC), \ |
| 462 | .consumer_supplies = vreg_consumers_##_id##_PC, \ |
| 463 | .supply_regulator = _supply_regulator, \ |
| 464 | }, \ |
| 465 | .id = RPM_VREG_ID_PM8917_##_id##_PC, \ |
| 466 | .pin_fn = RPM_VREG_PIN_FN_8930_##_pin_fn, \ |
| 467 | .pin_ctrl = _pin_ctrl, \ |
| 468 | } |
| 469 | |
| 470 | #define GPIO_VREG(_id, _reg_name, _gpio_label, _gpio, _supply_regulator) \ |
| 471 | [MSM8930_GPIO_VREG_ID_##_id] = { \ |
| 472 | .init_data = { \ |
| 473 | .constraints = { \ |
| 474 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ |
| 475 | }, \ |
| 476 | .num_consumer_supplies = \ |
| 477 | ARRAY_SIZE(vreg_consumers_##_id), \ |
| 478 | .consumer_supplies = vreg_consumers_##_id, \ |
| 479 | .supply_regulator = _supply_regulator, \ |
| 480 | }, \ |
| 481 | .regulator_name = _reg_name, \ |
| 482 | .gpio_label = _gpio_label, \ |
| 483 | .gpio = _gpio, \ |
| 484 | } |
| 485 | |
| 486 | #define SAW_VREG_INIT(_id, _name, _min_uV, _max_uV) \ |
| 487 | { \ |
| 488 | .constraints = { \ |
| 489 | .name = _name, \ |
Michael Bohan | ee3ce19c | 2012-11-13 14:57:40 -0800 | [diff] [blame] | 490 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \ |
| 491 | REGULATOR_CHANGE_STATUS, \ |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 492 | .min_uV = _min_uV, \ |
| 493 | .max_uV = _max_uV, \ |
| 494 | }, \ |
| 495 | .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_##_id), \ |
| 496 | .consumer_supplies = vreg_consumers_##_id, \ |
| 497 | } |
| 498 | |
| 499 | /* GPIO regulator constraints */ |
| 500 | struct gpio_regulator_platform_data |
| 501 | msm8930_pm8917_gpio_regulator_pdata[] __devinitdata = { |
| 502 | /* ID vreg_name gpio_label gpio supply */ |
| 503 | }; |
| 504 | |
| 505 | /* SAW regulator constraints */ |
| 506 | struct regulator_init_data msm8930_pm8917_saw_regulator_core0_pdata = |
| 507 | /* ID vreg_name min_uV max_uV */ |
| 508 | SAW_VREG_INIT(S5, "8917_s5", 850000, 1300000); |
| 509 | struct regulator_init_data msm8930_pm8917_saw_regulator_core1_pdata = |
| 510 | SAW_VREG_INIT(S6, "8917_s6", 850000, 1300000); |
| 511 | |
| 512 | /* PM8917 regulator constraints */ |
| 513 | struct pm8xxx_regulator_platform_data |
| 514 | msm8930_pm8917_regulator_pdata[] __devinitdata = { |
| 515 | /* |
| 516 | * ID name always_on pd min_uV max_uV en_t supply |
| 517 | * system_uA reg_ID |
| 518 | */ |
| 519 | PM8XXX_NLDO1200(L26, "8921_l26", 0, 1, 375000, 1050000, 200, "8917_s7", |
| 520 | 0, 0), |
| 521 | PM8XXX_NLDO1200(L27, "8921_l27", 0, 1, 375000, 1050000, 200, "8917_s7", |
| 522 | 0, 1), |
| 523 | PM8XXX_NLDO1200(L28, "8921_l28", 0, 1, 375000, 1050000, 200, "8917_s7", |
| 524 | 0, 2), |
| 525 | PM8XXX_LDO(L29, "8921_l29", 0, 1, 1800000, 1800000, 200, "8917_s8", |
| 526 | 0, 3), |
| 527 | PM8XXX_LDO(L30, "8917_l30", 0, 1, 1800000, 1800000, 200, NULL, |
| 528 | 0, 4), |
| 529 | PM8XXX_LDO(L31, "8917_l31", 0, 1, 1800000, 1800000, 200, NULL, |
| 530 | 0, 5), |
| 531 | PM8XXX_LDO(L32, "8917_l32", 0, 1, 2800000, 2800000, 200, NULL, |
| 532 | 0, 6), |
| 533 | PM8XXX_LDO(L33, "8917_l33", 0, 1, 2800000, 2800000, 200, NULL, |
| 534 | 0, 7), |
| 535 | PM8XXX_LDO(L34, "8917_l34", 0, 1, 1800000, 1800000, 200, NULL, |
| 536 | 0, 8), |
| 537 | PM8XXX_LDO(L35, "8917_l35", 0, 1, 3000000, 3000000, 200, NULL, |
| 538 | 0, 9), |
| 539 | PM8XXX_LDO(L36, "8917_l36", 0, 1, 1800000, 1800000, 200, NULL, |
| 540 | 0, 10), |
| 541 | /* |
| 542 | * ID name always_on min_uV max_uV en_t supply reg_ID |
| 543 | */ |
| 544 | PM8XXX_BOOST(BOOST, "8917_boost", 0, 5000000, 5000000, 500, NULL, 11), |
| 545 | |
| 546 | /* ID name always_on pd en_t supply reg_ID */ |
| 547 | PM8XXX_VS300(USB_OTG, "8921_usb_otg", 0, 1, 0, "8917_boost", 12), |
| 548 | }; |
| 549 | |
| 550 | static struct rpm_regulator_init_data |
| 551 | msm8930_rpm_regulator_init_data[] __devinitdata = { |
| 552 | /* ID a_on pd ss min_uV max_uV supply sys_uA freq fm ss_fm */ |
| 553 | RPM_SMPS(S1, 1, 1, 0, 1300000, 1300000, NULL, 100000, 3p20, NONE, NONE), |
| 554 | RPM_SMPS(S2, 0, 1, 0, 1300000, 1300000, NULL, 0, 1p60, NONE, NONE), |
David Collins | 1c9d412 | 2012-12-14 10:35:38 -0800 | [diff] [blame] | 555 | RPM_SMPS(S3, 0, 1, 1, 500000, 1150000, NULL, 100000, 4p80, NONE, NONE), |
| 556 | RPM_SMPS(S4, 1, 1, 0, 1800000, 1800000, NULL, 100000, 1p60, NONE, NONE), |
David Collins | 6f250cd | 2012-10-04 12:17:31 -0700 | [diff] [blame] | 557 | RPM_SMPS(S7, 0, 1, 0, 1150000, 1150000, NULL, 100000, 3p20, AUTO, AUTO), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 558 | RPM_SMPS(S8, 1, 1, 1, 2050000, 2050000, NULL, 100000, 1p60, NONE, NONE), |
| 559 | |
| 560 | /* ID a_on pd ss min_uV max_uV supply sys_uA init_ip */ |
David Collins | bd2f4f1 | 2012-10-09 10:29:46 -0700 | [diff] [blame] | 561 | RPM_LDO(L1, 0, 1, 0, 1050000, 1050000, "8917_s4", 0, 10000), |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 562 | RPM_LDO(L2, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0), |
| 563 | RPM_LDO(L3, 0, 1, 0, 3075000, 3075000, NULL, 0, 0), |
| 564 | RPM_LDO(L4, 1, 1, 0, 1800000, 1800000, NULL, 10000, 10000), |
| 565 | RPM_LDO(L5, 0, 1, 0, 2950000, 2950000, NULL, 0, 0), |
| 566 | RPM_LDO(L6, 0, 1, 0, 2950000, 2950000, NULL, 0, 0), |
| 567 | RPM_LDO(L7, 1, 1, 0, 1850000, 2950000, NULL, 10000, 10000), |
| 568 | RPM_LDO(L8, 0, 1, 0, 2800000, 2800000, NULL, 0, 0), |
| 569 | RPM_LDO(L9, 0, 1, 0, 2850000, 2850000, NULL, 0, 0), |
| 570 | RPM_LDO(L10, 0, 1, 0, 2900000, 2900000, NULL, 0, 0), |
| 571 | RPM_LDO(L11, 0, 1, 0, 2850000, 2850000, NULL, 0, 0), |
| 572 | RPM_LDO(L12, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0), |
| 573 | RPM_LDO(L14, 0, 1, 0, 1800000, 1800000, NULL, 0, 0), |
| 574 | RPM_LDO(L15, 0, 1, 0, 1800000, 2950000, NULL, 0, 0), |
| 575 | RPM_LDO(L16, 0, 1, 0, 2850000, 2850000, NULL, 0, 0), |
| 576 | RPM_LDO(L17, 0, 1, 0, 1800000, 2950000, NULL, 0, 0), |
| 577 | RPM_LDO(L18, 0, 1, 0, 1200000, 1200000, "8917_s4", 0, 0), |
| 578 | RPM_LDO(L21, 0, 1, 0, 1900000, 1900000, "8917_s8", 0, 0), |
| 579 | RPM_LDO(L22, 0, 1, 0, 2750000, 2750000, NULL, 0, 0), |
| 580 | RPM_LDO(L23, 1, 1, 1, 1800000, 1800000, "8917_s8", 10000, 10000), |
| 581 | RPM_LDO(L24, 0, 1, 1, 500000, 1150000, "8917_s1", 10000, 10000), |
| 582 | RPM_LDO(L25, 1, 1, 0, 1250000, 1250000, "8917_s1", 10000, 10000), |
| 583 | |
| 584 | /* ID a_on pd ss supply */ |
| 585 | RPM_VS(LVS1, 0, 1, 0, "8917_s4"), |
| 586 | RPM_VS(LVS3, 0, 1, 0, "8917_s4"), |
| 587 | RPM_VS(LVS4, 0, 1, 0, "8917_s4"), |
| 588 | RPM_VS(LVS5, 0, 1, 0, "8917_s4"), |
| 589 | RPM_VS(LVS6, 0, 1, 0, "8917_s4"), |
| 590 | RPM_VS(LVS7, 0, 1, 0, "8917_s4"), |
| 591 | |
| 592 | /* ID a_on ss min_corner max_corner supply */ |
| 593 | RPM_CORNER(VDD_DIG_CORNER, 0, 1, RPM_VREG_CORNER_NONE, |
| 594 | RPM_VREG_CORNER_HIGH, NULL), |
| 595 | }; |
| 596 | |
| 597 | int msm8930_pm8917_regulator_pdata_len __devinitdata = |
| 598 | ARRAY_SIZE(msm8930_pm8917_regulator_pdata); |
| 599 | |
| 600 | #define RPM_REG_MAP(_id, _sleep_also, _voter, _supply, _dev_name) \ |
| 601 | { \ |
| 602 | .vreg_id = RPM_VREG_ID_PM8917_##_id, \ |
| 603 | .sleep_also = _sleep_also, \ |
| 604 | .voter = _voter, \ |
| 605 | .supply = _supply, \ |
| 606 | .dev_name = _dev_name, \ |
| 607 | } |
| 608 | |
| 609 | static struct rpm_regulator_consumer_mapping |
| 610 | msm_rpm_regulator_consumer_mapping[] __devinitdata = { |
| 611 | RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8930"), |
| 612 | RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8930"), |
| 613 | RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8930"), |
| 614 | RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8930"), |
| 615 | RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8930"), |
| 616 | RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8930"), |
| 617 | RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930"), |
| 618 | RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930"), |
| 619 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930"), |
| 620 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930"), |
| 621 | |
| 622 | RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8627"), |
| 623 | RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8627"), |
| 624 | RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8627"), |
| 625 | RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8627"), |
| 626 | RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8627"), |
| 627 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8627"), |
| 628 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8627"), |
| 629 | |
| 630 | RPM_REG_MAP(L23, 0, 1, "krait0_hfpll", "acpuclk-8930aa"), |
| 631 | RPM_REG_MAP(L23, 0, 2, "krait1_hfpll", "acpuclk-8930aa"), |
| 632 | RPM_REG_MAP(L23, 0, 6, "l2_hfpll", "acpuclk-8930aa"), |
| 633 | RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930aa"), |
| 634 | RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930aa"), |
| 635 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930aa"), |
| 636 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930aa"), |
Tianyi Gou | 2520b6e | 2012-10-29 19:13:53 -0700 | [diff] [blame] | 637 | |
| 638 | RPM_REG_MAP(L23, 0, 1, "krait0_l23", "acpuclk-8930ab"), |
| 639 | RPM_REG_MAP(S8, 0, 1, "krait0_s8", "acpuclk-8930ab"), |
| 640 | RPM_REG_MAP(L23, 0, 2, "krait1_l23", "acpuclk-8930ab"), |
| 641 | RPM_REG_MAP(S8, 0, 2, "krait1_s8", "acpuclk-8930ab"), |
| 642 | RPM_REG_MAP(L23, 0, 6, "l2_l23", "acpuclk-8930ab"), |
| 643 | RPM_REG_MAP(S8, 0, 6, "l2_s8", "acpuclk-8930ab"), |
| 644 | RPM_REG_MAP(L24, 0, 1, "krait0_mem", "acpuclk-8930ab"), |
| 645 | RPM_REG_MAP(L24, 0, 2, "krait1_mem", "acpuclk-8930ab"), |
| 646 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 1, "krait0_dig", "acpuclk-8930ab"), |
| 647 | RPM_REG_MAP(VDD_DIG_CORNER, 0, 2, "krait1_dig", "acpuclk-8930ab"), |
| 648 | |
David Collins | 4614cb9 | 2012-08-20 12:17:09 -0700 | [diff] [blame] | 649 | }; |
| 650 | |
| 651 | struct rpm_regulator_platform_data |
| 652 | msm8930_pm8917_rpm_regulator_pdata __devinitdata = { |
| 653 | .init_data = msm8930_rpm_regulator_init_data, |
| 654 | .num_regulators = ARRAY_SIZE(msm8930_rpm_regulator_init_data), |
| 655 | .version = RPM_VREG_VERSION_8930_PM8917, |
| 656 | .vreg_id_vdd_mem = RPM_VREG_ID_PM8917_L24, |
| 657 | .vreg_id_vdd_dig = RPM_VREG_ID_PM8917_VDD_DIG_CORNER, |
| 658 | .consumer_map = msm_rpm_regulator_consumer_mapping, |
| 659 | .consumer_map_len = ARRAY_SIZE(msm_rpm_regulator_consumer_mapping), |
| 660 | }; |