| Mark Brown | f2644a2 | 2009-04-07 19:20:14 +0100 | [diff] [blame] | 1 | /* |
| 2 | * wm8960.h -- WM8960 Soc Audio driver |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | #ifndef _WM8960_H |
| 10 | #define _WM8960_H |
| 11 | |
| 12 | /* WM8960 register space */ |
| 13 | |
| 14 | |
| 15 | #define WM8960_CACHEREGNUM 56 |
| 16 | |
| 17 | #define WM8960_LINVOL 0x0 |
| 18 | #define WM8960_RINVOL 0x1 |
| 19 | #define WM8960_LOUT1 0x2 |
| 20 | #define WM8960_ROUT1 0x3 |
| 21 | #define WM8960_CLOCK1 0x4 |
| 22 | #define WM8960_DACCTL1 0x5 |
| 23 | #define WM8960_DACCTL2 0x6 |
| 24 | #define WM8960_IFACE1 0x7 |
| 25 | #define WM8960_CLOCK2 0x8 |
| 26 | #define WM8960_IFACE2 0x9 |
| 27 | #define WM8960_LDAC 0xa |
| 28 | #define WM8960_RDAC 0xb |
| 29 | |
| 30 | #define WM8960_RESET 0xf |
| 31 | #define WM8960_3D 0x10 |
| 32 | #define WM8960_ALC1 0x11 |
| 33 | #define WM8960_ALC2 0x12 |
| 34 | #define WM8960_ALC3 0x13 |
| 35 | #define WM8960_NOISEG 0x14 |
| 36 | #define WM8960_LADC 0x15 |
| 37 | #define WM8960_RADC 0x16 |
| 38 | #define WM8960_ADDCTL1 0x17 |
| 39 | #define WM8960_ADDCTL2 0x18 |
| 40 | #define WM8960_POWER1 0x19 |
| 41 | #define WM8960_POWER2 0x1a |
| 42 | #define WM8960_ADDCTL3 0x1b |
| 43 | #define WM8960_APOP1 0x1c |
| 44 | #define WM8960_APOP2 0x1d |
| 45 | |
| 46 | #define WM8960_LINPATH 0x20 |
| 47 | #define WM8960_RINPATH 0x21 |
| 48 | #define WM8960_LOUTMIX 0x22 |
| 49 | |
| 50 | #define WM8960_ROUTMIX 0x25 |
| 51 | #define WM8960_MONOMIX1 0x26 |
| 52 | #define WM8960_MONOMIX2 0x27 |
| 53 | #define WM8960_LOUT2 0x28 |
| 54 | #define WM8960_ROUT2 0x29 |
| 55 | #define WM8960_MONO 0x2a |
| 56 | #define WM8960_INBMIX1 0x2b |
| 57 | #define WM8960_INBMIX2 0x2c |
| 58 | #define WM8960_BYPASS1 0x2d |
| 59 | #define WM8960_BYPASS2 0x2e |
| 60 | #define WM8960_POWER3 0x2f |
| 61 | #define WM8960_ADDCTL4 0x30 |
| 62 | #define WM8960_CLASSD1 0x31 |
| 63 | |
| 64 | #define WM8960_CLASSD3 0x33 |
| 65 | #define WM8960_PLL1 0x34 |
| 66 | #define WM8960_PLL2 0x35 |
| 67 | #define WM8960_PLL3 0x36 |
| 68 | #define WM8960_PLL4 0x37 |
| 69 | |
| 70 | |
| 71 | /* |
| 72 | * WM8960 Clock dividers |
| 73 | */ |
| 74 | #define WM8960_SYSCLKDIV 0 |
| 75 | #define WM8960_DACDIV 1 |
| 76 | #define WM8960_OPCLKDIV 2 |
| 77 | #define WM8960_DCLKDIV 3 |
| 78 | #define WM8960_TOCLKSEL 4 |
| Mark Brown | f2644a2 | 2009-04-07 19:20:14 +0100 | [diff] [blame] | 79 | |
| 80 | #define WM8960_SYSCLK_DIV_1 (0 << 1) |
| 81 | #define WM8960_SYSCLK_DIV_2 (2 << 1) |
| 82 | |
| 83 | #define WM8960_SYSCLK_MCLK (0 << 0) |
| 84 | #define WM8960_SYSCLK_PLL (1 << 0) |
| 85 | |
| 86 | #define WM8960_DAC_DIV_1 (0 << 3) |
| 87 | #define WM8960_DAC_DIV_1_5 (1 << 3) |
| 88 | #define WM8960_DAC_DIV_2 (2 << 3) |
| 89 | #define WM8960_DAC_DIV_3 (3 << 3) |
| 90 | #define WM8960_DAC_DIV_4 (4 << 3) |
| 91 | #define WM8960_DAC_DIV_5_5 (5 << 3) |
| 92 | #define WM8960_DAC_DIV_6 (6 << 3) |
| 93 | |
| 94 | #define WM8960_DCLK_DIV_1_5 (0 << 6) |
| 95 | #define WM8960_DCLK_DIV_2 (1 << 6) |
| 96 | #define WM8960_DCLK_DIV_3 (2 << 6) |
| 97 | #define WM8960_DCLK_DIV_4 (3 << 6) |
| 98 | #define WM8960_DCLK_DIV_6 (4 << 6) |
| 99 | #define WM8960_DCLK_DIV_8 (5 << 6) |
| 100 | #define WM8960_DCLK_DIV_12 (6 << 6) |
| 101 | #define WM8960_DCLK_DIV_16 (7 << 6) |
| 102 | |
| 103 | #define WM8960_TOCLK_F19 (0 << 1) |
| 104 | #define WM8960_TOCLK_F21 (1 << 1) |
| 105 | |
| 106 | #define WM8960_OPCLK_DIV_1 (0 << 0) |
| 107 | #define WM8960_OPCLK_DIV_2 (1 << 0) |
| 108 | #define WM8960_OPCLK_DIV_3 (2 << 0) |
| 109 | #define WM8960_OPCLK_DIV_4 (3 << 0) |
| 110 | #define WM8960_OPCLK_DIV_5_5 (4 << 0) |
| 111 | #define WM8960_OPCLK_DIV_6 (5 << 0) |
| 112 | |
| Mark Brown | f2644a2 | 2009-04-07 19:20:14 +0100 | [diff] [blame] | 113 | #endif |