blob: aa6a9a77e07722d1d4945649fce19eec6255f08f [file] [log] [blame]
Santosh Mardi1cb0c5d2012-03-24 04:08:27 +05301/*
2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
5 * Copyright (c) 2012, Code Aurora Forum. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 and
9 * only version 2 as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17#include <linux/slab.h>
18#include <linux/delay.h>
19#include <linux/init.h>
20#include <linux/bitrev.h>
21#include <linux/bitops.h>
22#include <linux/i2c.h>
23#include <linux/gpio.h>
24#include <asm/unaligned.h>
25#include <sound/core.h>
26#include <sound/control.h>
27#include <sound/pcm.h>
28#include <sound/cs8427.h>
29#include <sound/asoundef.h>
30#include <sound/pcm.h>
31#include <sound/pcm_params.h>
32#include <sound/soc.h>
33#include <sound/soc-dapm.h>
34#include <sound/tlv.h>
35
36#define CS8427_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
37 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
38 SNDRV_PCM_RATE_96000)
39
40#define CS8427_FORMATS (SNDRV_PCM_FMTBIT_S24_LE |\
41 SNDRV_PCM_FORMAT_S16_LE |\
42 SNDRV_PCM_FORMAT_S20_3LE)
43
44struct cs8427_stream {
45 struct snd_pcm_substream *substream;
46 char hw_status[CHANNEL_STATUS_SIZE]; /* hardware status */
47 char def_status[CHANNEL_STATUS_SIZE]; /* default status */
48 char pcm_status[CHANNEL_STATUS_SIZE]; /* PCM private status */
49 char hw_udata[32];
50 struct snd_kcontrol *pcm_ctl;
51};
52
53struct cs8427 {
54 struct i2c_client *client;
55 struct i2c_msg xfer_msg[2];
56 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
57 unsigned int reset_timeout;
58 struct cs8427_stream playback;
59};
60
61static int cs8427_i2c_write_device(struct cs8427 *cs8427_i2c,
62 u16 reg, u8 *value, u32 bytes)
63{
64 struct i2c_msg *msg;
65 int ret = 0;
66 u8 reg_addr = 0;
67 u8 data[bytes + 1];
68
69 if (cs8427_i2c->client == NULL) {
70 pr_err("%s: failed to get device info\n", __func__);
71 return -ENODEV;
72 }
73 reg_addr = (u8)reg;
74 msg = &cs8427_i2c->xfer_msg[0];
75 msg->addr = cs8427_i2c->client->addr;
76 msg->len = bytes + 1;
77 msg->flags = 0;
78 data[0] = reg_addr;
79 data[1] = *value;
80 msg->buf = data;
81 ret = i2c_transfer(cs8427_i2c->client->adapter,
82 cs8427_i2c->xfer_msg, 1);
83 /* Try again if the write fails
84 * checking with ebusy and number of bytes executed
85 * for write ret value should be 1
86 */
87 if ((ret != 1) || (ret == -EBUSY)) {
88 ret = i2c_transfer(
89 cs8427_i2c->client->adapter,
90 cs8427_i2c->xfer_msg, 1);
91 if ((ret != 1) || (ret < 0)) {
92 dev_err(&cs8427_i2c->client->dev,
93 "failed to write the"
94 " device reg %d\n", reg);
95 return ret;
96 }
97 }
98 return 0;
99}
100
101static int cs8427_i2c_write(struct cs8427 *chip, unsigned short reg,
102 int bytes, void *src)
103{
104 return cs8427_i2c_write_device(chip, reg, src, bytes);
105}
106static int cs8427_i2c_read_device(struct cs8427 *cs8427_i2c,
107 unsigned short reg,
108 int bytes, unsigned char *dest)
109{
110 struct i2c_msg *msg;
111 int ret = 0;
112 u8 reg_addr = 0;
113 u8 i = 0;
114
115 if (cs8427_i2c->client == NULL) {
116 pr_err("%s: failed to get device info\n", __func__);
117 return -ENODEV;
118 }
119 for (i = 0; i < bytes; i++) {
120 reg_addr = (u8)reg++;
121 msg = &cs8427_i2c->xfer_msg[0];
122 msg->addr = cs8427_i2c->client->addr;
123 msg->len = 1;
124 msg->flags = 0;
125 msg->buf = &reg_addr;
126
127 msg = &cs8427_i2c->xfer_msg[1];
128 msg->addr = cs8427_i2c->client->addr;
129 msg->len = 1;
130 msg->flags = I2C_M_RD;
131 msg->buf = dest++;
132 ret = i2c_transfer(cs8427_i2c->client->adapter,
133 cs8427_i2c->xfer_msg, 2);
134
135 /* Try again if read fails first time
136 checking with ebusy and number of bytes executed
137 for read ret value should be 2*/
138 if ((ret != 2) || (ret == -EBUSY)) {
139 ret = i2c_transfer(
140 cs8427_i2c->client->adapter,
141 cs8427_i2c->xfer_msg, 2);
142 if ((ret != 2) || (ret < 0)) {
143 dev_err(&cs8427_i2c->client->dev,
144 "failed to read cs8427"
145 " register %d\n", reg);
146 return ret;
147 }
148 }
149 }
150 return 0;
151}
152
153static int cs8427_i2c_read(struct cs8427 *chip,
154 unsigned short reg,
155 int bytes, void *dest)
156{
157 return cs8427_i2c_read_device(chip, reg,
158 bytes, dest);
159}
160
161static int cs8427_i2c_sendbytes(struct cs8427 *chip,
162 char *reg_addr, char *data,
163 int bytes)
164{
165 u32 ret = 0;
166 u8 i = 0;
167
168 if (!chip) {
169 pr_err("%s, invalid device info\n", __func__);
170 return -ENODEV;
171 }
172 if (!data) {
173 dev_err(&chip->client->dev, "%s:"
174 "invalid data pointer\n", __func__);
175 return -EINVAL;
176 }
177 for (i = 0; i < bytes; i++) {
178 ret = cs8427_i2c_write_device(chip, (*reg_addr + i),
179 &data[i], 1);
180 if (ret < 0) {
181 dev_err(&chip->client->dev,
182 "%s: failed to send the data to"
183 " cs8427 chip\n", __func__);
184 break;
185 }
186 }
187 return i;
188}
189
190/*
191 * Reset the chip using run bit, also lock PLL using ILRCK and
192 * put back AES3INPUT. This workaround is described in latest
193 * CS8427 datasheet, otherwise TXDSERIAL will not work.
194 */
195static void snd_cs8427_reset(struct cs8427 *chip)
196{
197 unsigned long end_time;
198 int data, aes3input = 0;
199 unsigned char val = 0;
200
201 if (snd_BUG_ON(!chip))
202 return;
203 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
204 CS8427_RXDAES3INPUT) /* AES3 bit is set */
205 aes3input = 1;
206 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
207 cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
208 1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
209 udelay(200);
210 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
211 cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
212 1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
213 udelay(200);
214 end_time = jiffies + chip->reset_timeout;
215 while (time_after_eq(end_time, jiffies)) {
216 data = cs8427_i2c_read(chip, CS8427_REG_RECVERRORS,
217 1, &val);
218 if (!(val & CS8427_UNLOCK))
219 break;
220 schedule_timeout_uninterruptible(1);
221 }
222 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
223 if (aes3input)
224 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
225 cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE,
226 1, &chip->regmap[CS8427_REG_CLOCKSOURCE]);
227}
228
229static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
230 struct snd_ctl_elem_info *uinfo)
231{
232 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
233 uinfo->count = 1;
234 uinfo->value.integer.min = 0;
235 uinfo->value.integer.max = 255;
236 return 0;
237}
238
239static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
240 struct snd_ctl_elem_value *ucontrol)
241{
242 struct cs8427 *chip = kcontrol->private_data;
243 unsigned char val = 0;
244 int err = 0;
245
246 err = cs8427_i2c_read(chip, kcontrol->private_value, 1, &val);
247 if (err < 0)
248 return err;
249 ucontrol->value.integer.value[0] = val;
250 return 0;
251}
252
253static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
254 struct snd_ctl_elem_info *uinfo)
255{
256 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
257 uinfo->count = 10;
258 return 0;
259}
260
261static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
262 struct snd_ctl_elem_value *ucontrol)
263{
264 struct cs8427 *chip = kcontrol->private_data;
265 unsigned char reg = CS8427_REG_QSUBCODE;
266 int err;
267 unsigned char val[20];
268
269 if (!chip) {
270 pr_err("%s: invalid device info\n", __func__);
271 return -ENODEV;
272 }
273
274 err = cs8427_i2c_write(chip, reg, 1, &val[0]);
275 if (err != 1) {
276 dev_err(&chip->client->dev, "unable to send register"
277 " 0x%x byte to CS8427\n", reg);
278 return err < 0 ? err : -EIO;
279 }
280 err = cs8427_i2c_read(chip, *ucontrol->value.bytes.data, 10, &val);
281 if (err != 10) {
282 dev_err(&chip->client->dev, "unable to read"
283 " Q-subcode bytes from CS8427\n");
284 return err < 0 ? err : -EIO;
285 }
286 return 0;
287}
288
289static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
290 struct snd_ctl_elem_info *uinfo)
291{
292 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
293 uinfo->count = 1;
294 return 0;
295}
296
297static int snd_cs8427_select_corudata(struct cs8427 *cs8427_i2c, int udata)
298{
299 struct cs8427 *chip = cs8427_i2c;
300 int err;
301
302 udata = udata ? CS8427_BSEL : 0;
303 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
304 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
305 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
306 err = cs8427_i2c_write(cs8427_i2c, CS8427_REG_CSDATABUF,
307 1, &chip->regmap[CS8427_REG_CSDATABUF]);
308 if (err < 0)
309 return err;
310 }
311 return 0;
312}
313
314static int snd_cs8427_send_corudata(struct cs8427 *obj,
315 int udata,
316 unsigned char *ndata,
317 int count)
318{
319 struct cs8427 *chip = obj;
320 char *hw_data = udata ?
321 chip->playback.hw_udata : chip->playback.hw_status;
322 char data[32];
323 int err, idx;
324 unsigned char addr = 0;
325 int ret = 0;
326
327 if (!memcmp(hw_data, ndata, count))
328 return 0;
329 err = snd_cs8427_select_corudata(chip, udata);
330 if (err < 0)
331 return err;
332 memcpy(hw_data, ndata, count);
333 if (udata) {
334 memset(data, 0, sizeof(data));
335 if (memcmp(hw_data, data, count) == 0) {
336 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
337 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
338 CS8427_EFTUI;
339 err = cs8427_i2c_write(chip, CS8427_REG_UDATABUF,
340 1, &chip->regmap[CS8427_REG_UDATABUF]);
341 return err < 0 ? err : 0;
342 }
343 }
344 idx = 0;
345 memcpy(data, ndata, CHANNEL_STATUS_SIZE);
346 /* address from where the bufferhas to write*/
347 addr = 0x20;
348 ret = cs8427_i2c_sendbytes(chip, &addr, data, count);
349 if (ret != count)
350 return -EIO;
351 return 1;
352}
353
354static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
356{
357 struct cs8427 *chip = kcontrol->private_data;
358 if (!chip) {
359 pr_err("%s: invalid device info\n", __func__);
360 return -ENODEV;
361 }
362
363 memcpy(ucontrol->value.iec958.status,
364 chip->playback.def_status, CHANNEL_STATUS_SIZE);
365 return 0;
366}
367
368static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
369 struct snd_ctl_elem_value *ucontrol)
370{
371 struct cs8427 *chip = kcontrol->private_data;
372 unsigned char *status;
373 int err, change;
374
375 if (!chip) {
376 pr_err("%s: invalid device info\n", __func__);
377 return -ENODEV;
378 }
379 status = kcontrol->private_value ?
380 chip->playback.pcm_status : chip->playback.def_status;
381
382 change = memcmp(ucontrol->value.iec958.status, status,
383 CHANNEL_STATUS_SIZE) != 0;
384
385 if (!change) {
386 memcpy(status, ucontrol->value.iec958.status,
387 CHANNEL_STATUS_SIZE);
388 err = snd_cs8427_send_corudata(chip, 0, status,
389 CHANNEL_STATUS_SIZE);
390 if (err < 0)
391 change = err;
392 }
393 return change;
394}
395
396static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
397 struct snd_ctl_elem_info *uinfo)
398{
399 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
400 uinfo->count = 1;
401 return 0;
402}
403
404static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
405 struct snd_ctl_elem_value *ucontrol)
406{
407 memset(ucontrol->value.iec958.status, 0xff, CHANNEL_STATUS_SIZE);
408 return 0;
409}
410
411static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
412 {
413 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
414 .info = snd_cs8427_in_status_info,
415 .name = "IEC958 CS8427 Input Status",
416 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
417 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
418 .get = snd_cs8427_in_status_get,
419 .private_value = 15,
420 },
421 {
422 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
423 .info = snd_cs8427_in_status_info,
424 .name = "IEC958 CS8427 Error Status",
425 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
426 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
427 .get = snd_cs8427_in_status_get,
428 .private_value = 16,
429 },
430 {
431 .access = SNDRV_CTL_ELEM_ACCESS_READ,
432 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
433 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, MASK),
434 .info = snd_cs8427_spdif_mask_info,
435 .get = snd_cs8427_spdif_mask_get,
436 },
437 {
438 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
439 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK,
440 DEFAULT),
441 .info = snd_cs8427_spdif_info,
442 .get = snd_cs8427_spdif_get,
443 .put = snd_cs8427_spdif_put,
444 .private_value = 0
445 },
446 {
447 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
448 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
449 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
450 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
451 .info = snd_cs8427_spdif_info,
452 .get = snd_cs8427_spdif_get,
453 .put = snd_cs8427_spdif_put,
454 .private_value = 1
455 },
456 {
457 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
458 .info = snd_cs8427_qsubcode_info,
459 .name = "IEC958 Q-subcode Capture Default",
460 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
461 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
462 .get = snd_cs8427_qsubcode_get
463 }
464};
465
466static int cs8427_hw_params(struct snd_pcm_substream *substream,
467 struct snd_pcm_hw_params *params,
468 struct snd_soc_dai *dai)
469{
470 struct snd_soc_codec *codec = dai->codec;
471 struct cs8427 *chip = dev_get_drvdata(codec->dev);
472 int ret = 0;
473 if (chip == NULL) {
474 pr_err("invalid device private data\n");
475 return -ENODEV;
476 }
477 chip->regmap[CS8427_REG_SERIALINPUT] &= CS8427_BITWIDTH_MASK;
478 switch (params_format(params)) {
479 case SNDRV_PCM_FORMAT_S16_LE:
480 chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES16;
481 ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
482 &chip->regmap[CS8427_REG_SERIALINPUT]);
483 break;
484 case SNDRV_PCM_FORMAT_S20_3LE:
485 chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES20;
486 ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
487 &chip->regmap[CS8427_REG_SERIALINPUT]);
488
489 break;
490 case SNDRV_PCM_FORMAT_S24_LE:
491 chip->regmap[CS8427_REG_SERIALINPUT] |= CS8427_SIRES24;
492 ret = cs8427_i2c_write(chip, CS8427_REG_SERIALINPUT, 1,
493 &chip->regmap[CS8427_REG_SERIALINPUT]);
494 break;
495 default:
496 pr_err("invalid format\n");
497 break;
498 }
499 dev_dbg(&chip->client->dev,
500 "%s(): substream = %s stream = %d\n" , __func__,
501 substream->name, substream->stream);
502 return ret;
503}
504
505static int snd_cs8427_iec958_register_kcontrol(struct cs8427 *cs8427,
506 struct snd_card *card)
507{
508 struct cs8427 *chip = cs8427;
509 struct snd_kcontrol *kctl;
510 unsigned int idx;
511 int err;
512
513 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
514 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], chip);
515 if (kctl == NULL)
516 return -ENOMEM;
517 err = snd_ctl_add(card, kctl);
518 if (err < 0) {
519 dev_err(&chip->client->dev,
520 "failed to add the kcontrol\n");
521 return err;
522 }
523 }
524 return err;
525}
526
527static int cs8427_startup(struct snd_pcm_substream *substream,
528 struct snd_soc_dai *dai)
529{
530 struct cs8427 *chip = dev_get_drvdata(dai->codec->dev);
531
532 if (chip == NULL) {
533 pr_err("invalid device private data\n");
534 return -ENODEV;
535 }
536 /*
537 * we need to make the pll lock for the I2S tranfers
538 * reset the cs8427 chip for this.
539 */
540 snd_cs8427_reset(chip);
541 dev_dbg(&chip->client->dev,
542 "%s(): substream = %s stream = %d\n" , __func__,
543 substream->name, substream->stream);
544
545 return 0;
546}
547
548static void cs8427_shutdown(struct snd_pcm_substream *substream,
549 struct snd_soc_dai *dai)
550{
551 struct cs8427 *chip = dev_get_drvdata(dai->codec->dev);
552
553 if (chip == NULL) {
554 pr_err("invalid device private data\n");
555 return;
556 }
557 dev_dbg(&chip->client->dev,
558 "%s(): substream = %s stream = %d\n" , __func__,
559 substream->name, substream->stream);
560}
561
562static int cs8427_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
563{
564 struct cs8427 *chip = dev_get_drvdata(dai->codec->dev);
565
566 if (chip == NULL) {
567 pr_err("invalid device private data\n");
568 return -ENODEV;
569 }
570 dev_dbg(&chip->client->dev, "%s\n", __func__);
571 return 0;
572}
573
574static struct snd_soc_dai_ops cs8427_dai_ops = {
575 .startup = cs8427_startup,
576 .shutdown = cs8427_shutdown,
577 .hw_params = cs8427_hw_params,
578 .set_fmt = cs8427_set_dai_fmt,
579};
580
581static struct snd_soc_dai_driver cs8427_dai[] = {
582 {
583 .name = "spdif_rx",
584 .id = 1,
585 .playback = {
586 .stream_name = "AIF1 Playback",
587 .rates = CS8427_RATES,
588 .formats = CS8427_FORMATS,
589 .rate_max = 192000,
590 .rate_min = 8000,
591 .channels_min = 1,
592 .channels_max = 2,
593 },
594 .ops = &cs8427_dai_ops,
595 },
596};
597
598
599static unsigned int cs8427_soc_i2c_read(struct snd_soc_codec *codec,
600 unsigned int reg)
601{
602 struct cs8427 *chip = dev_get_drvdata(codec->dev);
603
604 if (chip == NULL) {
605 pr_err("invalid device private data\n");
606 return -ENODEV;
607 }
608 dev_dbg(&chip->client->dev, "cs8427 soc i2c read\n");
609 return 0;
610}
611
612static int cs8427_soc_i2c_write(struct snd_soc_codec *codec,
613 unsigned int reg, unsigned int value)
614{
615 struct cs8427 *chip = dev_get_drvdata(codec->dev);
616
617 if (chip == NULL) {
618 pr_err("invalid device private data\n");
619 return -ENODEV;
620 }
621 dev_dbg(&chip->client->dev, "cs8427 soc i2c write\n");
622 return 0;
623}
624
625static int cs8427_soc_probe(struct snd_soc_codec *codec)
626{
627 int ret = 0;
628 struct cs8427 *chip;
629 codec->control_data = dev_get_drvdata(codec->dev);
630 chip = codec->control_data;
631
632 if (chip == NULL) {
633 pr_err("invalid device private data\n");
634 return -ENODEV;
635 }
636 snd_cs8427_iec958_register_kcontrol(chip, codec->card->snd_card);
637 dev_set_drvdata(codec->dev, chip);
638 return ret;
639}
640
641static struct snd_soc_codec_driver soc_codec_dev_cs8427 = {
642 .read = cs8427_soc_i2c_read,
643 .write = cs8427_soc_i2c_write,
644 .probe = cs8427_soc_probe,
645};
646
647int poweron_cs8427(struct cs8427 *chip)
648{
649 struct cs8427_platform_data *pdata = chip->client->dev.platform_data;
650 int ret = 0;
651
Santosh Mardi695be0d2012-04-10 23:21:12 +0530652 /*enable the 100KHz level shifter*/
653 if (pdata->enable) {
654 ret = pdata->enable(1);
655 if (ret < 0) {
656 dev_err(&chip->client->dev,
657 "failed to enable the level shifter\n");
658 return ret;
659 }
660 }
661
Santosh Mardi1cb0c5d2012-03-24 04:08:27 +0530662 ret = gpio_request(pdata->reset_gpio, "cs8427 reset");
663 if (ret < 0) {
664 dev_err(&chip->client->dev,
665 "failed to request the gpio %d\n",
666 pdata->reset_gpio);
667 return ret;
668 }
669 /*bring the chip out of reset*/
670 gpio_direction_output(pdata->reset_gpio, 1);
671 msleep(20);
672 gpio_direction_output(pdata->reset_gpio, 0);
673 msleep(20);
674 gpio_direction_output(pdata->reset_gpio, 1);
675 msleep(20);
676 return ret;
677}
678
679static __devinit int cs8427_i2c_probe(struct i2c_client *client,
680 const struct i2c_device_id *id)
681{
682 static unsigned char initvals1[] = {
683 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
684 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
685 * TCBL=output
686 */
687 CS8427_SWCLK | CS8427_TCBLDIR,
688 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
689 * normal stereo operation
690 */
691 0x08,
692 /* CS8427_REG_DATAFLOW:
693 * AES3 Transmitter data source => Serial Audio input port
694 * Serial audio output port data source => reserved
695 */
696 CS8427_TXDSERIAL,
697 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
698 * output time base = OMCK, input time base = recovered input clock,
699 * recovered input clock source is ILRCK changed to AES3INPUT
700 * (workaround, see snd_cs8427_reset)
701 */
702 CS8427_RXDILRCK | CS8427_OUTC,
703 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
704 * 24-bit, 64*Fsi
705 */
706 CS8427_SIDEL | CS8427_SILRPOL | CS8427_SORES16,
707 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
708 * = I2S, 24-bit, 64*Fsi
709 */
710 CS8427_SODEL | CS8427_SOLRPOL | CS8427_SIRES16,
711 };
712 static unsigned char initvals2[] = {
713 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
714 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
715 * biphase, parity status bits
716 * CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,
717 */
718 0xff, /* set everything */
719 /* CS8427_REG_CSDATABUF:
720 * Registers 32-55 window to CS buffer
721 * Inhibit D->E transfers from overwriting first 5 bytes of CS data.
722 * Inhibit D->E transfers (all) of CS data.
723 * Allow E->F transfer of CS data.
724 * One byte mode; both A/B channels get same written CB data.
725 * A channel info is output to chip's EMPH* pin.
726 */
727 CS8427_CBMR | CS8427_DETCI,
728 /* CS8427_REG_UDATABUF:
729 * Use internal buffer to transmit User (U) data.
730 * Chip's U pin is an output.
731 * Transmit all O's for user data.
732 * Inhibit D->E transfers.
733 * Inhibit E->F transfers.
734 */
735 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
736 };
737 int err;
738 unsigned char buf[CHANNEL_STATUS_SIZE];
739 unsigned char val = 0;
740 char addr = 0;
741 unsigned int reset_timeout = 100;
742 int ret = 0;
743 struct cs8427 *chip;
744
745 if (!client) {
746 pr_err("%s: invalid device info\n", __func__);
747 return -EINVAL;
748 }
749
750 chip = kzalloc(sizeof(struct cs8427), GFP_KERNEL);
751 if (chip == NULL) {
752 dev_err(&client->dev,
753 "%s: error, allocation failed\n", __func__);
754 return -ENOMEM;
755 }
756
757 chip->client = client;
758
759 dev_set_drvdata(&chip->client->dev, chip);
760
761 ret = poweron_cs8427(chip);
762
763 if (ret) {
764 dev_err(&chip->client->dev,
765 "failed to bring chip out of reset\n");
766 return -ENODEV;
767 }
768
769 err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER, 1, &val);
770 if (err < 0) {
771 /* give second chance */
772 dev_err(&chip->client->dev,
773 "failed to read cs8427 trying once again\n");
774 err = cs8427_i2c_read(chip, CS8427_REG_ID_AND_VER,
775 1, &val);
776 if (err < 0) {
777 dev_err(&chip->client->dev,
778 "failed to read version number\n");
779 return -ENODEV;
780 }
781 dev_dbg(&chip->client->dev,
782 "version number read = %x\n", val);
783 }
784 if (val != CS8427_VER8427A) {
785 dev_err(&chip->client->dev,
786 "unable to find CS8427 signature "
787 "(expected 0x%x, read 0x%x),\n",
788 CS8427_VER8427A, val);
789 dev_err(&chip->client->dev,
790 " initialization is not completed\n");
791 return -EFAULT;
792 }
793 val = 0;
794 /* turn off run bit while making changes to configuration */
795 err = cs8427_i2c_write(chip, CS8427_REG_CLOCKSOURCE, 1, &val);
796 if (err < 0)
797 goto __fail;
798 /* send initial values */
799 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
800 addr = 1;
801 err = cs8427_i2c_sendbytes(chip, &addr, &initvals1[1], 6);
802 if (err != 6) {
803 err = err < 0 ? err : -EIO;
804 goto __fail;
805 }
806 /* Turn off CS8427 interrupt stuff that is not used in hardware */
807 memset(buf, 0, 7);
808 /* from address 9 to 15 */
809 addr = 9;
810 err = cs8427_i2c_sendbytes(chip, &addr, buf, 7);
811 if (err != 7)
812 goto __fail;
813 /* send transfer initialization sequence */
814 addr = 0x11;
815 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
816 err = cs8427_i2c_sendbytes(chip, &addr, &initvals2[1], 3);
817 if (err != 3) {
818 err = err < 0 ? err : -EIO;
819 goto __fail;
820 }
821 /* write default channel status bytes */
822 put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
823 memset(buf + 4, 0, CHANNEL_STATUS_SIZE - 4);
824 if (snd_cs8427_send_corudata(chip, 0, buf, CHANNEL_STATUS_SIZE) < 0)
825 goto __fail;
826 memcpy(chip->playback.def_status, buf, CHANNEL_STATUS_SIZE);
827 memcpy(chip->playback.pcm_status, buf, CHANNEL_STATUS_SIZE);
828
829 /* turn on run bit and rock'n'roll */
830 if (reset_timeout < 1)
831 reset_timeout = 1;
832 chip->reset_timeout = reset_timeout;
833 snd_cs8427_reset(chip);
834
835 ret = snd_soc_register_codec(&chip->client->dev, &soc_codec_dev_cs8427,
836 cs8427_dai, ARRAY_SIZE(cs8427_dai));
837
838 return 0;
839
840__fail:
841 kfree(chip);
842 return err < 0 ? err : -EIO;
843}
844
845static int __devexit cs8427_remove(struct i2c_client *client)
846{
847 struct cs8427 *chip;
848 struct cs8427_platform_data *pdata;
849 chip = dev_get_drvdata(&client->dev);
850 if (!chip) {
851 pr_err("invalid device info\n");
852 return -ENODEV;
853 }
854 pdata = chip->client->dev.platform_data;
855 gpio_free(pdata->reset_gpio);
Santosh Mardi695be0d2012-04-10 23:21:12 +0530856 if (pdata->enable)
857 pdata->enable(0);
Santosh Mardi1cb0c5d2012-03-24 04:08:27 +0530858 kfree(chip);
859 return 0;
860}
861
862static struct i2c_device_id cs8427_id_table[] = {
863 {"cs8427", CS8427_ADDR0},
864 {"cs8427", CS8427_ADDR2},
865 {"cs8427", CS8427_ADDR3},
866 {"cs8427", CS8427_ADDR4},
867 {"cs8427", CS8427_ADDR5},
868 {"cs8427", CS8427_ADDR6},
869 {"cs8427", CS8427_ADDR7},
870 {}
871};
872MODULE_DEVICE_TABLE(i2c, cs8427_id_table);
873
874static struct i2c_driver cs8427_i2c_driver = {
875 .driver = {
876 .owner = THIS_MODULE,
877 .name = "cs8427-spdif",
878 },
879 .id_table = cs8427_id_table,
880 .probe = cs8427_i2c_probe,
881 .remove = __devexit_p(cs8427_remove),
882};
883
884static int __init cs8427_module_init(void)
885{
886 int ret = 0;
887 ret = i2c_add_driver(&cs8427_i2c_driver);
888 if (ret != 0)
889 pr_err("failed to add the I2C driver\n");
890 return ret;
891}
892
893static void __exit cs8427_module_exit(void)
894{
895 pr_info("module exit\n");
896}
897
898module_init(cs8427_module_init)
899module_exit(cs8427_module_exit)
900
901MODULE_DESCRIPTION("CS8427 interface driver");
902MODULE_LICENSE("GPL v2");