blob: 4cdfd33f5842cbf7e546bd8e18b71a8d85aed714 [file] [log] [blame]
Maheshkumar Sivasubramanian4ac23762011-11-02 10:03:06 -06001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12#ifndef __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
13#define __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
14
15#include "spm.h"
16
17struct msm_spm_driver_data {
Praveen Chidambaramaa9d52b2012-04-02 11:09:47 -060018 uint32_t major;
19 uint32_t minor;
20 uint32_t ver_reg;
21 uint32_t vctl_port;
22 uint32_t phase_port;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023 void __iomem *reg_base_addr;
24 uint32_t vctl_timeout_us;
Praveen Chidambaramaa9d52b2012-04-02 11:09:47 -060025 uint32_t avs_timeout_us;
Maheshkumar Sivasubramanian059e0912011-09-29 12:56:39 -060026 uint32_t reg_shadow[MSM_SPM_REG_NR];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027 uint32_t *reg_seq_entry_shadow;
Praveen Chidambaramaa9d52b2012-04-02 11:09:47 -060028 uint32_t *reg_offsets;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070029};
30
31int msm_spm_drv_init(struct msm_spm_driver_data *dev,
32 struct msm_spm_platform_data *data);
Maheshkumar Sivasubramanian4ac23762011-11-02 10:03:06 -060033void msm_spm_drv_reinit(struct msm_spm_driver_data *dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034int msm_spm_drv_set_low_power_mode(struct msm_spm_driver_data *dev,
35 uint32_t addr);
36int msm_spm_drv_set_vdd(struct msm_spm_driver_data *dev,
37 unsigned int vlevel);
Praveen Chidambaram4133ba12012-09-29 22:27:03 -060038uint32_t msm_spm_drv_get_sts_curr_pmic_data(
39 struct msm_spm_driver_data *dev);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070040int msm_spm_drv_write_seq_data(struct msm_spm_driver_data *dev,
Praveen Chidambaramaa9d52b2012-04-02 11:09:47 -060041 uint8_t *cmd, uint32_t *offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042void msm_spm_drv_flush_seq_entry(struct msm_spm_driver_data *dev);
43int msm_spm_drv_set_spm_enable(struct msm_spm_driver_data *dev,
44 bool enable);
Praveen Chidambaramaa9d52b2012-04-02 11:09:47 -060045int msm_spm_drv_set_phase(struct msm_spm_driver_data *dev,
46 unsigned int phase_cnt);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070047#endif