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Chris Leechc13c8262006-05-23 17:18:44 -07001#
2# DMA engine configuration
3#
4
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07005menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08006 bool "DMA Engine support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07007 depends on (PCI && X86) || ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
8 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08009 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver.
Chris Leechc13c8262006-05-23 17:18:44 -070013
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070014if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070015
Chris Leech0bbd5f42006-05-23 17:35:34 -070016comment "DMA Devices"
17
18config INTEL_IOATDMA
19 tristate "Intel I/OAT DMA support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070020 depends on PCI && X86
21 select DMA_ENGINE
22 select DCA
23 help
24 Enable support for the Intel(R) I/OAT DMA engine present
25 in recent Intel Xeon chipsets.
26
27 Say Y here if you have such a chipset.
28
29 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -070030
31config INTEL_IOP_ADMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070032 tristate "Intel IOP ADMA support"
33 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
Dan Williamsc2110922007-01-02 13:52:26 -070034 select ASYNC_CORE
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070035 select DMA_ENGINE
36 help
37 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -070038
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070039config DMA_ENGINE
40 bool
41
42comment "DMA Clients"
43 depends on DMA_ENGINE
44
45config NET_DMA
46 bool "Network: TCP receive copy offload"
47 depends on DMA_ENGINE && NET
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070048 help
49 This enables the use of DMA engines in the network stack to
50 offload receive copy-to-user operations, freeing CPU cycles.
51 Since this is the main user of the DMA engine, it should be enabled;
52 say Y here.
53
54endif