Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved. |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/module.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/io.h> |
| 17 | #include <linux/ioport.h> |
| 18 | #include <linux/delay.h> |
| 19 | #include <linux/elf.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/clk.h> |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 22 | #include <linux/workqueue.h> |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 23 | |
| 24 | #include <mach/msm_iomap.h> |
| 25 | |
| 26 | #include "peripheral-loader.h" |
| 27 | #include "scm-pas.h" |
| 28 | |
| 29 | #define QDSP6SS_RST_EVB 0x0000 |
| 30 | #define QDSP6SS_STRAP_TCM 0x001C |
| 31 | #define QDSP6SS_STRAP_AHB 0x0020 |
| 32 | |
| 33 | #define LCC_Q6_FUNC (MSM_LPASS_CLK_CTL_BASE + 0x001C) |
| 34 | #define LV_EN BIT(27) |
| 35 | #define STOP_CORE BIT(26) |
| 36 | #define CLAMP_IO BIT(25) |
| 37 | #define Q6SS_PRIV_ARES BIT(24) |
| 38 | #define Q6SS_SS_ARES BIT(23) |
| 39 | #define Q6SS_ISDB_ARES BIT(22) |
| 40 | #define Q6SS_ETM_ARES BIT(21) |
| 41 | #define Q6_JTAG_CRC_EN BIT(20) |
| 42 | #define Q6_JTAG_INV_EN BIT(19) |
| 43 | #define Q6_JTAG_CXC_EN BIT(18) |
| 44 | #define Q6_PXO_CRC_EN BIT(17) |
| 45 | #define Q6_PXO_INV_EN BIT(16) |
| 46 | #define Q6_PXO_CXC_EN BIT(15) |
| 47 | #define Q6_PXO_SLEEP_EN BIT(14) |
| 48 | #define Q6_SLP_CRC_EN BIT(13) |
| 49 | #define Q6_SLP_INV_EN BIT(12) |
| 50 | #define Q6_SLP_CXC_EN BIT(11) |
| 51 | #define CORE_ARES BIT(10) |
| 52 | #define CORE_L1_MEM_CORE_EN BIT(9) |
| 53 | #define CORE_TCM_MEM_CORE_EN BIT(8) |
| 54 | #define CORE_TCM_MEM_PERPH_EN BIT(7) |
| 55 | #define CORE_GFM4_CLK_EN BIT(2) |
| 56 | #define CORE_GFM4_RES BIT(1) |
| 57 | #define RAMP_PLL_SRC_SEL BIT(0) |
| 58 | |
| 59 | #define Q6_STRAP_AHB_UPPER (0x290 << 12) |
| 60 | #define Q6_STRAP_AHB_LOWER 0x280 |
| 61 | #define Q6_STRAP_TCM_BASE (0x28C << 15) |
| 62 | #define Q6_STRAP_TCM_CONFIG 0x28B |
| 63 | |
| 64 | #define PROXY_VOTE_TIMEOUT 10000 |
| 65 | |
| 66 | struct q6v3_data { |
| 67 | void __iomem *base; |
| 68 | unsigned long start_addr; |
Stephen Boyd | 6d67d25 | 2011-09-27 11:50:05 -0700 | [diff] [blame^] | 69 | struct pil_device *pil; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 70 | struct clk *pll; |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 71 | struct delayed_work work; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | static int nop_verify_blob(struct pil_desc *pil, u32 phy_addr, size_t size) |
| 75 | { |
| 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | static int pil_q6v3_init_image(struct pil_desc *pil, const u8 *metadata, |
| 80 | size_t size) |
| 81 | { |
| 82 | const struct elf32_hdr *ehdr = (struct elf32_hdr *)metadata; |
| 83 | struct q6v3_data *drv = dev_get_drvdata(pil->dev); |
| 84 | drv->start_addr = ehdr->e_entry; |
| 85 | return 0; |
| 86 | } |
| 87 | |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 88 | static void q6v3_remove_proxy_votes(struct work_struct *work) |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 89 | { |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 90 | struct q6v3_data *drv = container_of(work, struct q6v3_data, work.work); |
| 91 | clk_disable_unprepare(drv->pll); |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 92 | } |
| 93 | |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 94 | static int q6v3_make_proxy_votes(struct device *dev) |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 95 | { |
| 96 | int ret; |
| 97 | struct q6v3_data *drv = dev_get_drvdata(dev); |
| 98 | |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 99 | ret = clk_prepare_enable(drv->pll); |
| 100 | if (ret) { |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 101 | dev_err(dev, "Failed to enable PLL\n"); |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 102 | return ret; |
| 103 | } |
| 104 | schedule_delayed_work(&drv->work, msecs_to_jiffies(PROXY_VOTE_TIMEOUT)); |
| 105 | return 0; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | static void q6v3_remove_proxy_votes_now(struct q6v3_data *drv) |
| 109 | { |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 110 | flush_delayed_work(&drv->work); |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 111 | } |
| 112 | |
| 113 | static int pil_q6v3_reset(struct pil_desc *pil) |
| 114 | { |
| 115 | u32 reg; |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 116 | int ret; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 117 | struct q6v3_data *drv = dev_get_drvdata(pil->dev); |
| 118 | |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 119 | ret = q6v3_make_proxy_votes(pil->dev); |
| 120 | if (ret) |
| 121 | return ret; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 122 | |
| 123 | /* Put Q6 into reset */ |
| 124 | reg = readl_relaxed(LCC_Q6_FUNC); |
| 125 | reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE | |
| 126 | CORE_ARES; |
| 127 | reg &= ~CORE_GFM4_CLK_EN; |
| 128 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 129 | |
| 130 | /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */ |
| 131 | usleep_range(20, 30); |
| 132 | |
| 133 | /* Turn on Q6 memory */ |
| 134 | reg |= CORE_GFM4_CLK_EN | CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN | |
| 135 | CORE_TCM_MEM_PERPH_EN; |
| 136 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 137 | |
| 138 | /* Turn on Q6 core clocks and take core out of reset */ |
| 139 | reg &= ~(CLAMP_IO | Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | |
| 140 | CORE_ARES); |
| 141 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 142 | |
| 143 | /* Wait for clocks to be enabled */ |
| 144 | mb(); |
| 145 | /* Program boot address */ |
| 146 | writel_relaxed((drv->start_addr >> 12) & 0xFFFFF, |
| 147 | drv->base + QDSP6SS_RST_EVB); |
| 148 | |
| 149 | writel_relaxed(Q6_STRAP_TCM_CONFIG | Q6_STRAP_TCM_BASE, |
| 150 | drv->base + QDSP6SS_STRAP_TCM); |
| 151 | writel_relaxed(Q6_STRAP_AHB_UPPER | Q6_STRAP_AHB_LOWER, |
| 152 | drv->base + QDSP6SS_STRAP_AHB); |
| 153 | |
| 154 | /* Wait for addresses to be programmed before starting Q6 */ |
| 155 | mb(); |
| 156 | |
| 157 | /* Start Q6 instruction execution */ |
| 158 | reg &= ~STOP_CORE; |
| 159 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | static int pil_q6v3_shutdown(struct pil_desc *pil) |
| 165 | { |
| 166 | u32 reg; |
| 167 | struct q6v3_data *drv = dev_get_drvdata(pil->dev); |
| 168 | |
| 169 | /* Put Q6 into reset */ |
| 170 | reg = readl_relaxed(LCC_Q6_FUNC); |
| 171 | reg |= Q6SS_SS_ARES | Q6SS_ISDB_ARES | Q6SS_ETM_ARES | STOP_CORE | |
| 172 | CORE_ARES; |
| 173 | reg &= ~CORE_GFM4_CLK_EN; |
| 174 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 175 | |
| 176 | /* Wait 8 AHB cycles for Q6 to be fully reset (AHB = 1.5Mhz) */ |
| 177 | usleep_range(20, 30); |
| 178 | |
| 179 | /* Turn off Q6 memory */ |
| 180 | reg &= ~(CORE_L1_MEM_CORE_EN | CORE_TCM_MEM_CORE_EN | |
| 181 | CORE_TCM_MEM_PERPH_EN); |
| 182 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 183 | |
| 184 | reg |= CLAMP_IO; |
| 185 | writel_relaxed(reg, LCC_Q6_FUNC); |
| 186 | |
| 187 | q6v3_remove_proxy_votes_now(drv); |
| 188 | |
| 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | static struct pil_reset_ops pil_q6v3_ops = { |
| 193 | .init_image = pil_q6v3_init_image, |
| 194 | .verify_blob = nop_verify_blob, |
| 195 | .auth_and_reset = pil_q6v3_reset, |
| 196 | .shutdown = pil_q6v3_shutdown, |
| 197 | }; |
| 198 | |
| 199 | static int pil_q6v3_init_image_trusted(struct pil_desc *pil, |
| 200 | const u8 *metadata, size_t size) |
| 201 | { |
| 202 | return pas_init_image(PAS_Q6, metadata, size); |
| 203 | } |
| 204 | |
| 205 | static int pil_q6v3_reset_trusted(struct pil_desc *pil) |
| 206 | { |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 207 | int ret; |
| 208 | ret = q6v3_make_proxy_votes(pil->dev); |
| 209 | if (ret) |
| 210 | return ret; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 211 | return pas_auth_and_reset(PAS_Q6); |
| 212 | } |
| 213 | |
| 214 | static int pil_q6v3_shutdown_trusted(struct pil_desc *pil) |
| 215 | { |
| 216 | int ret; |
| 217 | struct q6v3_data *drv = dev_get_drvdata(pil->dev); |
| 218 | |
| 219 | ret = pas_shutdown(PAS_Q6); |
| 220 | if (ret) |
| 221 | return ret; |
| 222 | |
| 223 | q6v3_remove_proxy_votes_now(drv); |
| 224 | |
| 225 | return 0; |
| 226 | } |
| 227 | |
| 228 | static struct pil_reset_ops pil_q6v3_ops_trusted = { |
| 229 | .init_image = pil_q6v3_init_image_trusted, |
| 230 | .verify_blob = nop_verify_blob, |
| 231 | .auth_and_reset = pil_q6v3_reset_trusted, |
| 232 | .shutdown = pil_q6v3_shutdown_trusted, |
| 233 | }; |
| 234 | |
| 235 | static int __devinit pil_q6v3_driver_probe(struct platform_device *pdev) |
| 236 | { |
| 237 | struct q6v3_data *drv; |
| 238 | struct resource *res; |
| 239 | struct pil_desc *desc; |
| 240 | |
| 241 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 242 | if (!res) |
| 243 | return -EINVAL; |
| 244 | |
| 245 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); |
| 246 | if (!drv) |
| 247 | return -ENOMEM; |
| 248 | platform_set_drvdata(pdev, drv); |
| 249 | |
| 250 | drv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); |
| 251 | if (!drv->base) |
| 252 | return -ENOMEM; |
| 253 | |
| 254 | desc = devm_kzalloc(&pdev->dev, sizeof(*desc), GFP_KERNEL); |
| 255 | if (!drv) |
| 256 | return -ENOMEM; |
| 257 | |
| 258 | drv->pll = clk_get(&pdev->dev, "pll4"); |
| 259 | if (IS_ERR(drv->pll)) |
| 260 | return PTR_ERR(drv->pll); |
| 261 | |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 262 | desc->name = "q6"; |
| 263 | desc->dev = &pdev->dev; |
Stephen Boyd | 6d67d25 | 2011-09-27 11:50:05 -0700 | [diff] [blame^] | 264 | desc->owner = THIS_MODULE; |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 265 | |
| 266 | if (pas_supported(PAS_Q6) > 0) { |
| 267 | desc->ops = &pil_q6v3_ops_trusted; |
| 268 | dev_info(&pdev->dev, "using secure boot\n"); |
| 269 | } else { |
| 270 | desc->ops = &pil_q6v3_ops; |
| 271 | dev_info(&pdev->dev, "using non-secure boot\n"); |
| 272 | } |
| 273 | |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 274 | INIT_DELAYED_WORK(&drv->work, q6v3_remove_proxy_votes); |
| 275 | |
Stephen Boyd | 6d67d25 | 2011-09-27 11:50:05 -0700 | [diff] [blame^] | 276 | drv->pil = msm_pil_register(desc); |
| 277 | if (IS_ERR(drv->pil)) { |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 278 | flush_delayed_work_sync(&drv->work); |
Stephen Boyd | 6d67d25 | 2011-09-27 11:50:05 -0700 | [diff] [blame^] | 279 | return PTR_ERR(drv->pil); |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 280 | } |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 281 | return 0; |
| 282 | } |
| 283 | |
| 284 | static int __devexit pil_q6v3_driver_exit(struct platform_device *pdev) |
| 285 | { |
| 286 | struct q6v3_data *drv = platform_get_drvdata(pdev); |
Stephen Boyd | 6d67d25 | 2011-09-27 11:50:05 -0700 | [diff] [blame^] | 287 | msm_pil_unregister(drv->pil); |
Stephen Boyd | 4f8b7e2 | 2012-01-24 13:31:29 -0800 | [diff] [blame] | 288 | flush_delayed_work_sync(&drv->work); |
Stephen Boyd | 3acc9e4 | 2011-09-28 16:46:40 -0700 | [diff] [blame] | 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | static struct platform_driver pil_q6v3_driver = { |
| 293 | .probe = pil_q6v3_driver_probe, |
| 294 | .remove = __devexit_p(pil_q6v3_driver_exit), |
| 295 | .driver = { |
| 296 | .name = "pil_qdsp6v3", |
| 297 | .owner = THIS_MODULE, |
| 298 | }, |
| 299 | }; |
| 300 | |
| 301 | static int __init pil_q6v3_init(void) |
| 302 | { |
| 303 | return platform_driver_register(&pil_q6v3_driver); |
| 304 | } |
| 305 | module_init(pil_q6v3_init); |
| 306 | |
| 307 | static void __exit pil_q6v3_exit(void) |
| 308 | { |
| 309 | platform_driver_unregister(&pil_q6v3_driver); |
| 310 | } |
| 311 | module_exit(pil_q6v3_exit); |
| 312 | |
| 313 | MODULE_DESCRIPTION("Support for booting QDSP6v3 (Hexagon) processors"); |
| 314 | MODULE_LICENSE("GPL v2"); |