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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_promise.c - Promise SATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
Mikael Pettersson5595ddf2007-10-30 14:21:55 +01005 * Mikael Pettersson <mikpe@it.uu.se>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Please ALWAYS copy linux-ide@vger.kernel.org
7 * on emails.
8 *
9 * Copyright 2003-2004 Red Hat, Inc.
10 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware information only available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/pci.h>
38#include <linux/init.h>
39#include <linux/blkdev.h>
40#include <linux/delay.h>
41#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050042#include <linux/device.h>
Mikael Pettersson95006182007-01-09 10:51:46 +010043#include <scsi/scsi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070044#include <scsi/scsi_host.h>
Jeff Garzik193515d2005-11-07 00:59:37 -050045#include <scsi/scsi_cmnd.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include <linux/libata.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include "sata_promise.h"
48
49#define DRV_NAME "sata_promise"
Mikael Petterssonc07a9c42008-03-23 18:41:01 +010050#define DRV_VERSION "2.12"
Linus Torvalds1da177e2005-04-16 15:20:36 -070051
52enum {
Tejun Heoeca25dc2007-04-17 23:44:07 +090053 PDC_MAX_PORTS = 4,
Tejun Heo0d5ff562007-02-01 15:06:36 +090054 PDC_MMIO_BAR = 3,
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +010055 PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */
Tejun Heo0d5ff562007-02-01 15:06:36 +090056
Mikael Pettersson821d22c2008-05-17 18:48:15 +020057 /* host register offsets (from host->iomap[PDC_MMIO_BAR]) */
58 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
59 PDC_FLASH_CTL = 0x44, /* Flash control register */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020060 PDC_PCI_CTL = 0x48, /* PCI control/status reg */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020061 PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
62 PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */
63 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
64 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */
65
66 /* per-port ATA register offsets (from ap->ioaddr.cmd_addr) */
Mikael Pettersson95006182007-01-09 10:51:46 +010067 PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
68 PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
69 PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */
70 PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */
71 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
72 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
73 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
Mikael Pettersson73fd4562007-01-10 09:32:34 +010074 PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
Linus Torvalds1da177e2005-04-16 15:20:36 -070076 PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */
77 PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020078
79 /* per-port SATA register offsets (from ap->ioaddr.scr_addr) */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020080 PDC_SATA_ERROR = 0x04,
Mikael Pettersson821d22c2008-05-17 18:48:15 +020081 PDC_PHYMODE4 = 0x14,
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020082 PDC_LINK_LAYER_ERRORS = 0x6C,
83 PDC_FPDMA_CTLSTAT = 0xD8,
84 PDC_INTERNAL_DEBUG_1 = 0xF8, /* also used for PATA */
85 PDC_INTERNAL_DEBUG_2 = 0xFC, /* also used for PATA */
86
87 /* PDC_FPDMA_CTLSTAT bit definitions */
88 PDC_FPDMA_CTLSTAT_RESET = 1 << 3,
89 PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG = 1 << 10,
90 PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG = 1 << 11,
Linus Torvalds1da177e2005-04-16 15:20:36 -070091
Mikael Pettersson176efb02007-03-14 09:51:35 +010092 /* PDC_GLOBAL_CTL bit definitions */
93 PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */
94 PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */
95 PDC_DH_ERR = (1 << 10), /* PCI error while loading data */
96 PDC2_HTO_ERR = (1 << 12), /* host bus timeout */
97 PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */
98 PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */
99 PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */
100 PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */
101 PDC_DRIVE_ERR = (1 << 21), /* drive error */
102 PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */
103 PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */
104 PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR,
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400105 PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR |
106 PDC2_ATA_DMA_CNT_ERR,
107 PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR |
108 PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR |
109 PDC_DRIVE_ERR | PDC_PCI_SYS_ERR |
110 PDC1_ERR_MASK | PDC2_ERR_MASK,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
112 board_2037x = 0, /* FastTrak S150 TX2plus */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900113 board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */
114 board_20319 = 2, /* FastTrak S150 TX4 */
115 board_20619 = 3, /* FastTrak TX4000 */
116 board_2057x = 4, /* SATAII150 Tx2plus */
Mikael Petterssond0e58032007-06-19 21:53:30 +0200117 board_2057x_pata = 5, /* SATAII150 Tx2plus PATA port */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900118 board_40518 = 6, /* SATAII150 Tx4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
Luke Kosewski6340f012006-01-28 12:39:29 -0500120 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
Mikael Pettersson95006182007-01-09 10:51:46 +0100122 /* Sequence counter control registers bit definitions */
123 PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */
124
125 /* Feature register values */
126 PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */
127 PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */
128
129 /* Device/Head register values */
130 PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */
131
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100132 /* PDC_CTLSTAT bit definitions */
133 PDC_DMA_ENABLE = (1 << 7),
134 PDC_IRQ_DISABLE = (1 << 10),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 PDC_RESET = (1 << 11), /* HDMA reset */
Jeff Garzik50630192005-12-13 02:29:45 -0500136
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300137 PDC_COMMON_FLAGS = ATA_FLAG_PIO_POLLING,
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100138
Tejun Heoeca25dc2007-04-17 23:44:07 +0900139 /* ap->flags bits */
140 PDC_FLAG_GEN_II = (1 << 24),
141 PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */
142 PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143};
144
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145struct pdc_port_priv {
146 u8 *pkt;
147 dma_addr_t pkt_dma;
148};
149
Tejun Heo82ef04f2008-07-31 17:02:40 +0900150static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
151static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200152static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900153static int pdc_common_port_start(struct ata_port *ap);
154static int pdc_sata_port_start(struct ata_port *ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155static void pdc_qc_prep(struct ata_queued_cmd *qc);
Jeff Garzik057ace52005-10-22 14:27:05 -0400156static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
157static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
Mikael Pettersson95006182007-01-09 10:51:46 +0100158static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100159static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160static void pdc_irq_clear(struct ata_port *ap);
Tejun Heo9363c382008-04-07 22:47:16 +0900161static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100162static void pdc_freeze(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100163static void pdc_sata_freeze(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100164static void pdc_thaw(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100165static void pdc_sata_thaw(struct ata_port *ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100166static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
167 unsigned long deadline);
168static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
169 unsigned long deadline);
Tejun Heoa1efdab2008-03-25 12:22:50 +0900170static void pdc_error_handler(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100171static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100172static int pdc_pata_cable_detect(struct ata_port *ap);
173static int pdc_sata_cable_detect(struct ata_port *ap);
Jeff Garzik374b1872005-08-30 05:42:52 -0400174
Jeff Garzik193515d2005-11-07 00:59:37 -0500175static struct scsi_host_template pdc_ata_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900176 ATA_BASE_SHT(DRV_NAME),
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100177 .sg_tablesize = PDC_MAX_PRD,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 .dma_boundary = ATA_DMA_BOUNDARY,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179};
180
Tejun Heo029cfd62008-03-25 12:22:49 +0900181static const struct ata_port_operations pdc_common_ops = {
182 .inherits = &ata_sff_port_ops,
Mikael Pettersson95006182007-01-09 10:51:46 +0100183
Tejun Heo5682ed32008-04-07 22:47:16 +0900184 .sff_tf_load = pdc_tf_load_mmio,
185 .sff_exec_command = pdc_exec_command_mmio,
Tejun Heo029cfd62008-03-25 12:22:49 +0900186 .check_atapi_dma = pdc_check_atapi_dma,
Mikael Pettersson95006182007-01-09 10:51:46 +0100187 .qc_prep = pdc_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +0900188 .qc_issue = pdc_qc_issue,
Alan Coxc96f1732009-03-24 10:23:46 +0000189
Tejun Heo5682ed32008-04-07 22:47:16 +0900190 .sff_irq_clear = pdc_irq_clear,
Alan Coxc96f1732009-03-24 10:23:46 +0000191 .lost_interrupt = ATA_OP_NULL,
Tejun Heo029cfd62008-03-25 12:22:49 +0900192
193 .post_internal_cmd = pdc_post_internal_cmd,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900194 .error_handler = pdc_error_handler,
Tejun Heo029cfd62008-03-25 12:22:49 +0900195};
196
197static struct ata_port_operations pdc_sata_ops = {
198 .inherits = &pdc_common_ops,
199 .cable_detect = pdc_sata_cable_detect,
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100200 .freeze = pdc_sata_freeze,
201 .thaw = pdc_sata_thaw,
Mikael Pettersson95006182007-01-09 10:51:46 +0100202 .scr_read = pdc_sata_scr_read,
203 .scr_write = pdc_sata_scr_write,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900204 .port_start = pdc_sata_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100205 .hardreset = pdc_sata_hardreset,
Mikael Pettersson95006182007-01-09 10:51:46 +0100206};
207
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200208/* First-generation chips need a more restrictive ->check_atapi_dma op,
209 and ->freeze/thaw that ignore the hotplug controls. */
Tejun Heo029cfd62008-03-25 12:22:49 +0900210static struct ata_port_operations pdc_old_sata_ops = {
211 .inherits = &pdc_sata_ops,
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200212 .freeze = pdc_freeze,
213 .thaw = pdc_thaw,
Mikael Pettersson724114a2007-03-11 21:20:43 +0100214 .check_atapi_dma = pdc_old_sata_check_atapi_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215};
216
Tejun Heo029cfd62008-03-25 12:22:49 +0900217static struct ata_port_operations pdc_pata_ops = {
218 .inherits = &pdc_common_ops,
219 .cable_detect = pdc_pata_cable_detect,
Mikael Pettersson53873732007-02-11 23:19:53 +0100220 .freeze = pdc_freeze,
221 .thaw = pdc_thaw,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900222 .port_start = pdc_common_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100223 .softreset = pdc_pata_softreset,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400224};
225
Arjan van de Ven98ac62d2005-11-28 10:06:23 +0100226static const struct ata_port_info pdc_port_info[] = {
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100227 [board_2037x] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900229 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
230 PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100231 .pio_mask = ATA_PIO4,
232 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400233 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100234 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 },
236
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100237 [board_2037x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900238 {
239 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100240 .pio_mask = ATA_PIO4,
241 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400242 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900243 .port_ops = &pdc_pata_ops,
244 },
245
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100246 [board_20319] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900248 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
249 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100250 .pio_mask = ATA_PIO4,
251 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400252 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100253 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400255
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100256 [board_20619] =
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400257 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900258 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
259 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100260 .pio_mask = ATA_PIO4,
261 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400262 .udma_mask = ATA_UDMA6,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400263 .port_ops = &pdc_pata_ops,
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400264 },
Yusuf Iskenderoglu5a46fe82006-01-17 08:06:21 -0500265
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100266 [board_2057x] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500267 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900268 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
269 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100270 .pio_mask = ATA_PIO4,
271 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400272 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500273 .port_ops = &pdc_sata_ops,
274 },
275
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100276 [board_2057x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900277 {
Jeff Garzikbb312232007-05-24 23:35:59 -0400278 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
Tejun Heoeca25dc2007-04-17 23:44:07 +0900279 PDC_FLAG_GEN_II,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100280 .pio_mask = ATA_PIO4,
281 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400282 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900283 .port_ops = &pdc_pata_ops,
284 },
285
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100286 [board_40518] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500287 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900288 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
289 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100290 .pio_mask = ATA_PIO4,
291 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400292 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500293 .port_ops = &pdc_sata_ops,
294 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295};
296
Jeff Garzik3b7d6972005-11-10 11:04:11 -0500297static const struct pci_device_id pdc_ata_pci_tbl[] = {
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400298 { PCI_VDEVICE(PROMISE, 0x3371), board_2037x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400299 { PCI_VDEVICE(PROMISE, 0x3373), board_2037x },
300 { PCI_VDEVICE(PROMISE, 0x3375), board_2037x },
301 { PCI_VDEVICE(PROMISE, 0x3376), board_2037x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100302 { PCI_VDEVICE(PROMISE, 0x3570), board_2057x },
303 { PCI_VDEVICE(PROMISE, 0x3571), board_2057x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400304 { PCI_VDEVICE(PROMISE, 0x3574), board_2057x },
Mikael Petterssond324d4622006-12-06 09:55:43 +0100305 { PCI_VDEVICE(PROMISE, 0x3577), board_2057x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100306 { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400307 { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400309 { PCI_VDEVICE(PROMISE, 0x3318), board_20319 },
310 { PCI_VDEVICE(PROMISE, 0x3319), board_20319 },
Mikael Pettersson7f9992a2007-08-29 10:25:37 +0200311 { PCI_VDEVICE(PROMISE, 0x3515), board_40518 },
312 { PCI_VDEVICE(PROMISE, 0x3519), board_40518 },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100313 { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 },
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400314 { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315
Jeff Garzik54bb3a92006-09-27 22:20:11 -0400316 { PCI_VDEVICE(PROMISE, 0x6629), board_20619 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400317
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 { } /* terminate list */
319};
320
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321static struct pci_driver pdc_ata_pci_driver = {
322 .name = DRV_NAME,
323 .id_table = pdc_ata_pci_tbl,
324 .probe = pdc_ata_init_one,
325 .remove = ata_pci_remove_one,
326};
327
Mikael Pettersson724114a2007-03-11 21:20:43 +0100328static int pdc_common_port_start(struct ata_port *ap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700329{
Jeff Garzikcca39742006-08-24 03:19:22 -0400330 struct device *dev = ap->host->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 struct pdc_port_priv *pp;
332 int rc;
333
Tejun Heoc7087652010-05-10 21:41:34 +0200334 /* we use the same prd table as bmdma, allocate it */
335 rc = ata_bmdma_port_start(ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 if (rc)
337 return rc;
338
Tejun Heo24dc5f32007-01-20 16:00:28 +0900339 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
340 if (!pp)
341 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342
Tejun Heo24dc5f32007-01-20 16:00:28 +0900343 pp->pkt = dmam_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
344 if (!pp->pkt)
345 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346
347 ap->private_data = pp;
348
Mikael Pettersson724114a2007-03-11 21:20:43 +0100349 return 0;
350}
351
352static int pdc_sata_port_start(struct ata_port *ap)
353{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100354 int rc;
355
356 rc = pdc_common_port_start(ap);
357 if (rc)
358 return rc;
359
Mikael Pettersson599b7202006-12-01 10:55:58 +0100360 /* fix up PHYMODE4 align timing */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900361 if (ap->flags & PDC_FLAG_GEN_II) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200362 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
Mikael Pettersson599b7202006-12-01 10:55:58 +0100363 unsigned int tmp;
364
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200365 tmp = readl(sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100366 tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200367 writel(tmp, sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100368 }
369
Linus Torvalds1da177e2005-04-16 15:20:36 -0700370 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371}
372
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200373static void pdc_fpdma_clear_interrupt_flag(struct ata_port *ap)
374{
375 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
376 u32 tmp;
377
378 tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT);
379 tmp |= PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG;
380 tmp |= PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG;
381
382 /* It's not allowed to write to the entire FPDMA_CTLSTAT register
383 when NCQ is running. So do a byte-sized write to bits 10 and 11. */
384 writeb(tmp >> 8, sata_mmio + PDC_FPDMA_CTLSTAT + 1);
385 readb(sata_mmio + PDC_FPDMA_CTLSTAT + 1); /* flush */
386}
387
388static void pdc_fpdma_reset(struct ata_port *ap)
389{
390 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
391 u8 tmp;
392
393 tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT);
394 tmp &= 0x7F;
395 tmp |= PDC_FPDMA_CTLSTAT_RESET;
396 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
397 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
398 udelay(100);
399 tmp &= ~PDC_FPDMA_CTLSTAT_RESET;
400 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
401 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
402
403 pdc_fpdma_clear_interrupt_flag(ap);
404}
405
406static void pdc_not_at_command_packet_phase(struct ata_port *ap)
407{
408 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
409 unsigned int i;
410 u32 tmp;
411
412 /* check not at ASIC packet command phase */
413 for (i = 0; i < 100; ++i) {
414 writel(0, sata_mmio + PDC_INTERNAL_DEBUG_1);
415 tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2);
416 if ((tmp & 0xF) != 1)
417 break;
418 udelay(100);
419 }
420}
421
422static void pdc_clear_internal_debug_record_error_register(struct ata_port *ap)
423{
424 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
425
426 writel(0xffffffff, sata_mmio + PDC_SATA_ERROR);
427 writel(0xffff0000, sata_mmio + PDC_LINK_LAYER_ERRORS);
428}
429
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430static void pdc_reset_port(struct ata_port *ap)
431{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200432 void __iomem *ata_ctlstat_mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 unsigned int i;
434 u32 tmp;
435
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200436 if (ap->flags & PDC_FLAG_GEN_II)
437 pdc_not_at_command_packet_phase(ap);
438
439 tmp = readl(ata_ctlstat_mmio);
440 tmp |= PDC_RESET;
441 writel(tmp, ata_ctlstat_mmio);
442
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 for (i = 11; i > 0; i--) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200444 tmp = readl(ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445 if (tmp & PDC_RESET)
446 break;
447
448 udelay(100);
449
450 tmp |= PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200451 writel(tmp, ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452 }
453
454 tmp &= ~PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200455 writel(tmp, ata_ctlstat_mmio);
456 readl(ata_ctlstat_mmio); /* flush */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200457
458 if (sata_scr_valid(&ap->link) && (ap->flags & PDC_FLAG_GEN_II)) {
459 pdc_fpdma_reset(ap);
460 pdc_clear_internal_debug_record_error_register(ap);
461 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462}
463
Mikael Pettersson724114a2007-03-11 21:20:43 +0100464static int pdc_pata_cable_detect(struct ata_port *ap)
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400465{
466 u8 tmp;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200467 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400468
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200469 tmp = readb(ata_mmio + PDC_CTLSTAT + 3);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100470 if (tmp & 0x01)
471 return ATA_CBL_PATA40;
472 return ATA_CBL_PATA80;
473}
474
475static int pdc_sata_cable_detect(struct ata_port *ap)
476{
Alan Coxe2a97522007-03-08 23:06:47 +0000477 return ATA_CBL_SATA;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400478}
479
Tejun Heo82ef04f2008-07-31 17:02:40 +0900480static int pdc_sata_scr_read(struct ata_link *link,
481 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100483 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900484 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900485 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900486 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700487}
488
Tejun Heo82ef04f2008-07-31 17:02:40 +0900489static int pdc_sata_scr_write(struct ata_link *link,
490 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700491{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100492 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900493 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900494 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900495 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496}
497
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100498static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +0100499{
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100500 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200501 dma_addr_t sg_table = ap->bmdma_prd_dma;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100502 unsigned int cdb_len = qc->dev->cdb_len;
503 u8 *cdb = qc->cdb;
504 struct pdc_port_priv *pp = ap->private_data;
505 u8 *buf = pp->pkt;
Al Viro826cd152008-03-25 05:18:11 +0000506 __le32 *buf32 = (__le32 *) buf;
Tejun Heo46a67142007-12-04 13:33:30 +0900507 unsigned int dev_sel, feature;
Mikael Pettersson95006182007-01-09 10:51:46 +0100508
509 /* set control bits (byte 0), zero delay seq id (byte 3),
510 * and seq id (byte 2)
511 */
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100512 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -0500513 case ATAPI_PROT_DMA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100514 if (!(qc->tf.flags & ATA_TFLAG_WRITE))
515 buf32[0] = cpu_to_le32(PDC_PKT_READ);
516 else
517 buf32[0] = 0;
518 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500519 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100520 buf32[0] = cpu_to_le32(PDC_PKT_NODATA);
521 break;
522 default:
523 BUG();
524 break;
525 }
Mikael Pettersson95006182007-01-09 10:51:46 +0100526 buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */
527 buf32[2] = 0; /* no next-packet */
528
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100529 /* select drive */
Tejun Heo46a67142007-12-04 13:33:30 +0900530 if (sata_scr_valid(&ap->link))
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100531 dev_sel = PDC_DEVICE_SATA;
Tejun Heo46a67142007-12-04 13:33:30 +0900532 else
533 dev_sel = qc->tf.device;
534
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100535 buf[12] = (1 << 5) | ATA_REG_DEVICE;
536 buf[13] = dev_sel;
537 buf[14] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_CLEAR_BSY;
538 buf[15] = dev_sel; /* once more, waiting for BSY to clear */
539
540 buf[16] = (1 << 5) | ATA_REG_NSECT;
Tejun Heo46a67142007-12-04 13:33:30 +0900541 buf[17] = qc->tf.nsect;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100542 buf[18] = (1 << 5) | ATA_REG_LBAL;
Tejun Heo46a67142007-12-04 13:33:30 +0900543 buf[19] = qc->tf.lbal;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100544
545 /* set feature and byte counter registers */
Tejun Heo0dc36882007-12-18 16:34:43 -0500546 if (qc->tf.protocol != ATAPI_PROT_DMA)
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100547 feature = PDC_FEATURE_ATAPI_PIO;
Tejun Heo46a67142007-12-04 13:33:30 +0900548 else
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100549 feature = PDC_FEATURE_ATAPI_DMA;
Tejun Heo46a67142007-12-04 13:33:30 +0900550
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100551 buf[20] = (1 << 5) | ATA_REG_FEATURE;
552 buf[21] = feature;
553 buf[22] = (1 << 5) | ATA_REG_BYTEL;
Tejun Heo46a67142007-12-04 13:33:30 +0900554 buf[23] = qc->tf.lbam;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100555 buf[24] = (1 << 5) | ATA_REG_BYTEH;
Tejun Heo46a67142007-12-04 13:33:30 +0900556 buf[25] = qc->tf.lbah;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100557
558 /* send ATAPI packet command 0xA0 */
559 buf[26] = (1 << 5) | ATA_REG_CMD;
Tejun Heo46a67142007-12-04 13:33:30 +0900560 buf[27] = qc->tf.command;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100561
562 /* select drive and check DRQ */
563 buf[28] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_WAIT_DRDY;
564 buf[29] = dev_sel;
565
Mikael Pettersson95006182007-01-09 10:51:46 +0100566 /* we can represent cdb lengths 2/4/6/8/10/12/14/16 */
567 BUG_ON(cdb_len & ~0x1E);
568
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100569 /* append the CDB as the final part */
570 buf[30] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG;
571 memcpy(buf+31, cdb, cdb_len);
Mikael Pettersson95006182007-01-09 10:51:46 +0100572}
573
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100574/**
575 * pdc_fill_sg - Fill PCI IDE PRD table
576 * @qc: Metadata associated with taskfile to be transferred
577 *
578 * Fill PCI IDE PRD (scatter-gather) table with segments
579 * associated with the current disk command.
580 * Make sure hardware does not choke on it.
581 *
582 * LOCKING:
583 * spin_lock_irqsave(host lock)
584 *
585 */
586static void pdc_fill_sg(struct ata_queued_cmd *qc)
587{
588 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200589 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100590 struct scatterlist *sg;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100591 const u32 SG_COUNT_ASIC_BUG = 41*4;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900592 unsigned int si, idx;
593 u32 len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100594
595 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
596 return;
597
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100598 idx = 0;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900599 for_each_sg(qc->sg, sg, qc->n_elem, si) {
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100600 u32 addr, offset;
Harvey Harrison6903c0f2008-02-13 21:14:08 -0800601 u32 sg_len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100602
603 /* determine if physical DMA addr spans 64K boundary.
604 * Note h/w doesn't support 64-bit, so we unconditionally
605 * truncate dma_addr_t to u32.
606 */
607 addr = (u32) sg_dma_address(sg);
608 sg_len = sg_dma_len(sg);
609
610 while (sg_len) {
611 offset = addr & 0xffff;
612 len = sg_len;
613 if ((offset + sg_len) > 0x10000)
614 len = 0x10000 - offset;
615
Tejun Heof60d7012010-05-10 21:41:41 +0200616 prd[idx].addr = cpu_to_le32(addr);
617 prd[idx].flags_len = cpu_to_le32(len & 0xffff);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100618 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
619
620 idx++;
621 sg_len -= len;
622 addr += len;
623 }
624 }
625
Tejun Heof60d7012010-05-10 21:41:41 +0200626 len = le32_to_cpu(prd[idx - 1].flags_len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100627
Tejun Heoff2aeb12007-12-05 16:43:11 +0900628 if (len > SG_COUNT_ASIC_BUG) {
629 u32 addr;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100630
Tejun Heoff2aeb12007-12-05 16:43:11 +0900631 VPRINTK("Splitting last PRD.\n");
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100632
Tejun Heof60d7012010-05-10 21:41:41 +0200633 addr = le32_to_cpu(prd[idx - 1].addr);
634 prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900635 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100636
Tejun Heoff2aeb12007-12-05 16:43:11 +0900637 addr = addr + len - SG_COUNT_ASIC_BUG;
638 len = SG_COUNT_ASIC_BUG;
Tejun Heof60d7012010-05-10 21:41:41 +0200639 prd[idx].addr = cpu_to_le32(addr);
640 prd[idx].flags_len = cpu_to_le32(len);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900641 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100642
Tejun Heoff2aeb12007-12-05 16:43:11 +0900643 idx++;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100644 }
Tejun Heoff2aeb12007-12-05 16:43:11 +0900645
Tejun Heof60d7012010-05-10 21:41:41 +0200646 prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100647}
648
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649static void pdc_qc_prep(struct ata_queued_cmd *qc)
650{
651 struct pdc_port_priv *pp = qc->ap->private_data;
652 unsigned int i;
653
654 VPRINTK("ENTER\n");
655
656 switch (qc->tf.protocol) {
657 case ATA_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100658 pdc_fill_sg(qc);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200659 /*FALLTHROUGH*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700660 case ATA_PROT_NODATA:
Tejun Heof60d7012010-05-10 21:41:41 +0200661 i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 qc->dev->devno, pp->pkt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663 if (qc->tf.flags & ATA_TFLAG_LBA48)
664 i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
665 else
666 i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667 pdc_pkt_footer(&qc->tf, pp->pkt, i);
668 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500669 case ATAPI_PROT_PIO:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100670 pdc_fill_sg(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100671 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500672 case ATAPI_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100673 pdc_fill_sg(qc);
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100674 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -0500675 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100676 pdc_atapi_pkt(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100677 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 default:
679 break;
680 }
681}
682
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100683static int pdc_is_sataii_tx4(unsigned long flags)
684{
685 const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS;
686 return (flags & mask) == mask;
687}
688
689static unsigned int pdc_port_no_to_ata_no(unsigned int port_no,
690 int is_sataii_tx4)
691{
692 static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2};
693 return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no;
694}
695
696static unsigned int pdc_sata_nr_ports(const struct ata_port *ap)
697{
698 return (ap->flags & PDC_FLAG_4_PORTS) ? 4 : 2;
699}
700
701static unsigned int pdc_sata_ata_port_to_ata_no(const struct ata_port *ap)
702{
703 const struct ata_host *host = ap->host;
704 unsigned int nr_ports = pdc_sata_nr_ports(ap);
705 unsigned int i;
706
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200707 for (i = 0; i < nr_ports && host->ports[i] != ap; ++i)
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100708 ;
709 BUG_ON(i >= nr_ports);
710 return pdc_port_no_to_ata_no(i, pdc_is_sataii_tx4(ap->flags));
711}
712
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100713static void pdc_freeze(struct ata_port *ap)
714{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200715 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100716 u32 tmp;
717
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200718 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100719 tmp |= PDC_IRQ_DISABLE;
720 tmp &= ~PDC_DMA_ENABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200721 writel(tmp, ata_mmio + PDC_CTLSTAT);
722 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100723}
724
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100725static void pdc_sata_freeze(struct ata_port *ap)
726{
727 struct ata_host *host = ap->host;
728 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200729 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100730 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
731 u32 hotplug_status;
732
733 /* Disable hotplug events on this port.
734 *
735 * Locking:
736 * 1) hotplug register accesses must be serialised via host->lock
737 * 2) ap->lock == &ap->host->lock
738 * 3) ->freeze() and ->thaw() are called with ap->lock held
739 */
740 hotplug_status = readl(host_mmio + hotplug_offset);
741 hotplug_status |= 0x11 << (ata_no + 16);
742 writel(hotplug_status, host_mmio + hotplug_offset);
743 readl(host_mmio + hotplug_offset); /* flush */
744
745 pdc_freeze(ap);
746}
747
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100748static void pdc_thaw(struct ata_port *ap)
749{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200750 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100751 u32 tmp;
752
753 /* clear IRQ */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200754 readl(ata_mmio + PDC_COMMAND);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100755
756 /* turn IRQ back on */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200757 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100758 tmp &= ~PDC_IRQ_DISABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200759 writel(tmp, ata_mmio + PDC_CTLSTAT);
760 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100761}
762
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100763static void pdc_sata_thaw(struct ata_port *ap)
764{
765 struct ata_host *host = ap->host;
766 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200767 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100768 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
769 u32 hotplug_status;
770
771 pdc_thaw(ap);
772
773 /* Enable hotplug events on this port.
774 * Locking: see pdc_sata_freeze().
775 */
776 hotplug_status = readl(host_mmio + hotplug_offset);
777 hotplug_status |= 0x11 << ata_no;
778 hotplug_status &= ~(0x11 << (ata_no + 16));
779 writel(hotplug_status, host_mmio + hotplug_offset);
780 readl(host_mmio + hotplug_offset); /* flush */
781}
782
Mikael Petterssoncadef672008-10-31 08:03:55 +0100783static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
784 unsigned long deadline)
785{
786 pdc_reset_port(link->ap);
787 return ata_sff_softreset(link, class, deadline);
788}
789
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200790static unsigned int pdc_ata_port_to_ata_no(const struct ata_port *ap)
791{
792 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
793 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
794
795 /* ata_mmio == host_mmio + 0x200 + ata_no * 0x80 */
796 return (ata_mmio - host_mmio - 0x200) / 0x80;
797}
798
799static void pdc_hard_reset_port(struct ata_port *ap)
800{
801 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
802 void __iomem *pcictl_b1_mmio = host_mmio + PDC_PCI_CTL + 1;
803 unsigned int ata_no = pdc_ata_port_to_ata_no(ap);
804 u8 tmp;
805
806 spin_lock(&ap->host->lock);
807
808 tmp = readb(pcictl_b1_mmio);
809 tmp &= ~(0x10 << ata_no);
810 writeb(tmp, pcictl_b1_mmio);
811 readb(pcictl_b1_mmio); /* flush */
812 udelay(100);
813 tmp |= (0x10 << ata_no);
814 writeb(tmp, pcictl_b1_mmio);
815 readb(pcictl_b1_mmio); /* flush */
816
817 spin_unlock(&ap->host->lock);
818}
819
Mikael Petterssoncadef672008-10-31 08:03:55 +0100820static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
821 unsigned long deadline)
822{
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200823 if (link->ap->flags & PDC_FLAG_GEN_II)
824 pdc_not_at_command_packet_phase(link->ap);
825 /* hotplug IRQs should have been masked by pdc_sata_freeze() */
826 pdc_hard_reset_port(link->ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100827 pdc_reset_port(link->ap);
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200828
829 /* sata_promise can't reliably acquire the first D2H Reg FIS
830 * after hardreset. Do non-waiting hardreset and request
831 * follow-up SRST.
832 */
833 return sata_std_hardreset(link, class, deadline);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100834}
835
Tejun Heoa1efdab2008-03-25 12:22:50 +0900836static void pdc_error_handler(struct ata_port *ap)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100837{
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100838 if (!(ap->pflags & ATA_PFLAG_FROZEN))
839 pdc_reset_port(ap);
840
Tejun Heofe06e5f2010-05-10 21:41:39 +0200841 ata_sff_error_handler(ap);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100842}
843
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100844static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
845{
846 struct ata_port *ap = qc->ap;
847
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100848 /* make DMA engine forget about the failed command */
Tejun Heoa51d6442007-03-20 15:24:11 +0900849 if (qc->flags & ATA_QCFLAG_FAILED)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100850 pdc_reset_port(ap);
851}
852
Mikael Pettersson176efb02007-03-14 09:51:35 +0100853static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
854 u32 port_status, u32 err_mask)
855{
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900856 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100857 unsigned int ac_err_mask = 0;
858
859 ata_ehi_clear_desc(ehi);
860 ata_ehi_push_desc(ehi, "port_status 0x%08x", port_status);
861 port_status &= err_mask;
862
863 if (port_status & PDC_DRIVE_ERR)
864 ac_err_mask |= AC_ERR_DEV;
865 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
Mikael Petterssona2342f42010-01-09 23:32:06 +0100866 ac_err_mask |= AC_ERR_OTHER;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100867 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
868 ac_err_mask |= AC_ERR_ATA_BUS;
869 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
870 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR))
871 ac_err_mask |= AC_ERR_HOST_BUS;
872
Tejun Heo936fd732007-08-06 18:36:23 +0900873 if (sata_scr_valid(&ap->link)) {
Tejun Heoda3dbb12007-07-16 14:29:40 +0900874 u32 serror;
875
Tejun Heo82ef04f2008-07-31 17:02:40 +0900876 pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror);
Tejun Heoda3dbb12007-07-16 14:29:40 +0900877 ehi->serror |= serror;
878 }
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200879
Mikael Pettersson176efb02007-03-14 09:51:35 +0100880 qc->err_mask |= ac_err_mask;
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200881
882 pdc_reset_port(ap);
Mikael Pettersson8ffcfd92007-05-06 22:12:31 +0200883
884 ata_port_abort(ap);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100885}
886
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200887static unsigned int pdc_host_intr(struct ata_port *ap,
888 struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700889{
Albert Leea22e2eb2005-12-05 15:38:02 +0800890 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200891 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100892 u32 port_status, err_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893
Mikael Pettersson176efb02007-03-14 09:51:35 +0100894 err_mask = PDC_ERR_MASK;
Tejun Heoeca25dc2007-04-17 23:44:07 +0900895 if (ap->flags & PDC_FLAG_GEN_II)
Mikael Pettersson176efb02007-03-14 09:51:35 +0100896 err_mask &= ~PDC1_ERR_MASK;
897 else
898 err_mask &= ~PDC2_ERR_MASK;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200899 port_status = readl(ata_mmio + PDC_GLOBAL_CTL);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100900 if (unlikely(port_status & err_mask)) {
901 pdc_error_intr(ap, qc, port_status, err_mask);
902 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700903 }
904
905 switch (qc->tf.protocol) {
906 case ATA_PROT_DMA:
907 case ATA_PROT_NODATA:
Tejun Heo0dc36882007-12-18 16:34:43 -0500908 case ATAPI_PROT_DMA:
909 case ATAPI_PROT_NODATA:
Albert Leea22e2eb2005-12-05 15:38:02 +0800910 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
911 ata_qc_complete(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700912 handled = 1;
913 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200914 default:
Albert Leeee500aa2005-09-27 17:34:38 +0800915 ap->stats.idle_irq++;
916 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200917 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918
Albert Leeee500aa2005-09-27 17:34:38 +0800919 return handled;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920}
921
922static void pdc_irq_clear(struct ata_port *ap)
923{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200924 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700925
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200926 readl(ata_mmio + PDC_COMMAND);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927}
928
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400929static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930{
Jeff Garzikcca39742006-08-24 03:19:22 -0400931 struct ata_host *host = dev_instance;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700932 struct ata_port *ap;
933 u32 mask = 0;
934 unsigned int i, tmp;
935 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200936 void __iomem *host_mmio;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200937 unsigned int hotplug_offset, ata_no;
938 u32 hotplug_status;
939 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940
941 VPRINTK("ENTER\n");
942
Tejun Heo0d5ff562007-02-01 15:06:36 +0900943 if (!host || !host->iomap[PDC_MMIO_BAR]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 VPRINTK("QUICK EXIT\n");
945 return IRQ_NONE;
946 }
947
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200948 host_mmio = host->iomap[PDC_MMIO_BAR];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100950 spin_lock(&host->lock);
951
Mikael Petterssona77720a2007-07-03 01:09:05 +0200952 /* read and clear hotplug flags for all ports */
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200953 if (host->ports[0]->flags & PDC_FLAG_GEN_II) {
Mikael Petterssona77720a2007-07-03 01:09:05 +0200954 hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200955 hotplug_status = readl(host_mmio + hotplug_offset);
956 if (hotplug_status & 0xff)
957 writel(hotplug_status | 0xff, host_mmio + hotplug_offset);
958 hotplug_status &= 0xff; /* clear uninteresting bits */
959 } else
960 hotplug_status = 0;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200961
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962 /* reading should also clear interrupts */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200963 mask = readl(host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964
Mikael Petterssona77720a2007-07-03 01:09:05 +0200965 if (mask == 0xffffffff && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 VPRINTK("QUICK EXIT 2\n");
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100967 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968 }
Luke Kosewski6340f012006-01-28 12:39:29 -0500969
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200970 mask &= 0xffff; /* only 16 SEQIDs possible */
Mikael Petterssona77720a2007-07-03 01:09:05 +0200971 if (mask == 0 && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 VPRINTK("QUICK EXIT 3\n");
Luke Kosewski6340f012006-01-28 12:39:29 -0500973 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974 }
975
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200976 writel(mask, host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700977
Mikael Petterssona77720a2007-07-03 01:09:05 +0200978 is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags);
979
Jeff Garzikcca39742006-08-24 03:19:22 -0400980 for (i = 0; i < host->n_ports; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981 VPRINTK("port %u\n", i);
Jeff Garzikcca39742006-08-24 03:19:22 -0400982 ap = host->ports[i];
Mikael Petterssona77720a2007-07-03 01:09:05 +0200983
984 /* check for a plug or unplug event */
985 ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
986 tmp = hotplug_status & (0x11 << ata_no);
Tejun Heo3e4ec342010-05-10 21:41:30 +0200987 if (tmp) {
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900988 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200989 ata_ehi_clear_desc(ehi);
990 ata_ehi_hotplugged(ehi);
991 ata_ehi_push_desc(ehi, "hotplug_status %#x", tmp);
992 ata_port_freeze(ap);
993 ++handled;
994 continue;
995 }
996
997 /* check for a packet interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998 tmp = mask & (1 << (i + 1));
Tejun Heo3e4ec342010-05-10 21:41:30 +0200999 if (tmp) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000 struct ata_queued_cmd *qc;
1001
Tejun Heo9af5c9c2007-08-06 18:36:22 +09001002 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Albert Leee50362e2005-09-27 17:39:50 +08001003 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 handled += pdc_host_intr(ap, qc);
1005 }
1006 }
1007
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 VPRINTK("EXIT\n");
1009
Luke Kosewski6340f012006-01-28 12:39:29 -05001010done_irq:
Jeff Garzikcca39742006-08-24 03:19:22 -04001011 spin_unlock(&host->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 return IRQ_RETVAL(handled);
1013}
1014
Mikael Pettersson7715a6f2008-05-17 18:49:09 +02001015static void pdc_packet_start(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016{
1017 struct ata_port *ap = qc->ap;
1018 struct pdc_port_priv *pp = ap->private_data;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001019 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
1020 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021 unsigned int port_no = ap->port_no;
1022 u8 seq = (u8) (port_no + 1);
1023
1024 VPRINTK("ENTER, ap %p\n", ap);
1025
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001026 writel(0x00000001, host_mmio + (seq * 4));
1027 readl(host_mmio + (seq * 4)); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001028
1029 pp->pkt[2] = seq;
1030 wmb(); /* flush PRD, pkt writes */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001031 writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT);
1032 readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001033}
1034
Tejun Heo9363c382008-04-07 22:47:16 +09001035static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001036{
1037 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -05001038 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +01001039 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1040 break;
1041 /*FALLTHROUGH*/
Tejun Heo51b94d22007-06-08 13:46:55 -07001042 case ATA_PROT_NODATA:
1043 if (qc->tf.flags & ATA_TFLAG_POLLING)
1044 break;
1045 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -05001046 case ATAPI_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001047 case ATA_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001048 pdc_packet_start(qc);
1049 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050 default:
1051 break;
1052 }
Tejun Heo9363c382008-04-07 22:47:16 +09001053 return ata_sff_qc_issue(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054}
1055
Jeff Garzik057ace52005-10-22 14:27:05 -04001056static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057{
Tejun Heo0dc36882007-12-18 16:34:43 -05001058 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001059 ata_sff_tf_load(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001060}
1061
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001062static void pdc_exec_command_mmio(struct ata_port *ap,
1063 const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064{
Tejun Heo0dc36882007-12-18 16:34:43 -05001065 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001066 ata_sff_exec_command(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001067}
1068
Mikael Pettersson95006182007-01-09 10:51:46 +01001069static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
1070{
1071 u8 *scsicmd = qc->scsicmd->cmnd;
1072 int pio = 1; /* atapi dma off by default */
1073
1074 /* Whitelist commands that may use DMA. */
1075 switch (scsicmd[0]) {
1076 case WRITE_12:
1077 case WRITE_10:
1078 case WRITE_6:
1079 case READ_12:
1080 case READ_10:
1081 case READ_6:
1082 case 0xad: /* READ_DVD_STRUCTURE */
1083 case 0xbe: /* READ_CD */
1084 pio = 0;
1085 }
1086 /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
1087 if (scsicmd[0] == WRITE_10) {
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001088 unsigned int lba =
1089 (scsicmd[2] << 24) |
1090 (scsicmd[3] << 16) |
1091 (scsicmd[4] << 8) |
1092 scsicmd[5];
Mikael Pettersson95006182007-01-09 10:51:46 +01001093 if (lba >= 0xFFFF4FA2)
1094 pio = 1;
1095 }
1096 return pio;
1097}
1098
Mikael Pettersson724114a2007-03-11 21:20:43 +01001099static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +01001100{
Mikael Pettersson95006182007-01-09 10:51:46 +01001101 /* First generation chips cannot use ATAPI DMA on SATA ports */
Mikael Pettersson724114a2007-03-11 21:20:43 +01001102 return 1;
Mikael Pettersson95006182007-01-09 10:51:46 +01001103}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001104
Tejun Heoeca25dc2007-04-17 23:44:07 +09001105static void pdc_ata_setup_port(struct ata_port *ap,
1106 void __iomem *base, void __iomem *scr_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001107{
Tejun Heoeca25dc2007-04-17 23:44:07 +09001108 ap->ioaddr.cmd_addr = base;
1109 ap->ioaddr.data_addr = base;
1110 ap->ioaddr.feature_addr =
1111 ap->ioaddr.error_addr = base + 0x4;
1112 ap->ioaddr.nsect_addr = base + 0x8;
1113 ap->ioaddr.lbal_addr = base + 0xc;
1114 ap->ioaddr.lbam_addr = base + 0x10;
1115 ap->ioaddr.lbah_addr = base + 0x14;
1116 ap->ioaddr.device_addr = base + 0x18;
1117 ap->ioaddr.command_addr =
1118 ap->ioaddr.status_addr = base + 0x1c;
1119 ap->ioaddr.altstatus_addr =
1120 ap->ioaddr.ctl_addr = base + 0x38;
1121 ap->ioaddr.scr_addr = scr_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122}
1123
Tejun Heoeca25dc2007-04-17 23:44:07 +09001124static void pdc_host_init(struct ata_host *host)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001125{
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001126 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001127 int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II;
Mikael Petterssond324d4622006-12-06 09:55:43 +01001128 int hotplug_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129 u32 tmp;
1130
Tejun Heoeca25dc2007-04-17 23:44:07 +09001131 if (is_gen2)
Mikael Petterssond324d4622006-12-06 09:55:43 +01001132 hotplug_offset = PDC2_SATA_PLUG_CSR;
1133 else
1134 hotplug_offset = PDC_SATA_PLUG_CSR;
1135
Linus Torvalds1da177e2005-04-16 15:20:36 -07001136 /*
1137 * Except for the hotplug stuff, this is voodoo from the
1138 * Promise driver. Label this entire section
1139 * "TODO: figure out why we do this"
1140 */
1141
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001142 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001143 tmp = readl(host_mmio + PDC_FLASH_CTL);
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001144 tmp |= 0x02000; /* bit 13 (enable bmr burst) */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001145 if (!is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001146 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001147 writel(tmp, host_mmio + PDC_FLASH_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001148
1149 /* clear plug/unplug flags for all ports */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001150 tmp = readl(host_mmio + hotplug_offset);
1151 writel(tmp | 0xff, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001153 tmp = readl(host_mmio + hotplug_offset);
Mikael Pettersson0ae66542009-09-15 15:07:32 +02001154 if (is_gen2) /* unmask plug/unplug ints */
1155 writel(tmp & ~0xff0000, host_mmio + hotplug_offset);
1156 else /* mask plug/unplug ints */
1157 writel(tmp | 0xff0000, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001158
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001159 /* don't initialise TBG or SLEW on 2nd generation chips */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001160 if (is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001161 return;
1162
Linus Torvalds1da177e2005-04-16 15:20:36 -07001163 /* reduce TBG clock to 133 Mhz. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001164 tmp = readl(host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001165 tmp &= ~0x30000; /* clear bit 17, 16*/
1166 tmp |= 0x10000; /* set bit 17:16 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001167 writel(tmp, host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001168
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001169 readl(host_mmio + PDC_TBG_MODE); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001170 msleep(10);
1171
1172 /* adjust slew rate control register. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001173 tmp = readl(host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174 tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
1175 tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001176 writel(tmp, host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177}
1178
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001179static int pdc_ata_init_one(struct pci_dev *pdev,
1180 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181{
Tejun Heoeca25dc2007-04-17 23:44:07 +09001182 const struct ata_port_info *pi = &pdc_port_info[ent->driver_data];
1183 const struct ata_port_info *ppi[PDC_MAX_PORTS];
1184 struct ata_host *host;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001185 void __iomem *host_mmio;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001186 int n_ports, i, rc;
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001187 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188
Joe Perches06296a12011-04-15 15:52:00 -07001189 ata_print_version_once(&pdev->dev, DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001190
Tejun Heoeca25dc2007-04-17 23:44:07 +09001191 /* enable and acquire resources */
Tejun Heo24dc5f32007-01-20 16:00:28 +09001192 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193 if (rc)
1194 return rc;
1195
Tejun Heo0d5ff562007-02-01 15:06:36 +09001196 rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
1197 if (rc == -EBUSY)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001198 pcim_pin_device(pdev);
Tejun Heo0d5ff562007-02-01 15:06:36 +09001199 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001200 return rc;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001201 host_mmio = pcim_iomap_table(pdev)[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001202
1203 /* determine port configuration and setup host */
1204 n_ports = 2;
1205 if (pi->flags & PDC_FLAG_4_PORTS)
1206 n_ports = 4;
1207 for (i = 0; i < n_ports; i++)
1208 ppi[i] = pi;
1209
1210 if (pi->flags & PDC_FLAG_SATA_PATA) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001211 u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1);
Mikael Petterssond0e58032007-06-19 21:53:30 +02001212 if (!(tmp & 0x80))
Tejun Heoeca25dc2007-04-17 23:44:07 +09001213 ppi[n_ports++] = pi + 1;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001214 }
1215
1216 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
1217 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07001218 dev_err(&pdev->dev, "failed to allocate host\n");
Tejun Heoeca25dc2007-04-17 23:44:07 +09001219 return -ENOMEM;
1220 }
1221 host->iomap = pcim_iomap_table(pdev);
1222
Mikael Petterssond0e58032007-06-19 21:53:30 +02001223 is_sataii_tx4 = pdc_is_sataii_tx4(pi->flags);
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001224 for (i = 0; i < host->n_ports; i++) {
Tejun Heocbcdd872007-08-18 13:14:55 +09001225 struct ata_port *ap = host->ports[i];
Mikael Petterssond0e58032007-06-19 21:53:30 +02001226 unsigned int ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001227 unsigned int ata_offset = 0x200 + ata_no * 0x80;
Tejun Heocbcdd872007-08-18 13:14:55 +09001228 unsigned int scr_offset = 0x400 + ata_no * 0x100;
1229
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001230 pdc_ata_setup_port(ap, host_mmio + ata_offset, host_mmio + scr_offset);
Tejun Heocbcdd872007-08-18 13:14:55 +09001231
1232 ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio");
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001233 ata_port_pbar_desc(ap, PDC_MMIO_BAR, ata_offset, "ata");
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001234 }
Tejun Heoeca25dc2007-04-17 23:44:07 +09001235
1236 /* initialize adapter */
1237 pdc_host_init(host);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001238
1239 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1240 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001241 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001242 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
1243 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001244 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245
Tejun Heoeca25dc2007-04-17 23:44:07 +09001246 /* start host, request IRQ and attach */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001247 pci_set_master(pdev);
Tejun Heoeca25dc2007-04-17 23:44:07 +09001248 return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED,
1249 &pdc_ata_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001250}
1251
Linus Torvalds1da177e2005-04-16 15:20:36 -07001252static int __init pdc_ata_init(void)
1253{
Pavel Roskinb7887192006-08-10 18:13:18 +09001254 return pci_register_driver(&pdc_ata_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255}
1256
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257static void __exit pdc_ata_exit(void)
1258{
1259 pci_unregister_driver(&pdc_ata_pci_driver);
1260}
1261
Linus Torvalds1da177e2005-04-16 15:20:36 -07001262MODULE_AUTHOR("Jeff Garzik");
Tobias Lorenzf497ba72005-05-12 15:51:01 -04001263MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264MODULE_LICENSE("GPL");
1265MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
1266MODULE_VERSION(DRV_VERSION);
1267
1268module_init(pdc_ata_init);
1269module_exit(pdc_ata_exit);