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gerrit-public.fairphone.software / kernel / msm / 6d6b89bd2e316b78d668f761d380837b81fa71ef / . / arch / arm / mach-davinci / include / mach / da8xx.h
blob: cc9be7fee6273e8534296c146d76b39d0f3c3e44 [file] [log] [blame]
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]1/*
2 * Chip specific defines for DA8XX/OMAP L1XX SoC
3 *
4 * Author: Mark A. Greer <mgreer@mvista.com>
5 *
6 * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
12#define __ASM_ARCH_DAVINCI_DA8XX_H
13
Mark A. Greerb9e63422009-09-15 18:14:19 -0700[diff] [blame]14#include <video/da8xx-fb.h>
15
Sriramakrishnan8ee2bf92009-11-19 15:58:25 +0530[diff] [blame]16#include <linux/davinci_emac.h>
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]17#include <mach/serial.h>
18#include <mach/edma.h>
19#include <mach/i2c.h>
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400[diff] [blame]20#include <mach/asp.h>
Sudhakar Rajashekhara700691f2009-08-13 15:16:23 -0400[diff] [blame]21#include <mach/mmc.h>
Sergei Shtylyove5d3d252009-09-25 23:14:02 +0400[diff] [blame]22#include <mach/usb.h>
Sekhar Nori044ca012009-12-17 18:29:32 +0530[diff] [blame]23#include <mach/pm.h>
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]24
Sekhar Norid2de0582009-11-16 17:21:32 +0530[diff] [blame]25extern void __iomem *da8xx_syscfg0_base;
26extern void __iomem *da8xx_syscfg1_base;
Sekhar Nori6a28ade2009-08-31 15:47:59 +0530[diff] [blame]27
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]28/*
29 * The cp_intc interrupt controller for the da8xx isn't in the same
30 * chunk of physical memory space as the other registers (like it is
31 * on the davincis) so it needs to be mapped separately. It will be
32 * mapped early on when the I/O space is mapped and we'll put it just
33 * before the I/O space in the processor's virtual memory space.
34 */
35#define DA8XX_CP_INTC_BASE 0xfffee000
36#define DA8XX_CP_INTC_SIZE SZ_8K
37#define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
38
Sekhar Norid2de0582009-11-16 17:21:32 +0530[diff] [blame]39#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000)
40#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x))
Sekhar Noricd874442009-08-31 15:48:00 +0530[diff] [blame]41#define DA8XX_JTAG_ID_REG 0x18
Sekhar Nori683b1e12009-09-22 21:14:01 +0530[diff] [blame]42#define DA8XX_CFGCHIP0_REG 0x17c
Sergei Shtylyov371b53e2009-09-25 22:24:57 +0400[diff] [blame]43#define DA8XX_CFGCHIP2_REG 0x184
Sekhar Nori5d36a332009-08-31 15:48:05 +0530[diff] [blame]44#define DA8XX_CFGCHIP3_REG 0x188
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]45
Sekhar Norid2de0582009-11-16 17:21:32 +0530[diff] [blame]46#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000)
47#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x))
Sekhar Nori044ca012009-12-17 18:29:32 +0530[diff] [blame]48#define DA8XX_DEEPSLEEP_REG 0x8
Sekhar Norid2de0582009-11-16 17:21:32 +0530[diff] [blame]49
Rajashekhara, Sudhakarbea238f2009-07-10 02:08:31 -0400[diff] [blame]50#define DA8XX_PSC0_BASE 0x01c10000
51#define DA8XX_PLL0_BASE 0x01c11000
Rajashekhara, Sudhakarbea238f2009-07-10 02:08:31 -0400[diff] [blame]52#define DA8XX_TIMER64P0_BASE 0x01c20000
53#define DA8XX_TIMER64P1_BASE 0x01c21000
54#define DA8XX_GPIO_BASE 0x01e26000
55#define DA8XX_PSC1_BASE 0x01e27000
Sudhakar Rajashekhara5cbdf272009-08-13 14:33:14 -0400[diff] [blame]56#define DA8XX_LCD_CNTRL_BASE 0x01e13000
Sekhar Nori044ca012009-12-17 18:29:32 +0530[diff] [blame]57#define DA8XX_PLL1_BASE 0x01e1a000
Sudhakar Rajashekhara700691f2009-08-13 15:16:23 -0400[diff] [blame]58#define DA8XX_MMCSD0_BASE 0x01c40000
Sudhakar Rajashekhara7c5ec602009-08-13 17:36:25 -0400[diff] [blame]59#define DA8XX_AEMIF_CS2_BASE 0x60000000
Sudhakar Rajashekhara38beb922009-08-13 16:21:11 -0400[diff] [blame]60#define DA8XX_AEMIF_CS3_BASE 0x62000000
61#define DA8XX_AEMIF_CTL_BASE 0x68000000
Sekhar Nori1960e692009-10-22 15:12:14 +0530[diff] [blame]62#define DA8XX_DDR2_CTL_BASE 0xb0000000
Sekhar Nori60cd02e2009-11-16 17:21:39 +0530[diff] [blame]63#define DA8XX_ARM_RAM_BASE 0xffff0000
Rajashekhara, Sudhakarbea238f2009-07-10 02:08:31 -0400[diff] [blame]64
Sudhakar Rajashekharac96b56c2009-07-16 05:45:32 -0400[diff] [blame]65#define PINMUX0 0x00
66#define PINMUX1 0x04
67#define PINMUX2 0x08
68#define PINMUX3 0x0c
69#define PINMUX4 0x10
70#define PINMUX5 0x14
71#define PINMUX6 0x18
72#define PINMUX7 0x1c
73#define PINMUX8 0x20
74#define PINMUX9 0x24
75#define PINMUX10 0x28
76#define PINMUX11 0x2c
77#define PINMUX12 0x30
78#define PINMUX13 0x34
79#define PINMUX14 0x38
80#define PINMUX15 0x3c
81#define PINMUX16 0x40
82#define PINMUX17 0x44
83#define PINMUX18 0x48
84#define PINMUX19 0x4c
85
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]86void __init da830_init(void);
Sudhakar Rajashekharae1a8d7e2009-07-16 06:41:54 -0400[diff] [blame]87void __init da850_init(void);
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]88
89int da8xx_register_edma(void);
90int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
91int da8xx_register_watchdog(void);
Sergei Shtylyovb0ea26e2009-10-30 23:49:44 +0400[diff] [blame]92int da8xx_register_usb20(unsigned mA, unsigned potpgt);
Sergei Shtylyove5d3d252009-09-25 23:14:02 +0400[diff] [blame]93int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]94int da8xx_register_emac(void);
Mark A. Greerb9e63422009-09-15 18:14:19 -0700[diff] [blame]95int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
Sudhakar Rajashekhara700691f2009-08-13 15:16:23 -0400[diff] [blame]96int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
Mark A. Greerb8864aa2009-08-28 15:05:02 -0700[diff] [blame]97void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
Mark A. Greerc51df702009-09-15 18:15:54 -0700[diff] [blame]98int da8xx_register_rtc(void);
Sekhar Nori683b1e12009-09-22 21:14:01 +0530[diff] [blame]99int da850_register_cpufreq(void);
Sekhar Nori1960e692009-10-22 15:12:14 +0530[diff] [blame]100int da8xx_register_cpuidle(void);
Sekhar Nori948c66d2009-11-16 17:21:37 +0530[diff] [blame]101void __iomem * __init da8xx_get_mem_ctlr(void);
Sekhar Nori044ca012009-12-17 18:29:32 +0530[diff] [blame]102int da850_register_pm(struct platform_device *pdev);
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]103
104extern struct platform_device da8xx_serial_device;
105extern struct emac_platform_data da8xx_emac_pdata;
Mark A. Greerb9e63422009-09-15 18:14:19 -0700[diff] [blame]106extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
107extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]108
109extern const short da830_emif25_pins[];
110extern const short da830_spi0_pins[];
111extern const short da830_spi1_pins[];
112extern const short da830_mmc_sd_pins[];
113extern const short da830_uart0_pins[];
114extern const short da830_uart1_pins[];
115extern const short da830_uart2_pins[];
116extern const short da830_usb20_pins[];
117extern const short da830_usb11_pins[];
118extern const short da830_uhpi_pins[];
119extern const short da830_cpgmac_pins[];
120extern const short da830_emif3c_pins[];
121extern const short da830_mcasp0_pins[];
122extern const short da830_mcasp1_pins[];
123extern const short da830_mcasp2_pins[];
124extern const short da830_i2c0_pins[];
125extern const short da830_i2c1_pins[];
126extern const short da830_lcdcntl_pins[];
127extern const short da830_pwm_pins[];
128extern const short da830_ecap0_pins[];
129extern const short da830_ecap1_pins[];
130extern const short da830_ecap2_pins[];
131extern const short da830_eqep0_pins[];
132extern const short da830_eqep1_pins[];
133
Sudhakar Rajashekharae1a8d7e2009-07-16 06:41:54 -0400[diff] [blame]134extern const short da850_uart0_pins[];
135extern const short da850_uart1_pins[];
136extern const short da850_uart2_pins[];
137extern const short da850_i2c0_pins[];
138extern const short da850_i2c1_pins[];
Sudhakar Rajashekhara5a4b1312009-07-17 04:47:10 -0400[diff] [blame]139extern const short da850_cpgmac_pins[];
Chaithrika U S22067712009-09-30 17:00:53 -0400[diff] [blame]140extern const short da850_rmii_pins[];
Chaithrika U Se33ef5e2009-08-11 17:01:59 -0400[diff] [blame]141extern const short da850_mcasp_pins[];
Sudhakar Rajashekhara5cbdf272009-08-13 14:33:14 -0400[diff] [blame]142extern const short da850_lcdcntl_pins[];
Sudhakar Rajashekhara700691f2009-08-13 15:16:23 -0400[diff] [blame]143extern const short da850_mmcsd0_pins[];
Sudhakar Rajashekhara38beb922009-08-13 16:21:11 -0400[diff] [blame]144extern const short da850_nand_pins[];
Sudhakar Rajashekhara7c5ec602009-08-13 17:36:25 -0400[diff] [blame]145extern const short da850_nor_pins[];
Sudhakar Rajashekharae1a8d7e2009-07-16 06:41:54 -0400[diff] [blame]146
Sudhakar Rajashekharac96b56c2009-07-16 05:45:32 -0400[diff] [blame]147int da8xx_pinmux_setup(const short pins[]);
Mark A. Greer55c79a42009-06-03 18:36:54 -0700[diff] [blame]148
149#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */