blob: a91edfb8beeac3109542989c957256436fd5a5c8 [file] [log] [blame]
Kevin Hilman7c6337e2007-04-30 19:37:19 +01001/*
2 * DaVinci memory space definitions
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14/**************************************************************************
15 * Included Files
16 **************************************************************************/
17#include <asm/page.h>
18#include <asm/sizes.h>
19
20/**************************************************************************
21 * Definitions
22 **************************************************************************/
Mark A. Greer55c79a42009-06-03 18:36:54 -070023#define DAVINCI_DDR_BASE 0x80000000
24#define DA8XX_DDR_BASE 0xc0000000
Kevin Hilman7c6337e2007-04-30 19:37:19 +010025
Mark A. Greer55c79a42009-06-03 18:36:54 -070026#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
27#error Cannot enable DaVinci and DA8XX platforms concurrently
28#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
29#define PHYS_OFFSET DA8XX_DDR_BASE
30#else
Kevin Hilman7c6337e2007-04-30 19:37:19 +010031#define PHYS_OFFSET DAVINCI_DDR_BASE
Mark A. Greer55c79a42009-06-03 18:36:54 -070032#endif
Kevin Hilman7c6337e2007-04-30 19:37:19 +010033
Sekhar Nori7ec4b242009-11-16 17:21:34 +053034#define DDR2_SDRCR_OFFSET 0xc
35#define DDR2_SRPD_BIT BIT(23)
Sekhar Noriefc1bb82009-12-17 18:29:31 +053036#define DDR2_MCLKSTOPEN_BIT BIT(30)
Sekhar Nori7ec4b242009-11-16 17:21:34 +053037#define DDR2_LPMODEN_BIT BIT(31)
38
Kevin Hilman7c6337e2007-04-30 19:37:19 +010039/*
40 * Increase size of DMA-consistent memory region
41 */
42#define CONSISTENT_DMA_SIZE (14<<20)
43
44#ifndef __ASSEMBLY__
45/*
46 * Restrict DMA-able region to workaround silicon bug. The bug
47 * restricts buffers available for DMA to video hardware to be
48 * below 128M
49 */
50static inline void
51__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes)
52{
53 unsigned int sz = (128<<20) >> PAGE_SHIFT;
54
55 if (node != 0)
56 sz = 0;
57
58 size[1] = size[0] - sz;
59 size[0] = sz;
60}
61
62#define arch_adjust_zones(node, zone_size, holes) \
63 if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes)
64
65#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1)
Russell King3719ec52008-11-30 13:26:47 +000066#define MAX_DMA_ADDRESS (PAGE_OFFSET + (128<<20))
Kevin Hilman7c6337e2007-04-30 19:37:19 +010067
68#endif
69
Kevin Hilman7c6337e2007-04-30 19:37:19 +010070#endif /* __ASM_ARCH_MEMORY_H */