wanzongshun | a62e903 | 2009-12-31 15:06:05 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/mach-nuc93x/include/mach/irqs.h |
| 3 | * |
| 4 | * Copyright (c) 2008 Nuvoton technology corporation. |
| 5 | * |
| 6 | * Wan ZongShun <mcuos.com@gmail.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation;version 2 of the License. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #ifndef __ASM_ARCH_IRQS_H |
| 15 | #define __ASM_ARCH_IRQS_H |
| 16 | |
| 17 | #define NUC93X_IRQ(x) (x) |
| 18 | |
| 19 | /* Main cpu interrupts */ |
| 20 | |
| 21 | #define IRQ_WDT NUC93X_IRQ(1) |
| 22 | #define IRQ_IRQ0 NUC93X_IRQ(2) |
| 23 | #define IRQ_IRQ1 NUC93X_IRQ(3) |
| 24 | #define IRQ_IRQ2 NUC93X_IRQ(4) |
| 25 | #define IRQ_IRQ3 NUC93X_IRQ(5) |
| 26 | #define IRQ_USBH NUC93X_IRQ(6) |
| 27 | #define IRQ_APU NUC93X_IRQ(7) |
| 28 | #define IRQ_VPOST NUC93X_IRQ(8) |
| 29 | #define IRQ_ADC NUC93X_IRQ(9) |
| 30 | #define IRQ_UART0 NUC93X_IRQ(10) |
| 31 | #define IRQ_TIMER0 NUC93X_IRQ(11) |
| 32 | #define IRQ_GPU0 NUC93X_IRQ(12) |
| 33 | #define IRQ_GPU1 NUC93X_IRQ(13) |
| 34 | #define IRQ_GPU2 NUC93X_IRQ(14) |
| 35 | #define IRQ_GPU3 NUC93X_IRQ(15) |
| 36 | #define IRQ_GPU4 NUC93X_IRQ(16) |
| 37 | #define IRQ_VIN NUC93X_IRQ(17) |
| 38 | #define IRQ_USBD NUC93X_IRQ(18) |
| 39 | #define IRQ_VRAMLD NUC93X_IRQ(19) |
| 40 | #define IRQ_GDMA0 NUC93X_IRQ(20) |
| 41 | #define IRQ_GDMA1 NUC93X_IRQ(21) |
| 42 | #define IRQ_SDIO NUC93X_IRQ(22) |
| 43 | #define IRQ_FMI NUC93X_IRQ(22) |
| 44 | #define IRQ_JPEG NUC93X_IRQ(23) |
| 45 | #define IRQ_SPI0 NUC93X_IRQ(24) |
| 46 | #define IRQ_SPI1 NUC93X_IRQ(25) |
| 47 | #define IRQ_RTC NUC93X_IRQ(26) |
| 48 | #define IRQ_PWM0 NUC93X_IRQ(27) |
| 49 | #define IRQ_PWM1 NUC93X_IRQ(28) |
| 50 | #define IRQ_PWM2 NUC93X_IRQ(29) |
| 51 | #define IRQ_PWM3 NUC93X_IRQ(30) |
| 52 | #define IRQ_I2SAC97 NUC93X_IRQ(31) |
| 53 | #define IRQ_CAP0 IRQ_PWM0 |
| 54 | #define IRQ_CAP1 IRQ_PWM1 |
| 55 | #define IRQ_CAP2 IRQ_PWM2 |
| 56 | #define IRQ_CAP3 IRQ_PWM3 |
| 57 | #define NR_IRQS (IRQ_I2SAC97 + 1) |
| 58 | |
| 59 | #endif /* __ASM_ARCH_IRQ_H */ |