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eric miao2c8086a2007-09-11 19:13:17 -07001/*
2 * linux/arch/arm/mach-pxa/pxa320.c
3 *
4 * Code specific to PXA320
5 *
6 * Copyright (C) 2007 Marvell Internation Ltd.
7 *
eric miaoe9bba8e2007-10-30 08:01:38 +01008 * 2007-08-21: eric miao <eric.miao@marvell.com>
eric miao2c8086a2007-09-11 19:13:17 -07009 * initial version
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
Eric Miao9ae819a2008-06-02 15:22:03 +080018#include <linux/platform_device.h>
eric miao2c8086a2007-09-11 19:13:17 -070019
Eric Miao51c62982009-01-02 23:17:22 +080020#include <mach/pxa320.h>
eric miao2c8086a2007-09-11 19:13:17 -070021
Eric Miao9ae819a2008-06-02 15:22:03 +080022#include "generic.h"
23#include "devices.h"
24#include "clock.h"
25
Eric Miaof8dec042009-01-15 16:42:56 +080026static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
eric miao2c8086a2007-09-11 19:13:17 -070027
28 MFP_ADDR_X(GPIO0, GPIO4, 0x0124),
eric miao008f6d22007-11-27 03:14:09 +010029 MFP_ADDR_X(GPIO5, GPIO9, 0x028C),
30 MFP_ADDR(GPIO10, 0x0458),
31 MFP_ADDR_X(GPIO11, GPIO26, 0x02A0),
32 MFP_ADDR_X(GPIO27, GPIO48, 0x0400),
33 MFP_ADDR_X(GPIO49, GPIO62, 0x045C),
eric miao2c8086a2007-09-11 19:13:17 -070034 MFP_ADDR_X(GPIO63, GPIO73, 0x04B4),
35 MFP_ADDR_X(GPIO74, GPIO98, 0x04F0),
36 MFP_ADDR_X(GPIO99, GPIO127, 0x0600),
37 MFP_ADDR_X(GPIO0_2, GPIO5_2, 0x0674),
38 MFP_ADDR_X(GPIO6_2, GPIO13_2, 0x0494),
39 MFP_ADDR_X(GPIO14_2, GPIO17_2, 0x04E0),
40
41 MFP_ADDR(nXCVREN, 0x0138),
42 MFP_ADDR(DF_CLE_nOE, 0x0204),
43 MFP_ADDR(DF_nADV1_ALE, 0x0208),
44 MFP_ADDR(DF_SCLK_S, 0x020C),
45 MFP_ADDR(DF_SCLK_E, 0x0210),
46 MFP_ADDR(nBE0, 0x0214),
47 MFP_ADDR(nBE1, 0x0218),
48 MFP_ADDR(DF_nADV2_ALE, 0x021C),
49 MFP_ADDR(DF_INT_RnB, 0x0220),
50 MFP_ADDR(DF_nCS0, 0x0224),
51 MFP_ADDR(DF_nCS1, 0x0228),
52 MFP_ADDR(DF_nWE, 0x022C),
53 MFP_ADDR(DF_nRE_nOE, 0x0230),
54 MFP_ADDR(nLUA, 0x0234),
55 MFP_ADDR(nLLA, 0x0238),
56 MFP_ADDR(DF_ADDR0, 0x023C),
57 MFP_ADDR(DF_ADDR1, 0x0240),
58 MFP_ADDR(DF_ADDR2, 0x0244),
59 MFP_ADDR(DF_ADDR3, 0x0248),
60 MFP_ADDR(DF_IO0, 0x024C),
61 MFP_ADDR(DF_IO8, 0x0250),
62 MFP_ADDR(DF_IO1, 0x0254),
63 MFP_ADDR(DF_IO9, 0x0258),
64 MFP_ADDR(DF_IO2, 0x025C),
65 MFP_ADDR(DF_IO10, 0x0260),
66 MFP_ADDR(DF_IO3, 0x0264),
67 MFP_ADDR(DF_IO11, 0x0268),
68 MFP_ADDR(DF_IO4, 0x026C),
69 MFP_ADDR(DF_IO12, 0x0270),
70 MFP_ADDR(DF_IO5, 0x0274),
71 MFP_ADDR(DF_IO13, 0x0278),
72 MFP_ADDR(DF_IO6, 0x027C),
73 MFP_ADDR(DF_IO14, 0x0280),
74 MFP_ADDR(DF_IO7, 0x0284),
75 MFP_ADDR(DF_IO15, 0x0288),
76
77 MFP_ADDR_END,
78};
79
Russell King8c3abc72008-11-08 20:25:21 +000080static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
Daniel Mackf0f04f02009-07-09 19:04:48 +020081static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
Russell King8c3abc72008-11-08 20:25:21 +000082
83static struct clk_lookup pxa320_clkregs[] = {
Mike Rapoport8d69abb2009-01-18 11:55:19 +020084 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
Daniel Mackf0f04f02009-07-09 19:04:48 +020085 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
Eric Miao9ae819a2008-06-02 15:22:03 +080086};
87
eric miao2c8086a2007-09-11 19:13:17 -070088static int __init pxa320_init(void)
89{
Eric Miaod4a67802008-06-12 18:49:08 +080090 if (cpu_is_pxa320()) {
Eric Miaof8dec042009-01-15 16:42:56 +080091 mfp_init_base(io_p2v(MFPR_BASE));
92 mfp_init_addr(pxa320_mfp_addr_map);
Russell King0a0300d2010-01-12 12:28:00 +000093 clkdev_add_table(ARRAY_AND_SIZE(pxa320_clkregs));
Eric Miaod4a67802008-06-12 18:49:08 +080094 }
eric miao2c8086a2007-09-11 19:13:17 -070095
96 return 0;
97}
98
99core_initcall(pxa320_init);