Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/ppc/platforms/85xx/mpc85xx_devices.c |
| 3 | * |
| 4 | * MPC85xx Device descriptions |
| 5 | * |
| 6 | * Maintainer: Kumar Gala <kumar.gala@freescale.com> |
| 7 | * |
| 8 | * Copyright 2005 Freescale Semiconductor Inc. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify it |
| 11 | * under the terms of the GNU General Public License as published by the |
| 12 | * Free Software Foundation; either version 2 of the License, or (at your |
| 13 | * option) any later version. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/device.h> |
| 19 | #include <linux/serial_8250.h> |
| 20 | #include <linux/fsl_devices.h> |
| 21 | #include <asm/mpc85xx.h> |
| 22 | #include <asm/irq.h> |
| 23 | #include <asm/ppc_sys.h> |
| 24 | |
| 25 | /* We use offsets for IORESOURCE_MEM since we do not know at compile time |
| 26 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup |
| 27 | */ |
| 28 | |
| 29 | static struct gianfar_platform_data mpc85xx_tsec1_pdata = { |
| 30 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 31 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 32 | FSL_GIANFAR_DEV_HAS_MULTI_INTR, |
| 33 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 34 | }; |
| 35 | |
| 36 | static struct gianfar_platform_data mpc85xx_tsec2_pdata = { |
| 37 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 38 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 39 | FSL_GIANFAR_DEV_HAS_MULTI_INTR, |
| 40 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 41 | }; |
| 42 | |
Kumar Gala | 5b37b70 | 2005-06-21 17:15:18 -0700 | [diff] [blame] | 43 | static struct gianfar_platform_data mpc85xx_etsec1_pdata = { |
| 44 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 45 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 46 | FSL_GIANFAR_DEV_HAS_MULTI_INTR | |
| 47 | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | |
| 48 | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, |
| 49 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 50 | }; |
| 51 | |
| 52 | static struct gianfar_platform_data mpc85xx_etsec2_pdata = { |
| 53 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 54 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 55 | FSL_GIANFAR_DEV_HAS_MULTI_INTR | |
| 56 | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | |
| 57 | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, |
| 58 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 59 | }; |
| 60 | |
| 61 | static struct gianfar_platform_data mpc85xx_etsec3_pdata = { |
| 62 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 63 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 64 | FSL_GIANFAR_DEV_HAS_MULTI_INTR | |
| 65 | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | |
| 66 | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, |
| 67 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 68 | }; |
| 69 | |
| 70 | static struct gianfar_platform_data mpc85xx_etsec4_pdata = { |
| 71 | .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | |
| 72 | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | |
| 73 | FSL_GIANFAR_DEV_HAS_MULTI_INTR | |
| 74 | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | |
| 75 | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, |
| 76 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 77 | }; |
| 78 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | static struct gianfar_platform_data mpc85xx_fec_pdata = { |
| 80 | .phy_reg_addr = MPC85xx_ENET1_OFFSET, |
| 81 | }; |
| 82 | |
| 83 | static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = { |
| 84 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, |
| 85 | }; |
| 86 | |
Kumar Gala | 5b37b70 | 2005-06-21 17:15:18 -0700 | [diff] [blame] | 87 | static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = { |
| 88 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, |
| 89 | }; |
| 90 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | static struct plat_serial8250_port serial_platform_data[] = { |
| 92 | [0] = { |
| 93 | .mapbase = 0x4500, |
| 94 | .irq = MPC85xx_IRQ_DUART, |
| 95 | .iotype = UPIO_MEM, |
| 96 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ, |
| 97 | }, |
| 98 | [1] = { |
| 99 | .mapbase = 0x4600, |
| 100 | .irq = MPC85xx_IRQ_DUART, |
| 101 | .iotype = UPIO_MEM, |
| 102 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ, |
| 103 | }, |
Kumar Gala | 7f8cd80 | 2005-05-20 13:59:13 -0700 | [diff] [blame] | 104 | { }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | }; |
| 106 | |
| 107 | struct platform_device ppc_sys_platform_devices[] = { |
| 108 | [MPC85xx_TSEC1] = { |
| 109 | .name = "fsl-gianfar", |
| 110 | .id = 1, |
| 111 | .dev.platform_data = &mpc85xx_tsec1_pdata, |
| 112 | .num_resources = 4, |
| 113 | .resource = (struct resource[]) { |
| 114 | { |
| 115 | .start = MPC85xx_ENET1_OFFSET, |
| 116 | .end = MPC85xx_ENET1_OFFSET + |
| 117 | MPC85xx_ENET1_SIZE - 1, |
| 118 | .flags = IORESOURCE_MEM, |
| 119 | }, |
| 120 | { |
| 121 | .name = "tx", |
| 122 | .start = MPC85xx_IRQ_TSEC1_TX, |
| 123 | .end = MPC85xx_IRQ_TSEC1_TX, |
| 124 | .flags = IORESOURCE_IRQ, |
| 125 | }, |
| 126 | { |
| 127 | .name = "rx", |
| 128 | .start = MPC85xx_IRQ_TSEC1_RX, |
| 129 | .end = MPC85xx_IRQ_TSEC1_RX, |
| 130 | .flags = IORESOURCE_IRQ, |
| 131 | }, |
| 132 | { |
| 133 | .name = "error", |
| 134 | .start = MPC85xx_IRQ_TSEC1_ERROR, |
| 135 | .end = MPC85xx_IRQ_TSEC1_ERROR, |
| 136 | .flags = IORESOURCE_IRQ, |
| 137 | }, |
| 138 | }, |
| 139 | }, |
| 140 | [MPC85xx_TSEC2] = { |
| 141 | .name = "fsl-gianfar", |
| 142 | .id = 2, |
| 143 | .dev.platform_data = &mpc85xx_tsec2_pdata, |
| 144 | .num_resources = 4, |
| 145 | .resource = (struct resource[]) { |
| 146 | { |
| 147 | .start = MPC85xx_ENET2_OFFSET, |
| 148 | .end = MPC85xx_ENET2_OFFSET + |
| 149 | MPC85xx_ENET2_SIZE - 1, |
| 150 | .flags = IORESOURCE_MEM, |
| 151 | }, |
| 152 | { |
| 153 | .name = "tx", |
| 154 | .start = MPC85xx_IRQ_TSEC2_TX, |
| 155 | .end = MPC85xx_IRQ_TSEC2_TX, |
| 156 | .flags = IORESOURCE_IRQ, |
| 157 | }, |
| 158 | { |
| 159 | .name = "rx", |
| 160 | .start = MPC85xx_IRQ_TSEC2_RX, |
| 161 | .end = MPC85xx_IRQ_TSEC2_RX, |
| 162 | .flags = IORESOURCE_IRQ, |
| 163 | }, |
| 164 | { |
| 165 | .name = "error", |
| 166 | .start = MPC85xx_IRQ_TSEC2_ERROR, |
| 167 | .end = MPC85xx_IRQ_TSEC2_ERROR, |
| 168 | .flags = IORESOURCE_IRQ, |
| 169 | }, |
| 170 | }, |
| 171 | }, |
| 172 | [MPC85xx_FEC] = { |
| 173 | .name = "fsl-gianfar", |
| 174 | .id = 3, |
| 175 | .dev.platform_data = &mpc85xx_fec_pdata, |
| 176 | .num_resources = 2, |
| 177 | .resource = (struct resource[]) { |
| 178 | { |
| 179 | .start = MPC85xx_ENET3_OFFSET, |
| 180 | .end = MPC85xx_ENET3_OFFSET + |
| 181 | MPC85xx_ENET3_SIZE - 1, |
| 182 | .flags = IORESOURCE_MEM, |
| 183 | |
| 184 | }, |
| 185 | { |
| 186 | .start = MPC85xx_IRQ_FEC, |
| 187 | .end = MPC85xx_IRQ_FEC, |
| 188 | .flags = IORESOURCE_IRQ, |
| 189 | }, |
| 190 | }, |
| 191 | }, |
| 192 | [MPC85xx_IIC1] = { |
| 193 | .name = "fsl-i2c", |
| 194 | .id = 1, |
| 195 | .dev.platform_data = &mpc85xx_fsl_i2c_pdata, |
| 196 | .num_resources = 2, |
| 197 | .resource = (struct resource[]) { |
| 198 | { |
| 199 | .start = MPC85xx_IIC1_OFFSET, |
| 200 | .end = MPC85xx_IIC1_OFFSET + |
| 201 | MPC85xx_IIC1_SIZE - 1, |
| 202 | .flags = IORESOURCE_MEM, |
| 203 | }, |
| 204 | { |
| 205 | .start = MPC85xx_IRQ_IIC1, |
| 206 | .end = MPC85xx_IRQ_IIC1, |
| 207 | .flags = IORESOURCE_IRQ, |
| 208 | }, |
| 209 | }, |
| 210 | }, |
| 211 | [MPC85xx_DMA0] = { |
| 212 | .name = "fsl-dma", |
| 213 | .id = 0, |
| 214 | .num_resources = 2, |
| 215 | .resource = (struct resource[]) { |
| 216 | { |
| 217 | .start = MPC85xx_DMA0_OFFSET, |
| 218 | .end = MPC85xx_DMA0_OFFSET + |
| 219 | MPC85xx_DMA0_SIZE - 1, |
| 220 | .flags = IORESOURCE_MEM, |
| 221 | }, |
| 222 | { |
| 223 | .start = MPC85xx_IRQ_DMA0, |
| 224 | .end = MPC85xx_IRQ_DMA0, |
| 225 | .flags = IORESOURCE_IRQ, |
| 226 | }, |
| 227 | }, |
| 228 | }, |
| 229 | [MPC85xx_DMA1] = { |
| 230 | .name = "fsl-dma", |
| 231 | .id = 1, |
| 232 | .num_resources = 2, |
| 233 | .resource = (struct resource[]) { |
| 234 | { |
| 235 | .start = MPC85xx_DMA1_OFFSET, |
| 236 | .end = MPC85xx_DMA1_OFFSET + |
| 237 | MPC85xx_DMA1_SIZE - 1, |
| 238 | .flags = IORESOURCE_MEM, |
| 239 | }, |
| 240 | { |
| 241 | .start = MPC85xx_IRQ_DMA1, |
| 242 | .end = MPC85xx_IRQ_DMA1, |
| 243 | .flags = IORESOURCE_IRQ, |
| 244 | }, |
| 245 | }, |
| 246 | }, |
| 247 | [MPC85xx_DMA2] = { |
| 248 | .name = "fsl-dma", |
| 249 | .id = 2, |
| 250 | .num_resources = 2, |
| 251 | .resource = (struct resource[]) { |
| 252 | { |
| 253 | .start = MPC85xx_DMA2_OFFSET, |
| 254 | .end = MPC85xx_DMA2_OFFSET + |
| 255 | MPC85xx_DMA2_SIZE - 1, |
| 256 | .flags = IORESOURCE_MEM, |
| 257 | }, |
| 258 | { |
| 259 | .start = MPC85xx_IRQ_DMA2, |
| 260 | .end = MPC85xx_IRQ_DMA2, |
| 261 | .flags = IORESOURCE_IRQ, |
| 262 | }, |
| 263 | }, |
| 264 | }, |
| 265 | [MPC85xx_DMA3] = { |
| 266 | .name = "fsl-dma", |
| 267 | .id = 3, |
| 268 | .num_resources = 2, |
| 269 | .resource = (struct resource[]) { |
| 270 | { |
| 271 | .start = MPC85xx_DMA3_OFFSET, |
| 272 | .end = MPC85xx_DMA3_OFFSET + |
| 273 | MPC85xx_DMA3_SIZE - 1, |
| 274 | .flags = IORESOURCE_MEM, |
| 275 | }, |
| 276 | { |
| 277 | .start = MPC85xx_IRQ_DMA3, |
| 278 | .end = MPC85xx_IRQ_DMA3, |
| 279 | .flags = IORESOURCE_IRQ, |
| 280 | }, |
| 281 | }, |
| 282 | }, |
| 283 | [MPC85xx_DUART] = { |
| 284 | .name = "serial8250", |
Russell King | 6df29de | 2005-09-08 16:04:41 +0100 | [diff] [blame^] | 285 | .id = PLAT8250_DEV_PLATFORM, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | .dev.platform_data = serial_platform_data, |
| 287 | }, |
| 288 | [MPC85xx_PERFMON] = { |
| 289 | .name = "fsl-perfmon", |
| 290 | .id = 1, |
| 291 | .num_resources = 2, |
| 292 | .resource = (struct resource[]) { |
| 293 | { |
| 294 | .start = MPC85xx_PERFMON_OFFSET, |
| 295 | .end = MPC85xx_PERFMON_OFFSET + |
| 296 | MPC85xx_PERFMON_SIZE - 1, |
| 297 | .flags = IORESOURCE_MEM, |
| 298 | }, |
| 299 | { |
| 300 | .start = MPC85xx_IRQ_PERFMON, |
| 301 | .end = MPC85xx_IRQ_PERFMON, |
| 302 | .flags = IORESOURCE_IRQ, |
| 303 | }, |
| 304 | }, |
| 305 | }, |
| 306 | [MPC85xx_SEC2] = { |
| 307 | .name = "fsl-sec2", |
| 308 | .id = 1, |
| 309 | .num_resources = 2, |
| 310 | .resource = (struct resource[]) { |
| 311 | { |
| 312 | .start = MPC85xx_SEC2_OFFSET, |
| 313 | .end = MPC85xx_SEC2_OFFSET + |
| 314 | MPC85xx_SEC2_SIZE - 1, |
| 315 | .flags = IORESOURCE_MEM, |
| 316 | }, |
| 317 | { |
| 318 | .start = MPC85xx_IRQ_SEC2, |
| 319 | .end = MPC85xx_IRQ_SEC2, |
| 320 | .flags = IORESOURCE_IRQ, |
| 321 | }, |
| 322 | }, |
| 323 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | [MPC85xx_CPM_FCC1] = { |
| 325 | .name = "fsl-cpm-fcc", |
| 326 | .id = 1, |
| 327 | .num_resources = 3, |
| 328 | .resource = (struct resource[]) { |
| 329 | { |
| 330 | .start = 0x91300, |
| 331 | .end = 0x9131F, |
| 332 | .flags = IORESOURCE_MEM, |
| 333 | }, |
| 334 | { |
| 335 | .start = 0x91380, |
| 336 | .end = 0x9139F, |
| 337 | .flags = IORESOURCE_MEM, |
| 338 | }, |
| 339 | { |
| 340 | .start = SIU_INT_FCC1, |
| 341 | .end = SIU_INT_FCC1, |
| 342 | .flags = IORESOURCE_IRQ, |
| 343 | }, |
| 344 | }, |
| 345 | }, |
| 346 | [MPC85xx_CPM_FCC2] = { |
| 347 | .name = "fsl-cpm-fcc", |
| 348 | .id = 2, |
| 349 | .num_resources = 3, |
| 350 | .resource = (struct resource[]) { |
| 351 | { |
| 352 | .start = 0x91320, |
| 353 | .end = 0x9133F, |
| 354 | .flags = IORESOURCE_MEM, |
| 355 | }, |
| 356 | { |
| 357 | .start = 0x913A0, |
| 358 | .end = 0x913CF, |
| 359 | .flags = IORESOURCE_MEM, |
| 360 | }, |
| 361 | { |
| 362 | .start = SIU_INT_FCC2, |
| 363 | .end = SIU_INT_FCC2, |
| 364 | .flags = IORESOURCE_IRQ, |
| 365 | }, |
| 366 | }, |
| 367 | }, |
| 368 | [MPC85xx_CPM_FCC3] = { |
| 369 | .name = "fsl-cpm-fcc", |
| 370 | .id = 3, |
| 371 | .num_resources = 3, |
| 372 | .resource = (struct resource[]) { |
| 373 | { |
| 374 | .start = 0x91340, |
| 375 | .end = 0x9135F, |
| 376 | .flags = IORESOURCE_MEM, |
| 377 | }, |
| 378 | { |
| 379 | .start = 0x913D0, |
| 380 | .end = 0x913FF, |
| 381 | .flags = IORESOURCE_MEM, |
| 382 | }, |
| 383 | { |
| 384 | .start = SIU_INT_FCC3, |
| 385 | .end = SIU_INT_FCC3, |
| 386 | .flags = IORESOURCE_IRQ, |
| 387 | }, |
| 388 | }, |
| 389 | }, |
| 390 | [MPC85xx_CPM_I2C] = { |
| 391 | .name = "fsl-cpm-i2c", |
| 392 | .id = 1, |
| 393 | .num_resources = 2, |
| 394 | .resource = (struct resource[]) { |
| 395 | { |
| 396 | .start = 0x91860, |
| 397 | .end = 0x918BF, |
| 398 | .flags = IORESOURCE_MEM, |
| 399 | }, |
| 400 | { |
| 401 | .start = SIU_INT_I2C, |
| 402 | .end = SIU_INT_I2C, |
| 403 | .flags = IORESOURCE_IRQ, |
| 404 | }, |
| 405 | }, |
| 406 | }, |
| 407 | [MPC85xx_CPM_SCC1] = { |
| 408 | .name = "fsl-cpm-scc", |
| 409 | .id = 1, |
| 410 | .num_resources = 2, |
| 411 | .resource = (struct resource[]) { |
| 412 | { |
| 413 | .start = 0x91A00, |
| 414 | .end = 0x91A1F, |
| 415 | .flags = IORESOURCE_MEM, |
| 416 | }, |
| 417 | { |
| 418 | .start = SIU_INT_SCC1, |
| 419 | .end = SIU_INT_SCC1, |
| 420 | .flags = IORESOURCE_IRQ, |
| 421 | }, |
| 422 | }, |
| 423 | }, |
| 424 | [MPC85xx_CPM_SCC2] = { |
| 425 | .name = "fsl-cpm-scc", |
| 426 | .id = 2, |
| 427 | .num_resources = 2, |
| 428 | .resource = (struct resource[]) { |
| 429 | { |
| 430 | .start = 0x91A20, |
| 431 | .end = 0x91A3F, |
| 432 | .flags = IORESOURCE_MEM, |
| 433 | }, |
| 434 | { |
| 435 | .start = SIU_INT_SCC2, |
| 436 | .end = SIU_INT_SCC2, |
| 437 | .flags = IORESOURCE_IRQ, |
| 438 | }, |
| 439 | }, |
| 440 | }, |
| 441 | [MPC85xx_CPM_SCC3] = { |
| 442 | .name = "fsl-cpm-scc", |
| 443 | .id = 3, |
| 444 | .num_resources = 2, |
| 445 | .resource = (struct resource[]) { |
| 446 | { |
| 447 | .start = 0x91A40, |
| 448 | .end = 0x91A5F, |
| 449 | .flags = IORESOURCE_MEM, |
| 450 | }, |
| 451 | { |
| 452 | .start = SIU_INT_SCC3, |
| 453 | .end = SIU_INT_SCC3, |
| 454 | .flags = IORESOURCE_IRQ, |
| 455 | }, |
| 456 | }, |
| 457 | }, |
| 458 | [MPC85xx_CPM_SCC4] = { |
| 459 | .name = "fsl-cpm-scc", |
| 460 | .id = 4, |
| 461 | .num_resources = 2, |
| 462 | .resource = (struct resource[]) { |
| 463 | { |
| 464 | .start = 0x91A60, |
| 465 | .end = 0x91A7F, |
| 466 | .flags = IORESOURCE_MEM, |
| 467 | }, |
| 468 | { |
| 469 | .start = SIU_INT_SCC4, |
| 470 | .end = SIU_INT_SCC4, |
| 471 | .flags = IORESOURCE_IRQ, |
| 472 | }, |
| 473 | }, |
| 474 | }, |
| 475 | [MPC85xx_CPM_SPI] = { |
| 476 | .name = "fsl-cpm-spi", |
| 477 | .id = 1, |
| 478 | .num_resources = 2, |
| 479 | .resource = (struct resource[]) { |
| 480 | { |
| 481 | .start = 0x91AA0, |
| 482 | .end = 0x91AFF, |
| 483 | .flags = IORESOURCE_MEM, |
| 484 | }, |
| 485 | { |
| 486 | .start = SIU_INT_SPI, |
| 487 | .end = SIU_INT_SPI, |
| 488 | .flags = IORESOURCE_IRQ, |
| 489 | }, |
| 490 | }, |
| 491 | }, |
| 492 | [MPC85xx_CPM_MCC1] = { |
| 493 | .name = "fsl-cpm-mcc", |
| 494 | .id = 1, |
| 495 | .num_resources = 2, |
| 496 | .resource = (struct resource[]) { |
| 497 | { |
| 498 | .start = 0x91B30, |
| 499 | .end = 0x91B3F, |
| 500 | .flags = IORESOURCE_MEM, |
| 501 | }, |
| 502 | { |
| 503 | .start = SIU_INT_MCC1, |
| 504 | .end = SIU_INT_MCC1, |
| 505 | .flags = IORESOURCE_IRQ, |
| 506 | }, |
| 507 | }, |
| 508 | }, |
| 509 | [MPC85xx_CPM_MCC2] = { |
| 510 | .name = "fsl-cpm-mcc", |
| 511 | .id = 2, |
| 512 | .num_resources = 2, |
| 513 | .resource = (struct resource[]) { |
| 514 | { |
| 515 | .start = 0x91B50, |
| 516 | .end = 0x91B5F, |
| 517 | .flags = IORESOURCE_MEM, |
| 518 | }, |
| 519 | { |
| 520 | .start = SIU_INT_MCC2, |
| 521 | .end = SIU_INT_MCC2, |
| 522 | .flags = IORESOURCE_IRQ, |
| 523 | }, |
| 524 | }, |
| 525 | }, |
| 526 | [MPC85xx_CPM_SMC1] = { |
| 527 | .name = "fsl-cpm-smc", |
| 528 | .id = 1, |
| 529 | .num_resources = 2, |
| 530 | .resource = (struct resource[]) { |
| 531 | { |
| 532 | .start = 0x91A80, |
| 533 | .end = 0x91A8F, |
| 534 | .flags = IORESOURCE_MEM, |
| 535 | }, |
| 536 | { |
| 537 | .start = SIU_INT_SMC1, |
| 538 | .end = SIU_INT_SMC1, |
| 539 | .flags = IORESOURCE_IRQ, |
| 540 | }, |
| 541 | }, |
| 542 | }, |
| 543 | [MPC85xx_CPM_SMC2] = { |
| 544 | .name = "fsl-cpm-smc", |
| 545 | .id = 2, |
| 546 | .num_resources = 2, |
| 547 | .resource = (struct resource[]) { |
| 548 | { |
| 549 | .start = 0x91A90, |
| 550 | .end = 0x91A9F, |
| 551 | .flags = IORESOURCE_MEM, |
| 552 | }, |
| 553 | { |
| 554 | .start = SIU_INT_SMC2, |
| 555 | .end = SIU_INT_SMC2, |
| 556 | .flags = IORESOURCE_IRQ, |
| 557 | }, |
| 558 | }, |
| 559 | }, |
| 560 | [MPC85xx_CPM_USB] = { |
| 561 | .name = "fsl-cpm-usb", |
| 562 | .id = 2, |
| 563 | .num_resources = 2, |
| 564 | .resource = (struct resource[]) { |
| 565 | { |
| 566 | .start = 0x91B60, |
| 567 | .end = 0x91B7F, |
| 568 | .flags = IORESOURCE_MEM, |
| 569 | }, |
| 570 | { |
| 571 | .start = SIU_INT_USB, |
| 572 | .end = SIU_INT_USB, |
| 573 | .flags = IORESOURCE_IRQ, |
| 574 | }, |
| 575 | }, |
| 576 | }, |
Kumar Gala | 5b37b70 | 2005-06-21 17:15:18 -0700 | [diff] [blame] | 577 | [MPC85xx_eTSEC1] = { |
| 578 | .name = "fsl-gianfar", |
| 579 | .id = 1, |
| 580 | .dev.platform_data = &mpc85xx_etsec1_pdata, |
| 581 | .num_resources = 4, |
| 582 | .resource = (struct resource[]) { |
| 583 | { |
| 584 | .start = MPC85xx_ENET1_OFFSET, |
| 585 | .end = MPC85xx_ENET1_OFFSET + |
| 586 | MPC85xx_ENET1_SIZE - 1, |
| 587 | .flags = IORESOURCE_MEM, |
| 588 | }, |
| 589 | { |
| 590 | .name = "tx", |
| 591 | .start = MPC85xx_IRQ_TSEC1_TX, |
| 592 | .end = MPC85xx_IRQ_TSEC1_TX, |
| 593 | .flags = IORESOURCE_IRQ, |
| 594 | }, |
| 595 | { |
| 596 | .name = "rx", |
| 597 | .start = MPC85xx_IRQ_TSEC1_RX, |
| 598 | .end = MPC85xx_IRQ_TSEC1_RX, |
| 599 | .flags = IORESOURCE_IRQ, |
| 600 | }, |
| 601 | { |
| 602 | .name = "error", |
| 603 | .start = MPC85xx_IRQ_TSEC1_ERROR, |
| 604 | .end = MPC85xx_IRQ_TSEC1_ERROR, |
| 605 | .flags = IORESOURCE_IRQ, |
| 606 | }, |
| 607 | }, |
| 608 | }, |
| 609 | [MPC85xx_eTSEC2] = { |
| 610 | .name = "fsl-gianfar", |
| 611 | .id = 2, |
| 612 | .dev.platform_data = &mpc85xx_etsec2_pdata, |
| 613 | .num_resources = 4, |
| 614 | .resource = (struct resource[]) { |
| 615 | { |
| 616 | .start = MPC85xx_ENET2_OFFSET, |
| 617 | .end = MPC85xx_ENET2_OFFSET + |
| 618 | MPC85xx_ENET2_SIZE - 1, |
| 619 | .flags = IORESOURCE_MEM, |
| 620 | }, |
| 621 | { |
| 622 | .name = "tx", |
| 623 | .start = MPC85xx_IRQ_TSEC2_TX, |
| 624 | .end = MPC85xx_IRQ_TSEC2_TX, |
| 625 | .flags = IORESOURCE_IRQ, |
| 626 | }, |
| 627 | { |
| 628 | .name = "rx", |
| 629 | .start = MPC85xx_IRQ_TSEC2_RX, |
| 630 | .end = MPC85xx_IRQ_TSEC2_RX, |
| 631 | .flags = IORESOURCE_IRQ, |
| 632 | }, |
| 633 | { |
| 634 | .name = "error", |
| 635 | .start = MPC85xx_IRQ_TSEC2_ERROR, |
| 636 | .end = MPC85xx_IRQ_TSEC2_ERROR, |
| 637 | .flags = IORESOURCE_IRQ, |
| 638 | }, |
| 639 | }, |
| 640 | }, |
| 641 | [MPC85xx_eTSEC3] = { |
| 642 | .name = "fsl-gianfar", |
| 643 | .id = 3, |
| 644 | .dev.platform_data = &mpc85xx_etsec3_pdata, |
| 645 | .num_resources = 4, |
| 646 | .resource = (struct resource[]) { |
| 647 | { |
| 648 | .start = MPC85xx_ENET3_OFFSET, |
| 649 | .end = MPC85xx_ENET3_OFFSET + |
| 650 | MPC85xx_ENET3_SIZE - 1, |
| 651 | .flags = IORESOURCE_MEM, |
| 652 | }, |
| 653 | { |
| 654 | .name = "tx", |
| 655 | .start = MPC85xx_IRQ_TSEC3_TX, |
| 656 | .end = MPC85xx_IRQ_TSEC3_TX, |
| 657 | .flags = IORESOURCE_IRQ, |
| 658 | }, |
| 659 | { |
| 660 | .name = "rx", |
| 661 | .start = MPC85xx_IRQ_TSEC3_RX, |
| 662 | .end = MPC85xx_IRQ_TSEC3_RX, |
| 663 | .flags = IORESOURCE_IRQ, |
| 664 | }, |
| 665 | { |
| 666 | .name = "error", |
| 667 | .start = MPC85xx_IRQ_TSEC3_ERROR, |
| 668 | .end = MPC85xx_IRQ_TSEC3_ERROR, |
| 669 | .flags = IORESOURCE_IRQ, |
| 670 | }, |
| 671 | }, |
| 672 | }, |
| 673 | [MPC85xx_eTSEC4] = { |
| 674 | .name = "fsl-gianfar", |
| 675 | .id = 4, |
| 676 | .dev.platform_data = &mpc85xx_etsec4_pdata, |
| 677 | .num_resources = 4, |
| 678 | .resource = (struct resource[]) { |
| 679 | { |
| 680 | .start = 0x27000, |
| 681 | .end = 0x27fff, |
| 682 | .flags = IORESOURCE_MEM, |
| 683 | }, |
| 684 | { |
| 685 | .name = "tx", |
| 686 | .start = MPC85xx_IRQ_TSEC4_TX, |
| 687 | .end = MPC85xx_IRQ_TSEC4_TX, |
| 688 | .flags = IORESOURCE_IRQ, |
| 689 | }, |
| 690 | { |
| 691 | .name = "rx", |
| 692 | .start = MPC85xx_IRQ_TSEC4_RX, |
| 693 | .end = MPC85xx_IRQ_TSEC4_RX, |
| 694 | .flags = IORESOURCE_IRQ, |
| 695 | }, |
| 696 | { |
| 697 | .name = "error", |
| 698 | .start = MPC85xx_IRQ_TSEC4_ERROR, |
| 699 | .end = MPC85xx_IRQ_TSEC4_ERROR, |
| 700 | .flags = IORESOURCE_IRQ, |
| 701 | }, |
| 702 | }, |
| 703 | }, |
| 704 | [MPC85xx_IIC2] = { |
| 705 | .name = "fsl-i2c", |
| 706 | .id = 2, |
| 707 | .dev.platform_data = &mpc85xx_fsl_i2c2_pdata, |
| 708 | .num_resources = 2, |
| 709 | .resource = (struct resource[]) { |
| 710 | { |
| 711 | .start = 0x03100, |
| 712 | .end = 0x031ff, |
| 713 | .flags = IORESOURCE_MEM, |
| 714 | }, |
| 715 | { |
| 716 | .start = MPC85xx_IRQ_IIC1, |
| 717 | .end = MPC85xx_IRQ_IIC1, |
| 718 | .flags = IORESOURCE_IRQ, |
| 719 | }, |
| 720 | }, |
| 721 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | }; |
| 723 | |
| 724 | static int __init mach_mpc85xx_fixup(struct platform_device *pdev) |
| 725 | { |
| 726 | ppc_sys_fixup_mem_resource(pdev, CCSRBAR); |
| 727 | return 0; |
| 728 | } |
| 729 | |
| 730 | static int __init mach_mpc85xx_init(void) |
| 731 | { |
| 732 | ppc_sys_device_fixup = mach_mpc85xx_fixup; |
| 733 | return 0; |
| 734 | } |
| 735 | |
| 736 | postcore_initcall(mach_mpc85xx_init); |