blob: f47d26e2a13566d870a54ad6f284736f9ffa0209 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Dave Jonesf4432c52008-10-20 13:31:45 -04002 * (C) 2001-2004 Dave Jones. <davej@redhat.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * (C) 2002 Padraig Brady. <padraig@antefacto.com>
4 *
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon datasheets & sample CPUs kindly provided by VIA.
7 *
8 * VIA have currently 3 different versions of Longhaul.
9 * Version 1 (Longhaul) uses the BCR2 MSR at 0x1147.
10 * It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0.
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +010011 * Version 2 of longhaul is backward compatible with v1, but adds
12 * LONGHAUL MSR for purpose of both frequency and voltage scaling.
13 * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 * Version 3 of longhaul got renamed to Powersaver and redesigned
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +010015 * to use only the POWERSAVER MSR at 0x110a.
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 * It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
17 * It's pretty much the same feature wise to longhaul v2, though
18 * there is provision for scaling FSB too, but this doesn't work
19 * too well in practice so we don't even try to use this.
20 *
21 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/cpufreq.h>
Rafa³ Bilski179da8e2006-08-08 19:12:20 +020029#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/slab.h>
31#include <linux/string.h>
Rafał Bilski73e107d2007-05-28 21:56:19 +020032#include <linux/delay.h>
Dave Jonesac617bd2009-01-17 23:29:53 -050033#include <linux/timex.h>
34#include <linux/io.h>
35#include <linux/acpi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37#include <asm/msr.h>
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +020038#include <acpi/processor.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
40#include "longhaul.h"
41
42#define PFX "longhaul: "
43
44#define TYPE_LONGHAUL_V1 1
45#define TYPE_LONGHAUL_V2 2
46#define TYPE_POWERSAVER 3
47
48#define CPU_SAMUEL 1
49#define CPU_SAMUEL2 2
50#define CPU_EZRA 3
51#define CPU_EZRA_T 4
52#define CPU_NEHEMIAH 5
Rafa³ Bilski980342a2007-01-31 23:42:47 +010053#define CPU_NEHEMIAH_C 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070054
Rafa³ Bilski264166e2006-12-24 14:04:23 +010055/* Flags */
56#define USE_ACPI_C3 (1 << 1)
57#define USE_NORTHBRIDGE (1 << 2)
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059static int cpu_model;
Dave Jonesac617bd2009-01-17 23:29:53 -050060static unsigned int numscales = 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061static unsigned int fsb;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020062
Dave Jonesbd5ab262007-02-22 19:11:16 -050063static const struct mV_pos *vrm_mV_table;
64static const unsigned char *mV_vrm_table;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020065
66static unsigned int highest_speed, lowest_speed; /* kHz */
Linus Torvalds1da177e2005-04-16 15:20:36 -070067static unsigned int minmult, maxmult;
68static int can_scale_voltage;
Dave Jonesac617bd2009-01-17 23:29:53 -050069static struct acpi_processor *pr;
70static struct acpi_processor_cx *cx;
Rafał Bilski275bc6b2007-06-05 22:08:50 +020071static u32 acpi_regs_addr;
Rafa³ Bilski264166e2006-12-24 14:04:23 +010072static u8 longhaul_flags;
Rafał Bilski73e107d2007-05-28 21:56:19 +020073static unsigned int longhaul_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75/* Module parameters */
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020076static int scale_voltage;
Rafał Bilski905497c2007-07-08 21:51:26 +020077static int disable_acpi_c3;
Rafal Bilski52a26382007-10-07 00:24:32 -070078static int revid_errata;
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Linus Torvalds1da177e2005-04-16 15:20:36 -070081/* Clock ratios multiplied by 10 */
Dave Jonesac617bd2009-01-17 23:29:53 -050082static int mults[32];
83static int eblcr[32];
Linus Torvalds1da177e2005-04-16 15:20:36 -070084static int longhaul_version;
85static struct cpufreq_frequency_table *longhaul_table;
86
Linus Torvalds1da177e2005-04-16 15:20:36 -070087static char speedbuffer[8];
88
89static char *print_speed(int speed)
90{
Dave Jonese2aa8732006-05-30 17:37:15 -040091 if (speed < 1000) {
Dave Jonesac617bd2009-01-17 23:29:53 -050092 snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed);
Dave Jonese2aa8732006-05-30 17:37:15 -040093 return speedbuffer;
94 }
95
96 if (speed%1000 == 0)
97 snprintf(speedbuffer, sizeof(speedbuffer),
98 "%dGHz", speed/1000);
99 else
100 snprintf(speedbuffer, sizeof(speedbuffer),
101 "%d.%dGHz", speed/1000, (speed%1000)/100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102
103 return speedbuffer;
104}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105
106
107static unsigned int calc_speed(int mult)
108{
109 int khz;
110 khz = (mult/10)*fsb;
111 if (mult%10)
112 khz += fsb/2;
113 khz *= 1000;
114 return khz;
115}
116
117
118static int longhaul_get_cpu_mult(void)
119{
Dave Jonesac617bd2009-01-17 23:29:53 -0500120 unsigned long invalue = 0, lo, hi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
Dave Jonesac617bd2009-01-17 23:29:53 -0500122 rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
123 invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22;
124 if (longhaul_version == TYPE_LONGHAUL_V2 ||
125 longhaul_version == TYPE_POWERSAVER) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 if (lo & (1<<27))
Dave Jonesac617bd2009-01-17 23:29:53 -0500127 invalue += 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500129 return eblcr[invalue];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130}
131
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200132/* For processor with BCR2 MSR */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133
Dave Jonesac617bd2009-01-17 23:29:53 -0500134static void do_longhaul1(unsigned int mults_index)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135{
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200136 union msr_bcr2 bcr2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200138 rdmsrl(MSR_VIA_BCR2, bcr2.val);
139 /* Enable software clock multiplier */
140 bcr2.bits.ESOFTBF = 1;
Dave Jonesac617bd2009-01-17 23:29:53 -0500141 bcr2.bits.CLOCKMUL = mults_index & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200143 /* Sync to timer tick */
Zachary Amsden4bb0d3e2005-09-03 15:56:36 -0700144 safe_halt();
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200145 /* Change frequency on next halt or sleep */
146 wrmsrl(MSR_VIA_BCR2, bcr2.val);
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200147 /* Invoke transition */
148 ACPI_FLUSH_CPU_CACHE();
149 halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200151 /* Disable software clock multiplier */
Dave Jones3be6a482005-05-31 19:03:51 -0700152 local_irq_disable();
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200153 rdmsrl(MSR_VIA_BCR2, bcr2.val);
154 bcr2.bits.ESOFTBF = 0;
155 wrmsrl(MSR_VIA_BCR2, bcr2.val);
156}
Dave Jones3be6a482005-05-31 19:03:51 -0700157
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200158/* For processor with Longhaul MSR */
Dave Jones11746312005-05-31 19:03:51 -0700159
Dave Jonesac617bd2009-01-17 23:29:53 -0500160static void do_powersaver(int cx_address, unsigned int mults_index,
Rafał Bilski73e107d2007-05-28 21:56:19 +0200161 unsigned int dir)
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200162{
163 union msr_longhaul longhaul;
164 u32 t;
Dave Jones3be6a482005-05-31 19:03:51 -0700165
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200166 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100167 /* Setup new frequency */
Rafal Bilski52a26382007-10-07 00:24:32 -0700168 if (!revid_errata)
169 longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
170 else
171 longhaul.bits.RevisionKey = 0;
Dave Jonesac617bd2009-01-17 23:29:53 -0500172 longhaul.bits.SoftBusRatio = mults_index & 0xf;
173 longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100174 /* Setup new voltage */
175 if (can_scale_voltage)
Dave Jonesac617bd2009-01-17 23:29:53 -0500176 longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200177 /* Sync to timer tick */
178 safe_halt();
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100179 /* Raise voltage if necessary */
Rafał Bilski73e107d2007-05-28 21:56:19 +0200180 if (can_scale_voltage && dir) {
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100181 longhaul.bits.EnableSoftVID = 1;
182 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
183 /* Change voltage */
184 if (!cx_address) {
185 ACPI_FLUSH_CPU_CACHE();
186 halt();
187 } else {
188 ACPI_FLUSH_CPU_CACHE();
189 /* Invoke C3 */
190 inb(cx_address);
191 /* Dummy op - must do something useless after P_LVL3
192 * read */
Dave Jonesbd0561c2007-02-10 20:36:29 -0500193 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100194 }
195 longhaul.bits.EnableSoftVID = 0;
196 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100197 }
198
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200199 /* Change frequency on next halt or sleep */
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100200 longhaul.bits.EnableSoftBusRatio = 1;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200201 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100202 if (!cx_address) {
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200203 ACPI_FLUSH_CPU_CACHE();
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200204 halt();
205 } else {
206 ACPI_FLUSH_CPU_CACHE();
207 /* Invoke C3 */
208 inb(cx_address);
209 /* Dummy op - must do something useless after P_LVL3 read */
Alexey Starikovskiycee324b2007-02-02 19:48:22 +0300210 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200211 }
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200212 /* Disable bus ratio bit */
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200213 longhaul.bits.EnableSoftBusRatio = 0;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200214 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100215
216 /* Reduce voltage if necessary */
Rafał Bilski73e107d2007-05-28 21:56:19 +0200217 if (can_scale_voltage && !dir) {
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100218 longhaul.bits.EnableSoftVID = 1;
219 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
220 /* Change voltage */
221 if (!cx_address) {
222 ACPI_FLUSH_CPU_CACHE();
223 halt();
224 } else {
225 ACPI_FLUSH_CPU_CACHE();
226 /* Invoke C3 */
227 inb(cx_address);
228 /* Dummy op - must do something useless after P_LVL3
229 * read */
Dave Jonesbd0561c2007-02-10 20:36:29 -0500230 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100231 }
232 longhaul.bits.EnableSoftVID = 0;
233 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100234 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235}
236
237/**
238 * longhaul_set_cpu_frequency()
Dave Jonesac617bd2009-01-17 23:29:53 -0500239 * @mults_index : bitpattern of the new multiplier.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240 *
241 * Sets a new clock ratio.
242 */
243
Rafał Bilski73e107d2007-05-28 21:56:19 +0200244static void longhaul_setstate(unsigned int table_index)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245{
Dave Jonesac617bd2009-01-17 23:29:53 -0500246 unsigned int mults_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 int speed, mult;
248 struct cpufreq_freqs freqs;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200249 unsigned long flags;
250 unsigned int pic1_mask, pic2_mask;
Rafał Bilski689eba72007-06-07 22:31:24 +0200251 u16 bm_status = 0;
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200252 u32 bm_timeout = 1000;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200253 unsigned int dir = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254
Dave Jonesac617bd2009-01-17 23:29:53 -0500255 mults_index = longhaul_table[table_index].index;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200256 /* Safety precautions */
Dave Jonesac617bd2009-01-17 23:29:53 -0500257 mult = mults[mults_index & 0x1f];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258 if (mult == -1)
259 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260 speed = calc_speed(mult);
261 if ((speed > highest_speed) || (speed < lowest_speed))
262 return;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200263 /* Voltage transition before frequency transition? */
264 if (can_scale_voltage && longhaul_index < table_index)
265 dir = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
267 freqs.old = calc_speed(longhaul_get_cpu_mult());
268 freqs.new = speed;
269 freqs.cpu = 0; /* longhaul.c is UP only driver */
270
271 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
272
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200273 pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 fsb, mult/10, mult%10, print_speed(speed/1000));
Rafal Bilski52a26382007-10-07 00:24:32 -0700275retry_loop:
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200276 preempt_disable();
277 local_irq_save(flags);
278
279 pic2_mask = inb(0xA1);
280 pic1_mask = inb(0x21); /* works on C3. save mask. */
Dave Jonesac617bd2009-01-17 23:29:53 -0500281 outb(0xFF, 0xA1); /* Overkill */
282 outb(0xFE, 0x21); /* TMR0 only */
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200283
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200284 /* Wait while PCI bus is busy. */
Rafał Bilski689eba72007-06-07 22:31:24 +0200285 if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE
286 || ((pr != NULL) && pr->flags.bm_control))) {
287 bm_status = inw(acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200288 bm_status &= 1 << 4;
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200289 while (bm_status && bm_timeout) {
Rafał Bilski689eba72007-06-07 22:31:24 +0200290 outw(1 << 4, acpi_regs_addr);
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200291 bm_timeout--;
Rafał Bilski689eba72007-06-07 22:31:24 +0200292 bm_status = inw(acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200293 bm_status &= 1 << 4;
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200294 }
295 }
296
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100297 if (longhaul_flags & USE_NORTHBRIDGE) {
298 /* Disable AGP and PCI arbiters */
299 outb(3, 0x22);
300 } else if ((pr != NULL) && pr->flags.bm_control) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200301 /* Disable bus master arbitration */
Lin Mingfb318cb2009-03-18 09:09:01 +0800302 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200303 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304 switch (longhaul_version) {
305
306 /*
307 * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])
308 * Software controlled multipliers only.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309 */
310 case TYPE_LONGHAUL_V1:
Dave Jonesac617bd2009-01-17 23:29:53 -0500311 do_longhaul1(mults_index);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 break;
313
314 /*
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100315 * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5B] and Ezra [C5C]
316 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 * Nehemiah can do FSB scaling too, but this has never been proven
319 * to work in practice.
320 */
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100321 case TYPE_LONGHAUL_V2:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 case TYPE_POWERSAVER:
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100323 if (longhaul_flags & USE_ACPI_C3) {
324 /* Don't allow wakeup */
Lin Mingfb318cb2009-03-18 09:09:01 +0800325 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
Dave Jonesac617bd2009-01-17 23:29:53 -0500326 do_powersaver(cx->address, mults_index, dir);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100327 } else {
Dave Jonesac617bd2009-01-17 23:29:53 -0500328 do_powersaver(0, mults_index, dir);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100329 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 break;
331 }
332
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100333 if (longhaul_flags & USE_NORTHBRIDGE) {
334 /* Enable arbiters */
335 outb(0, 0x22);
336 } else if ((pr != NULL) && pr->flags.bm_control) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200337 /* Enable bus master arbitration */
Lin Mingfb318cb2009-03-18 09:09:01 +0800338 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200339 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500340 outb(pic2_mask, 0xA1); /* restore mask */
341 outb(pic1_mask, 0x21);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200342
343 local_irq_restore(flags);
344 preempt_enable();
345
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100346 freqs.new = calc_speed(longhaul_get_cpu_mult());
Rafal Bilski52a26382007-10-07 00:24:32 -0700347 /* Check if requested frequency is set. */
348 if (unlikely(freqs.new != speed)) {
349 printk(KERN_INFO PFX "Failed to set requested frequency!\n");
350 /* Revision ID = 1 but processor is expecting revision key
351 * equal to 0. Jumpers at the bottom of processor will change
352 * multiplier and FSB, but will not change bits in Longhaul
353 * MSR nor enable voltage scaling. */
354 if (!revid_errata) {
355 printk(KERN_INFO PFX "Enabling \"Ignore Revision ID\" "
356 "option.\n");
357 revid_errata = 1;
358 msleep(200);
359 goto retry_loop;
360 }
361 /* Why ACPI C3 sometimes doesn't work is a mystery for me.
362 * But it does happen. Processor is entering ACPI C3 state,
363 * but it doesn't change frequency. I tried poking various
364 * bits in northbridge registers, but without success. */
365 if (longhaul_flags & USE_ACPI_C3) {
366 printk(KERN_INFO PFX "Disabling ACPI C3 support.\n");
367 longhaul_flags &= ~USE_ACPI_C3;
368 if (revid_errata) {
369 printk(KERN_INFO PFX "Disabling \"Ignore "
370 "Revision ID\" option.\n");
371 revid_errata = 0;
372 }
373 msleep(200);
374 goto retry_loop;
375 }
376 /* This shouldn't happen. Longhaul ver. 2 was reported not
377 * working on processors without voltage scaling, but with
378 * RevID = 1. RevID errata will make things right. Just
379 * to be 100% sure. */
380 if (longhaul_version == TYPE_LONGHAUL_V2) {
381 printk(KERN_INFO PFX "Switching to Longhaul ver. 1\n");
382 longhaul_version = TYPE_LONGHAUL_V1;
383 msleep(200);
384 goto retry_loop;
385 }
386 }
387 /* Report true CPU frequency */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200389
390 if (!bm_timeout)
Dave Jonesac617bd2009-01-17 23:29:53 -0500391 printk(KERN_INFO PFX "Warning: Timeout while waiting for "
392 "idle PCI bus.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393}
394
395/*
396 * Centaur decided to make life a little more tricky.
397 * Only longhaul v1 is allowed to read EBLCR BSEL[0:1].
398 * Samuel2 and above have to try and guess what the FSB is.
399 * We do this by assuming we booted at maximum multiplier, and interpolate
400 * between that value multiplied by possible FSBs and cpu_mhz which
401 * was calculated at boot time. Really ugly, but no other way to do this.
402 */
403
404#define ROUNDING 0xf
405
Rafa³ Bilski24ebead2007-01-01 23:49:34 +0100406static int guess_fsb(int mult)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407{
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100408 int speed = cpu_khz / 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 int i;
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100410 int speeds[] = { 666, 1000, 1333, 2000 };
411 int f_max, f_min;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700412
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100413 for (i = 0; i < 4; i++) {
414 f_max = ((speeds[i] * mult) + 50) / 100;
415 f_max += (ROUNDING / 2);
416 f_min = f_max - ROUNDING;
417 if ((speed <= f_max) && (speed >= f_min))
418 return speeds[i] / 10;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419 }
420 return 0;
421}
422
423
Holger Freyther25305732010-07-19 03:29:03 +0800424static int __cpuinit longhaul_get_ranges(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425{
Rafał Bilski73e107d2007-05-28 21:56:19 +0200426 unsigned int i, j, k = 0;
427 unsigned int ratio;
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100428 int mult;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100430 /* Get current frequency */
431 mult = longhaul_get_cpu_mult();
432 if (mult == -1) {
433 printk(KERN_INFO PFX "Invalid (reserved) multiplier!\n");
434 return -EINVAL;
435 }
436 fsb = guess_fsb(mult);
437 if (fsb == 0) {
438 printk(KERN_INFO PFX "Invalid (reserved) FSB!\n");
439 return -EINVAL;
440 }
441 /* Get max multiplier - as we always did.
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300442 * Longhaul MSR is useful only when voltage scaling is enabled.
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100443 * C3 is booting at max anyway. */
444 maxmult = mult;
445 /* Get min multiplier */
Rafa³ Bilski9addf3b2007-02-07 22:53:29 +0100446 switch (cpu_model) {
447 case CPU_NEHEMIAH:
448 minmult = 50;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 break;
Rafa³ Bilski9addf3b2007-02-07 22:53:29 +0100450 case CPU_NEHEMIAH_C:
451 minmult = 40;
452 break;
453 default:
454 minmult = 30;
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100455 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 }
457
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200458 pr_debug("MinMult:%d.%dx MaxMult:%d.%dx\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459 minmult/10, minmult%10, maxmult/10, maxmult%10);
460
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 highest_speed = calc_speed(maxmult);
462 lowest_speed = calc_speed(minmult);
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200463 pr_debug("FSB:%dMHz Lowest speed: %s Highest speed:%s\n", fsb,
Alexey Starikovskiycee324b2007-02-02 19:48:22 +0300464 print_speed(lowest_speed/1000),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 print_speed(highest_speed/1000));
466
467 if (lowest_speed == highest_speed) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500468 printk(KERN_INFO PFX "highestspeed == lowest, aborting.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 return -EINVAL;
470 }
471 if (lowest_speed > highest_speed) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500472 printk(KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473 lowest_speed, highest_speed);
474 return -EINVAL;
475 }
476
Dave Jonesac617bd2009-01-17 23:29:53 -0500477 longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
478 GFP_KERNEL);
479 if (!longhaul_table)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 return -ENOMEM;
481
Rafał Bilski73e107d2007-05-28 21:56:19 +0200482 for (j = 0; j < numscales; j++) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500483 ratio = mults[j];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 if (ratio == -1)
485 continue;
486 if (ratio > maxmult || ratio < minmult)
487 continue;
488 longhaul_table[k].frequency = calc_speed(ratio);
489 longhaul_table[k].index = j;
490 k++;
491 }
Rafał Bilski73e107d2007-05-28 21:56:19 +0200492 if (k <= 1) {
493 kfree(longhaul_table);
494 return -ENODEV;
495 }
496 /* Sort */
497 for (j = 0; j < k - 1; j++) {
498 unsigned int min_f, min_i;
499 min_f = longhaul_table[j].frequency;
500 min_i = j;
501 for (i = j + 1; i < k; i++) {
502 if (longhaul_table[i].frequency < min_f) {
503 min_f = longhaul_table[i].frequency;
504 min_i = i;
505 }
506 }
507 if (min_i != j) {
Dave Jones91420222009-02-04 15:28:54 -0500508 swap(longhaul_table[j].frequency,
509 longhaul_table[min_i].frequency);
510 swap(longhaul_table[j].index,
511 longhaul_table[min_i].index);
Rafał Bilski73e107d2007-05-28 21:56:19 +0200512 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 }
514
Rafał Bilski73e107d2007-05-28 21:56:19 +0200515 longhaul_table[k].frequency = CPUFREQ_TABLE_END;
516
517 /* Find index we are running on */
518 for (j = 0; j < k; j++) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500519 if (mults[longhaul_table[j].index & 0x1f] == mult) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200520 longhaul_index = j;
521 break;
522 }
523 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524 return 0;
525}
526
527
Holger Freyther25305732010-07-19 03:29:03 +0800528static void __cpuinit longhaul_setup_voltagescaling(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529{
530 union msr_longhaul longhaul;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200531 struct mV_pos minvid, maxvid, vid;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200532 unsigned int j, speed, pos, kHz_step, numvscales;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100533 int min_vid_speed;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200535 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
536 if (!(longhaul.bits.RevisionID & 1)) {
537 printk(KERN_INFO PFX "Voltage scaling not supported by CPU.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 return;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200539 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200541 if (!longhaul.bits.VRMRev) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200542 printk(KERN_INFO PFX "VRM 8.5\n");
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200543 vrm_mV_table = &vrm85_mV[0];
544 mV_vrm_table = &mV_vrm85[0];
545 } else {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200546 printk(KERN_INFO PFX "Mobile VRM\n");
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100547 if (cpu_model < CPU_NEHEMIAH)
548 return;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200549 vrm_mV_table = &mobilevrm_mV[0];
550 mV_vrm_table = &mV_mobilevrm[0];
551 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200553 minvid = vrm_mV_table[longhaul.bits.MinimumVID];
554 maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200555
556 if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500557 printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 "Voltage scaling disabled.\n",
Dave Jonesac617bd2009-01-17 23:29:53 -0500559 minvid.mV/1000, minvid.mV%1000,
560 maxvid.mV/1000, maxvid.mV%1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 return;
562 }
563
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200564 if (minvid.mV == maxvid.mV) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500565 printk(KERN_INFO PFX "Claims to support voltage scaling but "
566 "min & max are both %d.%03d. "
567 "Voltage scaling disabled\n",
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200568 maxvid.mV/1000, maxvid.mV%1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569 return;
570 }
571
Dave Jonesac617bd2009-01-17 23:29:53 -0500572 /* How many voltage steps*/
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100573 numvscales = maxvid.pos - minvid.pos + 1;
574 printk(KERN_INFO PFX
575 "Max VID=%d.%03d "
576 "Min VID=%d.%03d, "
577 "%d possible voltage scales\n",
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200578 maxvid.mV/1000, maxvid.mV%1000,
579 minvid.mV/1000, minvid.mV%1000,
580 numvscales);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100581
582 /* Calculate max frequency at min voltage */
583 j = longhaul.bits.MinMHzBR;
584 if (longhaul.bits.MinMHzBR4)
585 j += 16;
Dave Jonesac617bd2009-01-17 23:29:53 -0500586 min_vid_speed = eblcr[j];
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100587 if (min_vid_speed == -1)
588 return;
589 switch (longhaul.bits.MinMHzFSB) {
590 case 0:
591 min_vid_speed *= 13333;
592 break;
593 case 1:
594 min_vid_speed *= 10000;
595 break;
596 case 3:
597 min_vid_speed *= 6666;
598 break;
599 default:
600 return;
601 break;
602 }
603 if (min_vid_speed >= highest_speed)
604 return;
605 /* Calculate kHz for one voltage step */
606 kHz_step = (highest_speed - min_vid_speed) / numvscales;
607
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200608 j = 0;
609 while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) {
610 speed = longhaul_table[j].frequency;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100611 if (speed > min_vid_speed)
612 pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
613 else
614 pos = minvid.pos;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200615 longhaul_table[j].index |= mV_vrm_table[pos] << 8;
616 vid = vrm_mV_table[mV_vrm_table[pos]];
Dave Jonesac617bd2009-01-17 23:29:53 -0500617 printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
618 speed, j, vid.mV);
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200619 j++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 }
621
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 can_scale_voltage = 1;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200623 printk(KERN_INFO PFX "Voltage scaling enabled.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624}
625
626
627static int longhaul_verify(struct cpufreq_policy *policy)
628{
629 return cpufreq_frequency_table_verify(policy, longhaul_table);
630}
631
632
633static int longhaul_target(struct cpufreq_policy *policy,
634 unsigned int target_freq, unsigned int relation)
635{
636 unsigned int table_index = 0;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200637 unsigned int i;
638 unsigned int dir = 0;
639 u8 vid, current_vid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
Dave Jonesac617bd2009-01-17 23:29:53 -0500641 if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq,
642 relation, &table_index))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643 return -EINVAL;
644
Rafał Bilski73e107d2007-05-28 21:56:19 +0200645 /* Don't set same frequency again */
646 if (longhaul_index == table_index)
647 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648
Rafał Bilski73e107d2007-05-28 21:56:19 +0200649 if (!can_scale_voltage)
650 longhaul_setstate(table_index);
651 else {
652 /* On test system voltage transitions exceeding single
653 * step up or down were turning motherboard off. Both
654 * "ondemand" and "userspace" are unsafe. C7 is doing
655 * this in hardware, C3 is old and we need to do this
656 * in software. */
657 i = longhaul_index;
Dave Jonesac617bd2009-01-17 23:29:53 -0500658 current_vid = (longhaul_table[longhaul_index].index >> 8);
659 current_vid &= 0x1f;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200660 if (table_index > longhaul_index)
661 dir = 1;
662 while (i != table_index) {
663 vid = (longhaul_table[i].index >> 8) & 0x1f;
664 if (vid != current_vid) {
665 longhaul_setstate(i);
666 current_vid = vid;
667 msleep(200);
668 }
669 if (dir)
670 i++;
671 else
672 i--;
673 }
674 longhaul_setstate(table_index);
675 }
676 longhaul_index = table_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677 return 0;
678}
679
680
681static unsigned int longhaul_get(unsigned int cpu)
682{
683 if (cpu)
684 return 0;
685 return calc_speed(longhaul_get_cpu_mult());
686}
687
Adrian Bunkc4a96c12006-07-09 19:53:08 +0200688static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
689 u32 nesting_level,
690 void *context, void **return_value)
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200691{
692 struct acpi_device *d;
693
Dave Jonesac617bd2009-01-17 23:29:53 -0500694 if (acpi_bus_get_device(obj_handle, &d))
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200695 return 0;
Dave Jonesac617bd2009-01-17 23:29:53 -0500696
Jan Engelhardtade1af72008-01-30 13:33:23 +0100697 *return_value = acpi_driver_data(d);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200698 return 1;
699}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200701/* VIA don't support PM2 reg, but have something similar */
702static int enable_arbiter_disable(void)
703{
704 struct pci_dev *dev;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200705 int status = 1;
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200706 int reg;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200707 u8 pci_cmd;
708
709 /* Find PLE133 host bridge */
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200710 reg = 0x78;
Rafał Bilskifb48e152007-03-02 20:12:27 +0100711 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0,
712 NULL);
Linus Torvalds4d5709a2007-10-12 15:42:01 -0700713 /* Find PM133/VT8605 host bridge */
714 if (dev == NULL)
715 dev = pci_get_device(PCI_VENDOR_ID_VIA,
716 PCI_DEVICE_ID_VIA_8605_0, NULL);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200717 /* Find CLE266 host bridge */
718 if (dev == NULL) {
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200719 reg = 0x76;
Rafał Bilskifb48e152007-03-02 20:12:27 +0100720 dev = pci_get_device(PCI_VENDOR_ID_VIA,
721 PCI_DEVICE_ID_VIA_862X_0, NULL);
Rafa³ Bilskidb2fb9d2006-11-30 03:47:41 +0100722 /* Find CN400 V-Link host bridge */
723 if (dev == NULL)
Rafał Bilskifb48e152007-03-02 20:12:27 +0100724 dev = pci_get_device(PCI_VENDOR_ID_VIA, 0x7259, NULL);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200725 }
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200726 if (dev != NULL) {
727 /* Enable access to port 0x22 */
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200728 pci_read_config_byte(dev, reg, &pci_cmd);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100729 if (!(pci_cmd & 1<<7)) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200730 pci_cmd |= 1<<7;
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200731 pci_write_config_byte(dev, reg, pci_cmd);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100732 pci_read_config_byte(dev, reg, &pci_cmd);
733 if (!(pci_cmd & 1<<7)) {
734 printk(KERN_ERR PFX
735 "Can't enable access to port 0x22.\n");
Rafał Bilskifb48e152007-03-02 20:12:27 +0100736 status = 0;
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100737 }
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200738 }
Rafał Bilskifb48e152007-03-02 20:12:27 +0100739 pci_dev_put(dev);
740 return status;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200741 }
742 return 0;
743}
744
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200745static int longhaul_setup_southbridge(void)
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100746{
747 struct pci_dev *dev;
748 u8 pci_cmd;
749
750 /* Find VT8235 southbridge */
Rafał Bilskifb48e152007-03-02 20:12:27 +0100751 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL);
Rafał Bilski920dd0f2007-05-17 22:35:29 +0200752 if (dev == NULL)
Dave Jonesac617bd2009-01-17 23:29:53 -0500753 /* Find VT8237 southbridge */
Rafał Bilski920dd0f2007-05-17 22:35:29 +0200754 dev = pci_get_device(PCI_VENDOR_ID_VIA,
755 PCI_DEVICE_ID_VIA_8237, NULL);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100756 if (dev != NULL) {
757 /* Set transition time to max */
758 pci_read_config_byte(dev, 0xec, &pci_cmd);
759 pci_cmd &= ~(1 << 2);
760 pci_write_config_byte(dev, 0xec, pci_cmd);
761 pci_read_config_byte(dev, 0xe4, &pci_cmd);
762 pci_cmd &= ~(1 << 7);
763 pci_write_config_byte(dev, 0xe4, pci_cmd);
764 pci_read_config_byte(dev, 0xe5, &pci_cmd);
765 pci_cmd |= 1 << 7;
766 pci_write_config_byte(dev, 0xe5, pci_cmd);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200767 /* Get address of ACPI registers block*/
768 pci_read_config_byte(dev, 0x81, &pci_cmd);
769 if (pci_cmd & 1 << 7) {
770 pci_read_config_dword(dev, 0x88, &acpi_regs_addr);
771 acpi_regs_addr &= 0xff00;
Dave Jonesac617bd2009-01-17 23:29:53 -0500772 printk(KERN_INFO PFX "ACPI I/O at 0x%x\n",
773 acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200774 }
775
Rafał Bilskifb48e152007-03-02 20:12:27 +0100776 pci_dev_put(dev);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100777 return 1;
778 }
779 return 0;
780}
781
Holger Freyther25305732010-07-19 03:29:03 +0800782static int __cpuinit longhaul_cpu_init(struct cpufreq_policy *policy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700783{
Mike Travis92cb7612007-10-19 20:35:04 +0200784 struct cpuinfo_x86 *c = &cpu_data(0);
Dave Jonesac617bd2009-01-17 23:29:53 -0500785 char *cpuname = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700786 int ret;
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100787 u32 lo, hi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200789 /* Check what we have on this motherboard */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700790 switch (c->x86_model) {
791 case 6:
792 cpu_model = CPU_SAMUEL;
793 cpuname = "C3 'Samuel' [C5A]";
794 longhaul_version = TYPE_LONGHAUL_V1;
Dave Jonesac617bd2009-01-17 23:29:53 -0500795 memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
796 memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 break;
798
799 case 7:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800 switch (c->x86_mask) {
801 case 0:
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100802 longhaul_version = TYPE_LONGHAUL_V1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803 cpu_model = CPU_SAMUEL2;
804 cpuname = "C3 'Samuel 2' [C5B]";
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100805 /* Note, this is not a typo, early Samuel2's had
806 * Samuel1 ratios. */
Dave Jonesac617bd2009-01-17 23:29:53 -0500807 memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
808 memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809 break;
810 case 1 ... 15:
Krzysztof Heltf7f3cad2009-10-24 17:25:38 +0200811 longhaul_version = TYPE_LONGHAUL_V2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812 if (c->x86_mask < 8) {
813 cpu_model = CPU_SAMUEL2;
814 cpuname = "C3 'Samuel 2' [C5B]";
815 } else {
816 cpu_model = CPU_EZRA;
817 cpuname = "C3 'Ezra' [C5C]";
818 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500819 memcpy(mults, ezra_mults, sizeof(ezra_mults));
820 memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700821 break;
822 }
823 break;
824
825 case 8:
826 cpu_model = CPU_EZRA_T;
827 cpuname = "C3 'Ezra-T' [C5M]";
828 longhaul_version = TYPE_POWERSAVER;
Dave Jonesac617bd2009-01-17 23:29:53 -0500829 numscales = 32;
830 memcpy(mults, ezrat_mults, sizeof(ezrat_mults));
831 memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 break;
833
834 case 9:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835 longhaul_version = TYPE_POWERSAVER;
Rafa³ Bilski0d44b2b2007-01-31 23:50:49 +0100836 numscales = 32;
Dave Jonesac617bd2009-01-17 23:29:53 -0500837 memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
838 memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 switch (c->x86_mask) {
840 case 0 ... 1:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100841 cpu_model = CPU_NEHEMIAH;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100842 cpuname = "C3 'Nehemiah A' [C5XLOE]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843 break;
844 case 2 ... 4:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100845 cpu_model = CPU_NEHEMIAH;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100846 cpuname = "C3 'Nehemiah B' [C5XLOH]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847 break;
848 case 5 ... 15:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100849 cpu_model = CPU_NEHEMIAH_C;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100850 cpuname = "C3 'Nehemiah C' [C5P]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700851 break;
852 }
853 break;
854
855 default:
856 cpuname = "Unknown";
857 break;
858 }
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100859 /* Check Longhaul ver. 2 */
860 if (longhaul_version == TYPE_LONGHAUL_V2) {
861 rdmsr(MSR_VIA_LONGHAUL, lo, hi);
862 if (lo == 0 && hi == 0)
863 /* Looks like MSR isn't present */
864 longhaul_version = TYPE_LONGHAUL_V1;
865 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866
Dave Jonesac617bd2009-01-17 23:29:53 -0500867 printk(KERN_INFO PFX "VIA %s CPU detected. ", cpuname);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 switch (longhaul_version) {
869 case TYPE_LONGHAUL_V1:
870 case TYPE_LONGHAUL_V2:
Dave Jonesac617bd2009-01-17 23:29:53 -0500871 printk(KERN_CONT "Longhaul v%d supported.\n", longhaul_version);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700872 break;
873 case TYPE_POWERSAVER:
Dave Jonesac617bd2009-01-17 23:29:53 -0500874 printk(KERN_CONT "Powersaver supported.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875 break;
876 };
877
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100878 /* Doesn't hurt */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200879 longhaul_setup_southbridge();
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100880
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200881 /* Find ACPI data for processor */
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100882 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
Lin Ming22635762009-11-13 10:06:08 +0800883 ACPI_UINT32_MAX, &longhaul_walk_callback, NULL,
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100884 NULL, (void *)&pr);
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200885
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100886 /* Check ACPI support for C3 state */
Dave Jones7ab77e02007-04-20 15:58:00 -0400887 if (pr != NULL && longhaul_version == TYPE_POWERSAVER) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200888 cx = &pr->power.states[ACPI_STATE_C3];
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200889 if (cx->address > 0 && cx->latency <= 1000)
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100890 longhaul_flags |= USE_ACPI_C3;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200891 }
Rafał Bilski905497c2007-07-08 21:51:26 +0200892 /* Disable if it isn't working */
893 if (disable_acpi_c3)
894 longhaul_flags &= ~USE_ACPI_C3;
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100895 /* Check if northbridge is friendly */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200896 if (enable_arbiter_disable())
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100897 longhaul_flags |= USE_NORTHBRIDGE;
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200898
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100899 /* Check ACPI support for bus master arbiter disable */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200900 if (!(longhaul_flags & USE_ACPI_C3
901 || longhaul_flags & USE_NORTHBRIDGE)
902 && ((pr == NULL) || !(pr->flags.bm_control))) {
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100903 printk(KERN_ERR PFX
904 "No ACPI support. Unsupported northbridge.\n");
905 return -ENODEV;
906 }
907
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100908 if (longhaul_flags & USE_NORTHBRIDGE)
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200909 printk(KERN_INFO PFX "Using northbridge support.\n");
910 if (longhaul_flags & USE_ACPI_C3)
911 printk(KERN_INFO PFX "Using ACPI support.\n");
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200912
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 ret = longhaul_get_ranges();
914 if (ret != 0)
915 return ret;
916
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100917 if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 longhaul_setup_voltagescaling();
919
Dave Jones6778bae2005-05-31 19:03:51 -0700920 policy->cpuinfo.transition_latency = 200000; /* nsec */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 policy->cur = calc_speed(longhaul_get_cpu_mult());
922
923 ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
924 if (ret)
925 return ret;
926
927 cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
928
929 return 0;
930}
931
932static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
933{
934 cpufreq_frequency_table_put_attr(policy->cpu);
935 return 0;
936}
937
Dave Jonesac617bd2009-01-17 23:29:53 -0500938static struct freq_attr *longhaul_attr[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 &cpufreq_freq_attr_scaling_available_freqs,
940 NULL,
941};
942
Linus Torvalds221dee22007-02-26 14:55:48 -0800943static struct cpufreq_driver longhaul_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944 .verify = longhaul_verify,
945 .target = longhaul_target,
946 .get = longhaul_get,
947 .init = longhaul_cpu_init,
948 .exit = __devexit_p(longhaul_cpu_exit),
949 .name = "longhaul",
950 .owner = THIS_MODULE,
951 .attr = longhaul_attr,
952};
953
954
955static int __init longhaul_init(void)
956{
Mike Travis92cb7612007-10-19 20:35:04 +0200957 struct cpuinfo_x86 *c = &cpu_data(0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958
959 if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6)
960 return -ENODEV;
961
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200962#ifdef CONFIG_SMP
963 if (num_online_cpus() > 1) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500964 printk(KERN_ERR PFX "More than 1 CPU detected, "
965 "longhaul disabled.\n");
Dave Jones1cfe2012006-12-28 22:30:16 -0500966 return -ENODEV;
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200967 }
968#endif
969#ifdef CONFIG_X86_IO_APIC
970 if (cpu_has_apic) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500971 printk(KERN_ERR PFX "APIC detected. Longhaul is currently "
972 "broken in this configuration.\n");
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200973 return -ENODEV;
974 }
975#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 switch (c->x86_model) {
977 case 6 ... 9:
978 return cpufreq_register_driver(&longhaul_driver);
Dave Jones8ec98222006-12-17 19:07:35 -0500979 case 10:
980 printk(KERN_ERR PFX "Use acpi-cpufreq driver for VIA C7\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981 default:
Fernando Carrijoc19a28e2009-01-07 18:09:08 -0800982 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700983 }
984
985 return -ENODEV;
986}
987
988
989static void __exit longhaul_exit(void)
990{
Dave Jones8eebf1a2006-05-30 17:40:16 -0400991 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992
Dave Jonesac617bd2009-01-17 23:29:53 -0500993 for (i = 0; i < numscales; i++) {
994 if (mults[i] == maxmult) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995 longhaul_setstate(i);
996 break;
997 }
998 }
999
1000 cpufreq_unregister_driver(&longhaul_driver);
1001 kfree(longhaul_table);
1002}
1003
Rafal Bilski52a26382007-10-07 00:24:32 -07001004/* Even if BIOS is exporting ACPI C3 state, and it is used
1005 * with success when CPU is idle, this state doesn't
1006 * trigger frequency transition in some cases. */
Dave Jonesac617bd2009-01-17 23:29:53 -05001007module_param(disable_acpi_c3, int, 0644);
Rafał Bilski905497c2007-07-08 21:51:26 +02001008MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support");
Lucas De Marchi0d2eb442011-03-17 16:24:16 -03001009/* Change CPU voltage with frequency. Very useful to save
Rafal Bilski52a26382007-10-07 00:24:32 -07001010 * power, but most VIA C3 processors aren't supporting it. */
Dave Jonesac617bd2009-01-17 23:29:53 -05001011module_param(scale_voltage, int, 0644);
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +02001012MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
Rafal Bilski52a26382007-10-07 00:24:32 -07001013/* Force revision key to 0 for processors which doesn't
1014 * support voltage scaling, but are introducing itself as
1015 * such. */
1016module_param(revid_errata, int, 0644);
1017MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001018
Dave Jonesac617bd2009-01-17 23:29:53 -05001019MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
1020MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors.");
1021MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001022
Rafa³ Bilski0d6daba2006-07-07 08:48:26 +02001023late_initcall(longhaul_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024module_exit(longhaul_exit);