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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/************************************************************************
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07002 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
Jon Mason926bd902010-07-15 08:47:26 +00003 * Copyright(c) 2002-2010 Exar Corp.
Joe Perchesd44570e2009-08-24 17:29:44 +00004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * This software may be used and distributed according to the terms of
6 * the GNU General Public License (GPL), incorporated herein by reference.
7 * Drivers based on or derived from this code fall under the GPL and must
8 * retain the authorship, copyright and license notice. This file is not
9 * a complete program and may only be used when the entire operating
10 * system is licensed under the GPL.
11 * See the file COPYING in this distribution for more information.
12 *
13 * Credits:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070014 * Jeff Garzik : For pointing out the improper error condition
15 * check in the s2io_xmit routine and also some
16 * issues in the Tx watch dog function. Also for
17 * patiently answering all those innumerable
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 * questions regaring the 2.6 porting issues.
19 * Stephen Hemminger : Providing proper 2.6 porting mechanism for some
20 * macros available only in 2.6 Kernel.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070021 * Francois Romieu : For pointing out all code part that were
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * deprecated and also styling related comments.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070023 * Grant Grundler : For helping me get rid of some Architecture
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * dependent code.
25 * Christopher Hellwig : Some more 2.6 specific issues in the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070026 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 * The module loadable parameters that are supported by the driver and a brief
Joe Perchesa2a20ae2009-08-24 17:29:46 +000028 * explanation of all the variables.
Ananda Raju9dc737a2006-04-21 19:05:41 -040029 *
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070030 * rx_ring_num : This can be used to program the number of receive rings used
31 * in the driver.
Ananda Raju9dc737a2006-04-21 19:05:41 -040032 * rx_ring_sz: This defines the number of receive blocks each ring can have.
33 * This is also an array of size 8.
Ananda Rajuda6971d2005-10-31 16:55:31 -050034 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
Veena Parat6d517a22007-07-23 02:20:51 -040035 * values are 1, 2.
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070037 * tx_fifo_len: This too is an array of 8. Each element defines the number of
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 * Tx descriptors that can be associated with each corresponding FIFO.
Ananda Raju9dc737a2006-04-21 19:05:41 -040039 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -070040 * 2(MSI_X). Default value is '2(MSI_X)'
Ananda Raju9dc737a2006-04-21 19:05:41 -040041 * lro_max_pkts: This parameter defines maximum number of packets can be
42 * aggregated as a single large packet
Sivakumar Subramani926930b2007-02-24 01:59:39 -050043 * napi: This parameter used to enable/disable NAPI (polling Rx)
44 * Possible values '1' for enable and '0' for disable. Default is '1'
45 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
46 * Possible values '1' for enable and '0' for disable. Default is '0'
47 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
48 * Possible values '1' for enable , '0' for disable.
49 * Default is '2' - which means disable in promisc mode
50 * and enable in non-promiscuous mode.
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -050051 * multiq: This parameter used to enable/disable MULTIQUEUE support.
52 * Possible values '1' for enable and '0' for disable. Default is '0'
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 ************************************************************************/
54
Joe Perches6cef2b82009-08-24 17:29:45 +000055#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
56
Linus Torvalds1da177e2005-04-16 15:20:36 -070057#include <linux/module.h>
58#include <linux/types.h>
59#include <linux/errno.h>
60#include <linux/ioport.h>
61#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -040062#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070063#include <linux/kernel.h>
64#include <linux/netdevice.h>
65#include <linux/etherdevice.h>
Ben Hutchings40239392009-04-29 08:13:29 +000066#include <linux/mdio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070067#include <linux/skbuff.h>
68#include <linux/init.h>
69#include <linux/delay.h>
70#include <linux/stddef.h>
71#include <linux/ioctl.h>
72#include <linux/timex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070073#include <linux/ethtool.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070074#include <linux/workqueue.h>
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -070075#include <linux/if_vlan.h>
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -050076#include <linux/ip.h>
77#include <linux/tcp.h>
Joe Perchesd44570e2009-08-24 17:29:44 +000078#include <linux/uaccess.h>
79#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090080#include <linux/slab.h>
Paul Gortmaker70c71602011-05-22 16:47:17 -040081#include <linux/prefetch.h>
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -050082#include <net/tcp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#include <asm/system.h>
Andrew Mortonfe931392006-02-03 01:45:12 -080085#include <asm/div64.h>
Andrew Morton330ce0d2006-08-14 23:00:14 -070086#include <asm/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070087
88/* local include */
89#include "s2io.h"
90#include "s2io-regs.h"
91
Jon Mason11410b62010-12-10 15:40:03 +000092#define DRV_VERSION "2.0.26.28"
John Linville6c1792f2005-10-04 07:51:45 -040093
Linus Torvalds1da177e2005-04-16 15:20:36 -070094/* S2io Driver name & version. */
Jon Masonc0dbf372010-12-10 15:40:02 +000095static const char s2io_driver_name[] = "Neterion";
96static const char s2io_driver_version[] = DRV_VERSION;
Linus Torvalds1da177e2005-04-16 15:20:36 -070097
Jon Masonc0dbf372010-12-10 15:40:02 +000098static const int rxd_size[2] = {32, 48};
99static const int rxd_count[2] = {127, 85};
Ananda Rajuda6971d2005-10-31 16:55:31 -0500100
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500101static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -0700102{
103 int ret;
104
105 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
Joe Perchesd44570e2009-08-24 17:29:44 +0000106 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -0700107
108 return ret;
109}
110
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700111/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112 * Cards with following subsystem_id have a link state indication
113 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
114 * macro below identifies these cards given the subsystem_id.
115 */
Joe Perchesd44570e2009-08-24 17:29:44 +0000116#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
117 (dev_type == XFRAME_I_DEVICE) ? \
118 ((((subid >= 0x600B) && (subid <= 0x600D)) || \
119 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120
121#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
122 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123
Joe Perchesd44570e2009-08-24 17:29:44 +0000124static inline int is_s2io_card_up(const struct s2io_nic *sp)
Sivakumar Subramani92b84432007-09-06 06:51:14 -0400125{
126 return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
127}
128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129/* Ethtool related variables and Macros. */
Joe Perches6fce3652009-08-24 17:29:40 +0000130static const char s2io_gstrings[][ETH_GSTRING_LEN] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 "Register test\t(offline)",
132 "Eeprom test\t(offline)",
133 "Link test\t(online)",
134 "RLDRAM test\t(offline)",
135 "BIST Test\t(offline)"
136};
137
Joe Perches6fce3652009-08-24 17:29:40 +0000138static const char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 {"tmac_frms"},
140 {"tmac_data_octets"},
141 {"tmac_drop_frms"},
142 {"tmac_mcst_frms"},
143 {"tmac_bcst_frms"},
144 {"tmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400145 {"tmac_ttl_octets"},
146 {"tmac_ucst_frms"},
147 {"tmac_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 {"tmac_any_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400149 {"tmac_ttl_less_fb_octets"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 {"tmac_vld_ip_octets"},
151 {"tmac_vld_ip"},
152 {"tmac_drop_ip"},
153 {"tmac_icmp"},
154 {"tmac_rst_tcp"},
155 {"tmac_tcp"},
156 {"tmac_udp"},
157 {"rmac_vld_frms"},
158 {"rmac_data_octets"},
159 {"rmac_fcs_err_frms"},
160 {"rmac_drop_frms"},
161 {"rmac_vld_mcst_frms"},
162 {"rmac_vld_bcst_frms"},
163 {"rmac_in_rng_len_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400164 {"rmac_out_rng_len_err_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 {"rmac_long_frms"},
166 {"rmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400167 {"rmac_unsup_ctrl_frms"},
168 {"rmac_ttl_octets"},
169 {"rmac_accepted_ucst_frms"},
170 {"rmac_accepted_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 {"rmac_discarded_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400172 {"rmac_drop_events"},
173 {"rmac_ttl_less_fb_octets"},
174 {"rmac_ttl_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 {"rmac_usized_frms"},
176 {"rmac_osized_frms"},
177 {"rmac_frag_frms"},
178 {"rmac_jabber_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400179 {"rmac_ttl_64_frms"},
180 {"rmac_ttl_65_127_frms"},
181 {"rmac_ttl_128_255_frms"},
182 {"rmac_ttl_256_511_frms"},
183 {"rmac_ttl_512_1023_frms"},
184 {"rmac_ttl_1024_1518_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185 {"rmac_ip"},
186 {"rmac_ip_octets"},
187 {"rmac_hdr_err_ip"},
188 {"rmac_drop_ip"},
189 {"rmac_icmp"},
190 {"rmac_tcp"},
191 {"rmac_udp"},
192 {"rmac_err_drp_udp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400193 {"rmac_xgmii_err_sym"},
194 {"rmac_frms_q0"},
195 {"rmac_frms_q1"},
196 {"rmac_frms_q2"},
197 {"rmac_frms_q3"},
198 {"rmac_frms_q4"},
199 {"rmac_frms_q5"},
200 {"rmac_frms_q6"},
201 {"rmac_frms_q7"},
202 {"rmac_full_q0"},
203 {"rmac_full_q1"},
204 {"rmac_full_q2"},
205 {"rmac_full_q3"},
206 {"rmac_full_q4"},
207 {"rmac_full_q5"},
208 {"rmac_full_q6"},
209 {"rmac_full_q7"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 {"rmac_pause_cnt"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400211 {"rmac_xgmii_data_err_cnt"},
212 {"rmac_xgmii_ctrl_err_cnt"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213 {"rmac_accepted_ip"},
214 {"rmac_err_tcp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400215 {"rd_req_cnt"},
216 {"new_rd_req_cnt"},
217 {"new_rd_req_rtry_cnt"},
218 {"rd_rtry_cnt"},
219 {"wr_rtry_rd_ack_cnt"},
220 {"wr_req_cnt"},
221 {"new_wr_req_cnt"},
222 {"new_wr_req_rtry_cnt"},
223 {"wr_rtry_cnt"},
224 {"wr_disc_cnt"},
225 {"rd_rtry_wr_ack_cnt"},
226 {"txp_wr_cnt"},
227 {"txd_rd_cnt"},
228 {"txd_wr_cnt"},
229 {"rxd_rd_cnt"},
230 {"rxd_wr_cnt"},
231 {"txf_rd_cnt"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500232 {"rxf_wr_cnt"}
233};
234
Joe Perches6fce3652009-08-24 17:29:40 +0000235static const char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
Ananda Rajubd1034f2006-04-21 19:20:22 -0400236 {"rmac_ttl_1519_4095_frms"},
237 {"rmac_ttl_4096_8191_frms"},
238 {"rmac_ttl_8192_max_frms"},
239 {"rmac_ttl_gt_max_frms"},
240 {"rmac_osized_alt_frms"},
241 {"rmac_jabber_alt_frms"},
242 {"rmac_gt_max_alt_frms"},
243 {"rmac_vlan_frms"},
244 {"rmac_len_discard"},
245 {"rmac_fcs_discard"},
246 {"rmac_pf_discard"},
247 {"rmac_da_discard"},
248 {"rmac_red_discard"},
249 {"rmac_rts_discard"},
250 {"rmac_ingm_full_discard"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500251 {"link_fault_cnt"}
252};
253
Joe Perches6fce3652009-08-24 17:29:40 +0000254static const char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -0700255 {"\n DRIVER STATISTICS"},
256 {"single_bit_ecc_errs"},
257 {"double_bit_ecc_errs"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400258 {"parity_err_cnt"},
259 {"serious_err_cnt"},
260 {"soft_reset_cnt"},
261 {"fifo_full_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700262 {"ring_0_full_cnt"},
263 {"ring_1_full_cnt"},
264 {"ring_2_full_cnt"},
265 {"ring_3_full_cnt"},
266 {"ring_4_full_cnt"},
267 {"ring_5_full_cnt"},
268 {"ring_6_full_cnt"},
269 {"ring_7_full_cnt"},
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700270 {"alarm_transceiver_temp_high"},
271 {"alarm_transceiver_temp_low"},
272 {"alarm_laser_bias_current_high"},
273 {"alarm_laser_bias_current_low"},
274 {"alarm_laser_output_power_high"},
275 {"alarm_laser_output_power_low"},
276 {"warn_transceiver_temp_high"},
277 {"warn_transceiver_temp_low"},
278 {"warn_laser_bias_current_high"},
279 {"warn_laser_bias_current_low"},
280 {"warn_laser_output_power_high"},
281 {"warn_laser_output_power_low"},
282 {"lro_aggregated_pkts"},
283 {"lro_flush_both_count"},
284 {"lro_out_of_sequence_pkts"},
285 {"lro_flush_due_to_max_pkts"},
286 {"lro_avg_aggr_pkts"},
287 {"mem_alloc_fail_cnt"},
288 {"pci_map_fail_cnt"},
289 {"watchdog_timer_cnt"},
290 {"mem_allocated"},
291 {"mem_freed"},
292 {"link_up_cnt"},
293 {"link_down_cnt"},
294 {"link_up_time"},
295 {"link_down_time"},
296 {"tx_tcode_buf_abort_cnt"},
297 {"tx_tcode_desc_abort_cnt"},
298 {"tx_tcode_parity_err_cnt"},
299 {"tx_tcode_link_loss_cnt"},
300 {"tx_tcode_list_proc_err_cnt"},
301 {"rx_tcode_parity_err_cnt"},
302 {"rx_tcode_abort_cnt"},
303 {"rx_tcode_parity_abort_cnt"},
304 {"rx_tcode_rda_fail_cnt"},
305 {"rx_tcode_unkn_prot_cnt"},
306 {"rx_tcode_fcs_err_cnt"},
307 {"rx_tcode_buf_size_err_cnt"},
308 {"rx_tcode_rxd_corrupt_cnt"},
309 {"rx_tcode_unkn_err_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700310 {"tda_err_cnt"},
311 {"pfc_err_cnt"},
312 {"pcc_err_cnt"},
313 {"tti_err_cnt"},
314 {"tpa_err_cnt"},
315 {"sm_err_cnt"},
316 {"lso_err_cnt"},
317 {"mac_tmac_err_cnt"},
318 {"mac_rmac_err_cnt"},
319 {"xgxs_txgxs_err_cnt"},
320 {"xgxs_rxgxs_err_cnt"},
321 {"rc_err_cnt"},
322 {"prc_pcix_err_cnt"},
323 {"rpa_err_cnt"},
324 {"rda_err_cnt"},
325 {"rti_err_cnt"},
326 {"mc_err_cnt"}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327};
328
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200329#define S2IO_XENA_STAT_LEN ARRAY_SIZE(ethtool_xena_stats_keys)
330#define S2IO_ENHANCED_STAT_LEN ARRAY_SIZE(ethtool_enhanced_stats_keys)
331#define S2IO_DRIVER_STAT_LEN ARRAY_SIZE(ethtool_driver_stats_keys)
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500332
Joe Perchesd44570e2009-08-24 17:29:44 +0000333#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN)
334#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN)
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500335
Joe Perchesd44570e2009-08-24 17:29:44 +0000336#define XFRAME_I_STAT_STRINGS_LEN (XFRAME_I_STAT_LEN * ETH_GSTRING_LEN)
337#define XFRAME_II_STAT_STRINGS_LEN (XFRAME_II_STAT_LEN * ETH_GSTRING_LEN)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200339#define S2IO_TEST_LEN ARRAY_SIZE(s2io_gstrings)
Joe Perchesd44570e2009-08-24 17:29:44 +0000340#define S2IO_STRINGS_LEN (S2IO_TEST_LEN * ETH_GSTRING_LEN)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341
Joe Perchesd44570e2009-08-24 17:29:44 +0000342#define S2IO_TIMER_CONF(timer, handle, arg, exp) \
343 init_timer(&timer); \
344 timer.function = handle; \
345 timer.data = (unsigned long)arg; \
346 mod_timer(&timer, (jiffies + exp)) \
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -0700347
Sivakumar Subramani2fd37682007-09-14 07:39:19 -0400348/* copy mac addr to def_mac_addr array */
349static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
350{
351 sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr);
352 sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8);
353 sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16);
354 sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24);
355 sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32);
356 sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40);
357}
Stephen Hemminger04025092008-11-21 17:28:55 -0800358
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700359/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 * Constants to be programmed into the Xena's registers, to configure
361 * the XAUI.
362 */
363
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364#define END_SIGN 0x0
Arjan van de Venf71e1302006-03-03 21:33:57 -0500365static const u64 herc_act_dtx_cfg[] = {
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700366 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700367 0x8000051536750000ULL, 0x80000515367500E0ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700368 /* Write data */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700369 0x8000051536750004ULL, 0x80000515367500E4ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700370 /* Set address */
371 0x80010515003F0000ULL, 0x80010515003F00E0ULL,
372 /* Write data */
373 0x80010515003F0004ULL, 0x80010515003F00E4ULL,
374 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700375 0x801205150D440000ULL, 0x801205150D4400E0ULL,
376 /* Write data */
377 0x801205150D440004ULL, 0x801205150D4400E4ULL,
378 /* Set address */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700379 0x80020515F2100000ULL, 0x80020515F21000E0ULL,
380 /* Write data */
381 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
382 /* Done */
383 END_SIGN
384};
385
Arjan van de Venf71e1302006-03-03 21:33:57 -0500386static const u64 xena_dtx_cfg[] = {
Ananda Rajuc92ca042006-04-21 19:18:03 -0400387 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 0x8000051500000000ULL, 0x80000515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400389 /* Write data */
390 0x80000515D9350004ULL, 0x80000515D93500E4ULL,
391 /* Set address */
392 0x8001051500000000ULL, 0x80010515000000E0ULL,
393 /* Write data */
394 0x80010515001E0004ULL, 0x80010515001E00E4ULL,
395 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 0x8002051500000000ULL, 0x80020515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400397 /* Write data */
398 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700399 END_SIGN
400};
401
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700402/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 * Constants for Fixing the MacAddress problem seen mostly on
404 * Alpha machines.
405 */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500406static const u64 fix_mac[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407 0x0060000000000000ULL, 0x0060600000000000ULL,
408 0x0040600000000000ULL, 0x0000600000000000ULL,
409 0x0020600000000000ULL, 0x0060600000000000ULL,
410 0x0020600000000000ULL, 0x0060600000000000ULL,
411 0x0020600000000000ULL, 0x0060600000000000ULL,
412 0x0020600000000000ULL, 0x0060600000000000ULL,
413 0x0020600000000000ULL, 0x0060600000000000ULL,
414 0x0020600000000000ULL, 0x0060600000000000ULL,
415 0x0020600000000000ULL, 0x0060600000000000ULL,
416 0x0020600000000000ULL, 0x0060600000000000ULL,
417 0x0020600000000000ULL, 0x0060600000000000ULL,
418 0x0020600000000000ULL, 0x0060600000000000ULL,
419 0x0020600000000000ULL, 0x0000600000000000ULL,
420 0x0040600000000000ULL, 0x0060600000000000ULL,
421 END_SIGN
422};
423
Ananda Rajub41477f2006-07-24 19:52:49 -0400424MODULE_LICENSE("GPL");
425MODULE_VERSION(DRV_VERSION);
426
427
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428/* Module Loadable parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500429S2IO_PARM_INT(tx_fifo_num, FIFO_DEFAULT_NUM);
Ananda Rajub41477f2006-07-24 19:52:49 -0400430S2IO_PARM_INT(rx_ring_num, 1);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500431S2IO_PARM_INT(multiq, 0);
Ananda Rajub41477f2006-07-24 19:52:49 -0400432S2IO_PARM_INT(rx_ring_mode, 1);
433S2IO_PARM_INT(use_continuous_tx_intrs, 1);
434S2IO_PARM_INT(rmac_pause_time, 0x100);
435S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
436S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
437S2IO_PARM_INT(shared_splits, 0);
438S2IO_PARM_INT(tmac_util_period, 5);
439S2IO_PARM_INT(rmac_util_period, 5);
Ananda Rajub41477f2006-07-24 19:52:49 -0400440S2IO_PARM_INT(l3l4hdr_size, 128);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500441/* 0 is no steering, 1 is Priority steering, 2 is Default steering */
442S2IO_PARM_INT(tx_steering_type, TX_DEFAULT_STEERING);
Ananda Rajub41477f2006-07-24 19:52:49 -0400443/* Frequency of Rx desc syncs expressed as power of 2 */
444S2IO_PARM_INT(rxsync_frequency, 3);
Veena Parateccb8622007-07-23 02:23:54 -0400445/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -0700446S2IO_PARM_INT(intr_type, 2);
Ananda Rajub41477f2006-07-24 19:52:49 -0400447/* Large receive offload feature */
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700448
Ananda Rajub41477f2006-07-24 19:52:49 -0400449/* Max pkts to be aggregated by LRO at one time. If not specified,
450 * aggregation happens until we hit max IP pkt size(64K)
451 */
452S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
Ananda Rajub41477f2006-07-24 19:52:49 -0400453S2IO_PARM_INT(indicate_max_pkts, 0);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -0500454
455S2IO_PARM_INT(napi, 1);
456S2IO_PARM_INT(ufo, 0);
Sivakumar Subramani926930b2007-02-24 01:59:39 -0500457S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
Ananda Rajub41477f2006-07-24 19:52:49 -0400458
Linus Torvalds1da177e2005-04-16 15:20:36 -0700459static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000460{DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461static unsigned int rx_ring_sz[MAX_RX_RINGS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000462{[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700463static unsigned int rts_frm_len[MAX_RX_RINGS] =
Joe Perchesd44570e2009-08-24 17:29:44 +0000464{[0 ...(MAX_RX_RINGS - 1)] = 0 };
Ananda Rajub41477f2006-07-24 19:52:49 -0400465
466module_param_array(tx_fifo_len, uint, NULL, 0);
467module_param_array(rx_ring_sz, uint, NULL, 0);
468module_param_array(rts_frm_len, uint, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700470/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700471 * S2IO device table.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700472 * This table lists all the devices that this driver supports.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473 */
Alexey Dobriyana3aa1882010-01-07 11:58:11 +0000474static DEFINE_PCI_DEVICE_TABLE(s2io_tbl) = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
476 PCI_ANY_ID, PCI_ANY_ID},
477 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
478 PCI_ANY_ID, PCI_ANY_ID},
479 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
Joe Perchesd44570e2009-08-24 17:29:44 +0000480 PCI_ANY_ID, PCI_ANY_ID},
481 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
482 PCI_ANY_ID, PCI_ANY_ID},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483 {0,}
484};
485
486MODULE_DEVICE_TABLE(pci, s2io_tbl);
487
Linas Vepstasd796fdb2007-05-14 18:37:30 -0500488static struct pci_error_handlers s2io_err_handler = {
489 .error_detected = s2io_io_error_detected,
490 .slot_reset = s2io_io_slot_reset,
491 .resume = s2io_io_resume,
492};
493
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494static struct pci_driver s2io_driver = {
Joe Perchesd44570e2009-08-24 17:29:44 +0000495 .name = "S2IO",
496 .id_table = s2io_tbl,
497 .probe = s2io_init_nic,
498 .remove = __devexit_p(s2io_rem_nic),
499 .err_handler = &s2io_err_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500};
501
502/* A simplifier macro used both by init and free shared_mem Fns(). */
503#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
504
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500505/* netqueue manipulation helper functions */
506static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
507{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700508 if (!sp->config.multiq) {
509 int i;
510
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500511 for (i = 0; i < sp->config.tx_fifo_num; i++)
512 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500513 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700514 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500515}
516
517static inline void s2io_stop_tx_queue(struct s2io_nic *sp, int fifo_no)
518{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700519 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500520 sp->mac_control.fifos[fifo_no].queue_state =
521 FIFO_QUEUE_STOP;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700522
523 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500524}
525
526static inline void s2io_start_all_tx_queue(struct s2io_nic *sp)
527{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700528 if (!sp->config.multiq) {
529 int i;
530
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500531 for (i = 0; i < sp->config.tx_fifo_num; i++)
532 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500533 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700534 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500535}
536
537static inline void s2io_start_tx_queue(struct s2io_nic *sp, int fifo_no)
538{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700539 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500540 sp->mac_control.fifos[fifo_no].queue_state =
541 FIFO_QUEUE_START;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700542
543 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500544}
545
546static inline void s2io_wake_all_tx_queue(struct s2io_nic *sp)
547{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700548 if (!sp->config.multiq) {
549 int i;
550
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500551 for (i = 0; i < sp->config.tx_fifo_num; i++)
552 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500553 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700554 netif_tx_wake_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500555}
556
557static inline void s2io_wake_tx_queue(
558 struct fifo_info *fifo, int cnt, u8 multiq)
559{
560
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500561 if (multiq) {
562 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
563 netif_wake_subqueue(fifo->dev, fifo->fifo_no);
David S. Millerb19fa1f2008-07-08 23:14:24 -0700564 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500565 if (netif_queue_stopped(fifo->dev)) {
566 fifo->queue_state = FIFO_QUEUE_START;
567 netif_wake_queue(fifo->dev);
568 }
569 }
570}
571
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572/**
573 * init_shared_mem - Allocation and Initialization of Memory
574 * @nic: Device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700575 * Description: The function allocates all the memory areas shared
576 * between the NIC and the driver. This includes Tx descriptors,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 * Rx descriptors and the statistics block.
578 */
579
580static int init_shared_mem(struct s2io_nic *nic)
581{
582 u32 size;
583 void *tmp_v_addr, *tmp_v_addr_next;
584 dma_addr_t tmp_p_addr, tmp_p_addr_next;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500585 struct RxD_block *pre_rxd_blk = NULL;
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500586 int i, j, blk_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 int lst_size, lst_per_page;
588 struct net_device *dev = nic->dev;
viro@zenIV.linux.org.uk8ae418c2005-09-02 20:15:29 +0100589 unsigned long tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500590 struct buffAdd *ba;
Joe Perchesffb5df62009-08-24 17:29:47 +0000591 struct config_param *config = &nic->config;
592 struct mac_info *mac_control = &nic->mac_control;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400593 unsigned long long mem_allocated = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700594
Joe Perches13d866a2009-08-24 17:29:41 +0000595 /* Allocation and initialization of TXDLs in FIFOs */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 size = 0;
597 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000598 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
599
600 size += tx_cfg->fifo_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601 }
602 if (size > MAX_AVAILABLE_TXDS) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000603 DBG_PRINT(ERR_DBG,
604 "Too many TxDs requested: %d, max supported: %d\n",
605 size, MAX_AVAILABLE_TXDS);
Ananda Rajub41477f2006-07-24 19:52:49 -0400606 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 }
608
Surjit Reang2fda0962008-01-24 02:08:59 -0800609 size = 0;
610 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000611 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
612
613 size = tx_cfg->fifo_len;
Surjit Reang2fda0962008-01-24 02:08:59 -0800614 /*
615 * Legal values are from 2 to 8192
616 */
617 if (size < 2) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000618 DBG_PRINT(ERR_DBG, "Fifo %d: Invalid length (%d) - "
619 "Valid lengths are 2 through 8192\n",
620 i, size);
Surjit Reang2fda0962008-01-24 02:08:59 -0800621 return -EINVAL;
622 }
623 }
624
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500625 lst_size = (sizeof(struct TxD) * config->max_txds);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626 lst_per_page = PAGE_SIZE / lst_size;
627
628 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000629 struct fifo_info *fifo = &mac_control->fifos[i];
630 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
631 int fifo_len = tx_cfg->fifo_len;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500632 int list_holder_size = fifo_len * sizeof(struct list_info_hold);
Joe Perches13d866a2009-08-24 17:29:41 +0000633
634 fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL);
635 if (!fifo->list_info) {
Joe Perchesd44570e2009-08-24 17:29:44 +0000636 DBG_PRINT(INFO_DBG, "Malloc failed for list_info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 return -ENOMEM;
638 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400639 mem_allocated += list_holder_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 }
641 for (i = 0; i < config->tx_fifo_num; i++) {
642 int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
643 lst_per_page);
Joe Perches13d866a2009-08-24 17:29:41 +0000644 struct fifo_info *fifo = &mac_control->fifos[i];
645 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
646
647 fifo->tx_curr_put_info.offset = 0;
648 fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1;
649 fifo->tx_curr_get_info.offset = 0;
650 fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1;
651 fifo->fifo_no = i;
652 fifo->nic = nic;
653 fifo->max_txds = MAX_SKB_FRAGS + 2;
654 fifo->dev = dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700655
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656 for (j = 0; j < page_num; j++) {
657 int k = 0;
658 dma_addr_t tmp_p;
659 void *tmp_v;
660 tmp_v = pci_alloc_consistent(nic->pdev,
661 PAGE_SIZE, &tmp_p);
662 if (!tmp_v) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000663 DBG_PRINT(INFO_DBG,
664 "pci_alloc_consistent failed for TxDL\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 return -ENOMEM;
666 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700667 /* If we got a zero DMA address(can happen on
668 * certain platforms like PPC), reallocate.
669 * Store virtual address of page we don't want,
670 * to be freed later.
671 */
672 if (!tmp_p) {
673 mac_control->zerodma_virt_addr = tmp_v;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400674 DBG_PRINT(INIT_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000675 "%s: Zero DMA address for TxDL. "
676 "Virtual address %p\n",
677 dev->name, tmp_v);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700678 tmp_v = pci_alloc_consistent(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +0000679 PAGE_SIZE, &tmp_p);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700680 if (!tmp_v) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800681 DBG_PRINT(INFO_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000682 "pci_alloc_consistent failed for TxDL\n");
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700683 return -ENOMEM;
684 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400685 mem_allocated += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700686 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 while (k < lst_per_page) {
688 int l = (j * lst_per_page) + k;
Joe Perches13d866a2009-08-24 17:29:41 +0000689 if (l == tx_cfg->fifo_len)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700690 break;
Joe Perches13d866a2009-08-24 17:29:41 +0000691 fifo->list_info[l].list_virt_addr =
Joe Perchesd44570e2009-08-24 17:29:44 +0000692 tmp_v + (k * lst_size);
Joe Perches13d866a2009-08-24 17:29:41 +0000693 fifo->list_info[l].list_phy_addr =
Joe Perchesd44570e2009-08-24 17:29:44 +0000694 tmp_p + (k * lst_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695 k++;
696 }
697 }
698 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700699
Surjit Reang2fda0962008-01-24 02:08:59 -0800700 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000701 struct fifo_info *fifo = &mac_control->fifos[i];
702 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
703
704 size = tx_cfg->fifo_len;
705 fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
706 if (!fifo->ufo_in_band_v)
Surjit Reang2fda0962008-01-24 02:08:59 -0800707 return -ENOMEM;
708 mem_allocated += (size * sizeof(u64));
709 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -0500710
Linus Torvalds1da177e2005-04-16 15:20:36 -0700711 /* Allocation and initialization of RXDs in Rings */
712 size = 0;
713 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000714 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
715 struct ring_info *ring = &mac_control->rings[i];
716
717 if (rx_cfg->num_rxd % (rxd_count[nic->rxd_mode] + 1)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +0000718 DBG_PRINT(ERR_DBG, "%s: Ring%d RxD count is not a "
719 "multiple of RxDs per Block\n",
720 dev->name, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700721 return FAILURE;
722 }
Joe Perches13d866a2009-08-24 17:29:41 +0000723 size += rx_cfg->num_rxd;
724 ring->block_count = rx_cfg->num_rxd /
Joe Perchesd44570e2009-08-24 17:29:44 +0000725 (rxd_count[nic->rxd_mode] + 1);
Joe Perches13d866a2009-08-24 17:29:41 +0000726 ring->pkt_cnt = rx_cfg->num_rxd - ring->block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700727 }
Ananda Rajuda6971d2005-10-31 16:55:31 -0500728 if (nic->rxd_mode == RXD_MODE_1)
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500729 size = (size * (sizeof(struct RxD1)));
Ananda Rajuda6971d2005-10-31 16:55:31 -0500730 else
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500731 size = (size * (sizeof(struct RxD3)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732
733 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000734 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
735 struct ring_info *ring = &mac_control->rings[i];
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700736
Joe Perches13d866a2009-08-24 17:29:41 +0000737 ring->rx_curr_get_info.block_index = 0;
738 ring->rx_curr_get_info.offset = 0;
739 ring->rx_curr_get_info.ring_len = rx_cfg->num_rxd - 1;
740 ring->rx_curr_put_info.block_index = 0;
741 ring->rx_curr_put_info.offset = 0;
742 ring->rx_curr_put_info.ring_len = rx_cfg->num_rxd - 1;
743 ring->nic = nic;
744 ring->ring_no = i;
Joe Perches13d866a2009-08-24 17:29:41 +0000745
746 blk_cnt = rx_cfg->num_rxd / (rxd_count[nic->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 /* Allocating all the Rx blocks */
748 for (j = 0; j < blk_cnt; j++) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500749 struct rx_block_info *rx_blocks;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500750 int l;
751
Joe Perches13d866a2009-08-24 17:29:41 +0000752 rx_blocks = &ring->rx_blocks[j];
Joe Perchesd44570e2009-08-24 17:29:44 +0000753 size = SIZE_OF_BLOCK; /* size is always page size */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700754 tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
755 &tmp_p_addr);
756 if (tmp_v_addr == NULL) {
757 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700758 * In case of failure, free_shared_mem()
759 * is called, which should free any
760 * memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700761 * failure happened.
762 */
Ananda Rajuda6971d2005-10-31 16:55:31 -0500763 rx_blocks->block_virt_addr = tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 return -ENOMEM;
765 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400766 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767 memset(tmp_v_addr, 0, size);
Joe Perches4f870322009-08-24 17:29:42 +0000768
769 size = sizeof(struct rxd_info) *
770 rxd_count[nic->rxd_mode];
Ananda Rajuda6971d2005-10-31 16:55:31 -0500771 rx_blocks->block_virt_addr = tmp_v_addr;
772 rx_blocks->block_dma_addr = tmp_p_addr;
Joe Perches4f870322009-08-24 17:29:42 +0000773 rx_blocks->rxds = kmalloc(size, GFP_KERNEL);
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500774 if (!rx_blocks->rxds)
775 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000776 mem_allocated += size;
Joe Perchesd44570e2009-08-24 17:29:44 +0000777 for (l = 0; l < rxd_count[nic->rxd_mode]; l++) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500778 rx_blocks->rxds[l].virt_addr =
779 rx_blocks->block_virt_addr +
780 (rxd_size[nic->rxd_mode] * l);
781 rx_blocks->rxds[l].dma_addr =
782 rx_blocks->block_dma_addr +
783 (rxd_size[nic->rxd_mode] * l);
784 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785 }
786 /* Interlinking all Rx Blocks */
787 for (j = 0; j < blk_cnt; j++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000788 int next = (j + 1) % blk_cnt;
789 tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
790 tmp_v_addr_next = ring->rx_blocks[next].block_virt_addr;
791 tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
792 tmp_p_addr_next = ring->rx_blocks[next].block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700793
Joe Perches43d620c2011-06-16 19:08:06 +0000794 pre_rxd_blk = tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795 pre_rxd_blk->reserved_2_pNext_RxD_block =
Joe Perchesd44570e2009-08-24 17:29:44 +0000796 (unsigned long)tmp_v_addr_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797 pre_rxd_blk->pNext_RxD_Blk_physical =
Joe Perchesd44570e2009-08-24 17:29:44 +0000798 (u64)tmp_p_addr_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799 }
800 }
Veena Parat6d517a22007-07-23 02:20:51 -0400801 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500802 /*
803 * Allocation of Storages for buffer addresses in 2BUFF mode
804 * and the buffers as well.
805 */
806 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000807 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
808 struct ring_info *ring = &mac_control->rings[i];
809
810 blk_cnt = rx_cfg->num_rxd /
Joe Perchesd44570e2009-08-24 17:29:44 +0000811 (rxd_count[nic->rxd_mode] + 1);
Joe Perches4f870322009-08-24 17:29:42 +0000812 size = sizeof(struct buffAdd *) * blk_cnt;
813 ring->ba = kmalloc(size, GFP_KERNEL);
Joe Perches13d866a2009-08-24 17:29:41 +0000814 if (!ring->ba)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700815 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000816 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500817 for (j = 0; j < blk_cnt; j++) {
818 int k = 0;
Joe Perches4f870322009-08-24 17:29:42 +0000819
820 size = sizeof(struct buffAdd) *
821 (rxd_count[nic->rxd_mode] + 1);
822 ring->ba[j] = kmalloc(size, GFP_KERNEL);
Joe Perches13d866a2009-08-24 17:29:41 +0000823 if (!ring->ba[j])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000825 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500826 while (k != rxd_count[nic->rxd_mode]) {
Joe Perches13d866a2009-08-24 17:29:41 +0000827 ba = &ring->ba[j][k];
Joe Perches4f870322009-08-24 17:29:42 +0000828 size = BUF0_LEN + ALIGN_SIZE;
829 ba->ba_0_org = kmalloc(size, GFP_KERNEL);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500830 if (!ba->ba_0_org)
831 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000832 mem_allocated += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500833 tmp = (unsigned long)ba->ba_0_org;
834 tmp += ALIGN_SIZE;
Joe Perchesd44570e2009-08-24 17:29:44 +0000835 tmp &= ~((unsigned long)ALIGN_SIZE);
836 ba->ba_0 = (void *)tmp;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500837
Joe Perches4f870322009-08-24 17:29:42 +0000838 size = BUF1_LEN + ALIGN_SIZE;
839 ba->ba_1_org = kmalloc(size, GFP_KERNEL);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500840 if (!ba->ba_1_org)
841 return -ENOMEM;
Joe Perches4f870322009-08-24 17:29:42 +0000842 mem_allocated += size;
Joe Perchesd44570e2009-08-24 17:29:44 +0000843 tmp = (unsigned long)ba->ba_1_org;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500844 tmp += ALIGN_SIZE;
Joe Perchesd44570e2009-08-24 17:29:44 +0000845 tmp &= ~((unsigned long)ALIGN_SIZE);
846 ba->ba_1 = (void *)tmp;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500847 k++;
848 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849 }
850 }
851 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852
853 /* Allocation and initialization of Statistics block */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500854 size = sizeof(struct stat_block);
Joe Perchesd44570e2009-08-24 17:29:44 +0000855 mac_control->stats_mem =
856 pci_alloc_consistent(nic->pdev, size,
857 &mac_control->stats_mem_phy);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700858
859 if (!mac_control->stats_mem) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700860 /*
861 * In case of failure, free_shared_mem() is called, which
862 * should free any memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700863 * failure happened.
864 */
865 return -ENOMEM;
866 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400867 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 mac_control->stats_mem_sz = size;
869
870 tmp_v_addr = mac_control->stats_mem;
Joe Perches43d620c2011-06-16 19:08:06 +0000871 mac_control->stats_info = tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700872 memset(tmp_v_addr, 0, size);
Breno Leitao3a228132010-03-04 10:40:44 +0000873 DBG_PRINT(INIT_DBG, "%s: Ring Mem PHY: 0x%llx\n",
874 dev_name(&nic->pdev->dev), (unsigned long long)tmp_p_addr);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400875 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700876 return SUCCESS;
877}
878
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700879/**
880 * free_shared_mem - Free the allocated Memory
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881 * @nic: Device private variable.
882 * Description: This function is to free all memory locations allocated by
883 * the init_shared_mem() function and return it to the kernel.
884 */
885
886static void free_shared_mem(struct s2io_nic *nic)
887{
888 int i, j, blk_cnt, size;
889 void *tmp_v_addr;
890 dma_addr_t tmp_p_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891 int lst_size, lst_per_page;
Micah Gruber8910b492007-07-09 11:29:04 +0800892 struct net_device *dev;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400893 int page_num = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +0000894 struct config_param *config;
895 struct mac_info *mac_control;
896 struct stat_block *stats;
897 struct swStat *swstats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898
899 if (!nic)
900 return;
901
Micah Gruber8910b492007-07-09 11:29:04 +0800902 dev = nic->dev;
903
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904 config = &nic->config;
Joe Perchesffb5df62009-08-24 17:29:47 +0000905 mac_control = &nic->mac_control;
906 stats = mac_control->stats_info;
907 swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908
Joe Perchesd44570e2009-08-24 17:29:44 +0000909 lst_size = sizeof(struct TxD) * config->max_txds;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910 lst_per_page = PAGE_SIZE / lst_size;
911
912 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000913 struct fifo_info *fifo = &mac_control->fifos[i];
914 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
915
916 page_num = TXD_MEM_PAGE_CNT(tx_cfg->fifo_len, lst_per_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917 for (j = 0; j < page_num; j++) {
918 int mem_blks = (j * lst_per_page);
Joe Perches13d866a2009-08-24 17:29:41 +0000919 struct list_info_hold *fli;
920
921 if (!fifo->list_info)
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400922 return;
Joe Perches13d866a2009-08-24 17:29:41 +0000923
924 fli = &fifo->list_info[mem_blks];
925 if (!fli->list_virt_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926 break;
927 pci_free_consistent(nic->pdev, PAGE_SIZE,
Joe Perches13d866a2009-08-24 17:29:41 +0000928 fli->list_virt_addr,
929 fli->list_phy_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +0000930 swstats->mem_freed += PAGE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700932 /* If we got a zero DMA address during allocation,
933 * free the page now
934 */
935 if (mac_control->zerodma_virt_addr) {
936 pci_free_consistent(nic->pdev, PAGE_SIZE,
937 mac_control->zerodma_virt_addr,
938 (dma_addr_t)0);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400939 DBG_PRINT(INIT_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +0000940 "%s: Freeing TxDL with zero DMA address. "
941 "Virtual address %p\n",
942 dev->name, mac_control->zerodma_virt_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +0000943 swstats->mem_freed += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700944 }
Joe Perches13d866a2009-08-24 17:29:41 +0000945 kfree(fifo->list_info);
Joe Perches82c2d022009-08-24 17:29:48 +0000946 swstats->mem_freed += tx_cfg->fifo_len *
Joe Perchesd44570e2009-08-24 17:29:44 +0000947 sizeof(struct list_info_hold);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700948 }
949
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950 size = SIZE_OF_BLOCK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000952 struct ring_info *ring = &mac_control->rings[i];
953
954 blk_cnt = ring->block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 for (j = 0; j < blk_cnt; j++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000956 tmp_v_addr = ring->rx_blocks[j].block_virt_addr;
957 tmp_p_addr = ring->rx_blocks[j].block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 if (tmp_v_addr == NULL)
959 break;
960 pci_free_consistent(nic->pdev, size,
961 tmp_v_addr, tmp_p_addr);
Joe Perchesffb5df62009-08-24 17:29:47 +0000962 swstats->mem_freed += size;
Joe Perches13d866a2009-08-24 17:29:41 +0000963 kfree(ring->rx_blocks[j].rxds);
Joe Perchesffb5df62009-08-24 17:29:47 +0000964 swstats->mem_freed += sizeof(struct rxd_info) *
965 rxd_count[nic->rxd_mode];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 }
967 }
968
Veena Parat6d517a22007-07-23 02:20:51 -0400969 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500970 /* Freeing buffer storage addresses in 2BUFF mode. */
971 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +0000972 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
973 struct ring_info *ring = &mac_control->rings[i];
974
975 blk_cnt = rx_cfg->num_rxd /
976 (rxd_count[nic->rxd_mode] + 1);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500977 for (j = 0; j < blk_cnt; j++) {
978 int k = 0;
Joe Perches13d866a2009-08-24 17:29:41 +0000979 if (!ring->ba[j])
Ananda Rajuda6971d2005-10-31 16:55:31 -0500980 continue;
981 while (k != rxd_count[nic->rxd_mode]) {
Joe Perches13d866a2009-08-24 17:29:41 +0000982 struct buffAdd *ba = &ring->ba[j][k];
Ananda Rajuda6971d2005-10-31 16:55:31 -0500983 kfree(ba->ba_0_org);
Joe Perchesffb5df62009-08-24 17:29:47 +0000984 swstats->mem_freed +=
985 BUF0_LEN + ALIGN_SIZE;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500986 kfree(ba->ba_1_org);
Joe Perchesffb5df62009-08-24 17:29:47 +0000987 swstats->mem_freed +=
988 BUF1_LEN + ALIGN_SIZE;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500989 k++;
990 }
Joe Perches13d866a2009-08-24 17:29:41 +0000991 kfree(ring->ba[j]);
Joe Perchesffb5df62009-08-24 17:29:47 +0000992 swstats->mem_freed += sizeof(struct buffAdd) *
993 (rxd_count[nic->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 }
Joe Perches13d866a2009-08-24 17:29:41 +0000995 kfree(ring->ba);
Joe Perchesffb5df62009-08-24 17:29:47 +0000996 swstats->mem_freed += sizeof(struct buffAdd *) *
997 blk_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700999 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000
Surjit Reang2fda0962008-01-24 02:08:59 -08001001 for (i = 0; i < nic->config.tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001002 struct fifo_info *fifo = &mac_control->fifos[i];
1003 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
1004
1005 if (fifo->ufo_in_band_v) {
Joe Perchesffb5df62009-08-24 17:29:47 +00001006 swstats->mem_freed += tx_cfg->fifo_len *
1007 sizeof(u64);
Joe Perches13d866a2009-08-24 17:29:41 +00001008 kfree(fifo->ufo_in_band_v);
Surjit Reang2fda0962008-01-24 02:08:59 -08001009 }
1010 }
1011
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 if (mac_control->stats_mem) {
Joe Perchesffb5df62009-08-24 17:29:47 +00001013 swstats->mem_freed += mac_control->stats_mem_sz;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014 pci_free_consistent(nic->pdev,
1015 mac_control->stats_mem_sz,
1016 mac_control->stats_mem,
1017 mac_control->stats_mem_phy);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001018 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019}
1020
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001021/**
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001022 * s2io_verify_pci_mode -
1023 */
1024
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001025static int s2io_verify_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001026{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001027 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001028 register u64 val64 = 0;
1029 int mode;
1030
1031 val64 = readq(&bar0->pci_mode);
1032 mode = (u8)GET_PCI_MODE(val64);
1033
Joe Perchesd44570e2009-08-24 17:29:44 +00001034 if (val64 & PCI_MODE_UNKNOWN_MODE)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001035 return -1; /* Unknown PCI mode */
1036 return mode;
1037}
1038
Ananda Rajuc92ca042006-04-21 19:18:03 -04001039#define NEC_VENID 0x1033
1040#define NEC_DEVID 0x0125
1041static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
1042{
1043 struct pci_dev *tdev = NULL;
Alan Cox26d36b62006-09-15 15:22:51 +01001044 while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
1045 if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
Ilpo Järvinen7ad62db2008-05-13 14:16:54 +03001046 if (tdev->bus == s2io_pdev->bus->parent) {
Alan Cox26d36b62006-09-15 15:22:51 +01001047 pci_dev_put(tdev);
Ananda Rajuc92ca042006-04-21 19:18:03 -04001048 return 1;
Ilpo Järvinen7ad62db2008-05-13 14:16:54 +03001049 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001050 }
1051 }
1052 return 0;
1053}
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001054
Adrian Bunk7b32a312006-05-16 17:30:50 +02001055static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001056/**
1057 * s2io_print_pci_mode -
1058 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001059static int s2io_print_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001060{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001061 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001062 register u64 val64 = 0;
1063 int mode;
1064 struct config_param *config = &nic->config;
Joe Perches9e39f7c2009-08-25 08:52:00 +00001065 const char *pcimode;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001066
1067 val64 = readq(&bar0->pci_mode);
1068 mode = (u8)GET_PCI_MODE(val64);
1069
Joe Perchesd44570e2009-08-24 17:29:44 +00001070 if (val64 & PCI_MODE_UNKNOWN_MODE)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001071 return -1; /* Unknown PCI mode */
1072
Ananda Rajuc92ca042006-04-21 19:18:03 -04001073 config->bus_speed = bus_speed[mode];
1074
1075 if (s2io_on_nec_bridge(nic->pdev)) {
1076 DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00001077 nic->dev->name);
Ananda Rajuc92ca042006-04-21 19:18:03 -04001078 return mode;
1079 }
1080
Joe Perchesd44570e2009-08-24 17:29:44 +00001081 switch (mode) {
1082 case PCI_MODE_PCI_33:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001083 pcimode = "33MHz PCI bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001084 break;
1085 case PCI_MODE_PCI_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001086 pcimode = "66MHz PCI bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001087 break;
1088 case PCI_MODE_PCIX_M1_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001089 pcimode = "66MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001090 break;
1091 case PCI_MODE_PCIX_M1_100:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001092 pcimode = "100MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001093 break;
1094 case PCI_MODE_PCIX_M1_133:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001095 pcimode = "133MHz PCIX(M1) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001096 break;
1097 case PCI_MODE_PCIX_M2_66:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001098 pcimode = "133MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001099 break;
1100 case PCI_MODE_PCIX_M2_100:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001101 pcimode = "200MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001102 break;
1103 case PCI_MODE_PCIX_M2_133:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001104 pcimode = "266MHz PCIX(M2) bus";
Joe Perchesd44570e2009-08-24 17:29:44 +00001105 break;
1106 default:
Joe Perches9e39f7c2009-08-25 08:52:00 +00001107 pcimode = "unsupported bus!";
1108 mode = -1;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001109 }
1110
Joe Perches9e39f7c2009-08-25 08:52:00 +00001111 DBG_PRINT(ERR_DBG, "%s: Device is on %d bit %s\n",
1112 nic->dev->name, val64 & PCI_MODE_32_BITS ? 32 : 64, pcimode);
1113
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001114 return mode;
1115}
1116
1117/**
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001118 * init_tti - Initialization transmit traffic interrupt scheme
1119 * @nic: device private variable
1120 * @link: link status (UP/DOWN) used to enable/disable continuous
1121 * transmit interrupts
1122 * Description: The function configures transmit traffic interrupts
1123 * Return Value: SUCCESS on success and
1124 * '-1' on failure
1125 */
1126
Adrian Bunk0d66afe2008-03-04 15:19:22 -08001127static int init_tti(struct s2io_nic *nic, int link)
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001128{
1129 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1130 register u64 val64 = 0;
1131 int i;
Joe Perchesffb5df62009-08-24 17:29:47 +00001132 struct config_param *config = &nic->config;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001133
1134 for (i = 0; i < config->tx_fifo_num; i++) {
1135 /*
1136 * TTI Initialization. Default Tx timer gets us about
1137 * 250 interrupts per sec. Continuous interrupts are enabled
1138 * by default.
1139 */
1140 if (nic->device_type == XFRAME_II_DEVICE) {
1141 int count = (nic->config.bus_speed * 125)/2;
1142 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
1143 } else
1144 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
1145
1146 val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001147 TTI_DATA1_MEM_TX_URNG_B(0x10) |
1148 TTI_DATA1_MEM_TX_URNG_C(0x30) |
1149 TTI_DATA1_MEM_TX_TIMER_AC_EN;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001150 if (i == 0)
1151 if (use_continuous_tx_intrs && (link == LINK_UP))
1152 val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001153 writeq(val64, &bar0->tti_data1_mem);
1154
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001155 if (nic->config.intr_type == MSI_X) {
1156 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1157 TTI_DATA2_MEM_TX_UFC_B(0x100) |
1158 TTI_DATA2_MEM_TX_UFC_C(0x200) |
1159 TTI_DATA2_MEM_TX_UFC_D(0x300);
1160 } else {
1161 if ((nic->config.tx_steering_type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00001162 TX_DEFAULT_STEERING) &&
1163 (config->tx_fifo_num > 1) &&
1164 (i >= nic->udp_fifo_idx) &&
1165 (i < (nic->udp_fifo_idx +
1166 nic->total_udp_fifos)))
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001167 val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
1168 TTI_DATA2_MEM_TX_UFC_B(0x80) |
1169 TTI_DATA2_MEM_TX_UFC_C(0x100) |
1170 TTI_DATA2_MEM_TX_UFC_D(0x120);
1171 else
1172 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1173 TTI_DATA2_MEM_TX_UFC_B(0x20) |
1174 TTI_DATA2_MEM_TX_UFC_C(0x40) |
1175 TTI_DATA2_MEM_TX_UFC_D(0x80);
1176 }
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001177
1178 writeq(val64, &bar0->tti_data2_mem);
1179
Joe Perchesd44570e2009-08-24 17:29:44 +00001180 val64 = TTI_CMD_MEM_WE |
1181 TTI_CMD_MEM_STROBE_NEW_CMD |
1182 TTI_CMD_MEM_OFFSET(i);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001183 writeq(val64, &bar0->tti_command_mem);
1184
1185 if (wait_for_cmd_complete(&bar0->tti_command_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00001186 TTI_CMD_MEM_STROBE_NEW_CMD,
1187 S2IO_BIT_RESET) != SUCCESS)
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001188 return FAILURE;
1189 }
1190
1191 return SUCCESS;
1192}
1193
1194/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001195 * init_nic - Initialization of hardware
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001196 * @nic: device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001197 * Description: The function sequentially configures every block
1198 * of the H/W from their reset values.
1199 * Return Value: SUCCESS on success and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001200 * '-1' on failure (endian settings incorrect).
1201 */
1202
1203static int init_nic(struct s2io_nic *nic)
1204{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001205 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206 struct net_device *dev = nic->dev;
1207 register u64 val64 = 0;
1208 void __iomem *add;
1209 u32 time;
1210 int i, j;
Ananda Rajuc92ca042006-04-21 19:18:03 -04001211 int dtx_cnt = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 unsigned long long mem_share;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001213 int mem_size;
Joe Perchesffb5df62009-08-24 17:29:47 +00001214 struct config_param *config = &nic->config;
1215 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001216
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001217 /* to set the swapper controle on the card */
Joe Perchesd44570e2009-08-24 17:29:44 +00001218 if (s2io_set_swapper(nic)) {
1219 DBG_PRINT(ERR_DBG, "ERROR: Setting Swapper failed\n");
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001220 return -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001221 }
1222
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001223 /*
1224 * Herc requires EOI to be removed from reset before XGXS, so..
1225 */
1226 if (nic->device_type & XFRAME_II_DEVICE) {
1227 val64 = 0xA500000000ULL;
1228 writeq(val64, &bar0->sw_reset);
1229 msleep(500);
1230 val64 = readq(&bar0->sw_reset);
1231 }
1232
Linus Torvalds1da177e2005-04-16 15:20:36 -07001233 /* Remove XGXS from reset state */
1234 val64 = 0;
1235 writeq(val64, &bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001236 msleep(500);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001237 val64 = readq(&bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001238
Sreenivasa Honnur79620242007-12-05 23:59:28 -05001239 /* Ensure that it's safe to access registers by checking
1240 * RIC_RUNNING bit is reset. Check is valid only for XframeII.
1241 */
1242 if (nic->device_type == XFRAME_II_DEVICE) {
1243 for (i = 0; i < 50; i++) {
1244 val64 = readq(&bar0->adapter_status);
1245 if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
1246 break;
1247 msleep(10);
1248 }
1249 if (i == 50)
1250 return -ENODEV;
1251 }
1252
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 /* Enable Receiving broadcasts */
1254 add = &bar0->mac_cfg;
1255 val64 = readq(&bar0->mac_cfg);
1256 val64 |= MAC_RMAC_BCAST_ENABLE;
1257 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00001258 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1260 writel((u32) (val64 >> 32), (add + 4));
1261
1262 /* Read registers in all blocks */
1263 val64 = readq(&bar0->mac_int_mask);
1264 val64 = readq(&bar0->mc_int_mask);
1265 val64 = readq(&bar0->xgxs_int_mask);
1266
1267 /* Set MTU */
1268 val64 = dev->mtu;
1269 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
1270
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001271 if (nic->device_type & XFRAME_II_DEVICE) {
1272 while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07001273 SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
Linus Torvalds1da177e2005-04-16 15:20:36 -07001274 &bar0->dtx_control, UF);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001275 if (dtx_cnt & 0x1)
1276 msleep(1); /* Necessary!! */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001277 dtx_cnt++;
1278 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001279 } else {
Ananda Rajuc92ca042006-04-21 19:18:03 -04001280 while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
1281 SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
1282 &bar0->dtx_control, UF);
1283 val64 = readq(&bar0->dtx_control);
1284 dtx_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001285 }
1286 }
1287
1288 /* Tx DMA Initialization */
1289 val64 = 0;
1290 writeq(val64, &bar0->tx_fifo_partition_0);
1291 writeq(val64, &bar0->tx_fifo_partition_1);
1292 writeq(val64, &bar0->tx_fifo_partition_2);
1293 writeq(val64, &bar0->tx_fifo_partition_3);
1294
Linus Torvalds1da177e2005-04-16 15:20:36 -07001295 for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001296 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
1297
1298 val64 |= vBIT(tx_cfg->fifo_len - 1, ((j * 32) + 19), 13) |
1299 vBIT(tx_cfg->fifo_priority, ((j * 32) + 5), 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001300
1301 if (i == (config->tx_fifo_num - 1)) {
1302 if (i % 2 == 0)
1303 i++;
1304 }
1305
1306 switch (i) {
1307 case 1:
1308 writeq(val64, &bar0->tx_fifo_partition_0);
1309 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001310 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001311 break;
1312 case 3:
1313 writeq(val64, &bar0->tx_fifo_partition_1);
1314 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001315 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001316 break;
1317 case 5:
1318 writeq(val64, &bar0->tx_fifo_partition_2);
1319 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001320 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001321 break;
1322 case 7:
1323 writeq(val64, &bar0->tx_fifo_partition_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001324 val64 = 0;
1325 j = 0;
1326 break;
1327 default:
1328 j++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001329 break;
1330 }
1331 }
1332
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001333 /*
1334 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
1335 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
1336 */
Joe Perchesd44570e2009-08-24 17:29:44 +00001337 if ((nic->device_type == XFRAME_I_DEVICE) && (nic->pdev->revision < 4))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001338 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);
1339
Linus Torvalds1da177e2005-04-16 15:20:36 -07001340 val64 = readq(&bar0->tx_fifo_partition_0);
1341 DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00001342 &bar0->tx_fifo_partition_0, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001343
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001344 /*
1345 * Initialization of Tx_PA_CONFIG register to ignore packet
Linus Torvalds1da177e2005-04-16 15:20:36 -07001346 * integrity checking.
1347 */
1348 val64 = readq(&bar0->tx_pa_cfg);
Joe Perchesd44570e2009-08-24 17:29:44 +00001349 val64 |= TX_PA_CFG_IGNORE_FRM_ERR |
1350 TX_PA_CFG_IGNORE_SNAP_OUI |
1351 TX_PA_CFG_IGNORE_LLC_CTRL |
1352 TX_PA_CFG_IGNORE_L2_ERR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001353 writeq(val64, &bar0->tx_pa_cfg);
1354
1355 /* Rx DMA intialization. */
1356 val64 = 0;
1357 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00001358 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
1359
1360 val64 |= vBIT(rx_cfg->ring_priority, (5 + (i * 8)), 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001361 }
1362 writeq(val64, &bar0->rx_queue_priority);
1363
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001364 /*
1365 * Allocating equal share of memory to all the
Linus Torvalds1da177e2005-04-16 15:20:36 -07001366 * configured Rings.
1367 */
1368 val64 = 0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001369 if (nic->device_type & XFRAME_II_DEVICE)
1370 mem_size = 32;
1371 else
1372 mem_size = 64;
1373
Linus Torvalds1da177e2005-04-16 15:20:36 -07001374 for (i = 0; i < config->rx_ring_num; i++) {
1375 switch (i) {
1376 case 0:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001377 mem_share = (mem_size / config->rx_ring_num +
1378 mem_size % config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001379 val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
1380 continue;
1381 case 1:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001382 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001383 val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
1384 continue;
1385 case 2:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001386 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001387 val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
1388 continue;
1389 case 3:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001390 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001391 val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
1392 continue;
1393 case 4:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001394 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001395 val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
1396 continue;
1397 case 5:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001398 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001399 val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
1400 continue;
1401 case 6:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001402 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001403 val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
1404 continue;
1405 case 7:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001406 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001407 val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
1408 continue;
1409 }
1410 }
1411 writeq(val64, &bar0->rx_queue_cfg);
1412
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001413 /*
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001414 * Filling Tx round robin registers
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001415 * as per the number of FIFOs for equal scheduling priority
Linus Torvalds1da177e2005-04-16 15:20:36 -07001416 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001417 switch (config->tx_fifo_num) {
1418 case 1:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001419 val64 = 0x0;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001420 writeq(val64, &bar0->tx_w_round_robin_0);
1421 writeq(val64, &bar0->tx_w_round_robin_1);
1422 writeq(val64, &bar0->tx_w_round_robin_2);
1423 writeq(val64, &bar0->tx_w_round_robin_3);
1424 writeq(val64, &bar0->tx_w_round_robin_4);
1425 break;
1426 case 2:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001427 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001428 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001429 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001430 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001431 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001432 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001433 writeq(val64, &bar0->tx_w_round_robin_4);
1434 break;
1435 case 3:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001436 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001437 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001438 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001439 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001440 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001441 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001442 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001443 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001444 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001445 writeq(val64, &bar0->tx_w_round_robin_4);
1446 break;
1447 case 4:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001448 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001449 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001450 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001451 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001452 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001453 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001454 writeq(val64, &bar0->tx_w_round_robin_4);
1455 break;
1456 case 5:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001457 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001458 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001459 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001460 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001461 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001462 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001463 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001464 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001465 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001466 writeq(val64, &bar0->tx_w_round_robin_4);
1467 break;
1468 case 6:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001469 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001470 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001471 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001472 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001473 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001474 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001475 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001476 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001477 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001478 writeq(val64, &bar0->tx_w_round_robin_4);
1479 break;
1480 case 7:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001481 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001482 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001483 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001484 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001485 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001486 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001487 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001488 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001489 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001490 writeq(val64, &bar0->tx_w_round_robin_4);
1491 break;
1492 case 8:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001493 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001494 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001495 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001496 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001497 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001498 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001499 writeq(val64, &bar0->tx_w_round_robin_4);
1500 break;
1501 }
1502
Ananda Rajub41477f2006-07-24 19:52:49 -04001503 /* Enable all configured Tx FIFO partitions */
Ananda Raju5d3213c2006-04-21 19:23:26 -04001504 val64 = readq(&bar0->tx_fifo_partition_0);
1505 val64 |= (TX_FIFO_PARTITION_EN);
1506 writeq(val64, &bar0->tx_fifo_partition_0);
1507
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001508 /* Filling the Rx round robin registers as per the
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001509 * number of Rings and steering based on QoS with
1510 * equal priority.
1511 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001512 switch (config->rx_ring_num) {
1513 case 1:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001514 val64 = 0x0;
1515 writeq(val64, &bar0->rx_w_round_robin_0);
1516 writeq(val64, &bar0->rx_w_round_robin_1);
1517 writeq(val64, &bar0->rx_w_round_robin_2);
1518 writeq(val64, &bar0->rx_w_round_robin_3);
1519 writeq(val64, &bar0->rx_w_round_robin_4);
1520
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001521 val64 = 0x8080808080808080ULL;
1522 writeq(val64, &bar0->rts_qos_steering);
1523 break;
1524 case 2:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001525 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001526 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001527 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001528 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001529 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001530 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001531 writeq(val64, &bar0->rx_w_round_robin_4);
1532
1533 val64 = 0x8080808040404040ULL;
1534 writeq(val64, &bar0->rts_qos_steering);
1535 break;
1536 case 3:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001537 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001538 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001539 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001540 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001541 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001542 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001543 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001544 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001545 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001546 writeq(val64, &bar0->rx_w_round_robin_4);
1547
1548 val64 = 0x8080804040402020ULL;
1549 writeq(val64, &bar0->rts_qos_steering);
1550 break;
1551 case 4:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001552 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001553 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001554 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001555 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001556 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001557 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001558 writeq(val64, &bar0->rx_w_round_robin_4);
1559
1560 val64 = 0x8080404020201010ULL;
1561 writeq(val64, &bar0->rts_qos_steering);
1562 break;
1563 case 5:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001564 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001565 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001566 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001567 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001568 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001569 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001570 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001571 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001572 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001573 writeq(val64, &bar0->rx_w_round_robin_4);
1574
1575 val64 = 0x8080404020201008ULL;
1576 writeq(val64, &bar0->rts_qos_steering);
1577 break;
1578 case 6:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001579 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001580 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001581 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001582 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001583 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001584 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001585 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001586 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001587 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001588 writeq(val64, &bar0->rx_w_round_robin_4);
1589
1590 val64 = 0x8080404020100804ULL;
1591 writeq(val64, &bar0->rts_qos_steering);
1592 break;
1593 case 7:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001594 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001595 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001596 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001597 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001598 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001599 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001600 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001601 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001602 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001603 writeq(val64, &bar0->rx_w_round_robin_4);
1604
1605 val64 = 0x8080402010080402ULL;
1606 writeq(val64, &bar0->rts_qos_steering);
1607 break;
1608 case 8:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001609 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001610 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001611 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001612 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001613 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001614 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001615 writeq(val64, &bar0->rx_w_round_robin_4);
1616
1617 val64 = 0x8040201008040201ULL;
1618 writeq(val64, &bar0->rts_qos_steering);
1619 break;
1620 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621
1622 /* UDP Fix */
1623 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001624 for (i = 0; i < 8; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001625 writeq(val64, &bar0->rts_frm_len_n[i]);
1626
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001627 /* Set the default rts frame length for the rings configured */
1628 val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
1629 for (i = 0 ; i < config->rx_ring_num ; i++)
1630 writeq(val64, &bar0->rts_frm_len_n[i]);
1631
1632 /* Set the frame length for the configured rings
1633 * desired by the user
1634 */
1635 for (i = 0; i < config->rx_ring_num; i++) {
1636 /* If rts_frm_len[i] == 0 then it is assumed that user not
1637 * specified frame length steering.
1638 * If the user provides the frame length then program
1639 * the rts_frm_len register for those values or else
1640 * leave it as it is.
1641 */
1642 if (rts_frm_len[i] != 0) {
1643 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
Joe Perchesd44570e2009-08-24 17:29:44 +00001644 &bar0->rts_frm_len_n[i]);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001645 }
1646 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001647
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001648 /* Disable differentiated services steering logic */
1649 for (i = 0; i < 64; i++) {
1650 if (rts_ds_steer(nic, i, 0) == FAILURE) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00001651 DBG_PRINT(ERR_DBG,
1652 "%s: rts_ds_steer failed on codepoint %d\n",
1653 dev->name, i);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001654 return -ENODEV;
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001655 }
1656 }
1657
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001658 /* Program statistics memory */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001659 writeq(mac_control->stats_mem_phy, &bar0->stat_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001660
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001661 if (nic->device_type == XFRAME_II_DEVICE) {
1662 val64 = STAT_BC(0x320);
1663 writeq(val64, &bar0->stat_byte_cnt);
1664 }
1665
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001666 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001667 * Initializing the sampling rate for the device to calculate the
1668 * bandwidth utilization.
1669 */
1670 val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001671 MAC_RX_LINK_UTIL_VAL(rmac_util_period);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001672 writeq(val64, &bar0->mac_link_util);
1673
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001674 /*
1675 * Initializing the Transmit and Receive Traffic Interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001676 * Scheme.
1677 */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001678
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001679 /* Initialize TTI */
1680 if (SUCCESS != init_tti(nic, nic->last_link_state))
1681 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001682
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001683 /* RTI Initialization */
1684 if (nic->device_type == XFRAME_II_DEVICE) {
1685 /*
1686 * Programmed to generate Apprx 500 Intrs per
1687 * second
1688 */
1689 int count = (nic->config.bus_speed * 125)/4;
1690 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
1691 } else
1692 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
1693 val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
Joe Perchesd44570e2009-08-24 17:29:44 +00001694 RTI_DATA1_MEM_RX_URNG_B(0x10) |
1695 RTI_DATA1_MEM_RX_URNG_C(0x30) |
1696 RTI_DATA1_MEM_RX_TIMER_AC_EN;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001697
1698 writeq(val64, &bar0->rti_data1_mem);
1699
1700 val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
1701 RTI_DATA2_MEM_RX_UFC_B(0x2) ;
1702 if (nic->config.intr_type == MSI_X)
Joe Perchesd44570e2009-08-24 17:29:44 +00001703 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) |
1704 RTI_DATA2_MEM_RX_UFC_D(0x40));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001705 else
Joe Perchesd44570e2009-08-24 17:29:44 +00001706 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) |
1707 RTI_DATA2_MEM_RX_UFC_D(0x80));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001708 writeq(val64, &bar0->rti_data2_mem);
1709
1710 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001711 val64 = RTI_CMD_MEM_WE |
1712 RTI_CMD_MEM_STROBE_NEW_CMD |
1713 RTI_CMD_MEM_OFFSET(i);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001714 writeq(val64, &bar0->rti_command_mem);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001715
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001716 /*
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001717 * Once the operation completes, the Strobe bit of the
1718 * command register will be reset. We poll for this
1719 * particular condition. We wait for a maximum of 500ms
1720 * for the operation to complete, if it's not complete
1721 * by then we return error.
1722 */
1723 time = 0;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00001724 while (true) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001725 val64 = readq(&bar0->rti_command_mem);
1726 if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
1727 break;
1728
1729 if (time > 10) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00001730 DBG_PRINT(ERR_DBG, "%s: RTI init failed\n",
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001731 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001732 return -ENODEV;
raghavendra.koushik@neterion.comb6e3f982005-08-03 12:38:01 -07001733 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001734 time++;
1735 msleep(50);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001736 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001737 }
1738
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001739 /*
1740 * Initializing proper values as Pause threshold into all
Linus Torvalds1da177e2005-04-16 15:20:36 -07001741 * the 8 Queues on Rx side.
1742 */
1743 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
1744 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);
1745
1746 /* Disable RMAC PAD STRIPPING */
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01001747 add = &bar0->mac_cfg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001748 val64 = readq(&bar0->mac_cfg);
1749 val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
1750 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1751 writel((u32) (val64), add);
1752 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1753 writel((u32) (val64 >> 32), (add + 4));
1754 val64 = readq(&bar0->mac_cfg);
1755
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05001756 /* Enable FCS stripping by adapter */
1757 add = &bar0->mac_cfg;
1758 val64 = readq(&bar0->mac_cfg);
1759 val64 |= MAC_CFG_RMAC_STRIP_FCS;
1760 if (nic->device_type == XFRAME_II_DEVICE)
1761 writeq(val64, &bar0->mac_cfg);
1762 else {
1763 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1764 writel((u32) (val64), add);
1765 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1766 writel((u32) (val64 >> 32), (add + 4));
1767 }
1768
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001769 /*
1770 * Set the time value to be inserted in the pause frame
Linus Torvalds1da177e2005-04-16 15:20:36 -07001771 * generated by xena.
1772 */
1773 val64 = readq(&bar0->rmac_pause_cfg);
1774 val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
1775 val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
1776 writeq(val64, &bar0->rmac_pause_cfg);
1777
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001778 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779 * Set the Threshold Limit for Generating the pause frame
1780 * If the amount of data in any Queue exceeds ratio of
1781 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
1782 * pause frame is generated
1783 */
1784 val64 = 0;
1785 for (i = 0; i < 4; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001786 val64 |= (((u64)0xFF00 |
1787 nic->mac_control.mc_pause_threshold_q0q3)
1788 << (i * 2 * 8));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001789 }
1790 writeq(val64, &bar0->mc_pause_thresh_q0q3);
1791
1792 val64 = 0;
1793 for (i = 0; i < 4; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00001794 val64 |= (((u64)0xFF00 |
1795 nic->mac_control.mc_pause_threshold_q4q7)
1796 << (i * 2 * 8));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001797 }
1798 writeq(val64, &bar0->mc_pause_thresh_q4q7);
1799
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001800 /*
1801 * TxDMA will stop Read request if the number of read split has
Linus Torvalds1da177e2005-04-16 15:20:36 -07001802 * exceeded the limit pointed by shared_splits
1803 */
1804 val64 = readq(&bar0->pic_control);
1805 val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
1806 writeq(val64, &bar0->pic_control);
1807
Ananda Raju863c11a2006-04-21 19:03:13 -04001808 if (nic->config.bus_speed == 266) {
1809 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
1810 writeq(0x0, &bar0->read_retry_delay);
1811 writeq(0x0, &bar0->write_retry_delay);
1812 }
1813
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001814 /*
1815 * Programming the Herc to split every write transaction
1816 * that does not start on an ADB to reduce disconnects.
1817 */
1818 if (nic->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05001819 val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
1820 MISC_LINK_STABILITY_PRD(3);
Ananda Raju863c11a2006-04-21 19:03:13 -04001821 writeq(val64, &bar0->misc_control);
1822 val64 = readq(&bar0->pic_control2);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07001823 val64 &= ~(s2BIT(13)|s2BIT(14)|s2BIT(15));
Ananda Raju863c11a2006-04-21 19:03:13 -04001824 writeq(val64, &bar0->pic_control2);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001825 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001826 if (strstr(nic->product_name, "CX4")) {
1827 val64 = TMAC_AVG_IPG(0x17);
1828 writeq(val64, &bar0->tmac_avg_ipg);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001829 }
1830
Linus Torvalds1da177e2005-04-16 15:20:36 -07001831 return SUCCESS;
1832}
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001833#define LINK_UP_DOWN_INTERRUPT 1
1834#define MAC_RMAC_ERR_TIMER 2
1835
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001836static int s2io_link_fault_indication(struct s2io_nic *nic)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001837{
1838 if (nic->device_type == XFRAME_II_DEVICE)
1839 return LINK_UP_DOWN_INTERRUPT;
1840 else
1841 return MAC_RMAC_ERR_TIMER;
1842}
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07001843
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001844/**
1845 * do_s2io_write_bits - update alarm bits in alarm register
1846 * @value: alarm bits
1847 * @flag: interrupt status
1848 * @addr: address value
1849 * Description: update alarm bits in alarm register
1850 * Return Value:
1851 * NONE.
1852 */
1853static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
1854{
1855 u64 temp64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001856
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001857 temp64 = readq(addr);
1858
Joe Perchesd44570e2009-08-24 17:29:44 +00001859 if (flag == ENABLE_INTRS)
1860 temp64 &= ~((u64)value);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001861 else
Joe Perchesd44570e2009-08-24 17:29:44 +00001862 temp64 |= ((u64)value);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001863 writeq(temp64, addr);
1864}
1865
Stephen Hemminger43b7c452007-10-05 12:39:21 -07001866static void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001867{
1868 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1869 register u64 gen_int_mask = 0;
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001870 u64 interruptible;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001871
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001872 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001873 if (mask & TX_DMA_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001874 gen_int_mask |= TXDMA_INT_M;
1875
1876 do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
Joe Perchesd44570e2009-08-24 17:29:44 +00001877 TXDMA_PCC_INT | TXDMA_TTI_INT |
1878 TXDMA_LSO_INT | TXDMA_TPA_INT |
1879 TXDMA_SM_INT, flag, &bar0->txdma_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001880
1881 do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00001882 PFC_MISC_0_ERR | PFC_MISC_1_ERR |
1883 PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
1884 &bar0->pfc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001885
1886 do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00001887 TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
1888 TDA_PCIX_ERR, flag, &bar0->tda_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001889
1890 do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001891 PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
1892 PCC_N_SERR | PCC_6_COF_OV_ERR |
1893 PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
1894 PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
1895 PCC_TXB_ECC_SG_ERR,
1896 flag, &bar0->pcc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001897
1898 do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001899 TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001900
1901 do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
Joe Perchesd44570e2009-08-24 17:29:44 +00001902 LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
1903 LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
1904 flag, &bar0->lso_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001905
1906 do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
Joe Perchesd44570e2009-08-24 17:29:44 +00001907 flag, &bar0->tpa_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001908
1909 do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001910 }
1911
1912 if (mask & TX_MAC_INTR) {
1913 gen_int_mask |= TXMAC_INT_M;
1914 do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001915 &bar0->mac_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001916 do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001917 TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
1918 TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
1919 flag, &bar0->mac_tmac_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001920 }
1921
1922 if (mask & TX_XGXS_INTR) {
1923 gen_int_mask |= TXXGXS_INT_M;
1924 do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001925 &bar0->xgxs_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001926 do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001927 TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
1928 flag, &bar0->xgxs_txgxs_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001929 }
1930
1931 if (mask & RX_DMA_INTR) {
1932 gen_int_mask |= RXDMA_INT_M;
1933 do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
Joe Perchesd44570e2009-08-24 17:29:44 +00001934 RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
1935 flag, &bar0->rxdma_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001936 do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001937 RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
1938 RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
1939 RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001940 do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
Joe Perchesd44570e2009-08-24 17:29:44 +00001941 PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
1942 PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
1943 &bar0->prc_pcix_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001944 do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001945 RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
1946 &bar0->rpa_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001947 do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
Joe Perchesd44570e2009-08-24 17:29:44 +00001948 RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
1949 RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
1950 RDA_FRM_ECC_SG_ERR |
1951 RDA_MISC_ERR|RDA_PCIX_ERR,
1952 flag, &bar0->rda_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001953 do_s2io_write_bits(RTI_SM_ERR_ALARM |
Joe Perchesd44570e2009-08-24 17:29:44 +00001954 RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
1955 flag, &bar0->rti_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001956 }
1957
1958 if (mask & RX_MAC_INTR) {
1959 gen_int_mask |= RXMAC_INT_M;
1960 do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001961 &bar0->mac_int_mask);
1962 interruptible = (RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
1963 RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
1964 RMAC_DOUBLE_ECC_ERR);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001965 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER)
1966 interruptible |= RMAC_LINK_STATE_CHANGE_INT;
1967 do_s2io_write_bits(interruptible,
Joe Perchesd44570e2009-08-24 17:29:44 +00001968 flag, &bar0->mac_rmac_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001969 }
1970
Joe Perchesd44570e2009-08-24 17:29:44 +00001971 if (mask & RX_XGXS_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001972 gen_int_mask |= RXXGXS_INT_M;
1973 do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001974 &bar0->xgxs_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001975 do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00001976 &bar0->xgxs_rxgxs_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001977 }
1978
1979 if (mask & MC_INTR) {
1980 gen_int_mask |= MC_INT_M;
Joe Perchesd44570e2009-08-24 17:29:44 +00001981 do_s2io_write_bits(MC_INT_MASK_MC_INT,
1982 flag, &bar0->mc_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001983 do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
Joe Perchesd44570e2009-08-24 17:29:44 +00001984 MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
1985 &bar0->mc_err_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001986 }
1987 nic->general_int_mask = gen_int_mask;
1988
1989 /* Remove this line when alarm interrupts are enabled */
1990 nic->general_int_mask = 0;
1991}
Joe Perchesd44570e2009-08-24 17:29:44 +00001992
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001993/**
1994 * en_dis_able_nic_intrs - Enable or Disable the interrupts
Linus Torvalds1da177e2005-04-16 15:20:36 -07001995 * @nic: device private variable,
1996 * @mask: A mask indicating which Intr block must be modified and,
1997 * @flag: A flag indicating whether to enable or disable the Intrs.
1998 * Description: This function will either disable or enable the interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001999 * depending on the flag argument. The mask argument can be used to
2000 * enable/disable any Intr block.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002001 * Return Value: NONE.
2002 */
2003
2004static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
2005{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002006 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002007 register u64 temp64 = 0, intr_mask = 0;
2008
2009 intr_mask = nic->general_int_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002010
2011 /* Top level interrupt classification */
2012 /* PIC Interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002013 if (mask & TX_PIC_INTR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002014 /* Enable PIC Intrs in the general intr mask register */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002015 intr_mask |= TXPIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002016 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002017 /*
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002018 * If Hercules adapter enable GPIO otherwise
Ananda Rajub41477f2006-07-24 19:52:49 -04002019 * disable all PCIX, Flash, MDIO, IIC and GPIO
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002020 * interrupts for now.
2021 * TODO
Linus Torvalds1da177e2005-04-16 15:20:36 -07002022 */
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002023 if (s2io_link_fault_indication(nic) ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002024 LINK_UP_DOWN_INTERRUPT) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002025 do_s2io_write_bits(PIC_INT_GPIO, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002026 &bar0->pic_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002027 do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
Joe Perchesd44570e2009-08-24 17:29:44 +00002028 &bar0->gpio_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002029 } else
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002030 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002031 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002032 /*
2033 * Disable PIC Intrs in the general
2034 * intr mask register
Linus Torvalds1da177e2005-04-16 15:20:36 -07002035 */
2036 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002037 }
2038 }
2039
Linus Torvalds1da177e2005-04-16 15:20:36 -07002040 /* Tx traffic interrupts */
2041 if (mask & TX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002042 intr_mask |= TXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002043 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002044 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002045 * Enable all the Tx side interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002046 * writing 0 Enables all 64 TX interrupt levels
Linus Torvalds1da177e2005-04-16 15:20:36 -07002047 */
2048 writeq(0x0, &bar0->tx_traffic_mask);
2049 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002050 /*
2051 * Disable Tx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002052 * register.
2053 */
2054 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002055 }
2056 }
2057
2058 /* Rx traffic interrupts */
2059 if (mask & RX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002060 intr_mask |= RXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002061 if (flag == ENABLE_INTRS) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002062 /* writing 0 Enables all 8 RX interrupt levels */
2063 writeq(0x0, &bar0->rx_traffic_mask);
2064 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002065 /*
2066 * Disable Rx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002067 * register.
2068 */
2069 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002070 }
2071 }
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002072
2073 temp64 = readq(&bar0->general_int_mask);
2074 if (flag == ENABLE_INTRS)
Joe Perchesd44570e2009-08-24 17:29:44 +00002075 temp64 &= ~((u64)intr_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002076 else
2077 temp64 = DISABLE_ALL_INTRS;
2078 writeq(temp64, &bar0->general_int_mask);
2079
2080 nic->general_int_mask = readq(&bar0->general_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002081}
2082
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002083/**
2084 * verify_pcc_quiescent- Checks for PCC quiescent state
2085 * Return: 1 If PCC is quiescence
2086 * 0 If PCC is not quiescence
2087 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002088static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002089{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002090 int ret = 0, herc;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002091 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002092 u64 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002093
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002094 herc = (sp->device_type == XFRAME_II_DEVICE);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002095
Tobias Klauserf957bcf2009-06-04 23:07:59 +00002096 if (flag == false) {
Auke Kok44c10132007-06-08 15:46:36 -07002097 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002098 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002099 ret = 1;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002100 } else {
2101 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002102 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002103 }
2104 } else {
Auke Kok44c10132007-06-08 15:46:36 -07002105 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002106 if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002107 ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002108 ret = 1;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002109 } else {
2110 if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002111 ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002112 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002113 }
2114 }
2115
2116 return ret;
2117}
2118/**
2119 * verify_xena_quiescence - Checks whether the H/W is ready
Linus Torvalds1da177e2005-04-16 15:20:36 -07002120 * Description: Returns whether the H/W is ready to go or not. Depending
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002121 * on whether adapter enable bit was written or not the comparison
Linus Torvalds1da177e2005-04-16 15:20:36 -07002122 * differs and the calling function passes the input argument flag to
2123 * indicate this.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002124 * Return: 1 If xena is quiescence
Linus Torvalds1da177e2005-04-16 15:20:36 -07002125 * 0 If Xena is not quiescence
2126 */
2127
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002128static int verify_xena_quiescence(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002129{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002130 int mode;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002131 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002132 u64 val64 = readq(&bar0->adapter_status);
2133 mode = s2io_verify_pci_mode(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002134
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002135 if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002136 DBG_PRINT(ERR_DBG, "TDMA is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002137 return 0;
2138 }
2139 if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002140 DBG_PRINT(ERR_DBG, "RDMA is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002141 return 0;
2142 }
2143 if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002144 DBG_PRINT(ERR_DBG, "PFC is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002145 return 0;
2146 }
2147 if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002148 DBG_PRINT(ERR_DBG, "TMAC BUF is not empty!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002149 return 0;
2150 }
2151 if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002152 DBG_PRINT(ERR_DBG, "PIC is not QUIESCENT!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002153 return 0;
2154 }
2155 if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002156 DBG_PRINT(ERR_DBG, "MC_DRAM is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002157 return 0;
2158 }
2159 if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002160 DBG_PRINT(ERR_DBG, "MC_QUEUES is not ready!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002161 return 0;
2162 }
2163 if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002164 DBG_PRINT(ERR_DBG, "M_PLL is not locked!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002165 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002166 }
2167
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002168 /*
2169 * In PCI 33 mode, the P_PLL is not used, and therefore,
2170 * the the P_PLL_LOCK bit in the adapter_status register will
2171 * not be asserted.
2172 */
2173 if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002174 sp->device_type == XFRAME_II_DEVICE &&
2175 mode != PCI_MODE_PCI_33) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002176 DBG_PRINT(ERR_DBG, "P_PLL is not locked!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002177 return 0;
2178 }
2179 if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002180 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002181 DBG_PRINT(ERR_DBG, "RC_PRC is not QUIESCENT!\n");
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002182 return 0;
2183 }
2184 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002185}
2186
2187/**
2188 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
2189 * @sp: Pointer to device specifc structure
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002190 * Description :
Linus Torvalds1da177e2005-04-16 15:20:36 -07002191 * New procedure to clear mac address reading problems on Alpha platforms
2192 *
2193 */
2194
Joe Perchesd44570e2009-08-24 17:29:44 +00002195static void fix_mac_address(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002196{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002197 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002198 int i = 0;
2199
2200 while (fix_mac[i] != END_SIGN) {
2201 writeq(fix_mac[i++], &bar0->gpio_control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002202 udelay(10);
David S. Millerd83d2822011-04-11 16:00:00 -07002203 (void) readq(&bar0->gpio_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002204 }
2205}
2206
2207/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002208 * start_nic - Turns the device on
Linus Torvalds1da177e2005-04-16 15:20:36 -07002209 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002210 * Description:
2211 * This function actually turns the device on. Before this function is
2212 * called,all Registers are configured from their reset states
2213 * and shared memory is allocated but the NIC is still quiescent. On
Linus Torvalds1da177e2005-04-16 15:20:36 -07002214 * calling this function, the device interrupts are cleared and the NIC is
2215 * literally switched on by writing into the adapter control register.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002216 * Return Value:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002217 * SUCCESS on success and -1 on failure.
2218 */
2219
2220static int start_nic(struct s2io_nic *nic)
2221{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002222 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002223 struct net_device *dev = nic->dev;
2224 register u64 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002225 u16 subid, i;
Joe Perchesffb5df62009-08-24 17:29:47 +00002226 struct config_param *config = &nic->config;
2227 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002228
2229 /* PRC Initialization and configuration */
2230 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002231 struct ring_info *ring = &mac_control->rings[i];
2232
Joe Perchesd44570e2009-08-24 17:29:44 +00002233 writeq((u64)ring->rx_blocks[0].block_dma_addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002234 &bar0->prc_rxd0_n[i]);
2235
2236 val64 = readq(&bar0->prc_ctrl_n[i]);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002237 if (nic->rxd_mode == RXD_MODE_1)
2238 val64 |= PRC_CTRL_RC_ENABLED;
2239 else
2240 val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
Ananda Raju863c11a2006-04-21 19:03:13 -04002241 if (nic->device_type == XFRAME_II_DEVICE)
2242 val64 |= PRC_CTRL_GROUP_READS;
2243 val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
2244 val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002245 writeq(val64, &bar0->prc_ctrl_n[i]);
2246 }
2247
Ananda Rajuda6971d2005-10-31 16:55:31 -05002248 if (nic->rxd_mode == RXD_MODE_3B) {
2249 /* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
2250 val64 = readq(&bar0->rx_pa_cfg);
2251 val64 |= RX_PA_CFG_IGNORE_L2_ERR;
2252 writeq(val64, &bar0->rx_pa_cfg);
2253 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002254
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002255 if (vlan_tag_strip == 0) {
2256 val64 = readq(&bar0->rx_pa_cfg);
2257 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
2258 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03002259 nic->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002260 }
2261
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002262 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002263 * Enabling MC-RLDRAM. After enabling the device, we timeout
2264 * for around 100ms, which is approximately the time required
2265 * for the device to be ready for operation.
2266 */
2267 val64 = readq(&bar0->mc_rldram_mrs);
2268 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
2269 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
2270 val64 = readq(&bar0->mc_rldram_mrs);
2271
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002272 msleep(100); /* Delay by around 100 ms. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002273
2274 /* Enabling ECC Protection. */
2275 val64 = readq(&bar0->adapter_control);
2276 val64 &= ~ADAPTER_ECC_EN;
2277 writeq(val64, &bar0->adapter_control);
2278
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002279 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002280 * Verify if the device is ready to be enabled, if so enable
Linus Torvalds1da177e2005-04-16 15:20:36 -07002281 * it.
2282 */
2283 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002284 if (!verify_xena_quiescence(nic)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002285 DBG_PRINT(ERR_DBG, "%s: device is not ready, "
2286 "Adapter status reads: 0x%llx\n",
2287 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002288 return FAILURE;
2289 }
2290
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002291 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002292 * With some switches, link might be already up at this point.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002293 * Because of this weird behavior, when we enable laser,
2294 * we may not get link. We need to handle this. We cannot
2295 * figure out which switch is misbehaving. So we are forced to
2296 * make a global change.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002297 */
2298
2299 /* Enabling Laser. */
2300 val64 = readq(&bar0->adapter_control);
2301 val64 |= ADAPTER_EOI_TX_ON;
2302 writeq(val64, &bar0->adapter_control);
2303
Ananda Rajuc92ca042006-04-21 19:18:03 -04002304 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
2305 /*
Lucas De Marchi25985ed2011-03-30 22:57:33 -03002306 * Dont see link state interrupts initially on some switches,
Ananda Rajuc92ca042006-04-21 19:18:03 -04002307 * so directly scheduling the link state task here.
2308 */
2309 schedule_work(&nic->set_link_task);
2310 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002311 /* SXE-002: Initialize link and activity LED */
2312 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07002313 if (((subid & 0xFF) >= 0x07) &&
2314 (nic->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002315 val64 = readq(&bar0->gpio_control);
2316 val64 |= 0x0000800000000000ULL;
2317 writeq(val64, &bar0->gpio_control);
2318 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01002319 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002320 }
2321
Linus Torvalds1da177e2005-04-16 15:20:36 -07002322 return SUCCESS;
2323}
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002324/**
2325 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2326 */
Joe Perchesd44570e2009-08-24 17:29:44 +00002327static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data,
2328 struct TxD *txdlp, int get_off)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002329{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002330 struct s2io_nic *nic = fifo_data->nic;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002331 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002332 struct TxD *txds;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002333 u16 j, frg_cnt;
2334
2335 txds = txdlp;
Surjit Reang2fda0962008-01-24 02:08:59 -08002336 if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002337 pci_unmap_single(nic->pdev, (dma_addr_t)txds->Buffer_Pointer,
2338 sizeof(u64), PCI_DMA_TODEVICE);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002339 txds++;
2340 }
2341
Joe Perchesd44570e2009-08-24 17:29:44 +00002342 skb = (struct sk_buff *)((unsigned long)txds->Host_Control);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002343 if (!skb) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002344 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002345 return NULL;
2346 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002347 pci_unmap_single(nic->pdev, (dma_addr_t)txds->Buffer_Pointer,
Eric Dumazete743d312010-04-14 15:59:40 -07002348 skb_headlen(skb), PCI_DMA_TODEVICE);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002349 frg_cnt = skb_shinfo(skb)->nr_frags;
2350 if (frg_cnt) {
2351 txds++;
2352 for (j = 0; j < frg_cnt; j++, txds++) {
2353 skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
2354 if (!txds->Buffer_Pointer)
2355 break;
Joe Perchesd44570e2009-08-24 17:29:44 +00002356 pci_unmap_page(nic->pdev,
2357 (dma_addr_t)txds->Buffer_Pointer,
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002358 frag->size, PCI_DMA_TODEVICE);
2359 }
2360 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002361 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
2362 return skb;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002363}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002364
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002365/**
2366 * free_tx_buffers - Free all queued Tx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002367 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002368 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002369 * Free all queued Tx buffers.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002370 * Return Value: void
Joe Perchesd44570e2009-08-24 17:29:44 +00002371 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002372
2373static void free_tx_buffers(struct s2io_nic *nic)
2374{
2375 struct net_device *dev = nic->dev;
2376 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002377 struct TxD *txdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002378 int i, j;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002379 int cnt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00002380 struct config_param *config = &nic->config;
2381 struct mac_info *mac_control = &nic->mac_control;
2382 struct stat_block *stats = mac_control->stats_info;
2383 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002384
2385 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002386 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
2387 struct fifo_info *fifo = &mac_control->fifos[i];
Surjit Reang2fda0962008-01-24 02:08:59 -08002388 unsigned long flags;
Joe Perches13d866a2009-08-24 17:29:41 +00002389
2390 spin_lock_irqsave(&fifo->tx_lock, flags);
2391 for (j = 0; j < tx_cfg->fifo_len; j++) {
Joe Perches43d620c2011-06-16 19:08:06 +00002392 txdp = fifo->list_info[j].list_virt_addr;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002393 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
2394 if (skb) {
Joe Perchesffb5df62009-08-24 17:29:47 +00002395 swstats->mem_freed += skb->truesize;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002396 dev_kfree_skb(skb);
2397 cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002398 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002399 }
2400 DBG_PRINT(INTR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00002401 "%s: forcibly freeing %d skbs on FIFO%d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002402 dev->name, cnt, i);
Joe Perches13d866a2009-08-24 17:29:41 +00002403 fifo->tx_curr_get_info.offset = 0;
2404 fifo->tx_curr_put_info.offset = 0;
2405 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002406 }
2407}
2408
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002409/**
2410 * stop_nic - To stop the nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07002411 * @nic ; device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002412 * Description:
2413 * This function does exactly the opposite of what the start_nic()
Linus Torvalds1da177e2005-04-16 15:20:36 -07002414 * function does. This function is called to stop the device.
2415 * Return Value:
2416 * void.
2417 */
2418
2419static void stop_nic(struct s2io_nic *nic)
2420{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002421 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002422 register u64 val64 = 0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04002423 u16 interruptible;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002424
2425 /* Disable all interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002426 en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07002427 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002428 interruptible |= TX_PIC_INTR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002429 en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);
2430
Ananda Raju5d3213c2006-04-21 19:23:26 -04002431 /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
2432 val64 = readq(&bar0->adapter_control);
2433 val64 &= ~(ADAPTER_CNTL_EN);
2434 writeq(val64, &bar0->adapter_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002435}
2436
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002437/**
2438 * fill_rx_buffers - Allocates the Rx side skbs
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002439 * @ring_info: per ring structure
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002440 * @from_card_up: If this is true, we will map the buffer to get
2441 * the dma address for buf0 and buf1 to give it to the card.
2442 * Else we will sync the already mapped buffer to give it to the card.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002443 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002444 * The function allocates Rx side skbs and puts the physical
2445 * address of these buffers into the RxD buffer pointers, so that the NIC
2446 * can DMA the received frame into these locations.
2447 * The NIC supports 3 receive modes, viz
2448 * 1. single buffer,
2449 * 2. three buffer and
2450 * 3. Five buffer modes.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002451 * Each mode defines how many fragments the received frame will be split
2452 * up into by the NIC. The frame is split into L3 header, L4 Header,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002453 * L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
2454 * is split into 3 fragments. As of now only single buffer mode is
2455 * supported.
2456 * Return Value:
2457 * SUCCESS on success or an appropriate -ve value on failure.
2458 */
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002459static int fill_rx_buffers(struct s2io_nic *nic, struct ring_info *ring,
Joe Perchesd44570e2009-08-24 17:29:44 +00002460 int from_card_up)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002461{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002462 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002463 struct RxD_t *rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002464 int off, size, block_no, block_no1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002465 u32 alloc_tab = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002466 u32 alloc_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002467 u64 tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002468 struct buffAdd *ba;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002469 struct RxD_t *first_rxdp = NULL;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002470 u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002471 int rxd_index = 0;
Veena Parat6d517a22007-07-23 02:20:51 -04002472 struct RxD1 *rxdp1;
2473 struct RxD3 *rxdp3;
Joe Perchesffb5df62009-08-24 17:29:47 +00002474 struct swStat *swstats = &ring->nic->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002475
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002476 alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002477
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002478 block_no1 = ring->rx_curr_get_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002479 while (alloc_tab < alloc_cnt) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002480 block_no = ring->rx_curr_put_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002481
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002482 off = ring->rx_curr_put_info.offset;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002483
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002484 rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr;
2485
2486 rxd_index = off + 1;
2487 if (block_no)
2488 rxd_index += (block_no * ring->rxd_count);
2489
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002490 if ((block_no == block_no1) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002491 (off == ring->rx_curr_get_info.offset) &&
2492 (rxdp->Host_Control)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002493 DBG_PRINT(INTR_DBG, "%s: Get and Put info equated\n",
2494 ring->dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002495 goto end;
2496 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002497 if (off && (off == ring->rxd_count)) {
2498 ring->rx_curr_put_info.block_index++;
2499 if (ring->rx_curr_put_info.block_index ==
Joe Perchesd44570e2009-08-24 17:29:44 +00002500 ring->block_count)
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002501 ring->rx_curr_put_info.block_index = 0;
2502 block_no = ring->rx_curr_put_info.block_index;
2503 off = 0;
2504 ring->rx_curr_put_info.offset = off;
2505 rxdp = ring->rx_blocks[block_no].block_virt_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002506 DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002507 ring->dev->name, rxdp);
2508
Linus Torvalds1da177e2005-04-16 15:20:36 -07002509 }
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002510
Ananda Rajuda6971d2005-10-31 16:55:31 -05002511 if ((rxdp->Control_1 & RXD_OWN_XENA) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00002512 ((ring->rxd_mode == RXD_MODE_3B) &&
2513 (rxdp->Control_2 & s2BIT(0)))) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002514 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002515 goto end;
2516 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002517 /* calculate size of skb based on ring mode */
Joe Perchesd44570e2009-08-24 17:29:44 +00002518 size = ring->mtu +
2519 HEADER_ETHERNET_II_802_3_SIZE +
2520 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002521 if (ring->rxd_mode == RXD_MODE_1)
Ananda Rajuda6971d2005-10-31 16:55:31 -05002522 size += NET_IP_ALIGN;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002523 else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002524 size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002525
Ananda Rajuda6971d2005-10-31 16:55:31 -05002526 /* allocate skb */
2527 skb = dev_alloc_skb(size);
Joe Perchesd44570e2009-08-24 17:29:44 +00002528 if (!skb) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002529 DBG_PRINT(INFO_DBG, "%s: Could not allocate skb\n",
2530 ring->dev->name);
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002531 if (first_rxdp) {
2532 wmb();
2533 first_rxdp->Control_1 |= RXD_OWN_XENA;
2534 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002535 swstats->mem_alloc_fail_cnt++;
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002536
Ananda Rajuda6971d2005-10-31 16:55:31 -05002537 return -ENOMEM ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002538 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002539 swstats->mem_allocated += skb->truesize;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002540
2541 if (ring->rxd_mode == RXD_MODE_1) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002542 /* 1 buffer mode - normal operation mode */
Joe Perchesd44570e2009-08-24 17:29:44 +00002543 rxdp1 = (struct RxD1 *)rxdp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002544 memset(rxdp, 0, sizeof(struct RxD1));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002545 skb_reserve(skb, NET_IP_ALIGN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002546 rxdp1->Buffer0_ptr =
2547 pci_map_single(ring->pdev, skb->data,
2548 size - NET_IP_ALIGN,
2549 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002550 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002551 rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002552 goto pci_map_failed;
2553
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002554 rxdp->Control_2 =
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002555 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002556 rxdp->Host_Control = (unsigned long)skb;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002557 } else if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002558 /*
Veena Parat6d517a22007-07-23 02:20:51 -04002559 * 2 buffer mode -
2560 * 2 buffer mode provides 128
Ananda Rajuda6971d2005-10-31 16:55:31 -05002561 * byte aligned receive buffers.
Ananda Rajuda6971d2005-10-31 16:55:31 -05002562 */
2563
Joe Perchesd44570e2009-08-24 17:29:44 +00002564 rxdp3 = (struct RxD3 *)rxdp;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002565 /* save buffer pointers to avoid frequent dma mapping */
Veena Parat6d517a22007-07-23 02:20:51 -04002566 Buffer0_ptr = rxdp3->Buffer0_ptr;
2567 Buffer1_ptr = rxdp3->Buffer1_ptr;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002568 memset(rxdp, 0, sizeof(struct RxD3));
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002569 /* restore the buffer pointers for dma sync*/
Veena Parat6d517a22007-07-23 02:20:51 -04002570 rxdp3->Buffer0_ptr = Buffer0_ptr;
2571 rxdp3->Buffer1_ptr = Buffer1_ptr;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002572
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002573 ba = &ring->ba[block_no][off];
Ananda Rajuda6971d2005-10-31 16:55:31 -05002574 skb_reserve(skb, BUF0_LEN);
Joe Perchesd44570e2009-08-24 17:29:44 +00002575 tmp = (u64)(unsigned long)skb->data;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002576 tmp += ALIGN_SIZE;
2577 tmp &= ~ALIGN_SIZE;
2578 skb->data = (void *) (unsigned long)tmp;
Arnaldo Carvalho de Melo27a884d2007-04-19 20:29:13 -07002579 skb_reset_tail_pointer(skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002580
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002581 if (from_card_up) {
Veena Parat6d517a22007-07-23 02:20:51 -04002582 rxdp3->Buffer0_ptr =
Joe Perchesd44570e2009-08-24 17:29:44 +00002583 pci_map_single(ring->pdev, ba->ba_0,
2584 BUF0_LEN,
2585 PCI_DMA_FROMDEVICE);
2586 if (pci_dma_mapping_error(nic->pdev,
2587 rxdp3->Buffer0_ptr))
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002588 goto pci_map_failed;
2589 } else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002590 pci_dma_sync_single_for_device(ring->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002591 (dma_addr_t)rxdp3->Buffer0_ptr,
2592 BUF0_LEN,
2593 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04002594
Ananda Rajuda6971d2005-10-31 16:55:31 -05002595 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002596 if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002597 /* Two buffer mode */
2598
2599 /*
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002600 * Buffer2 will have L3/L4 header plus
Ananda Rajuda6971d2005-10-31 16:55:31 -05002601 * L4 payload
2602 */
Joe Perchesd44570e2009-08-24 17:29:44 +00002603 rxdp3->Buffer2_ptr = pci_map_single(ring->pdev,
2604 skb->data,
2605 ring->mtu + 4,
2606 PCI_DMA_FROMDEVICE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002607
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002608 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002609 rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002610 goto pci_map_failed;
2611
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002612 if (from_card_up) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002613 rxdp3->Buffer1_ptr =
2614 pci_map_single(ring->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002615 ba->ba_1,
2616 BUF1_LEN,
2617 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002618
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002619 if (pci_dma_mapping_error(nic->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00002620 rxdp3->Buffer1_ptr)) {
2621 pci_unmap_single(ring->pdev,
2622 (dma_addr_t)(unsigned long)
2623 skb->data,
2624 ring->mtu + 4,
2625 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002626 goto pci_map_failed;
2627 }
Ananda Raju75c30b12006-07-24 19:55:09 -04002628 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002629 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
2630 rxdp->Control_2 |= SET_BUFFER2_SIZE_3
Joe Perchesd44570e2009-08-24 17:29:44 +00002631 (ring->mtu + 4);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002632 }
Jiri Slabyb7b5a122007-10-18 23:40:29 -07002633 rxdp->Control_2 |= s2BIT(0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002634 rxdp->Host_Control = (unsigned long) (skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002635 }
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002636 if (alloc_tab & ((1 << rxsync_frequency) - 1))
2637 rxdp->Control_1 |= RXD_OWN_XENA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002638 off++;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002639 if (off == (ring->rxd_count + 1))
Ananda Rajuda6971d2005-10-31 16:55:31 -05002640 off = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002641 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002642
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002643 rxdp->Control_2 |= SET_RXD_MARKER;
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002644 if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
2645 if (first_rxdp) {
2646 wmb();
2647 first_rxdp->Control_1 |= RXD_OWN_XENA;
2648 }
2649 first_rxdp = rxdp;
2650 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002651 ring->rx_bufs_left += 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002652 alloc_tab++;
2653 }
2654
Joe Perchesd44570e2009-08-24 17:29:44 +00002655end:
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002656 /* Transfer ownership of first descriptor to adapter just before
2657 * exiting. Before that, use memory barrier so that ownership
2658 * and other fields are seen by adapter correctly.
2659 */
2660 if (first_rxdp) {
2661 wmb();
2662 first_rxdp->Control_1 |= RXD_OWN_XENA;
2663 }
2664
Linus Torvalds1da177e2005-04-16 15:20:36 -07002665 return SUCCESS;
Joe Perchesd44570e2009-08-24 17:29:44 +00002666
Veena Parat491abf22007-07-23 02:37:14 -04002667pci_map_failed:
Joe Perchesffb5df62009-08-24 17:29:47 +00002668 swstats->pci_map_fail_cnt++;
2669 swstats->mem_freed += skb->truesize;
Veena Parat491abf22007-07-23 02:37:14 -04002670 dev_kfree_skb_irq(skb);
2671 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002672}
2673
Ananda Rajuda6971d2005-10-31 16:55:31 -05002674static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
2675{
2676 struct net_device *dev = sp->dev;
2677 int j;
2678 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002679 struct RxD_t *rxdp;
Veena Parat6d517a22007-07-23 02:20:51 -04002680 struct RxD1 *rxdp1;
2681 struct RxD3 *rxdp3;
Joe Perchesffb5df62009-08-24 17:29:47 +00002682 struct mac_info *mac_control = &sp->mac_control;
2683 struct stat_block *stats = mac_control->stats_info;
2684 struct swStat *swstats = &stats->sw_stat;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002685
Ananda Rajuda6971d2005-10-31 16:55:31 -05002686 for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
2687 rxdp = mac_control->rings[ring_no].
Joe Perchesd44570e2009-08-24 17:29:44 +00002688 rx_blocks[blk].rxds[j].virt_addr;
2689 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control);
2690 if (!skb)
Ananda Rajuda6971d2005-10-31 16:55:31 -05002691 continue;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002692 if (sp->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002693 rxdp1 = (struct RxD1 *)rxdp;
2694 pci_unmap_single(sp->pdev,
2695 (dma_addr_t)rxdp1->Buffer0_ptr,
2696 dev->mtu +
2697 HEADER_ETHERNET_II_802_3_SIZE +
2698 HEADER_802_2_SIZE + HEADER_SNAP_SIZE,
2699 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002700 memset(rxdp, 0, sizeof(struct RxD1));
Joe Perchesd44570e2009-08-24 17:29:44 +00002701 } else if (sp->rxd_mode == RXD_MODE_3B) {
2702 rxdp3 = (struct RxD3 *)rxdp;
Joe Perchesd44570e2009-08-24 17:29:44 +00002703 pci_unmap_single(sp->pdev,
2704 (dma_addr_t)rxdp3->Buffer0_ptr,
2705 BUF0_LEN,
2706 PCI_DMA_FROMDEVICE);
2707 pci_unmap_single(sp->pdev,
2708 (dma_addr_t)rxdp3->Buffer1_ptr,
2709 BUF1_LEN,
2710 PCI_DMA_FROMDEVICE);
2711 pci_unmap_single(sp->pdev,
2712 (dma_addr_t)rxdp3->Buffer2_ptr,
2713 dev->mtu + 4,
2714 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002715 memset(rxdp, 0, sizeof(struct RxD3));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002716 }
Joe Perchesffb5df62009-08-24 17:29:47 +00002717 swstats->mem_freed += skb->truesize;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002718 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002719 mac_control->rings[ring_no].rx_bufs_left -= 1;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002720 }
2721}
2722
Linus Torvalds1da177e2005-04-16 15:20:36 -07002723/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002724 * free_rx_buffers - Frees all Rx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002725 * @sp: device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002726 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002727 * This function will free all Rx buffers allocated by host.
2728 * Return Value:
2729 * NONE.
2730 */
2731
2732static void free_rx_buffers(struct s2io_nic *sp)
2733{
2734 struct net_device *dev = sp->dev;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002735 int i, blk = 0, buf_cnt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00002736 struct config_param *config = &sp->config;
2737 struct mac_info *mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002738
2739 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002740 struct ring_info *ring = &mac_control->rings[i];
2741
Ananda Rajuda6971d2005-10-31 16:55:31 -05002742 for (blk = 0; blk < rx_ring_sz[i]; blk++)
Joe Perchesd44570e2009-08-24 17:29:44 +00002743 free_rxd_blk(sp, i, blk);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002744
Joe Perches13d866a2009-08-24 17:29:41 +00002745 ring->rx_curr_put_info.block_index = 0;
2746 ring->rx_curr_get_info.block_index = 0;
2747 ring->rx_curr_put_info.offset = 0;
2748 ring->rx_curr_get_info.offset = 0;
2749 ring->rx_bufs_left = 0;
Joe Perches9e39f7c2009-08-25 08:52:00 +00002750 DBG_PRINT(INIT_DBG, "%s: Freed 0x%x Rx Buffers on ring%d\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07002751 dev->name, buf_cnt, i);
2752 }
2753}
2754
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002755static int s2io_chk_rx_buffers(struct s2io_nic *nic, struct ring_info *ring)
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002756{
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002757 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002758 DBG_PRINT(INFO_DBG, "%s: Out of memory in Rx Intr!!\n",
2759 ring->dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002760 }
2761 return 0;
2762}
2763
Linus Torvalds1da177e2005-04-16 15:20:36 -07002764/**
2765 * s2io_poll - Rx interrupt handler for NAPI support
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002766 * @napi : pointer to the napi structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002767 * @budget : The number of packets that were budgeted to be processed
Linus Torvalds1da177e2005-04-16 15:20:36 -07002768 * during one pass through the 'Poll" function.
2769 * Description:
2770 * Comes into picture only if NAPI support has been incorporated. It does
2771 * the same thing that rx_intr_handler does, but not in a interrupt context
2772 * also It will process only a given number of packets.
2773 * Return value:
2774 * 0 on success and 1 if there are No Rx packets to be processed.
2775 */
2776
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002777static int s2io_poll_msix(struct napi_struct *napi, int budget)
2778{
2779 struct ring_info *ring = container_of(napi, struct ring_info, napi);
2780 struct net_device *dev = ring->dev;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002781 int pkts_processed = 0;
Al Viro1a79d1c2008-06-02 10:59:02 +01002782 u8 __iomem *addr = NULL;
2783 u8 val8 = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08002784 struct s2io_nic *nic = netdev_priv(dev);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002785 struct XENA_dev_config __iomem *bar0 = nic->bar0;
2786 int budget_org = budget;
2787
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002788 if (unlikely(!is_s2io_card_up(nic)))
2789 return 0;
2790
2791 pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002792 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002793
2794 if (pkts_processed < budget_org) {
Ben Hutchings288379f2009-01-19 16:43:59 -08002795 napi_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002796 /*Re Enable MSI-Rx Vector*/
Al Viro1a79d1c2008-06-02 10:59:02 +01002797 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002798 addr += 7 - ring->ring_no;
2799 val8 = (ring->ring_no == 0) ? 0x3f : 0xbf;
2800 writeb(val8, addr);
2801 val8 = readb(addr);
2802 }
2803 return pkts_processed;
2804}
Joe Perchesd44570e2009-08-24 17:29:44 +00002805
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002806static int s2io_poll_inta(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002807{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002808 struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002809 int pkts_processed = 0;
2810 int ring_pkts_processed, i;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002811 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002812 int budget_org = budget;
Joe Perchesffb5df62009-08-24 17:29:47 +00002813 struct config_param *config = &nic->config;
2814 struct mac_info *mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002815
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002816 if (unlikely(!is_s2io_card_up(nic)))
2817 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002818
2819 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002820 struct ring_info *ring = &mac_control->rings[i];
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002821 ring_pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002822 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002823 pkts_processed += ring_pkts_processed;
2824 budget -= ring_pkts_processed;
2825 if (budget <= 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002826 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002827 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002828 if (pkts_processed < budget_org) {
Ben Hutchings288379f2009-01-19 16:43:59 -08002829 napi_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002830 /* Re enable the Rx interrupts for the ring */
2831 writeq(0, &bar0->rx_traffic_mask);
2832 readl(&bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002833 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002834 return pkts_processed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002835}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002836
Ananda Rajub41477f2006-07-24 19:52:49 -04002837#ifdef CONFIG_NET_POLL_CONTROLLER
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002838/**
Ananda Rajub41477f2006-07-24 19:52:49 -04002839 * s2io_netpoll - netpoll event handler entry point
Brian Haley612eff02006-06-15 14:36:36 -04002840 * @dev : pointer to the device structure.
2841 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04002842 * This function will be called by upper layer to check for events on the
2843 * interface in situations where interrupts are disabled. It is used for
2844 * specific in-kernel networking tasks, such as remote consoles and kernel
2845 * debugging over the network (example netdump in RedHat).
Brian Haley612eff02006-06-15 14:36:36 -04002846 */
Brian Haley612eff02006-06-15 14:36:36 -04002847static void s2io_netpoll(struct net_device *dev)
2848{
Wang Chen4cf16532008-11-12 23:38:14 -08002849 struct s2io_nic *nic = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002850 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ananda Rajub41477f2006-07-24 19:52:49 -04002851 u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
Brian Haley612eff02006-06-15 14:36:36 -04002852 int i;
Joe Perchesffb5df62009-08-24 17:29:47 +00002853 struct config_param *config = &nic->config;
2854 struct mac_info *mac_control = &nic->mac_control;
Brian Haley612eff02006-06-15 14:36:36 -04002855
Linas Vepstasd796fdb2007-05-14 18:37:30 -05002856 if (pci_channel_offline(nic->pdev))
2857 return;
2858
Brian Haley612eff02006-06-15 14:36:36 -04002859 disable_irq(dev->irq);
2860
Brian Haley612eff02006-06-15 14:36:36 -04002861 writeq(val64, &bar0->rx_traffic_int);
Ananda Rajub41477f2006-07-24 19:52:49 -04002862 writeq(val64, &bar0->tx_traffic_int);
Brian Haley612eff02006-06-15 14:36:36 -04002863
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002864 /* we need to free up the transmitted skbufs or else netpoll will
Ananda Rajub41477f2006-07-24 19:52:49 -04002865 * run out of skbs and will fail and eventually netpoll application such
2866 * as netdump will fail.
2867 */
2868 for (i = 0; i < config->tx_fifo_num; i++)
2869 tx_intr_handler(&mac_control->fifos[i]);
2870
2871 /* check for received packet and indicate up to network */
Joe Perches13d866a2009-08-24 17:29:41 +00002872 for (i = 0; i < config->rx_ring_num; i++) {
2873 struct ring_info *ring = &mac_control->rings[i];
2874
2875 rx_intr_handler(ring, 0);
2876 }
Brian Haley612eff02006-06-15 14:36:36 -04002877
2878 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00002879 struct ring_info *ring = &mac_control->rings[i];
2880
2881 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002882 DBG_PRINT(INFO_DBG,
2883 "%s: Out of memory in Rx Netpoll!!\n",
2884 dev->name);
Brian Haley612eff02006-06-15 14:36:36 -04002885 break;
2886 }
2887 }
Brian Haley612eff02006-06-15 14:36:36 -04002888 enable_irq(dev->irq);
Brian Haley612eff02006-06-15 14:36:36 -04002889}
2890#endif
2891
2892/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002893 * rx_intr_handler - Rx interrupt handler
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002894 * @ring_info: per ring structure.
2895 * @budget: budget for napi processing.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002896 * Description:
2897 * If the interrupt is because of a received frame or if the
Linus Torvalds1da177e2005-04-16 15:20:36 -07002898 * receive ring contains fresh as yet un-processed frames,this function is
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002899 * called. It picks out the RxD at which place the last Rx processing had
2900 * stopped and sends the skb to the OSM's Rx handler and then increments
Linus Torvalds1da177e2005-04-16 15:20:36 -07002901 * the offset.
2902 * Return Value:
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002903 * No. of napi packets processed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002904 */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002905static int rx_intr_handler(struct ring_info *ring_data, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002906{
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002907 int get_block, put_block;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002908 struct rx_curr_get_info get_info, put_info;
2909 struct RxD_t *rxdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002910 struct sk_buff *skb;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002911 int pkt_cnt = 0, napi_pkts = 0;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002912 int i;
Joe Perchesd44570e2009-08-24 17:29:44 +00002913 struct RxD1 *rxdp1;
2914 struct RxD3 *rxdp3;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002915
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002916 get_info = ring_data->rx_curr_get_info;
2917 get_block = get_info.block_index;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002918 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002919 put_block = put_info.block_index;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002920 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002921
Ananda Rajuda6971d2005-10-31 16:55:31 -05002922 while (RXD_IS_UP2DT(rxdp)) {
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002923 /*
2924 * If your are next to put index then it's
2925 * FIFO full condition
2926 */
Ananda Rajuda6971d2005-10-31 16:55:31 -05002927 if ((get_block == put_block) &&
2928 (get_info.offset + 1) == put_info.offset) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002929 DBG_PRINT(INTR_DBG, "%s: Ring Full\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00002930 ring_data->dev->name);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002931 break;
2932 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002933 skb = (struct sk_buff *)((unsigned long)rxdp->Host_Control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002934 if (skb == NULL) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00002935 DBG_PRINT(ERR_DBG, "%s: NULL skb in Rx Intr\n",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002936 ring_data->dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002937 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002938 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002939 if (ring_data->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002940 rxdp1 = (struct RxD1 *)rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002941 pci_unmap_single(ring_data->pdev, (dma_addr_t)
Joe Perchesd44570e2009-08-24 17:29:44 +00002942 rxdp1->Buffer0_ptr,
2943 ring_data->mtu +
2944 HEADER_ETHERNET_II_802_3_SIZE +
2945 HEADER_802_2_SIZE +
2946 HEADER_SNAP_SIZE,
2947 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002948 } else if (ring_data->rxd_mode == RXD_MODE_3B) {
Joe Perchesd44570e2009-08-24 17:29:44 +00002949 rxdp3 = (struct RxD3 *)rxdp;
2950 pci_dma_sync_single_for_cpu(ring_data->pdev,
2951 (dma_addr_t)rxdp3->Buffer0_ptr,
2952 BUF0_LEN,
2953 PCI_DMA_FROMDEVICE);
2954 pci_unmap_single(ring_data->pdev,
2955 (dma_addr_t)rxdp3->Buffer2_ptr,
2956 ring_data->mtu + 4,
2957 PCI_DMA_FROMDEVICE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002958 }
Ananda Raju863c11a2006-04-21 19:03:13 -04002959 prefetch(skb->data);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002960 rx_osm_handler(ring_data, rxdp);
2961 get_info.offset++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002962 ring_data->rx_curr_get_info.offset = get_info.offset;
2963 rxdp = ring_data->rx_blocks[get_block].
Joe Perchesd44570e2009-08-24 17:29:44 +00002964 rxds[get_info.offset].virt_addr;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002965 if (get_info.offset == rxd_count[ring_data->rxd_mode]) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002966 get_info.offset = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002967 ring_data->rx_curr_get_info.offset = get_info.offset;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002968 get_block++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002969 if (get_block == ring_data->block_count)
2970 get_block = 0;
2971 ring_data->rx_curr_get_info.block_index = get_block;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002972 rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
2973 }
2974
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002975 if (ring_data->nic->config.napi) {
2976 budget--;
2977 napi_pkts++;
2978 if (!budget)
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002979 break;
2980 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002981 pkt_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002982 if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
2983 break;
2984 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002985 if (ring_data->lro) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002986 /* Clear all LRO sessions before exiting */
Joe Perchesd44570e2009-08-24 17:29:44 +00002987 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002988 struct lro *lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002989 if (lro->in_use) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002990 update_L3L4_header(ring_data->nic, lro);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05002991 queue_rx_frame(lro->parent, lro->vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002992 clear_lro_session(lro);
2993 }
2994 }
2995 }
Joe Perchesd44570e2009-08-24 17:29:44 +00002996 return napi_pkts;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002997}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002998
2999/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003000 * tx_intr_handler - Transmit interrupt handler
3001 * @nic : device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003002 * Description:
3003 * If an interrupt was raised to indicate DMA complete of the
3004 * Tx packet, this function is called. It identifies the last TxD
3005 * whose buffer was freed and frees all skbs whose data have already
Linus Torvalds1da177e2005-04-16 15:20:36 -07003006 * DMA'ed into the NICs internal memory.
3007 * Return Value:
3008 * NONE
3009 */
3010
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003011static void tx_intr_handler(struct fifo_info *fifo_data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003012{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003013 struct s2io_nic *nic = fifo_data->nic;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003014 struct tx_curr_get_info get_info, put_info;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003015 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003016 struct TxD *txdlp;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003017 int pkt_cnt = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08003018 unsigned long flags = 0;
Olaf Heringf9046eb2007-06-19 22:41:10 +02003019 u8 err_mask;
Joe Perchesffb5df62009-08-24 17:29:47 +00003020 struct stat_block *stats = nic->mac_control.stats_info;
3021 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003022
Surjit Reang2fda0962008-01-24 02:08:59 -08003023 if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
Joe Perchesd44570e2009-08-24 17:29:44 +00003024 return;
Surjit Reang2fda0962008-01-24 02:08:59 -08003025
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003026 get_info = fifo_data->tx_curr_get_info;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003027 memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
Joe Perches43d620c2011-06-16 19:08:06 +00003028 txdlp = fifo_data->list_info[get_info.offset].list_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003029 while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
3030 (get_info.offset != put_info.offset) &&
3031 (txdlp->Host_Control)) {
3032 /* Check for TxD errors */
3033 if (txdlp->Control_1 & TXD_T_CODE) {
3034 unsigned long long err;
3035 err = txdlp->Control_1 & TXD_T_CODE;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003036 if (err & 0x1) {
Joe Perchesffb5df62009-08-24 17:29:47 +00003037 swstats->parity_err_cnt++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003038 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003039
3040 /* update t_code statistics */
Olaf Heringf9046eb2007-06-19 22:41:10 +02003041 err_mask = err >> 48;
Joe Perchesd44570e2009-08-24 17:29:44 +00003042 switch (err_mask) {
3043 case 2:
Joe Perchesffb5df62009-08-24 17:29:47 +00003044 swstats->tx_buf_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003045 break;
3046
Joe Perchesd44570e2009-08-24 17:29:44 +00003047 case 3:
Joe Perchesffb5df62009-08-24 17:29:47 +00003048 swstats->tx_desc_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003049 break;
3050
Joe Perchesd44570e2009-08-24 17:29:44 +00003051 case 7:
Joe Perchesffb5df62009-08-24 17:29:47 +00003052 swstats->tx_parity_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003053 break;
3054
Joe Perchesd44570e2009-08-24 17:29:44 +00003055 case 10:
Joe Perchesffb5df62009-08-24 17:29:47 +00003056 swstats->tx_link_loss_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003057 break;
3058
Joe Perchesd44570e2009-08-24 17:29:44 +00003059 case 15:
Joe Perchesffb5df62009-08-24 17:29:47 +00003060 swstats->tx_list_proc_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003061 break;
Joe Perchesd44570e2009-08-24 17:29:44 +00003062 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003063 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003064
Ananda Rajufed5ecc2005-11-14 15:25:08 -05003065 skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003066 if (skb == NULL) {
Surjit Reang2fda0962008-01-24 02:08:59 -08003067 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
Joe Perches9e39f7c2009-08-25 08:52:00 +00003068 DBG_PRINT(ERR_DBG, "%s: NULL skb in Tx Free Intr\n",
3069 __func__);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003070 return;
3071 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003072 pkt_cnt++;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003073
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003074 /* Updating the statistics block */
Joe Perchesffb5df62009-08-24 17:29:47 +00003075 swstats->mem_freed += skb->truesize;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003076 dev_kfree_skb_irq(skb);
3077
3078 get_info.offset++;
Ananda Raju863c11a2006-04-21 19:03:13 -04003079 if (get_info.offset == get_info.fifo_len + 1)
3080 get_info.offset = 0;
Joe Perches43d620c2011-06-16 19:08:06 +00003081 txdlp = fifo_data->list_info[get_info.offset].list_virt_addr;
Joe Perchesd44570e2009-08-24 17:29:44 +00003082 fifo_data->tx_curr_get_info.offset = get_info.offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003083 }
3084
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003085 s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq);
Surjit Reang2fda0962008-01-24 02:08:59 -08003086
3087 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003088}
3089
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003090/**
Ananda Rajubd1034f2006-04-21 19:20:22 -04003091 * s2io_mdio_write - Function to write in to MDIO registers
3092 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3093 * @addr : address value
3094 * @value : data value
3095 * @dev : pointer to net_device structure
3096 * Description:
3097 * This function is used to write values to the MDIO registers
3098 * NONE
3099 */
Joe Perchesd44570e2009-08-24 17:29:44 +00003100static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value,
3101 struct net_device *dev)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003102{
Joe Perchesd44570e2009-08-24 17:29:44 +00003103 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08003104 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003105 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003106
Joe Perchesd44570e2009-08-24 17:29:44 +00003107 /* address transaction */
3108 val64 = MDIO_MMD_INDX_ADDR(addr) |
3109 MDIO_MMD_DEV_ADDR(mmd_type) |
3110 MDIO_MMS_PRT_ADDR(0x0);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003111 writeq(val64, &bar0->mdio_control);
3112 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3113 writeq(val64, &bar0->mdio_control);
3114 udelay(100);
3115
Joe Perchesd44570e2009-08-24 17:29:44 +00003116 /* Data transaction */
3117 val64 = MDIO_MMD_INDX_ADDR(addr) |
3118 MDIO_MMD_DEV_ADDR(mmd_type) |
3119 MDIO_MMS_PRT_ADDR(0x0) |
3120 MDIO_MDIO_DATA(value) |
3121 MDIO_OP(MDIO_OP_WRITE_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003122 writeq(val64, &bar0->mdio_control);
3123 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3124 writeq(val64, &bar0->mdio_control);
3125 udelay(100);
3126
Joe Perchesd44570e2009-08-24 17:29:44 +00003127 val64 = MDIO_MMD_INDX_ADDR(addr) |
3128 MDIO_MMD_DEV_ADDR(mmd_type) |
3129 MDIO_MMS_PRT_ADDR(0x0) |
3130 MDIO_OP(MDIO_OP_READ_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003131 writeq(val64, &bar0->mdio_control);
3132 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3133 writeq(val64, &bar0->mdio_control);
3134 udelay(100);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003135}
3136
3137/**
3138 * s2io_mdio_read - Function to write in to MDIO registers
3139 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3140 * @addr : address value
3141 * @dev : pointer to net_device structure
3142 * Description:
3143 * This function is used to read values to the MDIO registers
3144 * NONE
3145 */
3146static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
3147{
3148 u64 val64 = 0x0;
3149 u64 rval64 = 0x0;
Wang Chen4cf16532008-11-12 23:38:14 -08003150 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003151 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003152
3153 /* address transaction */
Joe Perchesd44570e2009-08-24 17:29:44 +00003154 val64 = val64 | (MDIO_MMD_INDX_ADDR(addr)
3155 | MDIO_MMD_DEV_ADDR(mmd_type)
3156 | MDIO_MMS_PRT_ADDR(0x0));
Ananda Rajubd1034f2006-04-21 19:20:22 -04003157 writeq(val64, &bar0->mdio_control);
3158 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3159 writeq(val64, &bar0->mdio_control);
3160 udelay(100);
3161
3162 /* Data transaction */
Joe Perchesd44570e2009-08-24 17:29:44 +00003163 val64 = MDIO_MMD_INDX_ADDR(addr) |
3164 MDIO_MMD_DEV_ADDR(mmd_type) |
3165 MDIO_MMS_PRT_ADDR(0x0) |
3166 MDIO_OP(MDIO_OP_READ_TRANS);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003167 writeq(val64, &bar0->mdio_control);
3168 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3169 writeq(val64, &bar0->mdio_control);
3170 udelay(100);
3171
3172 /* Read the value from regs */
3173 rval64 = readq(&bar0->mdio_control);
3174 rval64 = rval64 & 0xFFFF0000;
3175 rval64 = rval64 >> 16;
3176 return rval64;
3177}
Joe Perchesd44570e2009-08-24 17:29:44 +00003178
Ananda Rajubd1034f2006-04-21 19:20:22 -04003179/**
3180 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
Uwe Kleine-Königfbfecd32009-10-28 20:11:04 +01003181 * @counter : counter value to be updated
Ananda Rajubd1034f2006-04-21 19:20:22 -04003182 * @flag : flag to indicate the status
3183 * @type : counter type
3184 * Description:
3185 * This function is to check the status of the xpak counters value
3186 * NONE
3187 */
3188
Joe Perchesd44570e2009-08-24 17:29:44 +00003189static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index,
3190 u16 flag, u16 type)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003191{
3192 u64 mask = 0x3;
3193 u64 val64;
3194 int i;
Joe Perchesd44570e2009-08-24 17:29:44 +00003195 for (i = 0; i < index; i++)
Ananda Rajubd1034f2006-04-21 19:20:22 -04003196 mask = mask << 0x2;
3197
Joe Perchesd44570e2009-08-24 17:29:44 +00003198 if (flag > 0) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04003199 *counter = *counter + 1;
3200 val64 = *regs_stat & mask;
3201 val64 = val64 >> (index * 0x2);
3202 val64 = val64 + 1;
Joe Perchesd44570e2009-08-24 17:29:44 +00003203 if (val64 == 3) {
3204 switch (type) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04003205 case 1:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003206 DBG_PRINT(ERR_DBG,
3207 "Take Xframe NIC out of service.\n");
3208 DBG_PRINT(ERR_DBG,
3209"Excessive temperatures may result in premature transceiver failure.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003210 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003211 case 2:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003212 DBG_PRINT(ERR_DBG,
3213 "Take Xframe NIC out of service.\n");
3214 DBG_PRINT(ERR_DBG,
3215"Excessive bias currents may indicate imminent laser diode failure.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003216 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003217 case 3:
Joe Perches9e39f7c2009-08-25 08:52:00 +00003218 DBG_PRINT(ERR_DBG,
3219 "Take Xframe NIC out of service.\n");
3220 DBG_PRINT(ERR_DBG,
3221"Excessive laser output power may saturate far-end receiver.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00003222 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003223 default:
Joe Perchesd44570e2009-08-24 17:29:44 +00003224 DBG_PRINT(ERR_DBG,
3225 "Incorrect XPAK Alarm type\n");
Ananda Rajubd1034f2006-04-21 19:20:22 -04003226 }
3227 val64 = 0x0;
3228 }
3229 val64 = val64 << (index * 0x2);
3230 *regs_stat = (*regs_stat & (~mask)) | (val64);
3231
3232 } else {
3233 *regs_stat = *regs_stat & (~mask);
3234 }
3235}
3236
3237/**
3238 * s2io_updt_xpak_counter - Function to update the xpak counters
3239 * @dev : pointer to net_device struct
3240 * Description:
3241 * This function is to upate the status of the xpak counters value
3242 * NONE
3243 */
3244static void s2io_updt_xpak_counter(struct net_device *dev)
3245{
3246 u16 flag = 0x0;
3247 u16 type = 0x0;
3248 u16 val16 = 0x0;
3249 u64 val64 = 0x0;
3250 u64 addr = 0x0;
3251
Wang Chen4cf16532008-11-12 23:38:14 -08003252 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00003253 struct stat_block *stats = sp->mac_control.stats_info;
3254 struct xpakStat *xstats = &stats->xpak_stat;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003255
3256 /* Check the communication with the MDIO slave */
Ben Hutchings40239392009-04-29 08:13:29 +00003257 addr = MDIO_CTRL1;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003258 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003259 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Joe Perchesd44570e2009-08-24 17:29:44 +00003260 if ((val64 == 0xFFFF) || (val64 == 0x0000)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003261 DBG_PRINT(ERR_DBG,
3262 "ERR: MDIO slave access failed - Returned %llx\n",
3263 (unsigned long long)val64);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003264 return;
3265 }
3266
Ben Hutchings40239392009-04-29 08:13:29 +00003267 /* Check for the expected value of control reg 1 */
Joe Perchesd44570e2009-08-24 17:29:44 +00003268 if (val64 != MDIO_CTRL1_SPEED10G) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003269 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - "
3270 "Returned: %llx- Expected: 0x%x\n",
Ben Hutchings40239392009-04-29 08:13:29 +00003271 (unsigned long long)val64, MDIO_CTRL1_SPEED10G);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003272 return;
3273 }
3274
3275 /* Loading the DOM register to MDIO register */
3276 addr = 0xA100;
Ben Hutchings40239392009-04-29 08:13:29 +00003277 s2io_mdio_write(MDIO_MMD_PMAPMD, addr, val16, dev);
3278 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003279
3280 /* Reading the Alarm flags */
3281 addr = 0xA070;
3282 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003283 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003284
3285 flag = CHECKBIT(val64, 0x7);
3286 type = 1;
Joe Perchesffb5df62009-08-24 17:29:47 +00003287 s2io_chk_xpak_counter(&xstats->alarm_transceiver_temp_high,
3288 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003289 0x0, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003290
Joe Perchesd44570e2009-08-24 17:29:44 +00003291 if (CHECKBIT(val64, 0x6))
Joe Perchesffb5df62009-08-24 17:29:47 +00003292 xstats->alarm_transceiver_temp_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003293
3294 flag = CHECKBIT(val64, 0x3);
3295 type = 2;
Joe Perchesffb5df62009-08-24 17:29:47 +00003296 s2io_chk_xpak_counter(&xstats->alarm_laser_bias_current_high,
3297 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003298 0x2, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003299
Joe Perchesd44570e2009-08-24 17:29:44 +00003300 if (CHECKBIT(val64, 0x2))
Joe Perchesffb5df62009-08-24 17:29:47 +00003301 xstats->alarm_laser_bias_current_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003302
3303 flag = CHECKBIT(val64, 0x1);
3304 type = 3;
Joe Perchesffb5df62009-08-24 17:29:47 +00003305 s2io_chk_xpak_counter(&xstats->alarm_laser_output_power_high,
3306 &xstats->xpak_regs_stat,
Joe Perchesd44570e2009-08-24 17:29:44 +00003307 0x4, flag, type);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003308
Joe Perchesd44570e2009-08-24 17:29:44 +00003309 if (CHECKBIT(val64, 0x0))
Joe Perchesffb5df62009-08-24 17:29:47 +00003310 xstats->alarm_laser_output_power_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003311
3312 /* Reading the Warning flags */
3313 addr = 0xA074;
3314 val64 = 0x0;
Ben Hutchings40239392009-04-29 08:13:29 +00003315 val64 = s2io_mdio_read(MDIO_MMD_PMAPMD, addr, dev);
Ananda Rajubd1034f2006-04-21 19:20:22 -04003316
Joe Perchesd44570e2009-08-24 17:29:44 +00003317 if (CHECKBIT(val64, 0x7))
Joe Perchesffb5df62009-08-24 17:29:47 +00003318 xstats->warn_transceiver_temp_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003319
Joe Perchesd44570e2009-08-24 17:29:44 +00003320 if (CHECKBIT(val64, 0x6))
Joe Perchesffb5df62009-08-24 17:29:47 +00003321 xstats->warn_transceiver_temp_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003322
Joe Perchesd44570e2009-08-24 17:29:44 +00003323 if (CHECKBIT(val64, 0x3))
Joe Perchesffb5df62009-08-24 17:29:47 +00003324 xstats->warn_laser_bias_current_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003325
Joe Perchesd44570e2009-08-24 17:29:44 +00003326 if (CHECKBIT(val64, 0x2))
Joe Perchesffb5df62009-08-24 17:29:47 +00003327 xstats->warn_laser_bias_current_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003328
Joe Perchesd44570e2009-08-24 17:29:44 +00003329 if (CHECKBIT(val64, 0x1))
Joe Perchesffb5df62009-08-24 17:29:47 +00003330 xstats->warn_laser_output_power_high++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003331
Joe Perchesd44570e2009-08-24 17:29:44 +00003332 if (CHECKBIT(val64, 0x0))
Joe Perchesffb5df62009-08-24 17:29:47 +00003333 xstats->warn_laser_output_power_low++;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003334}
3335
3336/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003337 * wait_for_cmd_complete - waits for a command to complete.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003338 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07003339 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003340 * Description: Function that waits for a command to Write into RMAC
3341 * ADDR DATA registers to be completed and returns either success or
3342 * error depending on whether the command was complete or not.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003343 * Return value:
3344 * SUCCESS on success and FAILURE on failure.
3345 */
3346
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003347static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
Joe Perchesd44570e2009-08-24 17:29:44 +00003348 int bit_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003349{
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003350 int ret = FAILURE, cnt = 0, delay = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003351 u64 val64;
3352
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003353 if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
3354 return FAILURE;
3355
3356 do {
Ananda Rajuc92ca042006-04-21 19:18:03 -04003357 val64 = readq(addr);
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003358 if (bit_state == S2IO_BIT_RESET) {
3359 if (!(val64 & busy_bit)) {
3360 ret = SUCCESS;
3361 break;
3362 }
3363 } else {
Ram Vepa2d146eb2010-01-19 12:36:20 -08003364 if (val64 & busy_bit) {
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003365 ret = SUCCESS;
3366 break;
3367 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003368 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04003369
Joe Perchesd44570e2009-08-24 17:29:44 +00003370 if (in_interrupt())
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003371 mdelay(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003372 else
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003373 msleep(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003374
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003375 if (++cnt >= 10)
3376 delay = 50;
3377 } while (cnt < 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003378 return ret;
3379}
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003380/*
3381 * check_pci_device_id - Checks if the device id is supported
3382 * @id : device id
3383 * Description: Function to check if the pci device id is supported by driver.
3384 * Return value: Actual device id if supported else PCI_ANY_ID
3385 */
3386static u16 check_pci_device_id(u16 id)
3387{
3388 switch (id) {
3389 case PCI_DEVICE_ID_HERC_WIN:
3390 case PCI_DEVICE_ID_HERC_UNI:
3391 return XFRAME_II_DEVICE;
3392 case PCI_DEVICE_ID_S2IO_UNI:
3393 case PCI_DEVICE_ID_S2IO_WIN:
3394 return XFRAME_I_DEVICE;
3395 default:
3396 return PCI_ANY_ID;
3397 }
3398}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003399
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003400/**
3401 * s2io_reset - Resets the card.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003402 * @sp : private member of the device structure.
3403 * Description: Function to Reset the card. This function then also
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003404 * restores the previously saved PCI configuration space registers as
Linus Torvalds1da177e2005-04-16 15:20:36 -07003405 * the card reset also resets the configuration space.
3406 * Return value:
3407 * void.
3408 */
3409
Joe Perchesd44570e2009-08-24 17:29:44 +00003410static void s2io_reset(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003411{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003412 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003413 u64 val64;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003414 u16 subid, pci_cmd;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003415 int i;
3416 u16 val16;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003417 unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
3418 unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;
Joe Perchesffb5df62009-08-24 17:29:47 +00003419 struct stat_block *stats;
3420 struct swStat *swstats;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003421
Joe Perches9e39f7c2009-08-25 08:52:00 +00003422 DBG_PRINT(INIT_DBG, "%s: Resetting XFrame card %s\n",
Breno Leitao3a228132010-03-04 10:40:44 +00003423 __func__, pci_name(sp->pdev));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003424
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003425 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07003426 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003427
Linus Torvalds1da177e2005-04-16 15:20:36 -07003428 val64 = SW_RESET_ALL;
3429 writeq(val64, &bar0->sw_reset);
Joe Perchesd44570e2009-08-24 17:29:44 +00003430 if (strstr(sp->product_name, "CX4"))
Ananda Rajuc92ca042006-04-21 19:18:03 -04003431 msleep(750);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003432 msleep(250);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003433 for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
3434
3435 /* Restore the PCI state saved during initialization. */
3436 pci_restore_state(sp->pdev);
Breno Leitaob8a623b2009-11-10 09:44:23 +00003437 pci_save_state(sp->pdev);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003438 pci_read_config_word(sp->pdev, 0x2, &val16);
3439 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
3440 break;
3441 msleep(200);
3442 }
3443
Joe Perchesd44570e2009-08-24 17:29:44 +00003444 if (check_pci_device_id(val16) == (u16)PCI_ANY_ID)
3445 DBG_PRINT(ERR_DBG, "%s SW_Reset failed!\n", __func__);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003446
3447 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);
3448
3449 s2io_init_pci(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003450
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003451 /* Set swapper to enable I/O register access */
3452 s2io_set_swapper(sp);
3453
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08003454 /* restore mac_addr entries */
3455 do_s2io_restore_unicast_mc(sp);
3456
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003457 /* Restore the MSIX table entries from local variables */
3458 restore_xmsi_data(sp);
3459
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003460 /* Clear certain PCI/PCI-X fields after reset */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003461 if (sp->device_type == XFRAME_II_DEVICE) {
Ananda Rajub41477f2006-07-24 19:52:49 -04003462 /* Clear "detected parity error" bit */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003463 pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003464
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003465 /* Clearing PCIX Ecc status register */
3466 pci_write_config_dword(sp->pdev, 0x68, 0x7C);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003467
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003468 /* Clearing PCI_STATUS error reflected here */
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003469 writeq(s2BIT(62), &bar0->txpic_int_reg);
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003470 }
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003471
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003472 /* Reset device statistics maintained by OS */
Joe Perchesd44570e2009-08-24 17:29:44 +00003473 memset(&sp->stats, 0, sizeof(struct net_device_stats));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003474
Joe Perchesffb5df62009-08-24 17:29:47 +00003475 stats = sp->mac_control.stats_info;
3476 swstats = &stats->sw_stat;
3477
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003478 /* save link up/down time/cnt, reset/memory/watchdog cnt */
Joe Perchesffb5df62009-08-24 17:29:47 +00003479 up_cnt = swstats->link_up_cnt;
3480 down_cnt = swstats->link_down_cnt;
3481 up_time = swstats->link_up_time;
3482 down_time = swstats->link_down_time;
3483 reset_cnt = swstats->soft_reset_cnt;
3484 mem_alloc_cnt = swstats->mem_allocated;
3485 mem_free_cnt = swstats->mem_freed;
3486 watchdog_cnt = swstats->watchdog_timer_cnt;
3487
3488 memset(stats, 0, sizeof(struct stat_block));
3489
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003490 /* restore link up/down time/cnt, reset/memory/watchdog cnt */
Joe Perchesffb5df62009-08-24 17:29:47 +00003491 swstats->link_up_cnt = up_cnt;
3492 swstats->link_down_cnt = down_cnt;
3493 swstats->link_up_time = up_time;
3494 swstats->link_down_time = down_time;
3495 swstats->soft_reset_cnt = reset_cnt;
3496 swstats->mem_allocated = mem_alloc_cnt;
3497 swstats->mem_freed = mem_free_cnt;
3498 swstats->watchdog_timer_cnt = watchdog_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003499
Linus Torvalds1da177e2005-04-16 15:20:36 -07003500 /* SXE-002: Configure link and activity LED to turn it off */
3501 subid = sp->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003502 if (((subid & 0xFF) >= 0x07) &&
3503 (sp->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003504 val64 = readq(&bar0->gpio_control);
3505 val64 |= 0x0000800000000000ULL;
3506 writeq(val64, &bar0->gpio_control);
3507 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01003508 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003509 }
3510
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003511 /*
Lucas De Marchi25985ed2011-03-30 22:57:33 -03003512 * Clear spurious ECC interrupts that would have occurred on
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003513 * XFRAME II cards after reset.
3514 */
3515 if (sp->device_type == XFRAME_II_DEVICE) {
3516 val64 = readq(&bar0->pcc_err_reg);
3517 writeq(val64, &bar0->pcc_err_reg);
3518 }
3519
Tobias Klauserf957bcf2009-06-04 23:07:59 +00003520 sp->device_enabled_once = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003521}
3522
3523/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003524 * s2io_set_swapper - to set the swapper controle on the card
3525 * @sp : private member of the device structure,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003526 * pointer to the s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003527 * Description: Function to set the swapper control on the card
Linus Torvalds1da177e2005-04-16 15:20:36 -07003528 * correctly depending on the 'endianness' of the system.
3529 * Return value:
3530 * SUCCESS on success and FAILURE on failure.
3531 */
3532
Joe Perchesd44570e2009-08-24 17:29:44 +00003533static int s2io_set_swapper(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003534{
3535 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003536 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003537 u64 val64, valt, valr;
3538
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003539 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003540 * Set proper endian settings and verify the same by reading
3541 * the PIF Feed-back register.
3542 */
3543
3544 val64 = readq(&bar0->pif_rd_swapper_fb);
3545 if (val64 != 0x0123456789ABCDEFULL) {
3546 int i = 0;
Jon Mason85a56492010-12-10 15:40:04 +00003547 static const u64 value[] = {
3548 0xC30000C3C30000C3ULL, /* FE=1, SE=1 */
3549 0x8100008181000081ULL, /* FE=1, SE=0 */
3550 0x4200004242000042ULL, /* FE=0, SE=1 */
3551 0 /* FE=0, SE=0 */
3552 };
Linus Torvalds1da177e2005-04-16 15:20:36 -07003553
Joe Perchesd44570e2009-08-24 17:29:44 +00003554 while (i < 4) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003555 writeq(value[i], &bar0->swapper_ctrl);
3556 val64 = readq(&bar0->pif_rd_swapper_fb);
3557 if (val64 == 0x0123456789ABCDEFULL)
3558 break;
3559 i++;
3560 }
3561 if (i == 4) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003562 DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, "
3563 "feedback read %llx\n",
3564 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003565 return FAILURE;
3566 }
3567 valr = value[i];
3568 } else {
3569 valr = readq(&bar0->swapper_ctrl);
3570 }
3571
3572 valt = 0x0123456789ABCDEFULL;
3573 writeq(valt, &bar0->xmsi_address);
3574 val64 = readq(&bar0->xmsi_address);
3575
Joe Perchesd44570e2009-08-24 17:29:44 +00003576 if (val64 != valt) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003577 int i = 0;
Jon Mason85a56492010-12-10 15:40:04 +00003578 static const u64 value[] = {
3579 0x00C3C30000C3C300ULL, /* FE=1, SE=1 */
3580 0x0081810000818100ULL, /* FE=1, SE=0 */
3581 0x0042420000424200ULL, /* FE=0, SE=1 */
3582 0 /* FE=0, SE=0 */
3583 };
Linus Torvalds1da177e2005-04-16 15:20:36 -07003584
Joe Perchesd44570e2009-08-24 17:29:44 +00003585 while (i < 4) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003586 writeq((value[i] | valr), &bar0->swapper_ctrl);
3587 writeq(valt, &bar0->xmsi_address);
3588 val64 = readq(&bar0->xmsi_address);
Joe Perchesd44570e2009-08-24 17:29:44 +00003589 if (val64 == valt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003590 break;
3591 i++;
3592 }
Joe Perchesd44570e2009-08-24 17:29:44 +00003593 if (i == 4) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003594 unsigned long long x = val64;
Joe Perches9e39f7c2009-08-25 08:52:00 +00003595 DBG_PRINT(ERR_DBG,
3596 "Write failed, Xmsi_addr reads:0x%llx\n", x);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003597 return FAILURE;
3598 }
3599 }
3600 val64 = readq(&bar0->swapper_ctrl);
3601 val64 &= 0xFFFF000000000000ULL;
3602
Joe Perchesd44570e2009-08-24 17:29:44 +00003603#ifdef __BIG_ENDIAN
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003604 /*
3605 * The device by default set to a big endian format, so a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003606 * big endian driver need not set anything.
3607 */
3608 val64 |= (SWAPPER_CTRL_TXP_FE |
Joe Perchesd44570e2009-08-24 17:29:44 +00003609 SWAPPER_CTRL_TXP_SE |
3610 SWAPPER_CTRL_TXD_R_FE |
3611 SWAPPER_CTRL_TXD_W_FE |
3612 SWAPPER_CTRL_TXF_R_FE |
3613 SWAPPER_CTRL_RXD_R_FE |
3614 SWAPPER_CTRL_RXD_W_FE |
3615 SWAPPER_CTRL_RXF_W_FE |
3616 SWAPPER_CTRL_XMSI_FE |
3617 SWAPPER_CTRL_STATS_FE |
3618 SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003619 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003620 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003621 writeq(val64, &bar0->swapper_ctrl);
3622#else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003623 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003624 * Initially we enable all bits to make it accessible by the
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003625 * driver, then we selectively enable only those bits that
Linus Torvalds1da177e2005-04-16 15:20:36 -07003626 * we want to set.
3627 */
3628 val64 |= (SWAPPER_CTRL_TXP_FE |
Joe Perchesd44570e2009-08-24 17:29:44 +00003629 SWAPPER_CTRL_TXP_SE |
3630 SWAPPER_CTRL_TXD_R_FE |
3631 SWAPPER_CTRL_TXD_R_SE |
3632 SWAPPER_CTRL_TXD_W_FE |
3633 SWAPPER_CTRL_TXD_W_SE |
3634 SWAPPER_CTRL_TXF_R_FE |
3635 SWAPPER_CTRL_RXD_R_FE |
3636 SWAPPER_CTRL_RXD_R_SE |
3637 SWAPPER_CTRL_RXD_W_FE |
3638 SWAPPER_CTRL_RXD_W_SE |
3639 SWAPPER_CTRL_RXF_W_FE |
3640 SWAPPER_CTRL_XMSI_FE |
3641 SWAPPER_CTRL_STATS_FE |
3642 SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003643 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003644 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003645 writeq(val64, &bar0->swapper_ctrl);
3646#endif
3647 val64 = readq(&bar0->swapper_ctrl);
3648
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003649 /*
3650 * Verifying if endian settings are accurate by reading a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003651 * feedback register.
3652 */
3653 val64 = readq(&bar0->pif_rd_swapper_fb);
3654 if (val64 != 0x0123456789ABCDEFULL) {
3655 /* Endian settings are incorrect, calls for another dekko. */
Joe Perches9e39f7c2009-08-25 08:52:00 +00003656 DBG_PRINT(ERR_DBG,
3657 "%s: Endian settings are wrong, feedback read %llx\n",
3658 dev->name, (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003659 return FAILURE;
3660 }
3661
3662 return SUCCESS;
3663}
3664
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003665static int wait_for_msix_trans(struct s2io_nic *nic, int i)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003666{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003667 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003668 u64 val64;
3669 int ret = 0, cnt = 0;
3670
3671 do {
3672 val64 = readq(&bar0->xmsi_access);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003673 if (!(val64 & s2BIT(15)))
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003674 break;
3675 mdelay(1);
3676 cnt++;
Joe Perchesd44570e2009-08-24 17:29:44 +00003677 } while (cnt < 5);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003678 if (cnt == 5) {
3679 DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
3680 ret = 1;
3681 }
3682
3683 return ret;
3684}
3685
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003686static void restore_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003687{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003688 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003689 u64 val64;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003690 int i, msix_index;
3691
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003692 if (nic->device_type == XFRAME_I_DEVICE)
3693 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003694
Joe Perchesd44570e2009-08-24 17:29:44 +00003695 for (i = 0; i < MAX_REQUESTED_MSI_X; i++) {
3696 msix_index = (i) ? ((i-1) * 8 + 1) : 0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003697 writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
3698 writeq(nic->msix_info[i].data, &bar0->xmsi_data);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003699 val64 = (s2BIT(7) | s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003700 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003701 if (wait_for_msix_trans(nic, msix_index)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003702 DBG_PRINT(ERR_DBG, "%s: index: %d failed\n",
3703 __func__, msix_index);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003704 continue;
3705 }
3706 }
3707}
3708
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003709static void store_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003710{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003711 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003712 u64 val64, addr, data;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003713 int i, msix_index;
3714
3715 if (nic->device_type == XFRAME_I_DEVICE)
3716 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003717
3718 /* Store and display */
Joe Perchesd44570e2009-08-24 17:29:44 +00003719 for (i = 0; i < MAX_REQUESTED_MSI_X; i++) {
3720 msix_index = (i) ? ((i-1) * 8 + 1) : 0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003721 val64 = (s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003722 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003723 if (wait_for_msix_trans(nic, msix_index)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003724 DBG_PRINT(ERR_DBG, "%s: index: %d failed\n",
3725 __func__, msix_index);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003726 continue;
3727 }
3728 addr = readq(&bar0->xmsi_address);
3729 data = readq(&bar0->xmsi_data);
3730 if (addr && data) {
3731 nic->msix_info[i].addr = addr;
3732 nic->msix_info[i].data = data;
3733 }
3734 }
3735}
3736
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003737static int s2io_enable_msi_x(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003738{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003739 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003740 u64 rx_mat;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003741 u16 msi_control; /* Temp variable */
3742 int ret, i, j, msix_indx = 1;
Joe Perches4f870322009-08-24 17:29:42 +00003743 int size;
Joe Perchesffb5df62009-08-24 17:29:47 +00003744 struct stat_block *stats = nic->mac_control.stats_info;
3745 struct swStat *swstats = &stats->sw_stat;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003746
Joe Perches4f870322009-08-24 17:29:42 +00003747 size = nic->num_entries * sizeof(struct msix_entry);
Joe Perches44364a02009-08-24 17:29:43 +00003748 nic->entries = kzalloc(size, GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003749 if (!nic->entries) {
Joe Perchesd44570e2009-08-24 17:29:44 +00003750 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
3751 __func__);
Joe Perchesffb5df62009-08-24 17:29:47 +00003752 swstats->mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003753 return -ENOMEM;
3754 }
Joe Perchesffb5df62009-08-24 17:29:47 +00003755 swstats->mem_allocated += size;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003756
Joe Perches4f870322009-08-24 17:29:42 +00003757 size = nic->num_entries * sizeof(struct s2io_msix_entry);
Joe Perches44364a02009-08-24 17:29:43 +00003758 nic->s2io_entries = kzalloc(size, GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003759 if (!nic->s2io_entries) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003760 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00003761 __func__);
Joe Perchesffb5df62009-08-24 17:29:47 +00003762 swstats->mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003763 kfree(nic->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003764 swstats->mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003765 += (nic->num_entries * sizeof(struct msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003766 return -ENOMEM;
3767 }
Joe Perchesffb5df62009-08-24 17:29:47 +00003768 swstats->mem_allocated += size;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003769
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003770 nic->entries[0].entry = 0;
3771 nic->s2io_entries[0].entry = 0;
3772 nic->s2io_entries[0].in_use = MSIX_FLG;
3773 nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
3774 nic->s2io_entries[0].arg = &nic->mac_control.fifos;
3775
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003776 for (i = 1; i < nic->num_entries; i++) {
3777 nic->entries[i].entry = ((i - 1) * 8) + 1;
3778 nic->s2io_entries[i].entry = ((i - 1) * 8) + 1;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003779 nic->s2io_entries[i].arg = NULL;
3780 nic->s2io_entries[i].in_use = 0;
3781 }
3782
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003783 rx_mat = readq(&bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003784 for (j = 0; j < nic->config.rx_ring_num; j++) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003785 rx_mat |= RX_MAT_SET(j, msix_indx);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003786 nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j];
3787 nic->s2io_entries[j+1].type = MSIX_RING_TYPE;
3788 nic->s2io_entries[j+1].in_use = MSIX_FLG;
3789 msix_indx += 8;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003790 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003791 writeq(rx_mat, &bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003792 readq(&bar0->rx_mat);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003793
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003794 ret = pci_enable_msix(nic->pdev, nic->entries, nic->num_entries);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003795 /* We fail init if error or we get less vectors than min required */
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003796 if (ret) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00003797 DBG_PRINT(ERR_DBG, "Enabling MSI-X failed\n");
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003798 kfree(nic->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003799 swstats->mem_freed += nic->num_entries *
3800 sizeof(struct msix_entry);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003801 kfree(nic->s2io_entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003802 swstats->mem_freed += nic->num_entries *
3803 sizeof(struct s2io_msix_entry);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003804 nic->entries = NULL;
3805 nic->s2io_entries = NULL;
3806 return -ENOMEM;
3807 }
3808
3809 /*
3810 * To enable MSI-X, MSI also needs to be enabled, due to a bug
3811 * in the herc NIC. (Temp change, needs to be removed later)
3812 */
3813 pci_read_config_word(nic->pdev, 0x42, &msi_control);
3814 msi_control |= 0x1; /* Enable MSI */
3815 pci_write_config_word(nic->pdev, 0x42, msi_control);
3816
3817 return 0;
3818}
3819
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003820/* Handle software interrupt used during MSI(X) test */
Adrian Bunk33390a72007-12-11 23:23:06 +01003821static irqreturn_t s2io_test_intr(int irq, void *dev_id)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003822{
3823 struct s2io_nic *sp = dev_id;
3824
3825 sp->msi_detected = 1;
3826 wake_up(&sp->msi_wait);
3827
3828 return IRQ_HANDLED;
3829}
3830
3831/* Test interrupt path by forcing a a software IRQ */
Adrian Bunk33390a72007-12-11 23:23:06 +01003832static int s2io_test_msi(struct s2io_nic *sp)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003833{
3834 struct pci_dev *pdev = sp->pdev;
3835 struct XENA_dev_config __iomem *bar0 = sp->bar0;
3836 int err;
3837 u64 val64, saved64;
3838
3839 err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
Joe Perchesd44570e2009-08-24 17:29:44 +00003840 sp->name, sp);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003841 if (err) {
3842 DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00003843 sp->dev->name, pci_name(pdev), pdev->irq);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003844 return err;
3845 }
3846
Joe Perchesd44570e2009-08-24 17:29:44 +00003847 init_waitqueue_head(&sp->msi_wait);
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003848 sp->msi_detected = 0;
3849
3850 saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
3851 val64 |= SCHED_INT_CTRL_ONE_SHOT;
3852 val64 |= SCHED_INT_CTRL_TIMER_EN;
3853 val64 |= SCHED_INT_CTRL_INT2MSI(1);
3854 writeq(val64, &bar0->scheduled_int_ctrl);
3855
3856 wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);
3857
3858 if (!sp->msi_detected) {
3859 /* MSI(X) test failed, go back to INTx mode */
Joe Perches24500222007-11-19 17:48:28 -08003860 DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated "
Joe Perches9e39f7c2009-08-25 08:52:00 +00003861 "using MSI(X) during test\n",
3862 sp->dev->name, pci_name(pdev));
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003863
3864 err = -EOPNOTSUPP;
3865 }
3866
3867 free_irq(sp->entries[1].vector, sp);
3868
3869 writeq(saved64, &bar0->scheduled_int_ctrl);
3870
3871 return err;
3872}
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003873
3874static void remove_msix_isr(struct s2io_nic *sp)
3875{
3876 int i;
3877 u16 msi_control;
3878
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003879 for (i = 0; i < sp->num_entries; i++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00003880 if (sp->s2io_entries[i].in_use == MSIX_REGISTERED_SUCCESS) {
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003881 int vector = sp->entries[i].vector;
3882 void *arg = sp->s2io_entries[i].arg;
3883 free_irq(vector, arg);
3884 }
3885 }
3886
3887 kfree(sp->entries);
3888 kfree(sp->s2io_entries);
3889 sp->entries = NULL;
3890 sp->s2io_entries = NULL;
3891
3892 pci_read_config_word(sp->pdev, 0x42, &msi_control);
3893 msi_control &= 0xFFFE; /* Disable MSI */
3894 pci_write_config_word(sp->pdev, 0x42, msi_control);
3895
3896 pci_disable_msix(sp->pdev);
3897}
3898
3899static void remove_inta_isr(struct s2io_nic *sp)
3900{
3901 struct net_device *dev = sp->dev;
3902
3903 free_irq(sp->pdev->irq, dev);
3904}
3905
Linus Torvalds1da177e2005-04-16 15:20:36 -07003906/* ********************************************************* *
3907 * Functions defined below concern the OS part of the driver *
3908 * ********************************************************* */
3909
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003910/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003911 * s2io_open - open entry point of the driver
3912 * @dev : pointer to the device structure.
3913 * Description:
3914 * This function is the open entry point of the driver. It mainly calls a
3915 * function to allocate Rx buffers and inserts them into the buffer
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003916 * descriptors and then enables the Rx part of the NIC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003917 * Return value:
3918 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3919 * file on failure.
3920 */
3921
Adrian Bunkac1f60d2005-11-06 01:46:47 +01003922static int s2io_open(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003923{
Wang Chen4cf16532008-11-12 23:38:14 -08003924 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00003925 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003926 int err = 0;
3927
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003928 /*
3929 * Make sure you have link off by default every time
Linus Torvalds1da177e2005-04-16 15:20:36 -07003930 * Nic is initialized
3931 */
3932 netif_carrier_off(dev);
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003933 sp->last_link_state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003934
3935 /* Initialize H/W and enable interrupts */
Ananda Rajuc92ca042006-04-21 19:18:03 -04003936 err = s2io_card_up(sp);
3937 if (err) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003938 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
3939 dev->name);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07003940 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003941 }
3942
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04003943 if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003944 DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
Ananda Rajue6a8fee2006-07-06 23:58:23 -07003945 s2io_card_down(sp);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003946 err = -ENODEV;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07003947 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003948 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003949 s2io_start_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003950 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003951
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003952hw_init_failed:
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003953 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003954 if (sp->entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003955 kfree(sp->entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003956 swstats->mem_freed += sp->num_entries *
3957 sizeof(struct msix_entry);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003958 }
3959 if (sp->s2io_entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003960 kfree(sp->s2io_entries);
Joe Perchesffb5df62009-08-24 17:29:47 +00003961 swstats->mem_freed += sp->num_entries *
3962 sizeof(struct s2io_msix_entry);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003963 }
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003964 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003965 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003966}
3967
3968/**
3969 * s2io_close -close entry point of the driver
3970 * @dev : device pointer.
3971 * Description:
3972 * This is the stop entry point of the driver. It needs to undo exactly
3973 * whatever was done by the open entry point,thus it's usually referred to
3974 * as the close function.Among other things this function mainly stops the
3975 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3976 * Return value:
3977 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3978 * file on failure.
3979 */
3980
Adrian Bunkac1f60d2005-11-06 01:46:47 +01003981static int s2io_close(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003982{
Wang Chen4cf16532008-11-12 23:38:14 -08003983 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08003984 struct config_param *config = &sp->config;
3985 u64 tmp64;
3986 int offset;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003987
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05003988 /* Return if the device is already closed *
Joe Perchesd44570e2009-08-24 17:29:44 +00003989 * Can happen when s2io_card_up failed in change_mtu *
3990 */
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05003991 if (!is_s2io_card_up(sp))
3992 return 0;
3993
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003994 s2io_stop_all_tx_queue(sp);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08003995 /* delete all populated mac entries */
3996 for (offset = 1; offset < config->max_mc_addr; offset++) {
3997 tmp64 = do_s2io_read_unicast_mc(sp, offset);
3998 if (tmp64 != S2IO_DISABLE_MAC_ENTRY)
3999 do_s2io_delete_unicast_mc(sp, tmp64);
4000 }
4001
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004002 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004003
Linus Torvalds1da177e2005-04-16 15:20:36 -07004004 return 0;
4005}
4006
4007/**
4008 * s2io_xmit - Tx entry point of te driver
4009 * @skb : the socket buffer containing the Tx data.
4010 * @dev : device pointer.
4011 * Description :
4012 * This function is the Tx entry point of the driver. S2IO NIC supports
4013 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
Lucas De Marchi25985ed2011-03-30 22:57:33 -03004014 * NOTE: when device can't queue the pkt,just the trans_start variable will
Linus Torvalds1da177e2005-04-16 15:20:36 -07004015 * not be upadted.
4016 * Return value:
4017 * 0 on success & 1 on failure.
4018 */
4019
Stephen Hemminger613573252009-08-31 19:50:58 +00004020static netdev_tx_t s2io_xmit(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004021{
Wang Chen4cf16532008-11-12 23:38:14 -08004022 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004023 u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
4024 register u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004025 struct TxD *txdp;
4026 struct TxFIFO_element __iomem *tx_fifo;
Surjit Reang2fda0962008-01-24 02:08:59 -08004027 unsigned long flags = 0;
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004028 u16 vlan_tag = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004029 struct fifo_info *fifo = NULL;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004030 int do_spin_lock = 1;
Ananda Raju75c30b12006-07-24 19:55:09 -04004031 int offload_type;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004032 int enable_per_list_interrupt = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00004033 struct config_param *config = &sp->config;
4034 struct mac_info *mac_control = &sp->mac_control;
4035 struct stat_block *stats = mac_control->stats_info;
4036 struct swStat *swstats = &stats->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004037
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004038 DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004039
4040 if (unlikely(skb->len <= 0)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00004041 DBG_PRINT(TX_DBG, "%s: Buffer has no data..\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004042 dev_kfree_skb_any(skb);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004043 return NETDEV_TX_OK;
Surjit Reang2fda0962008-01-24 02:08:59 -08004044 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004045
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004046 if (!is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004047 DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07004048 dev->name);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004049 dev_kfree_skb(skb);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004050 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004051 }
4052
4053 queue = 0;
Jesse Grosseab6d182010-10-20 13:56:03 +00004054 if (vlan_tx_tag_present(skb))
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004055 vlan_tag = vlan_tx_tag_get(skb);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004056 if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) {
4057 if (skb->protocol == htons(ETH_P_IP)) {
4058 struct iphdr *ip;
4059 struct tcphdr *th;
4060 ip = ip_hdr(skb);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004061
Paul Gortmaker56f8a752011-06-21 20:33:34 -07004062 if (!ip_is_fragment(ip)) {
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004063 th = (struct tcphdr *)(((unsigned char *)ip) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004064 ip->ihl*4);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004065
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004066 if (ip->protocol == IPPROTO_TCP) {
4067 queue_len = sp->total_tcp_fifos;
4068 queue = (ntohs(th->source) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004069 ntohs(th->dest)) &
4070 sp->fifo_selector[queue_len - 1];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004071 if (queue >= queue_len)
4072 queue = queue_len - 1;
4073 } else if (ip->protocol == IPPROTO_UDP) {
4074 queue_len = sp->total_udp_fifos;
4075 queue = (ntohs(th->source) +
Joe Perchesd44570e2009-08-24 17:29:44 +00004076 ntohs(th->dest)) &
4077 sp->fifo_selector[queue_len - 1];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004078 if (queue >= queue_len)
4079 queue = queue_len - 1;
4080 queue += sp->udp_fifo_idx;
4081 if (skb->len > 1024)
4082 enable_per_list_interrupt = 1;
4083 do_spin_lock = 0;
4084 }
4085 }
4086 }
4087 } else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING)
4088 /* get fifo number based on skb->priority value */
4089 queue = config->fifo_mapping
Joe Perchesd44570e2009-08-24 17:29:44 +00004090 [skb->priority & (MAX_TX_FIFOS - 1)];
Surjit Reang2fda0962008-01-24 02:08:59 -08004091 fifo = &mac_control->fifos[queue];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004092
4093 if (do_spin_lock)
4094 spin_lock_irqsave(&fifo->tx_lock, flags);
4095 else {
4096 if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
4097 return NETDEV_TX_LOCKED;
4098 }
4099
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004100 if (sp->config.multiq) {
4101 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
4102 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4103 return NETDEV_TX_BUSY;
4104 }
David S. Millerb19fa1f2008-07-08 23:14:24 -07004105 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004106 if (netif_queue_stopped(dev)) {
4107 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4108 return NETDEV_TX_BUSY;
4109 }
4110 }
4111
Joe Perchesd44570e2009-08-24 17:29:44 +00004112 put_off = (u16)fifo->tx_curr_put_info.offset;
4113 get_off = (u16)fifo->tx_curr_get_info.offset;
Joe Perches43d620c2011-06-16 19:08:06 +00004114 txdp = fifo->list_info[put_off].list_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004115
Surjit Reang2fda0962008-01-24 02:08:59 -08004116 queue_len = fifo->tx_curr_put_info.fifo_len + 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004117 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004118 if (txdp->Host_Control ||
Joe Perchesd44570e2009-08-24 17:29:44 +00004119 ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07004120 DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004121 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004122 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004123 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004124 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004125 }
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004126
Ananda Raju75c30b12006-07-24 19:55:09 -04004127 offload_type = s2io_offload_type(skb);
Ananda Raju75c30b12006-07-24 19:55:09 -04004128 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004129 txdp->Control_1 |= TXD_TCP_LSO_EN;
Ananda Raju75c30b12006-07-24 19:55:09 -04004130 txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
Linus Torvalds1da177e2005-04-16 15:20:36 -07004131 }
Patrick McHardy84fa7932006-08-29 16:44:56 -07004132 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004133 txdp->Control_2 |= (TXD_TX_CKO_IPV4_EN |
4134 TXD_TX_CKO_TCP_EN |
4135 TXD_TX_CKO_UDP_EN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004136 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004137 txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
4138 txdp->Control_1 |= TXD_LIST_OWN_XENA;
Surjit Reang2fda0962008-01-24 02:08:59 -08004139 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004140 if (enable_per_list_interrupt)
4141 if (put_off & (queue_len >> 5))
4142 txdp->Control_2 |= TXD_INT_TYPE_PER_LIST;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004143 if (vlan_tag) {
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004144 txdp->Control_2 |= TXD_VLAN_ENABLE;
4145 txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
4146 }
4147
Eric Dumazete743d312010-04-14 15:59:40 -07004148 frg_len = skb_headlen(skb);
Ananda Raju75c30b12006-07-24 19:55:09 -04004149 if (offload_type == SKB_GSO_UDP) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004150 int ufo_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004151
Ananda Raju75c30b12006-07-24 19:55:09 -04004152 ufo_size = s2io_udp_mss(skb);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004153 ufo_size &= ~7;
4154 txdp->Control_1 |= TXD_UFO_EN;
4155 txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
4156 txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
4157#ifdef __BIG_ENDIAN
Al Viro3459feb2008-03-16 22:23:14 +00004158 /* both variants do cpu_to_be64(be32_to_cpu(...)) */
Surjit Reang2fda0962008-01-24 02:08:59 -08004159 fifo->ufo_in_band_v[put_off] =
Joe Perchesd44570e2009-08-24 17:29:44 +00004160 (__force u64)skb_shinfo(skb)->ip6_frag_id;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004161#else
Surjit Reang2fda0962008-01-24 02:08:59 -08004162 fifo->ufo_in_band_v[put_off] =
Joe Perchesd44570e2009-08-24 17:29:44 +00004163 (__force u64)skb_shinfo(skb)->ip6_frag_id << 32;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004164#endif
Surjit Reang2fda0962008-01-24 02:08:59 -08004165 txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004166 txdp->Buffer_Pointer = pci_map_single(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00004167 fifo->ufo_in_band_v,
4168 sizeof(u64),
4169 PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004170 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004171 goto pci_map_failed;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004172 txdp++;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004173 }
4174
Joe Perchesd44570e2009-08-24 17:29:44 +00004175 txdp->Buffer_Pointer = pci_map_single(sp->pdev, skb->data,
4176 frg_len, PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004177 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004178 goto pci_map_failed;
4179
Joe Perchesd44570e2009-08-24 17:29:44 +00004180 txdp->Host_Control = (unsigned long)skb;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004181 txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
Ananda Raju75c30b12006-07-24 19:55:09 -04004182 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004183 txdp->Control_1 |= TXD_UFO_EN;
4184
4185 frg_cnt = skb_shinfo(skb)->nr_frags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004186 /* For fragmented SKB. */
4187 for (i = 0; i < frg_cnt; i++) {
4188 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004189 /* A '0' length fragment will be ignored */
4190 if (!frag->size)
4191 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004192 txdp++;
Joe Perchesd44570e2009-08-24 17:29:44 +00004193 txdp->Buffer_Pointer = (u64)pci_map_page(sp->pdev, frag->page,
4194 frag->page_offset,
4195 frag->size,
4196 PCI_DMA_TODEVICE);
Ananda Rajuefd51b52006-01-19 14:11:54 -05004197 txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
Ananda Raju75c30b12006-07-24 19:55:09 -04004198 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004199 txdp->Control_1 |= TXD_UFO_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004200 }
4201 txdp->Control_1 |= TXD_GATHER_CODE_LAST;
4202
Ananda Raju75c30b12006-07-24 19:55:09 -04004203 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004204 frg_cnt++; /* as Txd0 was used for inband header */
4205
Linus Torvalds1da177e2005-04-16 15:20:36 -07004206 tx_fifo = mac_control->tx_FIFO_start[queue];
Surjit Reang2fda0962008-01-24 02:08:59 -08004207 val64 = fifo->list_info[put_off].list_phy_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004208 writeq(val64, &tx_fifo->TxDL_Pointer);
4209
4210 val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
4211 TX_FIFO_LAST_LIST);
Ananda Raju75c30b12006-07-24 19:55:09 -04004212 if (offload_type)
4213 val64 |= TX_FIFO_SPECIAL_FUNC;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004214
Linus Torvalds1da177e2005-04-16 15:20:36 -07004215 writeq(val64, &tx_fifo->List_Control);
4216
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07004217 mmiowb();
4218
Linus Torvalds1da177e2005-04-16 15:20:36 -07004219 put_off++;
Surjit Reang2fda0962008-01-24 02:08:59 -08004220 if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
Ananda Raju863c11a2006-04-21 19:03:13 -04004221 put_off = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004222 fifo->tx_curr_put_info.offset = put_off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004223
4224 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004225 if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
Joe Perchesffb5df62009-08-24 17:29:47 +00004226 swstats->fifo_full_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004227 DBG_PRINT(TX_DBG,
4228 "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
4229 put_off, get_off);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004230 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004231 }
Joe Perchesffb5df62009-08-24 17:29:47 +00004232 swstats->mem_allocated += skb->truesize;
Surjit Reang2fda0962008-01-24 02:08:59 -08004233 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004234
Sreenivasa Honnurf6f4bfa2008-03-25 15:11:56 -04004235 if (sp->config.intr_type == MSI_X)
4236 tx_intr_handler(fifo);
4237
Patrick McHardy6ed10652009-06-23 06:03:08 +00004238 return NETDEV_TX_OK;
Joe Perchesffb5df62009-08-24 17:29:47 +00004239
Veena Parat491abf22007-07-23 02:37:14 -04004240pci_map_failed:
Joe Perchesffb5df62009-08-24 17:29:47 +00004241 swstats->pci_map_fail_cnt++;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004242 s2io_stop_tx_queue(sp, fifo->fifo_no);
Joe Perchesffb5df62009-08-24 17:29:47 +00004243 swstats->mem_freed += skb->truesize;
Veena Parat491abf22007-07-23 02:37:14 -04004244 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004245 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Patrick McHardy6ed10652009-06-23 06:03:08 +00004246 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004247}
4248
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004249static void
4250s2io_alarm_handle(unsigned long data)
4251{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004252 struct s2io_nic *sp = (struct s2io_nic *)data;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004253 struct net_device *dev = sp->dev;
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004254
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004255 s2io_handle_errors(dev);
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004256 mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
4257}
4258
David Howells7d12e782006-10-05 14:55:46 +01004259static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004260{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004261 struct ring_info *ring = (struct ring_info *)dev_id;
4262 struct s2io_nic *sp = ring->nic;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004263 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004264
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004265 if (unlikely(!is_s2io_card_up(sp)))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004266 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004267
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004268 if (sp->config.napi) {
Al Viro1a79d1c2008-06-02 10:59:02 +01004269 u8 __iomem *addr = NULL;
4270 u8 val8 = 0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004271
Al Viro1a79d1c2008-06-02 10:59:02 +01004272 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004273 addr += (7 - ring->ring_no);
4274 val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
4275 writeb(val8, addr);
4276 val8 = readb(addr);
Ben Hutchings288379f2009-01-19 16:43:59 -08004277 napi_schedule(&ring->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004278 } else {
4279 rx_intr_handler(ring, 0);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004280 s2io_chk_rx_buffers(sp, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004281 }
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05004282
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004283 return IRQ_HANDLED;
4284}
4285
David Howells7d12e782006-10-05 14:55:46 +01004286static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004287{
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004288 int i;
4289 struct fifo_info *fifos = (struct fifo_info *)dev_id;
4290 struct s2io_nic *sp = fifos->nic;
4291 struct XENA_dev_config __iomem *bar0 = sp->bar0;
4292 struct config_param *config = &sp->config;
4293 u64 reason;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004294
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004295 if (unlikely(!is_s2io_card_up(sp)))
4296 return IRQ_NONE;
4297
4298 reason = readq(&bar0->general_int_status);
4299 if (unlikely(reason == S2IO_MINUS_ONE))
4300 /* Nothing much can be done. Get out */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004301 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004302
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004303 if (reason & (GEN_INTR_TXPIC | GEN_INTR_TXTRAFFIC)) {
4304 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004305
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004306 if (reason & GEN_INTR_TXPIC)
4307 s2io_txpic_intr_handle(sp);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004308
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004309 if (reason & GEN_INTR_TXTRAFFIC)
4310 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004311
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004312 for (i = 0; i < config->tx_fifo_num; i++)
4313 tx_intr_handler(&fifos[i]);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004314
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004315 writeq(sp->general_int_mask, &bar0->general_int_mask);
4316 readl(&bar0->general_int_status);
4317 return IRQ_HANDLED;
4318 }
4319 /* The interrupt was not raised by us */
4320 return IRQ_NONE;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004321}
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004322
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004323static void s2io_txpic_intr_handle(struct s2io_nic *sp)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004324{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004325 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004326 u64 val64;
4327
4328 val64 = readq(&bar0->pic_int_status);
4329 if (val64 & PIC_INT_GPIO) {
4330 val64 = readq(&bar0->gpio_int_reg);
4331 if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
4332 (val64 & GPIO_INT_REG_LINK_UP)) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004333 /*
4334 * This is unstable state so clear both up/down
4335 * interrupt and adapter to re-evaluate the link state.
4336 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004337 val64 |= GPIO_INT_REG_LINK_DOWN;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004338 val64 |= GPIO_INT_REG_LINK_UP;
4339 writeq(val64, &bar0->gpio_int_reg);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004340 val64 = readq(&bar0->gpio_int_mask);
4341 val64 &= ~(GPIO_INT_MASK_LINK_UP |
4342 GPIO_INT_MASK_LINK_DOWN);
4343 writeq(val64, &bar0->gpio_int_mask);
Joe Perchesd44570e2009-08-24 17:29:44 +00004344 } else if (val64 & GPIO_INT_REG_LINK_UP) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004345 val64 = readq(&bar0->adapter_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00004346 /* Enable Adapter */
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004347 val64 = readq(&bar0->adapter_control);
4348 val64 |= ADAPTER_CNTL_EN;
4349 writeq(val64, &bar0->adapter_control);
4350 val64 |= ADAPTER_LED_ON;
4351 writeq(val64, &bar0->adapter_control);
4352 if (!sp->device_enabled_once)
4353 sp->device_enabled_once = 1;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004354
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004355 s2io_link(sp, LINK_UP);
4356 /*
4357 * unmask link down interrupt and mask link-up
4358 * intr
4359 */
4360 val64 = readq(&bar0->gpio_int_mask);
4361 val64 &= ~GPIO_INT_MASK_LINK_DOWN;
4362 val64 |= GPIO_INT_MASK_LINK_UP;
4363 writeq(val64, &bar0->gpio_int_mask);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004364
Joe Perchesd44570e2009-08-24 17:29:44 +00004365 } else if (val64 & GPIO_INT_REG_LINK_DOWN) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004366 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004367 s2io_link(sp, LINK_DOWN);
4368 /* Link is down so unmaks link up interrupt */
4369 val64 = readq(&bar0->gpio_int_mask);
4370 val64 &= ~GPIO_INT_MASK_LINK_UP;
4371 val64 |= GPIO_INT_MASK_LINK_DOWN;
4372 writeq(val64, &bar0->gpio_int_mask);
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05004373
4374 /* turn off LED */
4375 val64 = readq(&bar0->adapter_control);
Joe Perchesd44570e2009-08-24 17:29:44 +00004376 val64 = val64 & (~ADAPTER_LED_ON);
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05004377 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004378 }
4379 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04004380 val64 = readq(&bar0->gpio_int_mask);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004381}
4382
Linus Torvalds1da177e2005-04-16 15:20:36 -07004383/**
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004384 * do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
4385 * @value: alarm bits
4386 * @addr: address value
4387 * @cnt: counter variable
4388 * Description: Check for alarm and increment the counter
4389 * Return Value:
4390 * 1 - if alarm bit set
4391 * 0 - if alarm bit is not set
4392 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004393static int do_s2io_chk_alarm_bit(u64 value, void __iomem *addr,
4394 unsigned long long *cnt)
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004395{
4396 u64 val64;
4397 val64 = readq(addr);
Joe Perchesd44570e2009-08-24 17:29:44 +00004398 if (val64 & value) {
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004399 writeq(val64, addr);
4400 (*cnt)++;
4401 return 1;
4402 }
4403 return 0;
4404
4405}
4406
4407/**
4408 * s2io_handle_errors - Xframe error indication handler
4409 * @nic: device private variable
4410 * Description: Handle alarms such as loss of link, single or
4411 * double ECC errors, critical and serious errors.
4412 * Return Value:
4413 * NONE
4414 */
Joe Perchesd44570e2009-08-24 17:29:44 +00004415static void s2io_handle_errors(void *dev_id)
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004416{
Joe Perchesd44570e2009-08-24 17:29:44 +00004417 struct net_device *dev = (struct net_device *)dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004418 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004419 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Joe Perchesd44570e2009-08-24 17:29:44 +00004420 u64 temp64 = 0, val64 = 0;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004421 int i = 0;
4422
4423 struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
4424 struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;
4425
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004426 if (!is_s2io_card_up(sp))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004427 return;
4428
4429 if (pci_channel_offline(sp->pdev))
4430 return;
4431
4432 memset(&sw_stat->ring_full_cnt, 0,
Joe Perchesd44570e2009-08-24 17:29:44 +00004433 sizeof(sw_stat->ring_full_cnt));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004434
4435 /* Handling the XPAK counters update */
Joe Perchesd44570e2009-08-24 17:29:44 +00004436 if (stats->xpak_timer_count < 72000) {
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004437 /* waiting for an hour */
4438 stats->xpak_timer_count++;
4439 } else {
4440 s2io_updt_xpak_counter(dev);
4441 /* reset the count to zero */
4442 stats->xpak_timer_count = 0;
4443 }
4444
4445 /* Handling link status change error Intr */
4446 if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
4447 val64 = readq(&bar0->mac_rmac_err_reg);
4448 writeq(val64, &bar0->mac_rmac_err_reg);
4449 if (val64 & RMAC_LINK_STATE_CHANGE_INT)
4450 schedule_work(&sp->set_link_task);
4451 }
4452
4453 /* In case of a serious error, the device will be Reset. */
4454 if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
Joe Perchesd44570e2009-08-24 17:29:44 +00004455 &sw_stat->serious_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004456 goto reset;
4457
4458 /* Check for data parity error */
4459 if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
Joe Perchesd44570e2009-08-24 17:29:44 +00004460 &sw_stat->parity_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004461 goto reset;
4462
4463 /* Check for ring full counter */
4464 if (sp->device_type == XFRAME_II_DEVICE) {
4465 val64 = readq(&bar0->ring_bump_counter1);
Joe Perchesd44570e2009-08-24 17:29:44 +00004466 for (i = 0; i < 4; i++) {
4467 temp64 = (val64 & vBIT(0xFFFF, (i*16), 16));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004468 temp64 >>= 64 - ((i+1)*16);
4469 sw_stat->ring_full_cnt[i] += temp64;
4470 }
4471
4472 val64 = readq(&bar0->ring_bump_counter2);
Joe Perchesd44570e2009-08-24 17:29:44 +00004473 for (i = 0; i < 4; i++) {
4474 temp64 = (val64 & vBIT(0xFFFF, (i*16), 16));
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004475 temp64 >>= 64 - ((i+1)*16);
Joe Perchesd44570e2009-08-24 17:29:44 +00004476 sw_stat->ring_full_cnt[i+4] += temp64;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004477 }
4478 }
4479
4480 val64 = readq(&bar0->txdma_int_status);
4481 /*check for pfc_err*/
4482 if (val64 & TXDMA_PFC_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004483 if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
4484 PFC_MISC_0_ERR | PFC_MISC_1_ERR |
4485 PFC_PCIX_ERR,
4486 &bar0->pfc_err_reg,
4487 &sw_stat->pfc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004488 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004489 do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR,
4490 &bar0->pfc_err_reg,
4491 &sw_stat->pfc_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004492 }
4493
4494 /*check for tda_err*/
4495 if (val64 & TXDMA_TDA_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004496 if (do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR |
4497 TDA_SM0_ERR_ALARM |
4498 TDA_SM1_ERR_ALARM,
4499 &bar0->tda_err_reg,
4500 &sw_stat->tda_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004501 goto reset;
4502 do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004503 &bar0->tda_err_reg,
4504 &sw_stat->tda_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004505 }
4506 /*check for pcc_err*/
4507 if (val64 & TXDMA_PCC_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004508 if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
4509 PCC_N_SERR | PCC_6_COF_OV_ERR |
4510 PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
4511 PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR |
4512 PCC_TXB_ECC_DB_ERR,
4513 &bar0->pcc_err_reg,
4514 &sw_stat->pcc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004515 goto reset;
4516 do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004517 &bar0->pcc_err_reg,
4518 &sw_stat->pcc_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004519 }
4520
4521 /*check for tti_err*/
4522 if (val64 & TXDMA_TTI_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004523 if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM,
4524 &bar0->tti_err_reg,
4525 &sw_stat->tti_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004526 goto reset;
4527 do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004528 &bar0->tti_err_reg,
4529 &sw_stat->tti_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004530 }
4531
4532 /*check for lso_err*/
4533 if (val64 & TXDMA_LSO_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004534 if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT |
4535 LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
4536 &bar0->lso_err_reg,
4537 &sw_stat->lso_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004538 goto reset;
4539 do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
Joe Perchesd44570e2009-08-24 17:29:44 +00004540 &bar0->lso_err_reg,
4541 &sw_stat->lso_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004542 }
4543
4544 /*check for tpa_err*/
4545 if (val64 & TXDMA_TPA_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004546 if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM,
4547 &bar0->tpa_err_reg,
4548 &sw_stat->tpa_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004549 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004550 do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP,
4551 &bar0->tpa_err_reg,
4552 &sw_stat->tpa_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004553 }
4554
4555 /*check for sm_err*/
4556 if (val64 & TXDMA_SM_INT) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004557 if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM,
4558 &bar0->sm_err_reg,
4559 &sw_stat->sm_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004560 goto reset;
4561 }
4562
4563 val64 = readq(&bar0->mac_int_status);
4564 if (val64 & MAC_INT_STATUS_TMAC_INT) {
4565 if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004566 &bar0->mac_tmac_err_reg,
4567 &sw_stat->mac_tmac_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004568 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004569 do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
4570 TMAC_DESC_ECC_SG_ERR |
4571 TMAC_DESC_ECC_DB_ERR,
4572 &bar0->mac_tmac_err_reg,
4573 &sw_stat->mac_tmac_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004574 }
4575
4576 val64 = readq(&bar0->xgxs_int_status);
4577 if (val64 & XGXS_INT_STATUS_TXGXS) {
4578 if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004579 &bar0->xgxs_txgxs_err_reg,
4580 &sw_stat->xgxs_txgxs_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004581 goto reset;
4582 do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004583 &bar0->xgxs_txgxs_err_reg,
4584 &sw_stat->xgxs_txgxs_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004585 }
4586
4587 val64 = readq(&bar0->rxdma_int_status);
4588 if (val64 & RXDMA_INT_RC_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004589 if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR |
4590 RC_FTC_ECC_DB_ERR |
4591 RC_PRCn_SM_ERR_ALARM |
4592 RC_FTC_SM_ERR_ALARM,
4593 &bar0->rc_err_reg,
4594 &sw_stat->rc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004595 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004596 do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR |
4597 RC_FTC_ECC_SG_ERR |
4598 RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
4599 &sw_stat->rc_err_cnt);
4600 if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn |
4601 PRC_PCI_AB_WR_Rn |
4602 PRC_PCI_AB_F_WR_Rn,
4603 &bar0->prc_pcix_err_reg,
4604 &sw_stat->prc_pcix_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004605 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004606 do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn |
4607 PRC_PCI_DP_WR_Rn |
4608 PRC_PCI_DP_F_WR_Rn,
4609 &bar0->prc_pcix_err_reg,
4610 &sw_stat->prc_pcix_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004611 }
4612
4613 if (val64 & RXDMA_INT_RPA_INT_M) {
4614 if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004615 &bar0->rpa_err_reg,
4616 &sw_stat->rpa_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004617 goto reset;
4618 do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004619 &bar0->rpa_err_reg,
4620 &sw_stat->rpa_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004621 }
4622
4623 if (val64 & RXDMA_INT_RDA_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004624 if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR |
4625 RDA_FRM_ECC_DB_N_AERR |
4626 RDA_SM1_ERR_ALARM |
4627 RDA_SM0_ERR_ALARM |
4628 RDA_RXD_ECC_DB_SERR,
4629 &bar0->rda_err_reg,
4630 &sw_stat->rda_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004631 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004632 do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR |
4633 RDA_FRM_ECC_SG_ERR |
4634 RDA_MISC_ERR |
4635 RDA_PCIX_ERR,
4636 &bar0->rda_err_reg,
4637 &sw_stat->rda_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004638 }
4639
4640 if (val64 & RXDMA_INT_RTI_INT_M) {
Joe Perchesd44570e2009-08-24 17:29:44 +00004641 if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM,
4642 &bar0->rti_err_reg,
4643 &sw_stat->rti_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004644 goto reset;
4645 do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004646 &bar0->rti_err_reg,
4647 &sw_stat->rti_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004648 }
4649
4650 val64 = readq(&bar0->mac_int_status);
4651 if (val64 & MAC_INT_STATUS_RMAC_INT) {
4652 if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004653 &bar0->mac_rmac_err_reg,
4654 &sw_stat->mac_rmac_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004655 goto reset;
Joe Perchesd44570e2009-08-24 17:29:44 +00004656 do_s2io_chk_alarm_bit(RMAC_UNUSED_INT |
4657 RMAC_SINGLE_ECC_ERR |
4658 RMAC_DOUBLE_ECC_ERR,
4659 &bar0->mac_rmac_err_reg,
4660 &sw_stat->mac_rmac_err_cnt);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004661 }
4662
4663 val64 = readq(&bar0->xgxs_int_status);
4664 if (val64 & XGXS_INT_STATUS_RXGXS) {
4665 if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
Joe Perchesd44570e2009-08-24 17:29:44 +00004666 &bar0->xgxs_rxgxs_err_reg,
4667 &sw_stat->xgxs_rxgxs_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004668 goto reset;
4669 }
4670
4671 val64 = readq(&bar0->mc_int_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00004672 if (val64 & MC_INT_STATUS_MC_INT) {
4673 if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR,
4674 &bar0->mc_err_reg,
4675 &sw_stat->mc_err_cnt))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004676 goto reset;
4677
4678 /* Handling Ecc errors */
4679 if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
4680 writeq(val64, &bar0->mc_err_reg);
4681 if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
4682 sw_stat->double_ecc_errs++;
4683 if (sp->device_type != XFRAME_II_DEVICE) {
4684 /*
4685 * Reset XframeI only if critical error
4686 */
4687 if (val64 &
Joe Perchesd44570e2009-08-24 17:29:44 +00004688 (MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
4689 MC_ERR_REG_MIRI_ECC_DB_ERR_1))
4690 goto reset;
4691 }
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004692 } else
4693 sw_stat->single_ecc_errs++;
4694 }
4695 }
4696 return;
4697
4698reset:
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004699 s2io_stop_all_tx_queue(sp);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004700 schedule_work(&sp->rst_timer_task);
4701 sw_stat->soft_reset_cnt++;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004702}
4703
4704/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07004705 * s2io_isr - ISR handler of the device .
4706 * @irq: the irq of the device.
4707 * @dev_id: a void pointer to the dev structure of the NIC.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004708 * Description: This function is the ISR handler of the device. It
4709 * identifies the reason for the interrupt and calls the relevant
4710 * service routines. As a contongency measure, this ISR allocates the
Linus Torvalds1da177e2005-04-16 15:20:36 -07004711 * recv buffers, if their numbers are below the panic value which is
4712 * presently set to 25% of the original number of rcv buffers allocated.
4713 * Return value:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004714 * IRQ_HANDLED: will be returned if IRQ was handled by this routine
Linus Torvalds1da177e2005-04-16 15:20:36 -07004715 * IRQ_NONE: will be returned if interrupt is not from our device
4716 */
David Howells7d12e782006-10-05 14:55:46 +01004717static irqreturn_t s2io_isr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004718{
Joe Perchesd44570e2009-08-24 17:29:44 +00004719 struct net_device *dev = (struct net_device *)dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004720 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004721 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004722 int i;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004723 u64 reason = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004724 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004725 struct config_param *config;
4726
Linas Vepstasd796fdb2007-05-14 18:37:30 -05004727 /* Pretend we handled any irq's from a disconnected card */
4728 if (pci_channel_offline(sp->pdev))
4729 return IRQ_NONE;
4730
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004731 if (!is_s2io_card_up(sp))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004732 return IRQ_NONE;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004733
Linus Torvalds1da177e2005-04-16 15:20:36 -07004734 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00004735 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004736
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004737 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07004738 * Identify the cause for interrupt and call the appropriate
4739 * interrupt handler. Causes for the interrupt could be;
4740 * 1. Rx of packet.
4741 * 2. Tx complete.
4742 * 3. Link down.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004743 */
4744 reason = readq(&bar0->general_int_status);
4745
Joe Perchesd44570e2009-08-24 17:29:44 +00004746 if (unlikely(reason == S2IO_MINUS_ONE))
4747 return IRQ_HANDLED; /* Nothing much can be done. Get out */
Linus Torvalds1da177e2005-04-16 15:20:36 -07004748
Joe Perchesd44570e2009-08-24 17:29:44 +00004749 if (reason &
4750 (GEN_INTR_RXTRAFFIC | GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC)) {
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004751 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
4752
4753 if (config->napi) {
4754 if (reason & GEN_INTR_RXTRAFFIC) {
Ben Hutchings288379f2009-01-19 16:43:59 -08004755 napi_schedule(&sp->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004756 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
4757 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4758 readl(&bar0->rx_traffic_int);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004759 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004760 } else {
4761 /*
4762 * rx_traffic_int reg is an R1 register, writing all 1's
4763 * will ensure that the actual interrupt causing bit
4764 * get's cleared and hence a read can be avoided.
4765 */
4766 if (reason & GEN_INTR_RXTRAFFIC)
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004767 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004768
Joe Perches13d866a2009-08-24 17:29:41 +00004769 for (i = 0; i < config->rx_ring_num; i++) {
4770 struct ring_info *ring = &mac_control->rings[i];
4771
4772 rx_intr_handler(ring, 0);
4773 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004774 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004775
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004776 /*
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004777 * tx_traffic_int reg is an R1 register, writing all 1's
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004778 * will ensure that the actual interrupt causing bit get's
4779 * cleared and hence a read can be avoided.
4780 */
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004781 if (reason & GEN_INTR_TXTRAFFIC)
4782 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004783
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004784 for (i = 0; i < config->tx_fifo_num; i++)
4785 tx_intr_handler(&mac_control->fifos[i]);
4786
4787 if (reason & GEN_INTR_TXPIC)
4788 s2io_txpic_intr_handle(sp);
4789
4790 /*
4791 * Reallocate the buffers from the interrupt handler itself.
4792 */
4793 if (!config->napi) {
Joe Perches13d866a2009-08-24 17:29:41 +00004794 for (i = 0; i < config->rx_ring_num; i++) {
4795 struct ring_info *ring = &mac_control->rings[i];
4796
4797 s2io_chk_rx_buffers(sp, ring);
4798 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004799 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004800 writeq(sp->general_int_mask, &bar0->general_int_mask);
4801 readl(&bar0->general_int_status);
4802
4803 return IRQ_HANDLED;
4804
Joe Perchesd44570e2009-08-24 17:29:44 +00004805 } else if (!reason) {
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004806 /* The interrupt was not raised by us */
4807 return IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004808 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004809
Linus Torvalds1da177e2005-04-16 15:20:36 -07004810 return IRQ_HANDLED;
4811}
4812
4813/**
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004814 * s2io_updt_stats -
4815 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004816static void s2io_updt_stats(struct s2io_nic *sp)
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004817{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004818 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004819 u64 val64;
4820 int cnt = 0;
4821
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004822 if (is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004823 /* Apprx 30us on a 133 MHz bus */
4824 val64 = SET_UPDT_CLICKS(10) |
4825 STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
4826 writeq(val64, &bar0->stat_cfg);
4827 do {
4828 udelay(100);
4829 val64 = readq(&bar0->stat_cfg);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07004830 if (!(val64 & s2BIT(0)))
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004831 break;
4832 cnt++;
4833 if (cnt == 5)
4834 break; /* Updt failed */
Joe Perchesd44570e2009-08-24 17:29:44 +00004835 } while (1);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04004836 }
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004837}
4838
4839/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004840 * s2io_get_stats - Updates the device statistics structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004841 * @dev : pointer to the device structure.
4842 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004843 * This function updates the device statistics structure in the s2io_nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07004844 * structure and returns a pointer to the same.
4845 * Return value:
4846 * pointer to the updated net_device_stats structure.
4847 */
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004848static struct net_device_stats *s2io_get_stats(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004849{
Wang Chen4cf16532008-11-12 23:38:14 -08004850 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00004851 struct mac_info *mac_control = &sp->mac_control;
4852 struct stat_block *stats = mac_control->stats_info;
Jon Mason4a490432010-07-02 09:13:49 +00004853 u64 delta;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004854
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004855 /* Configure Stats for immediate updt */
4856 s2io_updt_stats(sp);
4857
Jon Mason4a490432010-07-02 09:13:49 +00004858 /* A device reset will cause the on-adapter statistics to be zero'ed.
4859 * This can be done while running by changing the MTU. To prevent the
4860 * system from having the stats zero'ed, the driver keeps a copy of the
4861 * last update to the system (which is also zero'ed on reset). This
4862 * enables the driver to accurately know the delta between the last
4863 * update and the current update.
4864 */
4865 delta = ((u64) le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 |
4866 le32_to_cpu(stats->rmac_vld_frms)) - sp->stats.rx_packets;
4867 sp->stats.rx_packets += delta;
4868 dev->stats.rx_packets += delta;
Joe Perchesffb5df62009-08-24 17:29:47 +00004869
Jon Mason4a490432010-07-02 09:13:49 +00004870 delta = ((u64) le32_to_cpu(stats->tmac_frms_oflow) << 32 |
4871 le32_to_cpu(stats->tmac_frms)) - sp->stats.tx_packets;
4872 sp->stats.tx_packets += delta;
4873 dev->stats.tx_packets += delta;
Joe Perchesffb5df62009-08-24 17:29:47 +00004874
Jon Mason4a490432010-07-02 09:13:49 +00004875 delta = ((u64) le32_to_cpu(stats->rmac_data_octets_oflow) << 32 |
4876 le32_to_cpu(stats->rmac_data_octets)) - sp->stats.rx_bytes;
4877 sp->stats.rx_bytes += delta;
4878 dev->stats.rx_bytes += delta;
Joe Perchesffb5df62009-08-24 17:29:47 +00004879
Jon Mason4a490432010-07-02 09:13:49 +00004880 delta = ((u64) le32_to_cpu(stats->tmac_data_octets_oflow) << 32 |
4881 le32_to_cpu(stats->tmac_data_octets)) - sp->stats.tx_bytes;
4882 sp->stats.tx_bytes += delta;
4883 dev->stats.tx_bytes += delta;
Joe Perchesffb5df62009-08-24 17:29:47 +00004884
Jon Mason4a490432010-07-02 09:13:49 +00004885 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_errors;
4886 sp->stats.rx_errors += delta;
4887 dev->stats.rx_errors += delta;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004888
Jon Mason4a490432010-07-02 09:13:49 +00004889 delta = ((u64) le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 |
4890 le32_to_cpu(stats->tmac_any_err_frms)) - sp->stats.tx_errors;
4891 sp->stats.tx_errors += delta;
4892 dev->stats.tx_errors += delta;
Joe Perches13d866a2009-08-24 17:29:41 +00004893
Jon Mason4a490432010-07-02 09:13:49 +00004894 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_dropped;
4895 sp->stats.rx_dropped += delta;
4896 dev->stats.rx_dropped += delta;
4897
4898 delta = le64_to_cpu(stats->tmac_drop_frms) - sp->stats.tx_dropped;
4899 sp->stats.tx_dropped += delta;
4900 dev->stats.tx_dropped += delta;
4901
4902 /* The adapter MAC interprets pause frames as multicast packets, but
4903 * does not pass them up. This erroneously increases the multicast
4904 * packet count and needs to be deducted when the multicast frame count
4905 * is queried.
4906 */
4907 delta = (u64) le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 |
4908 le32_to_cpu(stats->rmac_vld_mcst_frms);
4909 delta -= le64_to_cpu(stats->rmac_pause_ctrl_frms);
4910 delta -= sp->stats.multicast;
4911 sp->stats.multicast += delta;
4912 dev->stats.multicast += delta;
4913
4914 delta = ((u64) le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 |
4915 le32_to_cpu(stats->rmac_usized_frms)) +
4916 le64_to_cpu(stats->rmac_long_frms) - sp->stats.rx_length_errors;
4917 sp->stats.rx_length_errors += delta;
4918 dev->stats.rx_length_errors += delta;
4919
4920 delta = le64_to_cpu(stats->rmac_fcs_err_frms) - sp->stats.rx_crc_errors;
4921 sp->stats.rx_crc_errors += delta;
4922 dev->stats.rx_crc_errors += delta;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004923
Joe Perchesd44570e2009-08-24 17:29:44 +00004924 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004925}
4926
4927/**
4928 * s2io_set_multicast - entry point for multicast address enable/disable.
4929 * @dev : pointer to the device structure
4930 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004931 * This function is a driver entry point which gets called by the kernel
4932 * whenever multicast addresses must be enabled/disabled. This also gets
Linus Torvalds1da177e2005-04-16 15:20:36 -07004933 * called to set/reset promiscuous mode. Depending on the deivce flag, we
4934 * determine, if multicast address must be enabled or if promiscuous mode
4935 * is to be disabled etc.
4936 * Return value:
4937 * void.
4938 */
4939
4940static void s2io_set_multicast(struct net_device *dev)
4941{
4942 int i, j, prev_cnt;
Jiri Pirko22bedad2010-04-01 21:22:57 +00004943 struct netdev_hw_addr *ha;
Wang Chen4cf16532008-11-12 23:38:14 -08004944 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004945 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004946 u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
Joe Perchesd44570e2009-08-24 17:29:44 +00004947 0xfeffffffffffULL;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004948 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004949 void __iomem *add;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004950 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004951
4952 if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
4953 /* Enable all Multicast addresses */
4954 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
4955 &bar0->rmac_addr_data0_mem);
4956 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
4957 &bar0->rmac_addr_data1_mem);
4958 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00004959 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4960 RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004961 writeq(val64, &bar0->rmac_addr_cmd_mem);
4962 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004963 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00004964 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
4965 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004966
4967 sp->m_cast_flg = 1;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004968 sp->all_multi_pos = config->max_mc_addr - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004969 } else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
4970 /* Disable all Multicast addresses */
4971 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
4972 &bar0->rmac_addr_data0_mem);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07004973 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
4974 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004975 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00004976 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4977 RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004978 writeq(val64, &bar0->rmac_addr_cmd_mem);
4979 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004980 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00004981 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
4982 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004983
4984 sp->m_cast_flg = 0;
4985 sp->all_multi_pos = 0;
4986 }
4987
4988 if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
4989 /* Put the NIC into promiscuous mode */
4990 add = &bar0->mac_cfg;
4991 val64 = readq(&bar0->mac_cfg);
4992 val64 |= MAC_CFG_RMAC_PROM_ENABLE;
4993
4994 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00004995 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004996 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
4997 writel((u32) (val64 >> 32), (add + 4));
4998
Sivakumar Subramani926930b2007-02-24 01:59:39 -05004999 if (vlan_tag_strip != 1) {
5000 val64 = readq(&bar0->rx_pa_cfg);
5001 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
5002 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005003 sp->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005004 }
5005
Linus Torvalds1da177e2005-04-16 15:20:36 -07005006 val64 = readq(&bar0->mac_cfg);
5007 sp->promisc_flg = 1;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07005008 DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005009 dev->name);
5010 } else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
5011 /* Remove the NIC from promiscuous mode */
5012 add = &bar0->mac_cfg;
5013 val64 = readq(&bar0->mac_cfg);
5014 val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;
5015
5016 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
Joe Perchesd44570e2009-08-24 17:29:44 +00005017 writel((u32)val64, add);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005018 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5019 writel((u32) (val64 >> 32), (add + 4));
5020
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005021 if (vlan_tag_strip != 0) {
5022 val64 = readq(&bar0->rx_pa_cfg);
5023 val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
5024 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005025 sp->vlan_strip_flag = 1;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005026 }
5027
Linus Torvalds1da177e2005-04-16 15:20:36 -07005028 val64 = readq(&bar0->mac_cfg);
5029 sp->promisc_flg = 0;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005030 DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005031 }
5032
5033 /* Update individual M_CAST address list */
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00005034 if ((!sp->m_cast_flg) && netdev_mc_count(dev)) {
5035 if (netdev_mc_count(dev) >
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005036 (config->max_mc_addr - config->max_mac_addr)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005037 DBG_PRINT(ERR_DBG,
5038 "%s: No more Rx filters can be added - "
5039 "please enable ALL_MULTI instead\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005040 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005041 return;
5042 }
5043
5044 prev_cnt = sp->mc_addr_count;
Jiri Pirko4cd24ea2010-02-08 04:30:35 +00005045 sp->mc_addr_count = netdev_mc_count(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005046
5047 /* Clear out the previous list of Mc in the H/W. */
5048 for (i = 0; i < prev_cnt; i++) {
5049 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
5050 &bar0->rmac_addr_data0_mem);
5051 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
Joe Perchesd44570e2009-08-24 17:29:44 +00005052 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005053 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00005054 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5055 RMAC_ADDR_CMD_MEM_OFFSET
5056 (config->mc_start_offset + i);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005057 writeq(val64, &bar0->rmac_addr_cmd_mem);
5058
5059 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005060 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005061 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5062 S2IO_BIT_RESET)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005063 DBG_PRINT(ERR_DBG,
5064 "%s: Adding Multicasts failed\n",
5065 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005066 return;
5067 }
5068 }
5069
5070 /* Create the new Rx filter list and update the same in H/W. */
Jiri Pirko55085902010-02-18 00:42:54 +00005071 i = 0;
Jiri Pirko22bedad2010-04-01 21:22:57 +00005072 netdev_for_each_mc_addr(ha, dev) {
Jeff Garzika7a80d52006-03-04 12:06:51 -05005073 mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005074 for (j = 0; j < ETH_ALEN; j++) {
Jiri Pirko22bedad2010-04-01 21:22:57 +00005075 mac_addr |= ha->addr[j];
Linus Torvalds1da177e2005-04-16 15:20:36 -07005076 mac_addr <<= 8;
5077 }
5078 mac_addr >>= 8;
5079 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
5080 &bar0->rmac_addr_data0_mem);
5081 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
Joe Perchesd44570e2009-08-24 17:29:44 +00005082 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005083 val64 = RMAC_ADDR_CMD_MEM_WE |
Joe Perchesd44570e2009-08-24 17:29:44 +00005084 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5085 RMAC_ADDR_CMD_MEM_OFFSET
5086 (i + config->mc_start_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005087 writeq(val64, &bar0->rmac_addr_cmd_mem);
5088
5089 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005090 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005091 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5092 S2IO_BIT_RESET)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00005093 DBG_PRINT(ERR_DBG,
5094 "%s: Adding Multicasts failed\n",
5095 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005096 return;
5097 }
Jiri Pirko55085902010-02-18 00:42:54 +00005098 i++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005099 }
5100 }
5101}
5102
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005103/* read from CAM unicast & multicast addresses and store it in
5104 * def_mac_addr structure
5105 */
Hannes Ederdac499f2008-12-25 23:56:45 -08005106static void do_s2io_store_unicast_mc(struct s2io_nic *sp)
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005107{
5108 int offset;
5109 u64 mac_addr = 0x0;
5110 struct config_param *config = &sp->config;
5111
5112 /* store unicast & multicast mac addresses */
5113 for (offset = 0; offset < config->max_mc_addr; offset++) {
5114 mac_addr = do_s2io_read_unicast_mc(sp, offset);
5115 /* if read fails disable the entry */
5116 if (mac_addr == FAILURE)
5117 mac_addr = S2IO_DISABLE_MAC_ENTRY;
5118 do_s2io_copy_mac_addr(sp, offset, mac_addr);
5119 }
5120}
5121
5122/* restore unicast & multicast MAC to CAM from def_mac_addr structure */
5123static void do_s2io_restore_unicast_mc(struct s2io_nic *sp)
5124{
5125 int offset;
5126 struct config_param *config = &sp->config;
5127 /* restore unicast mac address */
5128 for (offset = 0; offset < config->max_mac_addr; offset++)
5129 do_s2io_prog_unicast(sp->dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005130 sp->def_mac_addr[offset].mac_addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005131
5132 /* restore multicast mac address */
5133 for (offset = config->mc_start_offset;
Joe Perchesd44570e2009-08-24 17:29:44 +00005134 offset < config->max_mc_addr; offset++)
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005135 do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr);
5136}
5137
5138/* add a multicast MAC address to CAM */
5139static int do_s2io_add_mc(struct s2io_nic *sp, u8 *addr)
5140{
5141 int i;
5142 u64 mac_addr = 0;
5143 struct config_param *config = &sp->config;
5144
5145 for (i = 0; i < ETH_ALEN; i++) {
5146 mac_addr <<= 8;
5147 mac_addr |= addr[i];
5148 }
5149 if ((0ULL == mac_addr) || (mac_addr == S2IO_DISABLE_MAC_ENTRY))
5150 return SUCCESS;
5151
5152 /* check if the multicast mac already preset in CAM */
5153 for (i = config->mc_start_offset; i < config->max_mc_addr; i++) {
5154 u64 tmp64;
5155 tmp64 = do_s2io_read_unicast_mc(sp, i);
5156 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5157 break;
5158
5159 if (tmp64 == mac_addr)
5160 return SUCCESS;
5161 }
5162 if (i == config->max_mc_addr) {
5163 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00005164 "CAM full no space left for multicast MAC\n");
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005165 return FAILURE;
5166 }
5167 /* Update the internal structure with this new mac address */
5168 do_s2io_copy_mac_addr(sp, i, mac_addr);
5169
Joe Perchesd44570e2009-08-24 17:29:44 +00005170 return do_s2io_add_mac(sp, mac_addr, i);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005171}
5172
5173/* add MAC address to CAM */
5174static int do_s2io_add_mac(struct s2io_nic *sp, u64 addr, int off)
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005175{
5176 u64 val64;
5177 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5178
5179 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr),
Joe Perchesd44570e2009-08-24 17:29:44 +00005180 &bar0->rmac_addr_data0_mem);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005181
Joe Perchesd44570e2009-08-24 17:29:44 +00005182 val64 = RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005183 RMAC_ADDR_CMD_MEM_OFFSET(off);
5184 writeq(val64, &bar0->rmac_addr_cmd_mem);
5185
5186 /* Wait till command completes */
5187 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005188 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5189 S2IO_BIT_RESET)) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005190 DBG_PRINT(INFO_DBG, "do_s2io_add_mac failed\n");
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005191 return FAILURE;
5192 }
5193 return SUCCESS;
5194}
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005195/* deletes a specified unicast/multicast mac entry from CAM */
5196static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr)
5197{
5198 int offset;
5199 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, tmp64;
5200 struct config_param *config = &sp->config;
5201
5202 for (offset = 1;
Joe Perchesd44570e2009-08-24 17:29:44 +00005203 offset < config->max_mc_addr; offset++) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005204 tmp64 = do_s2io_read_unicast_mc(sp, offset);
5205 if (tmp64 == addr) {
5206 /* disable the entry by writing 0xffffffffffffULL */
5207 if (do_s2io_add_mac(sp, dis_addr, offset) == FAILURE)
5208 return FAILURE;
5209 /* store the new mac list from CAM */
5210 do_s2io_store_unicast_mc(sp);
5211 return SUCCESS;
5212 }
5213 }
5214 DBG_PRINT(ERR_DBG, "MAC address 0x%llx not found in CAM\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00005215 (unsigned long long)addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005216 return FAILURE;
5217}
5218
5219/* read mac entries from CAM */
5220static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
5221{
5222 u64 tmp64 = 0xffffffffffff0000ULL, val64;
5223 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5224
5225 /* read mac addr */
Joe Perchesd44570e2009-08-24 17:29:44 +00005226 val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005227 RMAC_ADDR_CMD_MEM_OFFSET(offset);
5228 writeq(val64, &bar0->rmac_addr_cmd_mem);
5229
5230 /* Wait till command completes */
5231 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00005232 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5233 S2IO_BIT_RESET)) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005234 DBG_PRINT(INFO_DBG, "do_s2io_read_unicast_mc failed\n");
5235 return FAILURE;
5236 }
5237 tmp64 = readq(&bar0->rmac_addr_data0_mem);
Joe Perchesd44570e2009-08-24 17:29:44 +00005238
5239 return tmp64 >> 16;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005240}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005241
Linus Torvalds1da177e2005-04-16 15:20:36 -07005242/**
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005243 * s2io_set_mac_addr driver entry point
5244 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005245
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005246static int s2io_set_mac_addr(struct net_device *dev, void *p)
5247{
5248 struct sockaddr *addr = p;
5249
5250 if (!is_valid_ether_addr(addr->sa_data))
5251 return -EINVAL;
5252
5253 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
5254
5255 /* store the MAC address in CAM */
Joe Perchesd44570e2009-08-24 17:29:44 +00005256 return do_s2io_prog_unicast(dev, dev->dev_addr);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005257}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005258/**
5259 * do_s2io_prog_unicast - Programs the Xframe mac address
Linus Torvalds1da177e2005-04-16 15:20:36 -07005260 * @dev : pointer to the device structure.
5261 * @addr: a uchar pointer to the new mac address which is to be set.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005262 * Description : This procedure will program the Xframe to receive
Linus Torvalds1da177e2005-04-16 15:20:36 -07005263 * frames with new Mac Address
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005264 * Return value: SUCCESS on success and an appropriate (-)ve integer
Linus Torvalds1da177e2005-04-16 15:20:36 -07005265 * as defined in errno.h file on failure.
5266 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005267
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005268static int do_s2io_prog_unicast(struct net_device *dev, u8 *addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005269{
Wang Chen4cf16532008-11-12 23:38:14 -08005270 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005271 register u64 mac_addr = 0, perm_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005272 int i;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005273 u64 tmp64;
5274 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005275
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005276 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00005277 * Set the new MAC address as the new unicast filter and reflect this
5278 * change on the device address registered with the OS. It will be
5279 * at offset 0.
5280 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005281 for (i = 0; i < ETH_ALEN; i++) {
5282 mac_addr <<= 8;
5283 mac_addr |= addr[i];
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005284 perm_addr <<= 8;
5285 perm_addr |= sp->def_mac_addr[0].mac_addr[i];
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005286 }
5287
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005288 /* check if the dev_addr is different than perm_addr */
5289 if (mac_addr == perm_addr)
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005290 return SUCCESS;
5291
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005292 /* check if the mac already preset in CAM */
5293 for (i = 1; i < config->max_mac_addr; i++) {
5294 tmp64 = do_s2io_read_unicast_mc(sp, i);
5295 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5296 break;
5297
5298 if (tmp64 == mac_addr) {
5299 DBG_PRINT(INFO_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00005300 "MAC addr:0x%llx already present in CAM\n",
5301 (unsigned long long)mac_addr);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005302 return SUCCESS;
5303 }
5304 }
5305 if (i == config->max_mac_addr) {
5306 DBG_PRINT(ERR_DBG, "CAM full no space left for Unicast MAC\n");
5307 return FAILURE;
5308 }
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005309 /* Update the internal structure with this new mac address */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005310 do_s2io_copy_mac_addr(sp, i, mac_addr);
Joe Perchesd44570e2009-08-24 17:29:44 +00005311
5312 return do_s2io_add_mac(sp, mac_addr, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005313}
5314
5315/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005316 * s2io_ethtool_sset - Sets different link parameters.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005317 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
5318 * @info: pointer to the structure with parameters given by ethtool to set
5319 * link information.
5320 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005321 * The function sets different link parameters provided by the user onto
Linus Torvalds1da177e2005-04-16 15:20:36 -07005322 * the NIC.
5323 * Return value:
5324 * 0 on success.
Joe Perchesd44570e2009-08-24 17:29:44 +00005325 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005326
5327static int s2io_ethtool_sset(struct net_device *dev,
5328 struct ethtool_cmd *info)
5329{
Wang Chen4cf16532008-11-12 23:38:14 -08005330 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005331 if ((info->autoneg == AUTONEG_ENABLE) ||
David Decotigny25db0332011-04-27 18:32:39 +00005332 (ethtool_cmd_speed(info) != SPEED_10000) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00005333 (info->duplex != DUPLEX_FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005334 return -EINVAL;
5335 else {
5336 s2io_close(sp->dev);
5337 s2io_open(sp->dev);
5338 }
5339
5340 return 0;
5341}
5342
5343/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005344 * s2io_ethtol_gset - Return link specific information.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005345 * @sp : private member of the device structure, pointer to the
5346 * s2io_nic structure.
5347 * @info : pointer to the structure with parameters given by ethtool
5348 * to return link information.
5349 * Description:
5350 * Returns link specific information like speed, duplex etc.. to ethtool.
5351 * Return value :
5352 * return 0 on success.
5353 */
5354
5355static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
5356{
Wang Chen4cf16532008-11-12 23:38:14 -08005357 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005358 info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5359 info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5360 info->port = PORT_FIBRE;
Sivakumar Subramani1a7eb722007-09-14 07:43:16 -04005361
5362 /* info->transceiver */
5363 info->transceiver = XCVR_EXTERNAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005364
5365 if (netif_carrier_ok(sp->dev)) {
David Decotigny70739492011-04-27 18:32:40 +00005366 ethtool_cmd_speed_set(info, SPEED_10000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005367 info->duplex = DUPLEX_FULL;
5368 } else {
David Decotigny70739492011-04-27 18:32:40 +00005369 ethtool_cmd_speed_set(info, -1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005370 info->duplex = -1;
5371 }
5372
5373 info->autoneg = AUTONEG_DISABLE;
5374 return 0;
5375}
5376
5377/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005378 * s2io_ethtool_gdrvinfo - Returns driver specific information.
5379 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005380 * s2io_nic structure.
5381 * @info : pointer to the structure with parameters given by ethtool to
5382 * return driver information.
5383 * Description:
5384 * Returns driver specefic information like name, version etc.. to ethtool.
5385 * Return value:
5386 * void
5387 */
5388
5389static void s2io_ethtool_gdrvinfo(struct net_device *dev,
5390 struct ethtool_drvinfo *info)
5391{
Wang Chen4cf16532008-11-12 23:38:14 -08005392 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005393
John W. Linvilledbc23092005-09-28 17:50:51 -04005394 strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
5395 strncpy(info->version, s2io_driver_version, sizeof(info->version));
5396 strncpy(info->fw_version, "", sizeof(info->fw_version));
5397 strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
Linus Torvalds1da177e2005-04-16 15:20:36 -07005398 info->regdump_len = XENA_REG_SPACE;
5399 info->eedump_len = XENA_EEPROM_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005400}
5401
5402/**
5403 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005404 * @sp: private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005405 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005406 * @regs : pointer to the structure with parameters given by ethtool for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005407 * dumping the registers.
5408 * @reg_space: The input argumnet into which all the registers are dumped.
5409 * Description:
5410 * Dumps the entire register space of xFrame NIC into the user given
5411 * buffer area.
5412 * Return value :
5413 * void .
Joe Perchesd44570e2009-08-24 17:29:44 +00005414 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005415
5416static void s2io_ethtool_gregs(struct net_device *dev,
5417 struct ethtool_regs *regs, void *space)
5418{
5419 int i;
5420 u64 reg;
Joe Perchesd44570e2009-08-24 17:29:44 +00005421 u8 *reg_space = (u8 *)space;
Wang Chen4cf16532008-11-12 23:38:14 -08005422 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005423
5424 regs->len = XENA_REG_SPACE;
5425 regs->version = sp->pdev->subsystem_device;
5426
5427 for (i = 0; i < regs->len; i += 8) {
5428 reg = readq(sp->bar0 + i);
5429 memcpy((reg_space + i), &reg, 8);
5430 }
5431}
5432
stephen hemminger034e3452011-04-04 15:09:25 +00005433/*
5434 * s2io_set_led - control NIC led
Joe Perchesd44570e2009-08-24 17:29:44 +00005435 */
stephen hemminger034e3452011-04-04 15:09:25 +00005436static void s2io_set_led(struct s2io_nic *sp, bool on)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005437{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005438 struct XENA_dev_config __iomem *bar0 = sp->bar0;
stephen hemminger034e3452011-04-04 15:09:25 +00005439 u16 subid = sp->pdev->subsystem_device;
5440 u64 val64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005441
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005442 if ((sp->device_type == XFRAME_II_DEVICE) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00005443 ((subid & 0xFF) >= 0x07)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005444 val64 = readq(&bar0->gpio_control);
stephen hemminger034e3452011-04-04 15:09:25 +00005445 if (on)
5446 val64 |= GPIO_CTRL_GPIO_0;
5447 else
5448 val64 &= ~GPIO_CTRL_GPIO_0;
5449
Linus Torvalds1da177e2005-04-16 15:20:36 -07005450 writeq(val64, &bar0->gpio_control);
5451 } else {
5452 val64 = readq(&bar0->adapter_control);
stephen hemminger034e3452011-04-04 15:09:25 +00005453 if (on)
5454 val64 |= ADAPTER_LED_ON;
5455 else
5456 val64 &= ~ADAPTER_LED_ON;
5457
Linus Torvalds1da177e2005-04-16 15:20:36 -07005458 writeq(val64, &bar0->adapter_control);
5459 }
5460
Linus Torvalds1da177e2005-04-16 15:20:36 -07005461}
5462
5463/**
stephen hemminger034e3452011-04-04 15:09:25 +00005464 * s2io_ethtool_set_led - To physically identify the nic on the system.
5465 * @dev : network device
5466 * @state: led setting
5467 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005468 * Description: Used to physically identify the NIC on the system.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005469 * The Link LED will blink for a time specified by the user for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005470 * identification.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005471 * NOTE: The Link has to be Up to be able to blink the LED. Hence
Linus Torvalds1da177e2005-04-16 15:20:36 -07005472 * identification is possible only if it's link is up.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005473 */
5474
stephen hemminger034e3452011-04-04 15:09:25 +00005475static int s2io_ethtool_set_led(struct net_device *dev,
5476 enum ethtool_phys_id_state state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005477{
Wang Chen4cf16532008-11-12 23:38:14 -08005478 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005479 struct XENA_dev_config __iomem *bar0 = sp->bar0;
stephen hemminger034e3452011-04-04 15:09:25 +00005480 u16 subid = sp->pdev->subsystem_device;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005481
Joe Perchesd44570e2009-08-24 17:29:44 +00005482 if ((sp->device_type == XFRAME_I_DEVICE) && ((subid & 0xFF) < 0x07)) {
stephen hemminger034e3452011-04-04 15:09:25 +00005483 u64 val64 = readq(&bar0->adapter_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005484 if (!(val64 & ADAPTER_CNTL_EN)) {
Joe Perches6cef2b82009-08-24 17:29:45 +00005485 pr_err("Adapter Link down, cannot blink LED\n");
stephen hemminger034e3452011-04-04 15:09:25 +00005486 return -EAGAIN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005487 }
5488 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005489
stephen hemminger034e3452011-04-04 15:09:25 +00005490 switch (state) {
5491 case ETHTOOL_ID_ACTIVE:
5492 sp->adapt_ctrl_org = readq(&bar0->gpio_control);
Allan, Bruce Wfce55922011-04-13 13:09:10 +00005493 return 1; /* cycle on/off once per second */
stephen hemminger034e3452011-04-04 15:09:25 +00005494
5495 case ETHTOOL_ID_ON:
5496 s2io_set_led(sp, true);
5497 break;
5498
5499 case ETHTOOL_ID_OFF:
5500 s2io_set_led(sp, false);
5501 break;
5502
5503 case ETHTOOL_ID_INACTIVE:
5504 if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid))
5505 writeq(sp->adapt_ctrl_org, &bar0->gpio_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005506 }
5507
5508 return 0;
5509}
5510
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005511static void s2io_ethtool_gringparam(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005512 struct ethtool_ringparam *ering)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005513{
Wang Chen4cf16532008-11-12 23:38:14 -08005514 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesd44570e2009-08-24 17:29:44 +00005515 int i, tx_desc_count = 0, rx_desc_count = 0;
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005516
Jon Mason1853e2e2010-12-10 15:40:01 +00005517 if (sp->rxd_mode == RXD_MODE_1) {
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005518 ering->rx_max_pending = MAX_RX_DESC_1;
Jon Mason1853e2e2010-12-10 15:40:01 +00005519 ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
5520 } else {
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005521 ering->rx_max_pending = MAX_RX_DESC_2;
Jon Mason1853e2e2010-12-10 15:40:01 +00005522 ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
5523 }
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005524
5525 ering->rx_mini_max_pending = 0;
Jon Mason1853e2e2010-12-10 15:40:01 +00005526 ering->tx_max_pending = MAX_TX_DESC;
5527
5528 for (i = 0; i < sp->config.rx_ring_num; i++)
5529 rx_desc_count += sp->config.rx_cfg[i].num_rxd;
5530 ering->rx_pending = rx_desc_count;
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005531 ering->rx_jumbo_pending = rx_desc_count;
Jon Mason1853e2e2010-12-10 15:40:01 +00005532 ering->rx_mini_pending = 0;
5533
5534 for (i = 0; i < sp->config.tx_fifo_num; i++)
5535 tx_desc_count += sp->config.tx_cfg[i].fifo_len;
5536 ering->tx_pending = tx_desc_count;
5537 DBG_PRINT(INFO_DBG, "max txds: %d\n", sp->config.max_txds);
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005538}
5539
Linus Torvalds1da177e2005-04-16 15:20:36 -07005540/**
5541 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005542 * @sp : private member of the device structure, which is a pointer to the
5543 * s2io_nic structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005544 * @ep : pointer to the structure with pause parameters given by ethtool.
5545 * Description:
5546 * Returns the Pause frame generation and reception capability of the NIC.
5547 * Return value:
5548 * void
5549 */
5550static void s2io_ethtool_getpause_data(struct net_device *dev,
5551 struct ethtool_pauseparam *ep)
5552{
5553 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005554 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005555 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005556
5557 val64 = readq(&bar0->rmac_pause_cfg);
5558 if (val64 & RMAC_PAUSE_GEN_ENABLE)
Tobias Klauserf957bcf2009-06-04 23:07:59 +00005559 ep->tx_pause = true;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005560 if (val64 & RMAC_PAUSE_RX_ENABLE)
Tobias Klauserf957bcf2009-06-04 23:07:59 +00005561 ep->rx_pause = true;
5562 ep->autoneg = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005563}
5564
5565/**
5566 * s2io_ethtool_setpause_data - set/reset pause frame generation.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005567 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005568 * s2io_nic structure.
5569 * @ep : pointer to the structure with pause parameters given by ethtool.
5570 * Description:
5571 * It can be used to set or reset Pause frame generation or reception
5572 * support of the NIC.
5573 * Return value:
5574 * int, returns 0 on Success
5575 */
5576
5577static int s2io_ethtool_setpause_data(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005578 struct ethtool_pauseparam *ep)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005579{
5580 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005581 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005582 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005583
5584 val64 = readq(&bar0->rmac_pause_cfg);
5585 if (ep->tx_pause)
5586 val64 |= RMAC_PAUSE_GEN_ENABLE;
5587 else
5588 val64 &= ~RMAC_PAUSE_GEN_ENABLE;
5589 if (ep->rx_pause)
5590 val64 |= RMAC_PAUSE_RX_ENABLE;
5591 else
5592 val64 &= ~RMAC_PAUSE_RX_ENABLE;
5593 writeq(val64, &bar0->rmac_pause_cfg);
5594 return 0;
5595}
5596
5597/**
5598 * read_eeprom - reads 4 bytes of data from user given offset.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005599 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005600 * s2io_nic structure.
5601 * @off : offset at which the data must be written
5602 * @data : Its an output parameter where the data read at the given
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005603 * offset is stored.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005604 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005605 * Will read 4 bytes of data from the user given offset and return the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005606 * read data.
5607 * NOTE: Will allow to read only part of the EEPROM visible through the
5608 * I2C bus.
5609 * Return value:
5610 * -1 on failure and 0 on success.
5611 */
5612
5613#define S2IO_DEV_ID 5
Joe Perchesd44570e2009-08-24 17:29:44 +00005614static int read_eeprom(struct s2io_nic *sp, int off, u64 *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005615{
5616 int ret = -1;
5617 u32 exit_cnt = 0;
5618 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005619 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005620
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005621 if (sp->device_type == XFRAME_I_DEVICE) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005622 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) |
5623 I2C_CONTROL_ADDR(off) |
5624 I2C_CONTROL_BYTE_CNT(0x3) |
5625 I2C_CONTROL_READ |
5626 I2C_CONTROL_CNTL_START;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005627 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005628
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005629 while (exit_cnt < 5) {
5630 val64 = readq(&bar0->i2c_control);
5631 if (I2C_CONTROL_CNTL_END(val64)) {
5632 *data = I2C_CONTROL_GET_DATA(val64);
5633 ret = 0;
5634 break;
5635 }
5636 msleep(50);
5637 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005638 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005639 }
5640
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005641 if (sp->device_type == XFRAME_II_DEVICE) {
5642 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005643 SPI_CONTROL_BYTECNT(0x3) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005644 SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
5645 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5646 val64 |= SPI_CONTROL_REQ;
5647 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5648 while (exit_cnt < 5) {
5649 val64 = readq(&bar0->spi_control);
5650 if (val64 & SPI_CONTROL_NACK) {
5651 ret = 1;
5652 break;
5653 } else if (val64 & SPI_CONTROL_DONE) {
5654 *data = readq(&bar0->spi_data);
5655 *data &= 0xffffff;
5656 ret = 0;
5657 break;
5658 }
5659 msleep(50);
5660 exit_cnt++;
5661 }
5662 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005663 return ret;
5664}
5665
5666/**
5667 * write_eeprom - actually writes the relevant part of the data value.
5668 * @sp : private member of the device structure, which is a pointer to the
5669 * s2io_nic structure.
5670 * @off : offset at which the data must be written
5671 * @data : The data that is to be written
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005672 * @cnt : Number of bytes of the data that are actually to be written into
Linus Torvalds1da177e2005-04-16 15:20:36 -07005673 * the Eeprom. (max of 3)
5674 * Description:
5675 * Actually writes the relevant part of the data value into the Eeprom
5676 * through the I2C bus.
5677 * Return value:
5678 * 0 on success, -1 on failure.
5679 */
5680
Joe Perchesd44570e2009-08-24 17:29:44 +00005681static int write_eeprom(struct s2io_nic *sp, int off, u64 data, int cnt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005682{
5683 int exit_cnt = 0, ret = -1;
5684 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005685 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005686
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005687 if (sp->device_type == XFRAME_I_DEVICE) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005688 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) |
5689 I2C_CONTROL_ADDR(off) |
5690 I2C_CONTROL_BYTE_CNT(cnt) |
5691 I2C_CONTROL_SET_DATA((u32)data) |
5692 I2C_CONTROL_CNTL_START;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005693 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005694
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005695 while (exit_cnt < 5) {
5696 val64 = readq(&bar0->i2c_control);
5697 if (I2C_CONTROL_CNTL_END(val64)) {
5698 if (!(val64 & I2C_CONTROL_NACK))
5699 ret = 0;
5700 break;
5701 }
5702 msleep(50);
5703 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005704 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005705 }
5706
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005707 if (sp->device_type == XFRAME_II_DEVICE) {
5708 int write_cnt = (cnt == 8) ? 0 : cnt;
Joe Perchesd44570e2009-08-24 17:29:44 +00005709 writeq(SPI_DATA_WRITE(data, (cnt << 3)), &bar0->spi_data);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005710
5711 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005712 SPI_CONTROL_BYTECNT(write_cnt) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005713 SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
5714 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5715 val64 |= SPI_CONTROL_REQ;
5716 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5717 while (exit_cnt < 5) {
5718 val64 = readq(&bar0->spi_control);
5719 if (val64 & SPI_CONTROL_NACK) {
5720 ret = 1;
5721 break;
5722 } else if (val64 & SPI_CONTROL_DONE) {
5723 ret = 0;
5724 break;
5725 }
5726 msleep(50);
5727 exit_cnt++;
5728 }
5729 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005730 return ret;
5731}
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005732static void s2io_vpd_read(struct s2io_nic *nic)
Ananda Raju9dc737a2006-04-21 19:05:41 -04005733{
Ananda Rajub41477f2006-07-24 19:52:49 -04005734 u8 *vpd_data;
5735 u8 data;
Kulikov Vasiliy9c179782010-07-23 06:36:15 +00005736 int i = 0, cnt, len, fail = 0;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005737 int vpd_addr = 0x80;
Joe Perchesffb5df62009-08-24 17:29:47 +00005738 struct swStat *swstats = &nic->mac_control.stats_info->sw_stat;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005739
5740 if (nic->device_type == XFRAME_II_DEVICE) {
5741 strcpy(nic->product_name, "Xframe II 10GbE network adapter");
5742 vpd_addr = 0x80;
Joe Perchesd44570e2009-08-24 17:29:44 +00005743 } else {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005744 strcpy(nic->product_name, "Xframe I 10GbE network adapter");
5745 vpd_addr = 0x50;
5746 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005747 strcpy(nic->serial_num, "NOT AVAILABLE");
Ananda Raju9dc737a2006-04-21 19:05:41 -04005748
Ananda Rajub41477f2006-07-24 19:52:49 -04005749 vpd_data = kmalloc(256, GFP_KERNEL);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005750 if (!vpd_data) {
Joe Perchesffb5df62009-08-24 17:29:47 +00005751 swstats->mem_alloc_fail_cnt++;
Ananda Rajub41477f2006-07-24 19:52:49 -04005752 return;
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005753 }
Joe Perchesffb5df62009-08-24 17:29:47 +00005754 swstats->mem_allocated += 256;
Ananda Rajub41477f2006-07-24 19:52:49 -04005755
Joe Perchesd44570e2009-08-24 17:29:44 +00005756 for (i = 0; i < 256; i += 4) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005757 pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
5758 pci_read_config_byte(nic->pdev, (vpd_addr + 2), &data);
5759 pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
Joe Perchesd44570e2009-08-24 17:29:44 +00005760 for (cnt = 0; cnt < 5; cnt++) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005761 msleep(2);
5762 pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
5763 if (data == 0x80)
5764 break;
5765 }
5766 if (cnt >= 5) {
5767 DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
5768 fail = 1;
5769 break;
5770 }
5771 pci_read_config_dword(nic->pdev, (vpd_addr + 4),
5772 (u32 *)&vpd_data[i]);
5773 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005774
Joe Perchesd44570e2009-08-24 17:29:44 +00005775 if (!fail) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005776 /* read serial number of adapter */
Kulikov Vasiliy9c179782010-07-23 06:36:15 +00005777 for (cnt = 0; cnt < 252; cnt++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005778 if ((vpd_data[cnt] == 'S') &&
Kulikov Vasiliy9c179782010-07-23 06:36:15 +00005779 (vpd_data[cnt+1] == 'N')) {
5780 len = vpd_data[cnt+2];
5781 if (len < min(VPD_STRING_LEN, 256-cnt-2)) {
5782 memcpy(nic->serial_num,
5783 &vpd_data[cnt + 3],
5784 len);
5785 memset(nic->serial_num+len,
5786 0,
5787 VPD_STRING_LEN-len);
5788 break;
5789 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005790 }
5791 }
5792 }
5793
Kulikov Vasiliy9c179782010-07-23 06:36:15 +00005794 if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
5795 len = vpd_data[1];
5796 memcpy(nic->product_name, &vpd_data[3], len);
5797 nic->product_name[len] = 0;
5798 }
Ananda Rajub41477f2006-07-24 19:52:49 -04005799 kfree(vpd_data);
Joe Perchesffb5df62009-08-24 17:29:47 +00005800 swstats->mem_freed += 256;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005801}
5802
Linus Torvalds1da177e2005-04-16 15:20:36 -07005803/**
5804 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
5805 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005806 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005807 * containing all relevant information.
5808 * @data_buf : user defined value to be written into Eeprom.
5809 * Description: Reads the values stored in the Eeprom at given offset
5810 * for a given length. Stores these values int the input argument data
5811 * buffer 'data_buf' and returns these to the caller (ethtool.)
5812 * Return value:
5813 * int 0 on success
5814 */
5815
5816static int s2io_ethtool_geeprom(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00005817 struct ethtool_eeprom *eeprom, u8 * data_buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005818{
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005819 u32 i, valid;
5820 u64 data;
Wang Chen4cf16532008-11-12 23:38:14 -08005821 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005822
5823 eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);
5824
5825 if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
5826 eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;
5827
5828 for (i = 0; i < eeprom->len; i += 4) {
5829 if (read_eeprom(sp, (eeprom->offset + i), &data)) {
5830 DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
5831 return -EFAULT;
5832 }
5833 valid = INV(data);
5834 memcpy((data_buf + i), &valid, 4);
5835 }
5836 return 0;
5837}
5838
5839/**
5840 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
5841 * @sp : private member of the device structure, which is a pointer to the
5842 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005843 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005844 * containing all relevant information.
5845 * @data_buf ; user defined value to be written into Eeprom.
5846 * Description:
5847 * Tries to write the user provided value in the Eeprom, at the offset
5848 * given by the user.
5849 * Return value:
5850 * 0 on success, -EFAULT on failure.
5851 */
5852
5853static int s2io_ethtool_seeprom(struct net_device *dev,
5854 struct ethtool_eeprom *eeprom,
Joe Perchesd44570e2009-08-24 17:29:44 +00005855 u8 *data_buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005856{
5857 int len = eeprom->len, cnt = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005858 u64 valid = 0, data;
Wang Chen4cf16532008-11-12 23:38:14 -08005859 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005860
5861 if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
5862 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00005863 "ETHTOOL_WRITE_EEPROM Err: "
5864 "Magic value is wrong, it is 0x%x should be 0x%x\n",
5865 (sp->pdev->vendor | (sp->pdev->device << 16)),
5866 eeprom->magic);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005867 return -EFAULT;
5868 }
5869
5870 while (len) {
Joe Perchesd44570e2009-08-24 17:29:44 +00005871 data = (u32)data_buf[cnt] & 0x000000FF;
5872 if (data)
5873 valid = (u32)(data << 24);
5874 else
Linus Torvalds1da177e2005-04-16 15:20:36 -07005875 valid = data;
5876
5877 if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
5878 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00005879 "ETHTOOL_WRITE_EEPROM Err: "
5880 "Cannot write into the specified offset\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07005881 return -EFAULT;
5882 }
5883 cnt++;
5884 len--;
5885 }
5886
5887 return 0;
5888}
5889
5890/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005891 * s2io_register_test - reads and writes into all clock domains.
5892 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005893 * s2io_nic structure.
5894 * @data : variable that returns the result of each of the test conducted b
5895 * by the driver.
5896 * Description:
5897 * Read and write into all clock domains. The NIC has 3 clock domains,
5898 * see that registers in all the three regions are accessible.
5899 * Return value:
5900 * 0 on success.
5901 */
5902
Joe Perchesd44570e2009-08-24 17:29:44 +00005903static int s2io_register_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005904{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005905 struct XENA_dev_config __iomem *bar0 = sp->bar0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005906 u64 val64 = 0, exp_val;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005907 int fail = 0;
5908
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005909 val64 = readq(&bar0->pif_rd_swapper_fb);
5910 if (val64 != 0x123456789abcdefULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005911 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005912 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005913 }
5914
5915 val64 = readq(&bar0->rmac_pause_cfg);
5916 if (val64 != 0xc000ffff00000000ULL) {
5917 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005918 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005919 }
5920
5921 val64 = readq(&bar0->rx_queue_cfg);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005922 if (sp->device_type == XFRAME_II_DEVICE)
5923 exp_val = 0x0404040404040404ULL;
5924 else
5925 exp_val = 0x0808080808080808ULL;
5926 if (val64 != exp_val) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005927 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005928 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005929 }
5930
5931 val64 = readq(&bar0->xgxs_efifo_cfg);
5932 if (val64 != 0x000000001923141EULL) {
5933 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005934 DBG_PRINT(INFO_DBG, "Read Test level %d fails\n", 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005935 }
5936
5937 val64 = 0x5A5A5A5A5A5A5A5AULL;
5938 writeq(val64, &bar0->xmsi_data);
5939 val64 = readq(&bar0->xmsi_data);
5940 if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
5941 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005942 DBG_PRINT(ERR_DBG, "Write Test level %d fails\n", 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005943 }
5944
5945 val64 = 0xA5A5A5A5A5A5A5A5ULL;
5946 writeq(val64, &bar0->xmsi_data);
5947 val64 = readq(&bar0->xmsi_data);
5948 if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
5949 fail = 1;
Joe Perches9e39f7c2009-08-25 08:52:00 +00005950 DBG_PRINT(ERR_DBG, "Write Test level %d fails\n", 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005951 }
5952
5953 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005954 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005955}
5956
5957/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005958 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005959 * @sp : private member of the device structure, which is a pointer to the
5960 * s2io_nic structure.
5961 * @data:variable that returns the result of each of the test conducted by
5962 * the driver.
5963 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005964 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
Linus Torvalds1da177e2005-04-16 15:20:36 -07005965 * register.
5966 * Return value:
5967 * 0 on success.
5968 */
5969
Joe Perchesd44570e2009-08-24 17:29:44 +00005970static int s2io_eeprom_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005971{
5972 int fail = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005973 u64 ret_data, org_4F0, org_7F0;
5974 u8 saved_4F0 = 0, saved_7F0 = 0;
5975 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005976
5977 /* Test Write Error at offset 0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005978 /* Note that SPI interface allows write access to all areas
5979 * of EEPROM. Hence doing all negative testing only for Xframe I.
5980 */
5981 if (sp->device_type == XFRAME_I_DEVICE)
5982 if (!write_eeprom(sp, 0, 0, 3))
5983 fail = 1;
5984
5985 /* Save current values at offsets 0x4F0 and 0x7F0 */
5986 if (!read_eeprom(sp, 0x4F0, &org_4F0))
5987 saved_4F0 = 1;
5988 if (!read_eeprom(sp, 0x7F0, &org_7F0))
5989 saved_7F0 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005990
5991 /* Test Write at offset 4f0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005992 if (write_eeprom(sp, 0x4F0, 0x012345, 3))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005993 fail = 1;
5994 if (read_eeprom(sp, 0x4F0, &ret_data))
5995 fail = 1;
5996
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005997 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08005998 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
Joe Perchesd44570e2009-08-24 17:29:44 +00005999 "Data written %llx Data read %llx\n",
6000 dev->name, (unsigned long long)0x12345,
6001 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006002 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006003 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006004
6005 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006006 write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006007
6008 /* Test Write Request Error at offset 0x7c */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006009 if (sp->device_type == XFRAME_I_DEVICE)
6010 if (!write_eeprom(sp, 0x07C, 0, 3))
6011 fail = 1;
6012
6013 /* Test Write Request at offset 0x7f0 */
6014 if (write_eeprom(sp, 0x7F0, 0x012345, 3))
6015 fail = 1;
6016 if (read_eeprom(sp, 0x7F0, &ret_data))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006017 fail = 1;
6018
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006019 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08006020 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
Joe Perchesd44570e2009-08-24 17:29:44 +00006021 "Data written %llx Data read %llx\n",
6022 dev->name, (unsigned long long)0x12345,
6023 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006024 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006025 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006026
6027 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006028 write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006029
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006030 if (sp->device_type == XFRAME_I_DEVICE) {
6031 /* Test Write Error at offset 0x80 */
6032 if (!write_eeprom(sp, 0x080, 0, 3))
6033 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006034
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006035 /* Test Write Error at offset 0xfc */
6036 if (!write_eeprom(sp, 0x0FC, 0, 3))
6037 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006038
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006039 /* Test Write Error at offset 0x100 */
6040 if (!write_eeprom(sp, 0x100, 0, 3))
6041 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006042
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006043 /* Test Write Error at offset 4ec */
6044 if (!write_eeprom(sp, 0x4EC, 0, 3))
6045 fail = 1;
6046 }
6047
6048 /* Restore values at offsets 0x4F0 and 0x7F0 */
6049 if (saved_4F0)
6050 write_eeprom(sp, 0x4F0, org_4F0, 3);
6051 if (saved_7F0)
6052 write_eeprom(sp, 0x7F0, org_7F0, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006053
6054 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006055 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006056}
6057
6058/**
6059 * s2io_bist_test - invokes the MemBist test of the card .
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006060 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006061 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006062 * @data:variable that returns the result of each of the test conducted by
Linus Torvalds1da177e2005-04-16 15:20:36 -07006063 * the driver.
6064 * Description:
6065 * This invokes the MemBist test of the card. We give around
6066 * 2 secs time for the Test to complete. If it's still not complete
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006067 * within this peiod, we consider that the test failed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006068 * Return value:
6069 * 0 on success and -1 on failure.
6070 */
6071
Joe Perchesd44570e2009-08-24 17:29:44 +00006072static int s2io_bist_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006073{
6074 u8 bist = 0;
6075 int cnt = 0, ret = -1;
6076
6077 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6078 bist |= PCI_BIST_START;
6079 pci_write_config_word(sp->pdev, PCI_BIST, bist);
6080
6081 while (cnt < 20) {
6082 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6083 if (!(bist & PCI_BIST_START)) {
6084 *data = (bist & PCI_BIST_CODE_MASK);
6085 ret = 0;
6086 break;
6087 }
6088 msleep(100);
6089 cnt++;
6090 }
6091
6092 return ret;
6093}
6094
6095/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006096 * s2io-link_test - verifies the link state of the nic
6097 * @sp ; private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006098 * s2io_nic structure.
6099 * @data: variable that returns the result of each of the test conducted by
6100 * the driver.
6101 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006102 * The function verifies the link state of the NIC and updates the input
Linus Torvalds1da177e2005-04-16 15:20:36 -07006103 * argument 'data' appropriately.
6104 * Return value:
6105 * 0 on success.
6106 */
6107
Joe Perchesd44570e2009-08-24 17:29:44 +00006108static int s2io_link_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006109{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006110 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006111 u64 val64;
6112
6113 val64 = readq(&bar0->adapter_status);
Joe Perchesd44570e2009-08-24 17:29:44 +00006114 if (!(LINK_IS_UP(val64)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006115 *data = 1;
Ananda Rajuc92ca042006-04-21 19:18:03 -04006116 else
6117 *data = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006118
Ananda Rajub41477f2006-07-24 19:52:49 -04006119 return *data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006120}
6121
6122/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006123 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
6124 * @sp - private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006125 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006126 * @data - variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006127 * conducted by the driver.
6128 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006129 * This is one of the offline test that tests the read and write
Linus Torvalds1da177e2005-04-16 15:20:36 -07006130 * access to the RldRam chip on the NIC.
6131 * Return value:
6132 * 0 on success.
6133 */
6134
Joe Perchesd44570e2009-08-24 17:29:44 +00006135static int s2io_rldram_test(struct s2io_nic *sp, uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006136{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006137 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006138 u64 val64;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006139 int cnt, iteration = 0, test_fail = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006140
6141 val64 = readq(&bar0->adapter_control);
6142 val64 &= ~ADAPTER_ECC_EN;
6143 writeq(val64, &bar0->adapter_control);
6144
6145 val64 = readq(&bar0->mc_rldram_test_ctrl);
6146 val64 |= MC_RLDRAM_TEST_MODE;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006147 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006148
6149 val64 = readq(&bar0->mc_rldram_mrs);
6150 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
6151 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6152
6153 val64 |= MC_RLDRAM_MRS_ENABLE;
6154 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6155
6156 while (iteration < 2) {
6157 val64 = 0x55555555aaaa0000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006158 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006159 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006160 writeq(val64, &bar0->mc_rldram_test_d0);
6161
6162 val64 = 0xaaaa5a5555550000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006163 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006164 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006165 writeq(val64, &bar0->mc_rldram_test_d1);
6166
6167 val64 = 0x55aaaaaaaa5a0000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00006168 if (iteration == 1)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006169 val64 ^= 0xFFFFFFFFFFFF0000ULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006170 writeq(val64, &bar0->mc_rldram_test_d2);
6171
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006172 val64 = (u64) (0x0000003ffffe0100ULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006173 writeq(val64, &bar0->mc_rldram_test_add);
6174
Joe Perchesd44570e2009-08-24 17:29:44 +00006175 val64 = MC_RLDRAM_TEST_MODE |
6176 MC_RLDRAM_TEST_WRITE |
6177 MC_RLDRAM_TEST_GO;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006178 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006179
6180 for (cnt = 0; cnt < 5; cnt++) {
6181 val64 = readq(&bar0->mc_rldram_test_ctrl);
6182 if (val64 & MC_RLDRAM_TEST_DONE)
6183 break;
6184 msleep(200);
6185 }
6186
6187 if (cnt == 5)
6188 break;
6189
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006190 val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
6191 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006192
6193 for (cnt = 0; cnt < 5; cnt++) {
6194 val64 = readq(&bar0->mc_rldram_test_ctrl);
6195 if (val64 & MC_RLDRAM_TEST_DONE)
6196 break;
6197 msleep(500);
6198 }
6199
6200 if (cnt == 5)
6201 break;
6202
6203 val64 = readq(&bar0->mc_rldram_test_ctrl);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006204 if (!(val64 & MC_RLDRAM_TEST_PASS))
6205 test_fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006206
6207 iteration++;
6208 }
6209
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006210 *data = test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006211
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006212 /* Bring the adapter out of test mode */
6213 SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);
6214
6215 return test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006216}
6217
6218/**
6219 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
6220 * @sp : private member of the device structure, which is a pointer to the
6221 * s2io_nic structure.
6222 * @ethtest : pointer to a ethtool command specific structure that will be
6223 * returned to the user.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006224 * @data : variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006225 * conducted by the driver.
6226 * Description:
6227 * This function conducts 6 tests ( 4 offline and 2 online) to determine
6228 * the health of the card.
6229 * Return value:
6230 * void
6231 */
6232
6233static void s2io_ethtool_test(struct net_device *dev,
6234 struct ethtool_test *ethtest,
Joe Perchesd44570e2009-08-24 17:29:44 +00006235 uint64_t *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006236{
Wang Chen4cf16532008-11-12 23:38:14 -08006237 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006238 int orig_state = netif_running(sp->dev);
6239
6240 if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
6241 /* Offline Tests. */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006242 if (orig_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006243 s2io_close(sp->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006244
6245 if (s2io_register_test(sp, &data[0]))
6246 ethtest->flags |= ETH_TEST_FL_FAILED;
6247
6248 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006249
6250 if (s2io_rldram_test(sp, &data[3]))
6251 ethtest->flags |= ETH_TEST_FL_FAILED;
6252
6253 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006254
6255 if (s2io_eeprom_test(sp, &data[1]))
6256 ethtest->flags |= ETH_TEST_FL_FAILED;
6257
6258 if (s2io_bist_test(sp, &data[4]))
6259 ethtest->flags |= ETH_TEST_FL_FAILED;
6260
6261 if (orig_state)
6262 s2io_open(sp->dev);
6263
6264 data[2] = 0;
6265 } else {
6266 /* Online Tests. */
6267 if (!orig_state) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006268 DBG_PRINT(ERR_DBG, "%s: is not up, cannot run test\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07006269 dev->name);
6270 data[0] = -1;
6271 data[1] = -1;
6272 data[2] = -1;
6273 data[3] = -1;
6274 data[4] = -1;
6275 }
6276
6277 if (s2io_link_test(sp, &data[2]))
6278 ethtest->flags |= ETH_TEST_FL_FAILED;
6279
6280 data[0] = 0;
6281 data[1] = 0;
6282 data[3] = 0;
6283 data[4] = 0;
6284 }
6285}
6286
6287static void s2io_get_ethtool_stats(struct net_device *dev,
6288 struct ethtool_stats *estats,
Joe Perchesd44570e2009-08-24 17:29:44 +00006289 u64 *tmp_stats)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006290{
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006291 int i = 0, k;
Wang Chen4cf16532008-11-12 23:38:14 -08006292 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00006293 struct stat_block *stats = sp->mac_control.stats_info;
6294 struct swStat *swstats = &stats->sw_stat;
6295 struct xpakStat *xstats = &stats->xpak_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006296
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006297 s2io_updt_stats(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006298 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006299 (u64)le32_to_cpu(stats->tmac_frms_oflow) << 32 |
6300 le32_to_cpu(stats->tmac_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006301 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006302 (u64)le32_to_cpu(stats->tmac_data_octets_oflow) << 32 |
6303 le32_to_cpu(stats->tmac_data_octets);
6304 tmp_stats[i++] = le64_to_cpu(stats->tmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006305 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006306 (u64)le32_to_cpu(stats->tmac_mcst_frms_oflow) << 32 |
6307 le32_to_cpu(stats->tmac_mcst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006308 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006309 (u64)le32_to_cpu(stats->tmac_bcst_frms_oflow) << 32 |
6310 le32_to_cpu(stats->tmac_bcst_frms);
6311 tmp_stats[i++] = le64_to_cpu(stats->tmac_pause_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006312 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006313 (u64)le32_to_cpu(stats->tmac_ttl_octets_oflow) << 32 |
6314 le32_to_cpu(stats->tmac_ttl_octets);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006315 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006316 (u64)le32_to_cpu(stats->tmac_ucst_frms_oflow) << 32 |
6317 le32_to_cpu(stats->tmac_ucst_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006318 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006319 (u64)le32_to_cpu(stats->tmac_nucst_frms_oflow) << 32 |
6320 le32_to_cpu(stats->tmac_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006321 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006322 (u64)le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 |
6323 le32_to_cpu(stats->tmac_any_err_frms);
6324 tmp_stats[i++] = le64_to_cpu(stats->tmac_ttl_less_fb_octets);
6325 tmp_stats[i++] = le64_to_cpu(stats->tmac_vld_ip_octets);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006326 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006327 (u64)le32_to_cpu(stats->tmac_vld_ip_oflow) << 32 |
6328 le32_to_cpu(stats->tmac_vld_ip);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006329 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006330 (u64)le32_to_cpu(stats->tmac_drop_ip_oflow) << 32 |
6331 le32_to_cpu(stats->tmac_drop_ip);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006332 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006333 (u64)le32_to_cpu(stats->tmac_icmp_oflow) << 32 |
6334 le32_to_cpu(stats->tmac_icmp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006335 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006336 (u64)le32_to_cpu(stats->tmac_rst_tcp_oflow) << 32 |
6337 le32_to_cpu(stats->tmac_rst_tcp);
6338 tmp_stats[i++] = le64_to_cpu(stats->tmac_tcp);
6339 tmp_stats[i++] = (u64)le32_to_cpu(stats->tmac_udp_oflow) << 32 |
6340 le32_to_cpu(stats->tmac_udp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006341 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006342 (u64)le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 |
6343 le32_to_cpu(stats->rmac_vld_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006344 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006345 (u64)le32_to_cpu(stats->rmac_data_octets_oflow) << 32 |
6346 le32_to_cpu(stats->rmac_data_octets);
6347 tmp_stats[i++] = le64_to_cpu(stats->rmac_fcs_err_frms);
6348 tmp_stats[i++] = le64_to_cpu(stats->rmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006349 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006350 (u64)le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 |
6351 le32_to_cpu(stats->rmac_vld_mcst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006352 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006353 (u64)le32_to_cpu(stats->rmac_vld_bcst_frms_oflow) << 32 |
6354 le32_to_cpu(stats->rmac_vld_bcst_frms);
6355 tmp_stats[i++] = le32_to_cpu(stats->rmac_in_rng_len_err_frms);
6356 tmp_stats[i++] = le32_to_cpu(stats->rmac_out_rng_len_err_frms);
6357 tmp_stats[i++] = le64_to_cpu(stats->rmac_long_frms);
6358 tmp_stats[i++] = le64_to_cpu(stats->rmac_pause_ctrl_frms);
6359 tmp_stats[i++] = le64_to_cpu(stats->rmac_unsup_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006360 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006361 (u64)le32_to_cpu(stats->rmac_ttl_octets_oflow) << 32 |
6362 le32_to_cpu(stats->rmac_ttl_octets);
Joe Perchesd44570e2009-08-24 17:29:44 +00006363 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006364 (u64)le32_to_cpu(stats->rmac_accepted_ucst_frms_oflow) << 32
6365 | le32_to_cpu(stats->rmac_accepted_ucst_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006366 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006367 (u64)le32_to_cpu(stats->rmac_accepted_nucst_frms_oflow)
6368 << 32 | le32_to_cpu(stats->rmac_accepted_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006369 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006370 (u64)le32_to_cpu(stats->rmac_discarded_frms_oflow) << 32 |
6371 le32_to_cpu(stats->rmac_discarded_frms);
Joe Perchesd44570e2009-08-24 17:29:44 +00006372 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006373 (u64)le32_to_cpu(stats->rmac_drop_events_oflow)
6374 << 32 | le32_to_cpu(stats->rmac_drop_events);
6375 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_less_fb_octets);
6376 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006377 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006378 (u64)le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 |
6379 le32_to_cpu(stats->rmac_usized_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006380 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006381 (u64)le32_to_cpu(stats->rmac_osized_frms_oflow) << 32 |
6382 le32_to_cpu(stats->rmac_osized_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006383 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006384 (u64)le32_to_cpu(stats->rmac_frag_frms_oflow) << 32 |
6385 le32_to_cpu(stats->rmac_frag_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006386 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006387 (u64)le32_to_cpu(stats->rmac_jabber_frms_oflow) << 32 |
6388 le32_to_cpu(stats->rmac_jabber_frms);
6389 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_64_frms);
6390 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_65_127_frms);
6391 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_128_255_frms);
6392 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_256_511_frms);
6393 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_512_1023_frms);
6394 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_1024_1518_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006395 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006396 (u64)le32_to_cpu(stats->rmac_ip_oflow) << 32 |
6397 le32_to_cpu(stats->rmac_ip);
6398 tmp_stats[i++] = le64_to_cpu(stats->rmac_ip_octets);
6399 tmp_stats[i++] = le32_to_cpu(stats->rmac_hdr_err_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006400 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006401 (u64)le32_to_cpu(stats->rmac_drop_ip_oflow) << 32 |
6402 le32_to_cpu(stats->rmac_drop_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006403 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006404 (u64)le32_to_cpu(stats->rmac_icmp_oflow) << 32 |
6405 le32_to_cpu(stats->rmac_icmp);
6406 tmp_stats[i++] = le64_to_cpu(stats->rmac_tcp);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006407 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006408 (u64)le32_to_cpu(stats->rmac_udp_oflow) << 32 |
6409 le32_to_cpu(stats->rmac_udp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006410 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006411 (u64)le32_to_cpu(stats->rmac_err_drp_udp_oflow) << 32 |
6412 le32_to_cpu(stats->rmac_err_drp_udp);
6413 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_err_sym);
6414 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q0);
6415 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q1);
6416 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q2);
6417 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q3);
6418 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q4);
6419 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q5);
6420 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q6);
6421 tmp_stats[i++] = le64_to_cpu(stats->rmac_frms_q7);
6422 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q0);
6423 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q1);
6424 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q2);
6425 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q3);
6426 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q4);
6427 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q5);
6428 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q6);
6429 tmp_stats[i++] = le16_to_cpu(stats->rmac_full_q7);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006430 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006431 (u64)le32_to_cpu(stats->rmac_pause_cnt_oflow) << 32 |
6432 le32_to_cpu(stats->rmac_pause_cnt);
6433 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_data_err_cnt);
6434 tmp_stats[i++] = le64_to_cpu(stats->rmac_xgmii_ctrl_err_cnt);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006435 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006436 (u64)le32_to_cpu(stats->rmac_accepted_ip_oflow) << 32 |
6437 le32_to_cpu(stats->rmac_accepted_ip);
6438 tmp_stats[i++] = le32_to_cpu(stats->rmac_err_tcp);
6439 tmp_stats[i++] = le32_to_cpu(stats->rd_req_cnt);
6440 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_cnt);
6441 tmp_stats[i++] = le32_to_cpu(stats->new_rd_req_rtry_cnt);
6442 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_cnt);
6443 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_rd_ack_cnt);
6444 tmp_stats[i++] = le32_to_cpu(stats->wr_req_cnt);
6445 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_cnt);
6446 tmp_stats[i++] = le32_to_cpu(stats->new_wr_req_rtry_cnt);
6447 tmp_stats[i++] = le32_to_cpu(stats->wr_rtry_cnt);
6448 tmp_stats[i++] = le32_to_cpu(stats->wr_disc_cnt);
6449 tmp_stats[i++] = le32_to_cpu(stats->rd_rtry_wr_ack_cnt);
6450 tmp_stats[i++] = le32_to_cpu(stats->txp_wr_cnt);
6451 tmp_stats[i++] = le32_to_cpu(stats->txd_rd_cnt);
6452 tmp_stats[i++] = le32_to_cpu(stats->txd_wr_cnt);
6453 tmp_stats[i++] = le32_to_cpu(stats->rxd_rd_cnt);
6454 tmp_stats[i++] = le32_to_cpu(stats->rxd_wr_cnt);
6455 tmp_stats[i++] = le32_to_cpu(stats->txf_rd_cnt);
6456 tmp_stats[i++] = le32_to_cpu(stats->rxf_wr_cnt);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006457
6458 /* Enhanced statistics exist only for Hercules */
Joe Perchesd44570e2009-08-24 17:29:44 +00006459 if (sp->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006460 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006461 le64_to_cpu(stats->rmac_ttl_1519_4095_frms);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006462 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006463 le64_to_cpu(stats->rmac_ttl_4096_8191_frms);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006464 tmp_stats[i++] =
Joe Perchesffb5df62009-08-24 17:29:47 +00006465 le64_to_cpu(stats->rmac_ttl_8192_max_frms);
6466 tmp_stats[i++] = le64_to_cpu(stats->rmac_ttl_gt_max_frms);
6467 tmp_stats[i++] = le64_to_cpu(stats->rmac_osized_alt_frms);
6468 tmp_stats[i++] = le64_to_cpu(stats->rmac_jabber_alt_frms);
6469 tmp_stats[i++] = le64_to_cpu(stats->rmac_gt_max_alt_frms);
6470 tmp_stats[i++] = le64_to_cpu(stats->rmac_vlan_frms);
6471 tmp_stats[i++] = le32_to_cpu(stats->rmac_len_discard);
6472 tmp_stats[i++] = le32_to_cpu(stats->rmac_fcs_discard);
6473 tmp_stats[i++] = le32_to_cpu(stats->rmac_pf_discard);
6474 tmp_stats[i++] = le32_to_cpu(stats->rmac_da_discard);
6475 tmp_stats[i++] = le32_to_cpu(stats->rmac_red_discard);
6476 tmp_stats[i++] = le32_to_cpu(stats->rmac_rts_discard);
6477 tmp_stats[i++] = le32_to_cpu(stats->rmac_ingm_full_discard);
6478 tmp_stats[i++] = le32_to_cpu(stats->link_fault_cnt);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006479 }
6480
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006481 tmp_stats[i++] = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00006482 tmp_stats[i++] = swstats->single_ecc_errs;
6483 tmp_stats[i++] = swstats->double_ecc_errs;
6484 tmp_stats[i++] = swstats->parity_err_cnt;
6485 tmp_stats[i++] = swstats->serious_err_cnt;
6486 tmp_stats[i++] = swstats->soft_reset_cnt;
6487 tmp_stats[i++] = swstats->fifo_full_cnt;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006488 for (k = 0; k < MAX_RX_RINGS; k++)
Joe Perchesffb5df62009-08-24 17:29:47 +00006489 tmp_stats[i++] = swstats->ring_full_cnt[k];
6490 tmp_stats[i++] = xstats->alarm_transceiver_temp_high;
6491 tmp_stats[i++] = xstats->alarm_transceiver_temp_low;
6492 tmp_stats[i++] = xstats->alarm_laser_bias_current_high;
6493 tmp_stats[i++] = xstats->alarm_laser_bias_current_low;
6494 tmp_stats[i++] = xstats->alarm_laser_output_power_high;
6495 tmp_stats[i++] = xstats->alarm_laser_output_power_low;
6496 tmp_stats[i++] = xstats->warn_transceiver_temp_high;
6497 tmp_stats[i++] = xstats->warn_transceiver_temp_low;
6498 tmp_stats[i++] = xstats->warn_laser_bias_current_high;
6499 tmp_stats[i++] = xstats->warn_laser_bias_current_low;
6500 tmp_stats[i++] = xstats->warn_laser_output_power_high;
6501 tmp_stats[i++] = xstats->warn_laser_output_power_low;
6502 tmp_stats[i++] = swstats->clubbed_frms_cnt;
6503 tmp_stats[i++] = swstats->sending_both;
6504 tmp_stats[i++] = swstats->outof_sequence_pkts;
6505 tmp_stats[i++] = swstats->flush_max_pkts;
6506 if (swstats->num_aggregations) {
6507 u64 tmp = swstats->sum_avg_pkts_aggregated;
Ananda Rajubd1034f2006-04-21 19:20:22 -04006508 int count = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04006509 /*
Ananda Rajubd1034f2006-04-21 19:20:22 -04006510 * Since 64-bit divide does not work on all platforms,
6511 * do repeated subtraction.
6512 */
Joe Perchesffb5df62009-08-24 17:29:47 +00006513 while (tmp >= swstats->num_aggregations) {
6514 tmp -= swstats->num_aggregations;
Ananda Rajubd1034f2006-04-21 19:20:22 -04006515 count++;
6516 }
6517 tmp_stats[i++] = count;
Joe Perchesd44570e2009-08-24 17:29:44 +00006518 } else
Ananda Rajubd1034f2006-04-21 19:20:22 -04006519 tmp_stats[i++] = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00006520 tmp_stats[i++] = swstats->mem_alloc_fail_cnt;
6521 tmp_stats[i++] = swstats->pci_map_fail_cnt;
6522 tmp_stats[i++] = swstats->watchdog_timer_cnt;
6523 tmp_stats[i++] = swstats->mem_allocated;
6524 tmp_stats[i++] = swstats->mem_freed;
6525 tmp_stats[i++] = swstats->link_up_cnt;
6526 tmp_stats[i++] = swstats->link_down_cnt;
6527 tmp_stats[i++] = swstats->link_up_time;
6528 tmp_stats[i++] = swstats->link_down_time;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006529
Joe Perchesffb5df62009-08-24 17:29:47 +00006530 tmp_stats[i++] = swstats->tx_buf_abort_cnt;
6531 tmp_stats[i++] = swstats->tx_desc_abort_cnt;
6532 tmp_stats[i++] = swstats->tx_parity_err_cnt;
6533 tmp_stats[i++] = swstats->tx_link_loss_cnt;
6534 tmp_stats[i++] = swstats->tx_list_proc_err_cnt;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006535
Joe Perchesffb5df62009-08-24 17:29:47 +00006536 tmp_stats[i++] = swstats->rx_parity_err_cnt;
6537 tmp_stats[i++] = swstats->rx_abort_cnt;
6538 tmp_stats[i++] = swstats->rx_parity_abort_cnt;
6539 tmp_stats[i++] = swstats->rx_rda_fail_cnt;
6540 tmp_stats[i++] = swstats->rx_unkn_prot_cnt;
6541 tmp_stats[i++] = swstats->rx_fcs_err_cnt;
6542 tmp_stats[i++] = swstats->rx_buf_size_err_cnt;
6543 tmp_stats[i++] = swstats->rx_rxd_corrupt_cnt;
6544 tmp_stats[i++] = swstats->rx_unkn_err_cnt;
6545 tmp_stats[i++] = swstats->tda_err_cnt;
6546 tmp_stats[i++] = swstats->pfc_err_cnt;
6547 tmp_stats[i++] = swstats->pcc_err_cnt;
6548 tmp_stats[i++] = swstats->tti_err_cnt;
6549 tmp_stats[i++] = swstats->tpa_err_cnt;
6550 tmp_stats[i++] = swstats->sm_err_cnt;
6551 tmp_stats[i++] = swstats->lso_err_cnt;
6552 tmp_stats[i++] = swstats->mac_tmac_err_cnt;
6553 tmp_stats[i++] = swstats->mac_rmac_err_cnt;
6554 tmp_stats[i++] = swstats->xgxs_txgxs_err_cnt;
6555 tmp_stats[i++] = swstats->xgxs_rxgxs_err_cnt;
6556 tmp_stats[i++] = swstats->rc_err_cnt;
6557 tmp_stats[i++] = swstats->prc_pcix_err_cnt;
6558 tmp_stats[i++] = swstats->rpa_err_cnt;
6559 tmp_stats[i++] = swstats->rda_err_cnt;
6560 tmp_stats[i++] = swstats->rti_err_cnt;
6561 tmp_stats[i++] = swstats->mc_err_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006562}
6563
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006564static int s2io_ethtool_get_regs_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006565{
Joe Perchesd44570e2009-08-24 17:29:44 +00006566 return XENA_REG_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006567}
6568
6569
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006570static int s2io_get_eeprom_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006571{
Joe Perchesd44570e2009-08-24 17:29:44 +00006572 return XENA_EEPROM_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006573}
6574
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006575static int s2io_get_sset_count(struct net_device *dev, int sset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006576{
Wang Chen4cf16532008-11-12 23:38:14 -08006577 struct s2io_nic *sp = netdev_priv(dev);
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006578
6579 switch (sset) {
6580 case ETH_SS_TEST:
6581 return S2IO_TEST_LEN;
6582 case ETH_SS_STATS:
Joe Perchesd44570e2009-08-24 17:29:44 +00006583 switch (sp->device_type) {
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006584 case XFRAME_I_DEVICE:
6585 return XFRAME_I_STAT_LEN;
6586 case XFRAME_II_DEVICE:
6587 return XFRAME_II_STAT_LEN;
6588 default:
6589 return 0;
6590 }
6591 default:
6592 return -EOPNOTSUPP;
6593 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006594}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006595
6596static void s2io_ethtool_get_strings(struct net_device *dev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006597 u32 stringset, u8 *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006598{
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006599 int stat_size = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08006600 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006601
Linus Torvalds1da177e2005-04-16 15:20:36 -07006602 switch (stringset) {
6603 case ETH_SS_TEST:
6604 memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
6605 break;
6606 case ETH_SS_STATS:
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006607 stat_size = sizeof(ethtool_xena_stats_keys);
Joe Perchesd44570e2009-08-24 17:29:44 +00006608 memcpy(data, &ethtool_xena_stats_keys, stat_size);
6609 if (sp->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006610 memcpy(data + stat_size,
Joe Perchesd44570e2009-08-24 17:29:44 +00006611 &ethtool_enhanced_stats_keys,
6612 sizeof(ethtool_enhanced_stats_keys));
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006613 stat_size += sizeof(ethtool_enhanced_stats_keys);
6614 }
6615
6616 memcpy(data + stat_size, &ethtool_driver_stats_keys,
Joe Perchesd44570e2009-08-24 17:29:44 +00006617 sizeof(ethtool_driver_stats_keys));
Linus Torvalds1da177e2005-04-16 15:20:36 -07006618 }
6619}
Linus Torvalds1da177e2005-04-16 15:20:36 -07006620
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006621static int s2io_set_features(struct net_device *dev, u32 features)
Jon Mason958de192010-06-24 18:45:10 +00006622{
6623 struct s2io_nic *sp = netdev_priv(dev);
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006624 u32 changed = (features ^ dev->features) & NETIF_F_LRO;
Jon Mason958de192010-06-24 18:45:10 +00006625
6626 if (changed && netif_running(dev)) {
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006627 int rc;
6628
Jon Mason958de192010-06-24 18:45:10 +00006629 s2io_stop_all_tx_queue(sp);
6630 s2io_card_down(sp);
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006631 dev->features = features;
Jon Mason958de192010-06-24 18:45:10 +00006632 rc = s2io_card_up(sp);
6633 if (rc)
6634 s2io_reset(sp);
6635 else
6636 s2io_start_all_tx_queue(sp);
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006637
6638 return rc ? rc : 1;
Jon Mason958de192010-06-24 18:45:10 +00006639 }
6640
Michał Mirosławb437a8c2011-04-18 13:31:20 +00006641 return 0;
Jon Mason958de192010-06-24 18:45:10 +00006642}
6643
Jeff Garzik7282d492006-09-13 14:30:00 -04006644static const struct ethtool_ops netdev_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006645 .get_settings = s2io_ethtool_gset,
6646 .set_settings = s2io_ethtool_sset,
6647 .get_drvinfo = s2io_ethtool_gdrvinfo,
6648 .get_regs_len = s2io_ethtool_get_regs_len,
6649 .get_regs = s2io_ethtool_gregs,
6650 .get_link = ethtool_op_get_link,
6651 .get_eeprom_len = s2io_get_eeprom_len,
6652 .get_eeprom = s2io_ethtool_geeprom,
6653 .set_eeprom = s2io_ethtool_seeprom,
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04006654 .get_ringparam = s2io_ethtool_gringparam,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006655 .get_pauseparam = s2io_ethtool_getpause_data,
6656 .set_pauseparam = s2io_ethtool_setpause_data,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006657 .self_test = s2io_ethtool_test,
6658 .get_strings = s2io_ethtool_get_strings,
stephen hemminger034e3452011-04-04 15:09:25 +00006659 .set_phys_id = s2io_ethtool_set_led,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006660 .get_ethtool_stats = s2io_get_ethtool_stats,
6661 .get_sset_count = s2io_get_sset_count,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006662};
6663
6664/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006665 * s2io_ioctl - Entry point for the Ioctl
Linus Torvalds1da177e2005-04-16 15:20:36 -07006666 * @dev : Device pointer.
6667 * @ifr : An IOCTL specefic structure, that can contain a pointer to
6668 * a proprietary structure used to pass information to the driver.
6669 * @cmd : This is used to distinguish between the different commands that
6670 * can be passed to the IOCTL functions.
6671 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006672 * Currently there are no special functionality supported in IOCTL, hence
6673 * function always return EOPNOTSUPPORTED
Linus Torvalds1da177e2005-04-16 15:20:36 -07006674 */
6675
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006676static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006677{
6678 return -EOPNOTSUPP;
6679}
6680
6681/**
6682 * s2io_change_mtu - entry point to change MTU size for the device.
6683 * @dev : device pointer.
6684 * @new_mtu : the new MTU size for the device.
6685 * Description: A driver entry point to change MTU size for the device.
6686 * Before changing the MTU the device must be stopped.
6687 * Return value:
6688 * 0 on success and an appropriate (-)ve integer as defined in errno.h
6689 * file on failure.
6690 */
6691
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006692static int s2io_change_mtu(struct net_device *dev, int new_mtu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006693{
Wang Chen4cf16532008-11-12 23:38:14 -08006694 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006695 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006696
6697 if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006698 DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006699 return -EPERM;
6700 }
6701
Linus Torvalds1da177e2005-04-16 15:20:36 -07006702 dev->mtu = new_mtu;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006703 if (netif_running(dev)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006704 s2io_stop_all_tx_queue(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006705 s2io_card_down(sp);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006706 ret = s2io_card_up(sp);
6707 if (ret) {
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006708 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07006709 __func__);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006710 return ret;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006711 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006712 s2io_wake_all_tx_queue(sp);
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006713 } else { /* Device is down */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006714 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006715 u64 val64 = new_mtu;
6716
6717 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
6718 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006719
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006720 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006721}
6722
6723/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07006724 * s2io_set_link - Set the LInk status
6725 * @data: long pointer to device private structue
6726 * Description: Sets the link status for the adapter
6727 */
6728
David Howellsc4028952006-11-22 14:57:56 +00006729static void s2io_set_link(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006730{
Joe Perchesd44570e2009-08-24 17:29:44 +00006731 struct s2io_nic *nic = container_of(work, struct s2io_nic,
6732 set_link_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006733 struct net_device *dev = nic->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006734 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006735 register u64 val64;
6736 u16 subid;
6737
Francois Romieu22747d62007-02-15 23:37:50 +01006738 rtnl_lock();
6739
6740 if (!netif_running(dev))
6741 goto out_unlock;
6742
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006743 if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006744 /* The card is being reset, no point doing anything */
Francois Romieu22747d62007-02-15 23:37:50 +01006745 goto out_unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006746 }
6747
6748 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006749 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
6750 /*
6751 * Allow a small delay for the NICs self initiated
6752 * cleanup to complete.
6753 */
6754 msleep(100);
6755 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006756
6757 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006758 if (LINK_IS_UP(val64)) {
6759 if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
6760 if (verify_xena_quiescence(nic)) {
6761 val64 = readq(&bar0->adapter_control);
6762 val64 |= ADAPTER_CNTL_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006763 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006764 if (CARDS_WITH_FAULTY_LINK_INDICATORS(
Joe Perchesd44570e2009-08-24 17:29:44 +00006765 nic->device_type, subid)) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006766 val64 = readq(&bar0->gpio_control);
6767 val64 |= GPIO_CTRL_GPIO_0;
6768 writeq(val64, &bar0->gpio_control);
6769 val64 = readq(&bar0->gpio_control);
6770 } else {
6771 val64 |= ADAPTER_LED_ON;
6772 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006773 }
Tobias Klauserf957bcf2009-06-04 23:07:59 +00006774 nic->device_enabled_once = true;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006775 } else {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006776 DBG_PRINT(ERR_DBG,
6777 "%s: Error: device is not Quiescent\n",
6778 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006779 s2io_stop_all_tx_queue(nic);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006780 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006781 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006782 val64 = readq(&bar0->adapter_control);
6783 val64 |= ADAPTER_LED_ON;
6784 writeq(val64, &bar0->adapter_control);
6785 s2io_link(nic, LINK_UP);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006786 } else {
6787 if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
6788 subid)) {
6789 val64 = readq(&bar0->gpio_control);
6790 val64 &= ~GPIO_CTRL_GPIO_0;
6791 writeq(val64, &bar0->gpio_control);
6792 val64 = readq(&bar0->gpio_control);
6793 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006794 /* turn off LED */
6795 val64 = readq(&bar0->adapter_control);
Joe Perchesd44570e2009-08-24 17:29:44 +00006796 val64 = val64 & (~ADAPTER_LED_ON);
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006797 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006798 s2io_link(nic, LINK_DOWN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006799 }
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006800 clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
Francois Romieu22747d62007-02-15 23:37:50 +01006801
6802out_unlock:
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05006803 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07006804}
6805
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006806static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
Joe Perchesd44570e2009-08-24 17:29:44 +00006807 struct buffAdd *ba,
6808 struct sk_buff **skb, u64 *temp0, u64 *temp1,
6809 u64 *temp2, int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006810{
6811 struct net_device *dev = sp->dev;
Veena Parat491abf22007-07-23 02:37:14 -04006812 struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006813
6814 if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006815 struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006816 /* allocate skb */
6817 if (*skb) {
6818 DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
6819 /*
6820 * As Rx frame are not going to be processed,
6821 * using same mapped address for the Rxd
6822 * buffer pointer
6823 */
Veena Parat6d517a22007-07-23 02:20:51 -04006824 rxdp1->Buffer0_ptr = *temp0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006825 } else {
6826 *skb = dev_alloc_skb(size);
6827 if (!(*skb)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006828 DBG_PRINT(INFO_DBG,
6829 "%s: Out of memory to allocate %s\n",
6830 dev->name, "1 buf mode SKBs");
Joe Perchesffb5df62009-08-24 17:29:47 +00006831 stats->mem_alloc_fail_cnt++;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006832 return -ENOMEM ;
6833 }
Joe Perchesffb5df62009-08-24 17:29:47 +00006834 stats->mem_allocated += (*skb)->truesize;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006835 /* storing the mapped addr in a temp variable
6836 * such it will be used for next rxd whose
6837 * Host Control is NULL
6838 */
Veena Parat6d517a22007-07-23 02:20:51 -04006839 rxdp1->Buffer0_ptr = *temp0 =
Joe Perchesd44570e2009-08-24 17:29:44 +00006840 pci_map_single(sp->pdev, (*skb)->data,
6841 size - NET_IP_ALIGN,
6842 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006843 if (pci_dma_mapping_error(sp->pdev, rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006844 goto memalloc_failed;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006845 rxdp->Host_Control = (unsigned long) (*skb);
6846 }
6847 } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006848 struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006849 /* Two buffer Mode */
6850 if (*skb) {
Veena Parat6d517a22007-07-23 02:20:51 -04006851 rxdp3->Buffer2_ptr = *temp2;
6852 rxdp3->Buffer0_ptr = *temp0;
6853 rxdp3->Buffer1_ptr = *temp1;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006854 } else {
6855 *skb = dev_alloc_skb(size);
David Rientjes2ceaac72006-10-30 14:19:25 -08006856 if (!(*skb)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00006857 DBG_PRINT(INFO_DBG,
6858 "%s: Out of memory to allocate %s\n",
6859 dev->name,
6860 "2 buf mode SKBs");
Joe Perchesffb5df62009-08-24 17:29:47 +00006861 stats->mem_alloc_fail_cnt++;
David Rientjes2ceaac72006-10-30 14:19:25 -08006862 return -ENOMEM;
6863 }
Joe Perchesffb5df62009-08-24 17:29:47 +00006864 stats->mem_allocated += (*skb)->truesize;
Veena Parat6d517a22007-07-23 02:20:51 -04006865 rxdp3->Buffer2_ptr = *temp2 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006866 pci_map_single(sp->pdev, (*skb)->data,
6867 dev->mtu + 4,
6868 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006869 if (pci_dma_mapping_error(sp->pdev, rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006870 goto memalloc_failed;
Veena Parat6d517a22007-07-23 02:20:51 -04006871 rxdp3->Buffer0_ptr = *temp0 =
Joe Perchesd44570e2009-08-24 17:29:44 +00006872 pci_map_single(sp->pdev, ba->ba_0, BUF0_LEN,
6873 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006874 if (pci_dma_mapping_error(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006875 rxdp3->Buffer0_ptr)) {
6876 pci_unmap_single(sp->pdev,
6877 (dma_addr_t)rxdp3->Buffer2_ptr,
6878 dev->mtu + 4,
6879 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04006880 goto memalloc_failed;
6881 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006882 rxdp->Host_Control = (unsigned long) (*skb);
6883
6884 /* Buffer-1 will be dummy buffer not used */
Veena Parat6d517a22007-07-23 02:20:51 -04006885 rxdp3->Buffer1_ptr = *temp1 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006886 pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
Joe Perchesd44570e2009-08-24 17:29:44 +00006887 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006888 if (pci_dma_mapping_error(sp->pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00006889 rxdp3->Buffer1_ptr)) {
6890 pci_unmap_single(sp->pdev,
6891 (dma_addr_t)rxdp3->Buffer0_ptr,
6892 BUF0_LEN, PCI_DMA_FROMDEVICE);
6893 pci_unmap_single(sp->pdev,
6894 (dma_addr_t)rxdp3->Buffer2_ptr,
6895 dev->mtu + 4,
6896 PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04006897 goto memalloc_failed;
6898 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006899 }
6900 }
6901 return 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00006902
6903memalloc_failed:
6904 stats->pci_map_fail_cnt++;
6905 stats->mem_freed += (*skb)->truesize;
6906 dev_kfree_skb(*skb);
6907 return -ENOMEM;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006908}
Veena Parat491abf22007-07-23 02:37:14 -04006909
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006910static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
6911 int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006912{
6913 struct net_device *dev = sp->dev;
6914 if (sp->rxd_mode == RXD_MODE_1) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006915 rxdp->Control_2 = SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006916 } else if (sp->rxd_mode == RXD_MODE_3B) {
6917 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
6918 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
Joe Perchesd44570e2009-08-24 17:29:44 +00006919 rxdp->Control_2 |= SET_BUFFER2_SIZE_3(dev->mtu + 4);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006920 }
6921}
6922
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006923static int rxd_owner_bit_reset(struct s2io_nic *sp)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006924{
6925 int i, j, k, blk_cnt = 0, size;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006926 struct config_param *config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00006927 struct mac_info *mac_control = &sp->mac_control;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006928 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006929 struct RxD_t *rxdp = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006930 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006931 struct buffAdd *ba = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006932 u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;
6933
6934 /* Calculate the size based on ring mode */
6935 size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
6936 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
6937 if (sp->rxd_mode == RXD_MODE_1)
6938 size += NET_IP_ALIGN;
6939 else if (sp->rxd_mode == RXD_MODE_3B)
6940 size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006941
6942 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00006943 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
6944 struct ring_info *ring = &mac_control->rings[i];
6945
Joe Perchesd44570e2009-08-24 17:29:44 +00006946 blk_cnt = rx_cfg->num_rxd / (rxd_count[sp->rxd_mode] + 1);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006947
6948 for (j = 0; j < blk_cnt; j++) {
6949 for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
Joe Perchesd44570e2009-08-24 17:29:44 +00006950 rxdp = ring->rx_blocks[j].rxds[k].virt_addr;
6951 if (sp->rxd_mode == RXD_MODE_3B)
Joe Perches13d866a2009-08-24 17:29:41 +00006952 ba = &ring->ba[j][k];
Joe Perchesd44570e2009-08-24 17:29:44 +00006953 if (set_rxd_buffer_pointer(sp, rxdp, ba, &skb,
6954 (u64 *)&temp0_64,
6955 (u64 *)&temp1_64,
6956 (u64 *)&temp2_64,
6957 size) == -ENOMEM) {
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05006958 return 0;
6959 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006960
6961 set_rxd_buffer_size(sp, rxdp, size);
6962 wmb();
6963 /* flip the Ownership bit to Hardware */
6964 rxdp->Control_1 |= RXD_OWN_XENA;
6965 }
6966 }
6967 }
6968 return 0;
6969
6970}
6971
Joe Perchesd44570e2009-08-24 17:29:44 +00006972static int s2io_add_isr(struct s2io_nic *sp)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006973{
6974 int ret = 0;
6975 struct net_device *dev = sp->dev;
6976 int err = 0;
6977
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07006978 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006979 ret = s2io_enable_msi_x(sp);
6980 if (ret) {
6981 DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07006982 sp->config.intr_type = INTA;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006983 }
6984
Joe Perchesd44570e2009-08-24 17:29:44 +00006985 /*
6986 * Store the values of the MSIX table in
6987 * the struct s2io_nic structure
6988 */
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006989 store_xmsi_data(sp);
6990
6991 /* After proper initialization of H/W, register ISR */
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07006992 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04006993 int i, msix_rx_cnt = 0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006994
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04006995 for (i = 0; i < sp->num_entries; i++) {
6996 if (sp->s2io_entries[i].in_use == MSIX_FLG) {
6997 if (sp->s2io_entries[i].type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00006998 MSIX_RING_TYPE) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04006999 sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
7000 dev->name, i);
7001 err = request_irq(sp->entries[i].vector,
Joe Perchesd44570e2009-08-24 17:29:44 +00007002 s2io_msix_ring_handle,
7003 0,
7004 sp->desc[i],
7005 sp->s2io_entries[i].arg);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007006 } else if (sp->s2io_entries[i].type ==
Joe Perchesd44570e2009-08-24 17:29:44 +00007007 MSIX_ALARM_TYPE) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007008 sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
Joe Perchesd44570e2009-08-24 17:29:44 +00007009 dev->name, i);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007010 err = request_irq(sp->entries[i].vector,
Joe Perchesd44570e2009-08-24 17:29:44 +00007011 s2io_msix_fifo_handle,
7012 0,
7013 sp->desc[i],
7014 sp->s2io_entries[i].arg);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007015
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007016 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007017 /* if either data or addr is zero print it. */
7018 if (!(sp->msix_info[i].addr &&
Joe Perchesd44570e2009-08-24 17:29:44 +00007019 sp->msix_info[i].data)) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007020 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007021 "%s @Addr:0x%llx Data:0x%llx\n",
7022 sp->desc[i],
7023 (unsigned long long)
7024 sp->msix_info[i].addr,
7025 (unsigned long long)
7026 ntohl(sp->msix_info[i].data));
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007027 } else
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007028 msix_rx_cnt++;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007029 if (err) {
7030 remove_msix_isr(sp);
7031
7032 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007033 "%s:MSI-X-%d registration "
7034 "failed\n", dev->name, i);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007035
7036 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007037 "%s: Defaulting to INTA\n",
7038 dev->name);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007039 sp->config.intr_type = INTA;
7040 break;
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007041 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007042 sp->s2io_entries[i].in_use =
7043 MSIX_REGISTERED_SUCCESS;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007044 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007045 }
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007046 if (!err) {
Joe Perches6cef2b82009-08-24 17:29:45 +00007047 pr_info("MSI-X-RX %d entries enabled\n", --msix_rx_cnt);
Joe Perches9e39f7c2009-08-25 08:52:00 +00007048 DBG_PRINT(INFO_DBG,
7049 "MSI-X-TX entries enabled through alarm vector\n");
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007050 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007051 }
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007052 if (sp->config.intr_type == INTA) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007053 err = request_irq((int)sp->pdev->irq, s2io_isr, IRQF_SHARED,
7054 sp->name, dev);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007055 if (err) {
7056 DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
7057 dev->name);
7058 return -1;
7059 }
7060 }
7061 return 0;
7062}
Joe Perchesd44570e2009-08-24 17:29:44 +00007063
7064static void s2io_rem_isr(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007065{
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007066 if (sp->config.intr_type == MSI_X)
7067 remove_msix_isr(sp);
7068 else
7069 remove_inta_isr(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007070}
7071
Joe Perchesd44570e2009-08-24 17:29:44 +00007072static void do_s2io_card_down(struct s2io_nic *sp, int do_io)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007073{
7074 int cnt = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007075 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007076 register u64 val64 = 0;
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007077 struct config_param *config;
7078 config = &sp->config;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007079
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007080 if (!is_s2io_card_up(sp))
7081 return;
7082
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007083 del_timer_sync(&sp->alarm_timer);
7084 /* If s2io_set_link task is executing, wait till it completes. */
Joe Perchesd44570e2009-08-24 17:29:44 +00007085 while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state)))
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007086 msleep(50);
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007087 clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007088
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007089 /* Disable napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007090 if (sp->config.napi) {
7091 int off = 0;
7092 if (config->intr_type == MSI_X) {
7093 for (; off < sp->config.rx_ring_num; off++)
7094 napi_disable(&sp->mac_control.rings[off].napi);
Joe Perchesd44570e2009-08-24 17:29:44 +00007095 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007096 else
7097 napi_disable(&sp->napi);
7098 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007099
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007100 /* disable Tx and Rx traffic on the NIC */
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007101 if (do_io)
7102 stop_nic(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007103
7104 s2io_rem_isr(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007105
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007106 /* stop the tx queue, indicate link down */
7107 s2io_link(sp, LINK_DOWN);
7108
Linus Torvalds1da177e2005-04-16 15:20:36 -07007109 /* Check if the device is Quiescent and then Reset the NIC */
Joe Perchesd44570e2009-08-24 17:29:44 +00007110 while (do_io) {
Ananda Raju5d3213c2006-04-21 19:23:26 -04007111 /* As per the HW requirement we need to replenish the
7112 * receive buffer to avoid the ring bump. Since there is
7113 * no intention of processing the Rx frame at this pointwe are
Justin P. Mattock70f23fd2011-05-10 10:16:21 +02007114 * just setting the ownership bit of rxd in Each Rx
Ananda Raju5d3213c2006-04-21 19:23:26 -04007115 * ring to HW and set the appropriate buffer size
7116 * based on the ring mode
7117 */
7118 rxd_owner_bit_reset(sp);
7119
Linus Torvalds1da177e2005-04-16 15:20:36 -07007120 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007121 if (verify_xena_quiescence(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007122 if (verify_pcc_quiescent(sp, sp->device_enabled_once))
7123 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007124 }
7125
7126 msleep(50);
7127 cnt++;
7128 if (cnt == 10) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007129 DBG_PRINT(ERR_DBG, "Device not Quiescent - "
7130 "adapter status reads 0x%llx\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007131 (unsigned long long)val64);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007132 break;
7133 }
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007134 }
7135 if (do_io)
7136 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007137
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007138 /* Free all Tx buffers */
7139 free_tx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007140
7141 /* Free all Rx buffers */
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007142 free_rx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007143
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007144 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007145}
7146
Joe Perchesd44570e2009-08-24 17:29:44 +00007147static void s2io_card_down(struct s2io_nic *sp)
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007148{
7149 do_s2io_card_down(sp, 1);
7150}
7151
Joe Perchesd44570e2009-08-24 17:29:44 +00007152static int s2io_card_up(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007153{
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007154 int i, ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007155 struct config_param *config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007156 struct mac_info *mac_control;
Joe Perchesd44570e2009-08-24 17:29:44 +00007157 struct net_device *dev = (struct net_device *)sp->dev;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007158 u16 interruptible;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007159
7160 /* Initialize the H/W I/O registers */
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007161 ret = init_nic(sp);
7162 if (ret != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007163 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
7164 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007165 if (ret != -EIO)
7166 s2io_reset(sp);
7167 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007168 }
7169
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007170 /*
7171 * Initializing the Rx buffers. For now we are considering only 1
Linus Torvalds1da177e2005-04-16 15:20:36 -07007172 * Rx ring and initializing buffers into 30 Rx blocks
7173 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007174 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007175 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007176
7177 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007178 struct ring_info *ring = &mac_control->rings[i];
7179
7180 ring->mtu = dev->mtu;
Amerigo Wangf0c54ac2010-08-25 00:23:39 +00007181 ring->lro = !!(dev->features & NETIF_F_LRO);
Joe Perches13d866a2009-08-24 17:29:41 +00007182 ret = fill_rx_buffers(sp, ring, 1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007183 if (ret) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007184 DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
7185 dev->name);
7186 s2io_reset(sp);
7187 free_rx_buffers(sp);
7188 return -ENOMEM;
7189 }
7190 DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
Joe Perches13d866a2009-08-24 17:29:41 +00007191 ring->rx_bufs_left);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007192 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007193
7194 /* Initialise napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007195 if (config->napi) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007196 if (config->intr_type == MSI_X) {
7197 for (i = 0; i < sp->config.rx_ring_num; i++)
7198 napi_enable(&sp->mac_control.rings[i].napi);
7199 } else {
7200 napi_enable(&sp->napi);
7201 }
7202 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007203
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007204 /* Maintain the state prior to the open */
7205 if (sp->promisc_flg)
7206 sp->promisc_flg = 0;
7207 if (sp->m_cast_flg) {
7208 sp->m_cast_flg = 0;
Joe Perchesd44570e2009-08-24 17:29:44 +00007209 sp->all_multi_pos = 0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007210 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007211
7212 /* Setting its receive mode */
7213 s2io_set_multicast(dev);
7214
Amerigo Wangf0c54ac2010-08-25 00:23:39 +00007215 if (dev->features & NETIF_F_LRO) {
Ananda Rajub41477f2006-07-24 19:52:49 -04007216 /* Initialize max aggregatable pkts per session based on MTU */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007217 sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
Joe Perchesd44570e2009-08-24 17:29:44 +00007218 /* Check if we can use (if specified) user provided value */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007219 if (lro_max_pkts < sp->lro_max_aggr_per_sess)
7220 sp->lro_max_aggr_per_sess = lro_max_pkts;
7221 }
7222
Linus Torvalds1da177e2005-04-16 15:20:36 -07007223 /* Enable Rx Traffic and interrupts on the NIC */
7224 if (start_nic(sp)) {
7225 DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007226 s2io_reset(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007227 free_rx_buffers(sp);
7228 return -ENODEV;
7229 }
7230
7231 /* Add interrupt service routine */
7232 if (s2io_add_isr(sp) != 0) {
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007233 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007234 s2io_rem_isr(sp);
7235 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007236 free_rx_buffers(sp);
7237 return -ENODEV;
7238 }
7239
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07007240 S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));
7241
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007242 set_bit(__S2IO_STATE_CARD_UP, &sp->state);
7243
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007244 /* Enable select interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007245 en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007246 if (sp->config.intr_type != INTA) {
7247 interruptible = TX_TRAFFIC_INTR | TX_PIC_INTR;
7248 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7249 } else {
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007250 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007251 interruptible |= TX_PIC_INTR;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007252 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7253 }
7254
Linus Torvalds1da177e2005-04-16 15:20:36 -07007255 return 0;
7256}
7257
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007258/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07007259 * s2io_restart_nic - Resets the NIC.
7260 * @data : long pointer to the device private structure
7261 * Description:
7262 * This function is scheduled to be run by the s2io_tx_watchdog
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007263 * function after 0.5 secs to reset the NIC. The idea is to reduce
Linus Torvalds1da177e2005-04-16 15:20:36 -07007264 * the run time of the watch dog routine which is run holding a
7265 * spin lock.
7266 */
7267
David Howellsc4028952006-11-22 14:57:56 +00007268static void s2io_restart_nic(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007269{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007270 struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
David Howellsc4028952006-11-22 14:57:56 +00007271 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007272
Francois Romieu22747d62007-02-15 23:37:50 +01007273 rtnl_lock();
7274
7275 if (!netif_running(dev))
7276 goto out_unlock;
7277
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007278 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007279 if (s2io_card_up(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007280 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007281 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007282 s2io_wake_all_tx_queue(sp);
Joe Perchesd44570e2009-08-24 17:29:44 +00007283 DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n", dev->name);
Francois Romieu22747d62007-02-15 23:37:50 +01007284out_unlock:
7285 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07007286}
7287
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007288/**
7289 * s2io_tx_watchdog - Watchdog for transmit side.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007290 * @dev : Pointer to net device structure
7291 * Description:
7292 * This function is triggered if the Tx Queue is stopped
7293 * for a pre-defined amount of time when the Interface is still up.
7294 * If the Interface is jammed in such a situation, the hardware is
7295 * reset (by s2io_close) and restarted again (by s2io_open) to
7296 * overcome any problem that might have been caused in the hardware.
7297 * Return value:
7298 * void
7299 */
7300
7301static void s2io_tx_watchdog(struct net_device *dev)
7302{
Wang Chen4cf16532008-11-12 23:38:14 -08007303 struct s2io_nic *sp = netdev_priv(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00007304 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007305
7306 if (netif_carrier_ok(dev)) {
Joe Perchesffb5df62009-08-24 17:29:47 +00007307 swstats->watchdog_timer_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007308 schedule_work(&sp->rst_timer_task);
Joe Perchesffb5df62009-08-24 17:29:47 +00007309 swstats->soft_reset_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007310 }
7311}
7312
7313/**
7314 * rx_osm_handler - To perform some OS related operations on SKB.
7315 * @sp: private member of the device structure,pointer to s2io_nic structure.
7316 * @skb : the socket buffer pointer.
7317 * @len : length of the packet
7318 * @cksum : FCS checksum of the frame.
7319 * @ring_no : the ring from which this RxD was extracted.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007320 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04007321 * This function is called by the Rx interrupt serivce routine to perform
Linus Torvalds1da177e2005-04-16 15:20:36 -07007322 * some OS related operations on the SKB before passing it to the upper
7323 * layers. It mainly checks if the checksum is OK, if so adds it to the
7324 * SKBs cksum variable, increments the Rx packet count and passes the SKB
7325 * to the upper layer. If the checksum is wrong, it increments the Rx
7326 * packet error count, frees the SKB and returns error.
7327 * Return value:
7328 * SUCCESS on success and -1 on failure.
7329 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007330static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007331{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007332 struct s2io_nic *sp = ring_data->nic;
Joe Perchesd44570e2009-08-24 17:29:44 +00007333 struct net_device *dev = (struct net_device *)ring_data->dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007334 struct sk_buff *skb = (struct sk_buff *)
Joe Perchesd44570e2009-08-24 17:29:44 +00007335 ((unsigned long)rxdp->Host_Control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007336 int ring_no = ring_data->ring_no;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007337 u16 l3_csum, l4_csum;
Ananda Raju863c11a2006-04-21 19:03:13 -04007338 unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
Ingo Molnar2e6a6842008-11-25 16:47:35 -08007339 struct lro *uninitialized_var(lro);
Olaf Heringf9046eb2007-06-19 22:41:10 +02007340 u8 err_mask;
Joe Perchesffb5df62009-08-24 17:29:47 +00007341 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007342
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007343 skb->dev = dev;
Ananda Rajuc92ca042006-04-21 19:18:03 -04007344
Ananda Raju863c11a2006-04-21 19:03:13 -04007345 if (err) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04007346 /* Check for parity error */
Joe Perchesd44570e2009-08-24 17:29:44 +00007347 if (err & 0x1)
Joe Perchesffb5df62009-08-24 17:29:47 +00007348 swstats->parity_err_cnt++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007349
Olaf Heringf9046eb2007-06-19 22:41:10 +02007350 err_mask = err >> 48;
Joe Perchesd44570e2009-08-24 17:29:44 +00007351 switch (err_mask) {
7352 case 1:
Joe Perchesffb5df62009-08-24 17:29:47 +00007353 swstats->rx_parity_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007354 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04007355
Joe Perchesd44570e2009-08-24 17:29:44 +00007356 case 2:
Joe Perchesffb5df62009-08-24 17:29:47 +00007357 swstats->rx_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007358 break;
7359
Joe Perchesd44570e2009-08-24 17:29:44 +00007360 case 3:
Joe Perchesffb5df62009-08-24 17:29:47 +00007361 swstats->rx_parity_abort_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007362 break;
7363
Joe Perchesd44570e2009-08-24 17:29:44 +00007364 case 4:
Joe Perchesffb5df62009-08-24 17:29:47 +00007365 swstats->rx_rda_fail_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007366 break;
7367
Joe Perchesd44570e2009-08-24 17:29:44 +00007368 case 5:
Joe Perchesffb5df62009-08-24 17:29:47 +00007369 swstats->rx_unkn_prot_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007370 break;
7371
Joe Perchesd44570e2009-08-24 17:29:44 +00007372 case 6:
Joe Perchesffb5df62009-08-24 17:29:47 +00007373 swstats->rx_fcs_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007374 break;
7375
Joe Perchesd44570e2009-08-24 17:29:44 +00007376 case 7:
Joe Perchesffb5df62009-08-24 17:29:47 +00007377 swstats->rx_buf_size_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007378 break;
7379
Joe Perchesd44570e2009-08-24 17:29:44 +00007380 case 8:
Joe Perchesffb5df62009-08-24 17:29:47 +00007381 swstats->rx_rxd_corrupt_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007382 break;
7383
Joe Perchesd44570e2009-08-24 17:29:44 +00007384 case 15:
Joe Perchesffb5df62009-08-24 17:29:47 +00007385 swstats->rx_unkn_err_cnt++;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007386 break;
7387 }
Ananda Raju863c11a2006-04-21 19:03:13 -04007388 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00007389 * Drop the packet if bad transfer code. Exception being
7390 * 0x5, which could be due to unsupported IPv6 extension header.
7391 * In this case, we let stack handle the packet.
7392 * Note that in this case, since checksum will be incorrect,
7393 * stack will validate the same.
7394 */
Olaf Heringf9046eb2007-06-19 22:41:10 +02007395 if (err_mask != 0x5) {
7396 DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007397 dev->name, err_mask);
Breno Leitaodc56e632008-07-22 16:27:20 -03007398 dev->stats.rx_crc_errors++;
Joe Perchesffb5df62009-08-24 17:29:47 +00007399 swstats->mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007400 += skb->truesize;
Ananda Raju863c11a2006-04-21 19:03:13 -04007401 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007402 ring_data->rx_bufs_left -= 1;
Ananda Raju863c11a2006-04-21 19:03:13 -04007403 rxdp->Host_Control = 0;
7404 return 0;
7405 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007406 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007407
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007408 rxdp->Host_Control = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007409 if (sp->rxd_mode == RXD_MODE_1) {
7410 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007411
Ananda Rajuda6971d2005-10-31 16:55:31 -05007412 skb_put(skb, len);
Veena Parat6d517a22007-07-23 02:20:51 -04007413 } else if (sp->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05007414 int get_block = ring_data->rx_curr_get_info.block_index;
7415 int get_off = ring_data->rx_curr_get_info.offset;
7416 int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
7417 int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
7418 unsigned char *buff = skb_push(skb, buf0_len);
7419
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007420 struct buffAdd *ba = &ring_data->ba[get_block][get_off];
Ananda Rajuda6971d2005-10-31 16:55:31 -05007421 memcpy(buff, ba->ba_0, buf0_len);
Veena Parat6d517a22007-07-23 02:20:51 -04007422 skb_put(skb, buf2_len);
Ananda Rajuda6971d2005-10-31 16:55:31 -05007423 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007424
Joe Perchesd44570e2009-08-24 17:29:44 +00007425 if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) &&
7426 ((!ring_data->lro) ||
7427 (ring_data->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
Michał Mirosławb437a8c2011-04-18 13:31:20 +00007428 (dev->features & NETIF_F_RXCSUM)) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007429 l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
7430 l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
7431 if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7432 /*
7433 * NIC verifies if the Checksum of the received
7434 * frame is Ok or not and accordingly returns
7435 * a flag in the RxD.
7436 */
7437 skb->ip_summed = CHECKSUM_UNNECESSARY;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007438 if (ring_data->lro) {
Shan Wei06f0c132011-03-04 01:23:58 +00007439 u32 tcp_len = 0;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007440 u8 *tcp;
7441 int ret = 0;
7442
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007443 ret = s2io_club_tcp_session(ring_data,
Joe Perchesd44570e2009-08-24 17:29:44 +00007444 skb->data, &tcp,
7445 &tcp_len, &lro,
7446 rxdp, sp);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007447 switch (ret) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007448 case 3: /* Begin anew */
7449 lro->parent = skb;
7450 goto aggregate;
7451 case 1: /* Aggregate */
7452 lro_append_pkt(sp, lro, skb, tcp_len);
7453 goto aggregate;
7454 case 4: /* Flush session */
7455 lro_append_pkt(sp, lro, skb, tcp_len);
7456 queue_rx_frame(lro->parent,
7457 lro->vlan_tag);
7458 clear_lro_session(lro);
Joe Perchesffb5df62009-08-24 17:29:47 +00007459 swstats->flush_max_pkts++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007460 goto aggregate;
7461 case 2: /* Flush both */
7462 lro->parent->data_len = lro->frags_len;
Joe Perchesffb5df62009-08-24 17:29:47 +00007463 swstats->sending_both++;
Joe Perchesd44570e2009-08-24 17:29:44 +00007464 queue_rx_frame(lro->parent,
7465 lro->vlan_tag);
7466 clear_lro_session(lro);
7467 goto send_up;
7468 case 0: /* sessions exceeded */
7469 case -1: /* non-TCP or not L2 aggregatable */
7470 case 5: /*
7471 * First pkt in session not
7472 * L3/L4 aggregatable
7473 */
7474 break;
7475 default:
7476 DBG_PRINT(ERR_DBG,
7477 "%s: Samadhana!!\n",
7478 __func__);
7479 BUG();
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007480 }
7481 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007482 } else {
7483 /*
7484 * Packet with erroneous checksum, let the
7485 * upper layers deal with it.
7486 */
Eric Dumazetbc8acf22010-09-02 13:07:41 -07007487 skb_checksum_none_assert(skb);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007488 }
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007489 } else
Eric Dumazetbc8acf22010-09-02 13:07:41 -07007490 skb_checksum_none_assert(skb);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007491
Joe Perchesffb5df62009-08-24 17:29:47 +00007492 swstats->mem_freed += skb->truesize;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007493send_up:
David S. Miller0c8dfc82009-01-27 16:22:32 -08007494 skb_record_rx_queue(skb, ring_no);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007495 queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007496aggregate:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007497 sp->mac_control.rings[ring_no].rx_bufs_left -= 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007498 return SUCCESS;
7499}
7500
7501/**
7502 * s2io_link - stops/starts the Tx queue.
7503 * @sp : private member of the device structure, which is a pointer to the
7504 * s2io_nic structure.
7505 * @link : inidicates whether link is UP/DOWN.
7506 * Description:
7507 * This function stops/starts the Tx queue depending on whether the link
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007508 * status of the NIC is is down or up. This is called by the Alarm
7509 * interrupt handler whenever a link change interrupt comes up.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007510 * Return value:
7511 * void.
7512 */
7513
Joe Perchesd44570e2009-08-24 17:29:44 +00007514static void s2io_link(struct s2io_nic *sp, int link)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007515{
Joe Perchesd44570e2009-08-24 17:29:44 +00007516 struct net_device *dev = (struct net_device *)sp->dev;
Joe Perchesffb5df62009-08-24 17:29:47 +00007517 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007518
7519 if (link != sp->last_link_state) {
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007520 init_tti(sp, link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007521 if (link == LINK_DOWN) {
7522 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007523 s2io_stop_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007524 netif_carrier_off(dev);
Joe Perchesffb5df62009-08-24 17:29:47 +00007525 if (swstats->link_up_cnt)
7526 swstats->link_up_time =
7527 jiffies - sp->start_time;
7528 swstats->link_down_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007529 } else {
7530 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
Joe Perchesffb5df62009-08-24 17:29:47 +00007531 if (swstats->link_down_cnt)
7532 swstats->link_down_time =
Joe Perchesd44570e2009-08-24 17:29:44 +00007533 jiffies - sp->start_time;
Joe Perchesffb5df62009-08-24 17:29:47 +00007534 swstats->link_up_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007535 netif_carrier_on(dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007536 s2io_wake_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007537 }
7538 }
7539 sp->last_link_state = link;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007540 sp->start_time = jiffies;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007541}
7542
7543/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007544 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
7545 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07007546 * s2io_nic structure.
7547 * Description:
7548 * This function initializes a few of the PCI and PCI-X configuration registers
7549 * with recommended values.
7550 * Return value:
7551 * void
7552 */
7553
Joe Perchesd44570e2009-08-24 17:29:44 +00007554static void s2io_init_pci(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007555{
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007556 u16 pci_cmd = 0, pcix_cmd = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007557
7558 /* Enable Data Parity Error Recovery in PCI-X command register. */
7559 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007560 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007561 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007562 (pcix_cmd | 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007563 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007564 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007565
7566 /* Set the PErr Response bit in PCI command register. */
7567 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
7568 pci_write_config_word(sp->pdev, PCI_COMMAND,
7569 (pci_cmd | PCI_COMMAND_PARITY));
7570 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007571}
7572
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007573static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type,
Joe Perchesd44570e2009-08-24 17:29:44 +00007574 u8 *dev_multiq)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007575{
Jon Mason1853e2e2010-12-10 15:40:01 +00007576 int i;
7577
Joe Perchesd44570e2009-08-24 17:29:44 +00007578 if ((tx_fifo_num > MAX_TX_FIFOS) || (tx_fifo_num < 1)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007579 DBG_PRINT(ERR_DBG, "Requested number of tx fifos "
Joe Perchesd44570e2009-08-24 17:29:44 +00007580 "(%d) not supported\n", tx_fifo_num);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007581
7582 if (tx_fifo_num < 1)
7583 tx_fifo_num = 1;
7584 else
7585 tx_fifo_num = MAX_TX_FIFOS;
7586
Joe Perches9e39f7c2009-08-25 08:52:00 +00007587 DBG_PRINT(ERR_DBG, "Default to %d tx fifos\n", tx_fifo_num);
Ananda Raju9dc737a2006-04-21 19:05:41 -04007588 }
Surjit Reang2fda0962008-01-24 02:08:59 -08007589
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007590 if (multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007591 *dev_multiq = multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007592
7593 if (tx_steering_type && (1 == tx_fifo_num)) {
7594 if (tx_steering_type != TX_DEFAULT_STEERING)
7595 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007596 "Tx steering is not supported with "
Joe Perchesd44570e2009-08-24 17:29:44 +00007597 "one fifo. Disabling Tx steering.\n");
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007598 tx_steering_type = NO_STEERING;
7599 }
7600
7601 if ((tx_steering_type < NO_STEERING) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00007602 (tx_steering_type > TX_DEFAULT_STEERING)) {
7603 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007604 "Requested transmit steering not supported\n");
7605 DBG_PRINT(ERR_DBG, "Disabling transmit steering\n");
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007606 tx_steering_type = NO_STEERING;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007607 }
7608
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007609 if (rx_ring_num > MAX_RX_RINGS) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007610 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007611 "Requested number of rx rings not supported\n");
7612 DBG_PRINT(ERR_DBG, "Default to %d rx rings\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007613 MAX_RX_RINGS);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007614 rx_ring_num = MAX_RX_RINGS;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007615 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007616
Veena Parateccb8622007-07-23 02:23:54 -04007617 if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007618 DBG_PRINT(ERR_DBG, "Wrong intr_type requested. "
Ananda Raju9dc737a2006-04-21 19:05:41 -04007619 "Defaulting to INTA\n");
7620 *dev_intr_type = INTA;
7621 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007622
Ananda Raju9dc737a2006-04-21 19:05:41 -04007623 if ((*dev_intr_type == MSI_X) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00007624 ((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
7625 (pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007626 DBG_PRINT(ERR_DBG, "Xframe I does not support MSI_X. "
Joe Perchesd44570e2009-08-24 17:29:44 +00007627 "Defaulting to INTA\n");
Ananda Raju9dc737a2006-04-21 19:05:41 -04007628 *dev_intr_type = INTA;
7629 }
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007630
Veena Parat6d517a22007-07-23 02:20:51 -04007631 if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007632 DBG_PRINT(ERR_DBG, "Requested ring mode not supported\n");
7633 DBG_PRINT(ERR_DBG, "Defaulting to 1-buffer mode\n");
Veena Parat6d517a22007-07-23 02:20:51 -04007634 rx_ring_mode = 1;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007635 }
Jon Mason1853e2e2010-12-10 15:40:01 +00007636
7637 for (i = 0; i < MAX_RX_RINGS; i++)
7638 if (rx_ring_sz[i] > MAX_RX_BLOCKS_PER_RING) {
7639 DBG_PRINT(ERR_DBG, "Requested rx ring size not "
7640 "supported\nDefaulting to %d\n",
7641 MAX_RX_BLOCKS_PER_RING);
7642 rx_ring_sz[i] = MAX_RX_BLOCKS_PER_RING;
7643 }
7644
Ananda Raju9dc737a2006-04-21 19:05:41 -04007645 return SUCCESS;
7646}
7647
Linus Torvalds1da177e2005-04-16 15:20:36 -07007648/**
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007649 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
7650 * or Traffic class respectively.
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007651 * @nic: device private variable
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007652 * Description: The function configures the receive steering to
7653 * desired receive ring.
7654 * Return Value: SUCCESS on success and
7655 * '-1' on failure (endian settings incorrect).
7656 */
7657static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
7658{
7659 struct XENA_dev_config __iomem *bar0 = nic->bar0;
7660 register u64 val64 = 0;
7661
7662 if (ds_codepoint > 63)
7663 return FAILURE;
7664
7665 val64 = RTS_DS_MEM_DATA(ring);
7666 writeq(val64, &bar0->rts_ds_mem_data);
7667
7668 val64 = RTS_DS_MEM_CTRL_WE |
7669 RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
7670 RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);
7671
7672 writeq(val64, &bar0->rts_ds_mem_ctrl);
7673
7674 return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
Joe Perchesd44570e2009-08-24 17:29:44 +00007675 RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
7676 S2IO_BIT_RESET);
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007677}
7678
Stephen Hemminger04025092008-11-21 17:28:55 -08007679static const struct net_device_ops s2io_netdev_ops = {
7680 .ndo_open = s2io_open,
7681 .ndo_stop = s2io_close,
7682 .ndo_get_stats = s2io_get_stats,
7683 .ndo_start_xmit = s2io_xmit,
7684 .ndo_validate_addr = eth_validate_addr,
7685 .ndo_set_multicast_list = s2io_set_multicast,
7686 .ndo_do_ioctl = s2io_ioctl,
7687 .ndo_set_mac_address = s2io_set_mac_addr,
7688 .ndo_change_mtu = s2io_change_mtu,
Michał Mirosławb437a8c2011-04-18 13:31:20 +00007689 .ndo_set_features = s2io_set_features,
Stephen Hemminger04025092008-11-21 17:28:55 -08007690 .ndo_tx_timeout = s2io_tx_watchdog,
7691#ifdef CONFIG_NET_POLL_CONTROLLER
7692 .ndo_poll_controller = s2io_netpoll,
7693#endif
7694};
7695
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007696/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007697 * s2io_init_nic - Initialization of the adapter .
Linus Torvalds1da177e2005-04-16 15:20:36 -07007698 * @pdev : structure containing the PCI related information of the device.
7699 * @pre: List of PCI devices supported by the driver listed in s2io_tbl.
7700 * Description:
7701 * The function initializes an adapter identified by the pci_dec structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007702 * All OS related initialization including memory and device structure and
7703 * initlaization of the device private variable is done. Also the swapper
7704 * control register is initialized to enable read and write into the I/O
Linus Torvalds1da177e2005-04-16 15:20:36 -07007705 * registers of the device.
7706 * Return value:
7707 * returns 0 on success and negative on failure.
7708 */
7709
7710static int __devinit
7711s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
7712{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007713 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007714 struct net_device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007715 int i, j, ret;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007716 int dma_flag = false;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007717 u32 mac_up, mac_down;
7718 u64 val64 = 0, tmp64 = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007719 struct XENA_dev_config __iomem *bar0 = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007720 u16 subid;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007721 struct config_param *config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007722 struct mac_info *mac_control;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007723 int mode;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007724 u8 dev_intr_type = intr_type;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007725 u8 dev_multiq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007726
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007727 ret = s2io_verify_parm(pdev, &dev_intr_type, &dev_multiq);
7728 if (ret)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007729 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007730
Joe Perchesd44570e2009-08-24 17:29:44 +00007731 ret = pci_enable_device(pdev);
7732 if (ret) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007733 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007734 "%s: pci_enable_device failed\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007735 return ret;
7736 }
7737
Yang Hongyang6a355282009-04-06 19:01:13 -07007738 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007739 DBG_PRINT(INIT_DBG, "%s: Using 64bit DMA\n", __func__);
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007740 dma_flag = true;
Joe Perchesd44570e2009-08-24 17:29:44 +00007741 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007742 DBG_PRINT(ERR_DBG,
Joe Perchesd44570e2009-08-24 17:29:44 +00007743 "Unable to obtain 64bit DMA "
7744 "for consistent allocations\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07007745 pci_disable_device(pdev);
7746 return -ENOMEM;
7747 }
Yang Hongyang284901a2009-04-06 19:01:15 -07007748 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007749 DBG_PRINT(INIT_DBG, "%s: Using 32bit DMA\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007750 } else {
7751 pci_disable_device(pdev);
7752 return -ENOMEM;
7753 }
Joe Perchesd44570e2009-08-24 17:29:44 +00007754 ret = pci_request_regions(pdev, s2io_driver_name);
7755 if (ret) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007756 DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00007757 __func__, ret);
Veena Parateccb8622007-07-23 02:23:54 -04007758 pci_disable_device(pdev);
7759 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007760 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007761 if (dev_multiq)
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007762 dev = alloc_etherdev_mq(sizeof(struct s2io_nic), tx_fifo_num);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007763 else
David S. Millerb19fa1f2008-07-08 23:14:24 -07007764 dev = alloc_etherdev(sizeof(struct s2io_nic));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007765 if (dev == NULL) {
7766 DBG_PRINT(ERR_DBG, "Device allocation failed\n");
7767 pci_disable_device(pdev);
7768 pci_release_regions(pdev);
7769 return -ENODEV;
7770 }
7771
7772 pci_set_master(pdev);
7773 pci_set_drvdata(pdev, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007774 SET_NETDEV_DEV(dev, &pdev->dev);
7775
7776 /* Private member variable initialized to s2io NIC structure */
Wang Chen4cf16532008-11-12 23:38:14 -08007777 sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007778 sp->dev = dev;
7779 sp->pdev = pdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007780 sp->high_dma_flag = dma_flag;
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007781 sp->device_enabled_once = false;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007782 if (rx_ring_mode == 1)
7783 sp->rxd_mode = RXD_MODE_1;
7784 if (rx_ring_mode == 2)
7785 sp->rxd_mode = RXD_MODE_3B;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007786
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007787 sp->config.intr_type = dev_intr_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007788
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007789 if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
Joe Perchesd44570e2009-08-24 17:29:44 +00007790 (pdev->device == PCI_DEVICE_ID_HERC_UNI))
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007791 sp->device_type = XFRAME_II_DEVICE;
7792 else
7793 sp->device_type = XFRAME_I_DEVICE;
7794
Jeff Garzik6aa20a22006-09-13 13:24:59 -04007795
Linus Torvalds1da177e2005-04-16 15:20:36 -07007796 /* Initialize some PCI/PCI-X fields of the NIC. */
7797 s2io_init_pci(sp);
7798
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007799 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07007800 * Setting the device configuration parameters.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007801 * Most of these parameters can be specified by the user during
7802 * module insertion as they are module loadable parameters. If
7803 * these parameters are not not specified during load time, they
Linus Torvalds1da177e2005-04-16 15:20:36 -07007804 * are initialized with default values.
7805 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007806 config = &sp->config;
Joe Perchesffb5df62009-08-24 17:29:47 +00007807 mac_control = &sp->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007808
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007809 config->napi = napi;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007810 config->tx_steering_type = tx_steering_type;
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007811
Linus Torvalds1da177e2005-04-16 15:20:36 -07007812 /* Tx side parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007813 if (config->tx_steering_type == TX_PRIORITY_STEERING)
7814 config->tx_fifo_num = MAX_TX_FIFOS;
7815 else
7816 config->tx_fifo_num = tx_fifo_num;
7817
7818 /* Initialize the fifos used for tx steering */
7819 if (config->tx_fifo_num < 5) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007820 if (config->tx_fifo_num == 1)
7821 sp->total_tcp_fifos = 1;
7822 else
7823 sp->total_tcp_fifos = config->tx_fifo_num - 1;
7824 sp->udp_fifo_idx = config->tx_fifo_num - 1;
7825 sp->total_udp_fifos = 1;
7826 sp->other_fifo_idx = sp->total_tcp_fifos - 1;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007827 } else {
7828 sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM -
Joe Perchesd44570e2009-08-24 17:29:44 +00007829 FIFO_OTHER_MAX_NUM);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007830 sp->udp_fifo_idx = sp->total_tcp_fifos;
7831 sp->total_udp_fifos = FIFO_UDP_MAX_NUM;
7832 sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM;
7833 }
7834
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007835 config->multiq = dev_multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007836 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007837 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
7838
7839 tx_cfg->fifo_len = tx_fifo_len[i];
7840 tx_cfg->fifo_priority = i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007841 }
7842
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007843 /* mapping the QoS priority to the configured fifos */
7844 for (i = 0; i < MAX_TX_FIFOS; i++)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007845 config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i];
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007846
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007847 /* map the hashing selector table to the configured fifos */
7848 for (i = 0; i < config->tx_fifo_num; i++)
7849 sp->fifo_selector[i] = fifo_selector[i];
7850
7851
Linus Torvalds1da177e2005-04-16 15:20:36 -07007852 config->tx_intr_type = TXD_INT_TYPE_UTILZ;
7853 for (i = 0; i < config->tx_fifo_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007854 struct tx_fifo_config *tx_cfg = &config->tx_cfg[i];
7855
7856 tx_cfg->f_no_snoop = (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
7857 if (tx_cfg->fifo_len < 65) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007858 config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
7859 break;
7860 }
7861 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05007862 /* + 2 because one Txd for skb->data and one Txd for UFO */
7863 config->max_txds = MAX_SKB_FRAGS + 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007864
7865 /* Rx side parameters. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007866 config->rx_ring_num = rx_ring_num;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007867 for (i = 0; i < config->rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007868 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
7869 struct ring_info *ring = &mac_control->rings[i];
7870
7871 rx_cfg->num_rxd = rx_ring_sz[i] * (rxd_count[sp->rxd_mode] + 1);
7872 rx_cfg->ring_priority = i;
7873 ring->rx_bufs_left = 0;
7874 ring->rxd_mode = sp->rxd_mode;
7875 ring->rxd_count = rxd_count[sp->rxd_mode];
7876 ring->pdev = sp->pdev;
7877 ring->dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007878 }
7879
7880 for (i = 0; i < rx_ring_num; i++) {
Joe Perches13d866a2009-08-24 17:29:41 +00007881 struct rx_ring_config *rx_cfg = &config->rx_cfg[i];
7882
7883 rx_cfg->ring_org = RING_ORG_BUFF1;
7884 rx_cfg->f_no_snoop = (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007885 }
7886
7887 /* Setting Mac Control parameters */
7888 mac_control->rmac_pause_time = rmac_pause_time;
7889 mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
7890 mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;
7891
7892
Linus Torvalds1da177e2005-04-16 15:20:36 -07007893 /* initialize the shared memory used by the NIC and the host */
7894 if (init_shared_mem(sp)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00007895 DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007896 ret = -ENOMEM;
7897 goto mem_alloc_failed;
7898 }
7899
Arjan van de Ven275f1652008-10-20 21:42:39 -07007900 sp->bar0 = pci_ioremap_bar(pdev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007901 if (!sp->bar0) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007902 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007903 dev->name);
7904 ret = -ENOMEM;
7905 goto bar0_remap_failed;
7906 }
7907
Arjan van de Ven275f1652008-10-20 21:42:39 -07007908 sp->bar1 = pci_ioremap_bar(pdev, 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007909 if (!sp->bar1) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007910 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007911 dev->name);
7912 ret = -ENOMEM;
7913 goto bar1_remap_failed;
7914 }
7915
7916 dev->irq = pdev->irq;
Joe Perchesd44570e2009-08-24 17:29:44 +00007917 dev->base_addr = (unsigned long)sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007918
7919 /* Initializing the BAR1 address as the start of the FIFO pointer. */
7920 for (j = 0; j < MAX_TX_FIFOS; j++) {
Joe Perches43d620c2011-06-16 19:08:06 +00007921 mac_control->tx_FIFO_start[j] = sp->bar1 + (j * 0x00020000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007922 }
7923
7924 /* Driver entry points */
Stephen Hemminger04025092008-11-21 17:28:55 -08007925 dev->netdev_ops = &s2io_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007926 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
Michał Mirosławb437a8c2011-04-18 13:31:20 +00007927 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
7928 NETIF_F_TSO | NETIF_F_TSO6 |
7929 NETIF_F_RXCSUM | NETIF_F_LRO;
7930 dev->features |= dev->hw_features |
7931 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
7932 if (sp->device_type & XFRAME_II_DEVICE) {
7933 dev->hw_features |= NETIF_F_UFO;
7934 if (ufo)
7935 dev->features |= NETIF_F_UFO;
7936 }
Tobias Klauserf957bcf2009-06-04 23:07:59 +00007937 if (sp->high_dma_flag == true)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007938 dev->features |= NETIF_F_HIGHDMA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007939 dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
David Howellsc4028952006-11-22 14:57:56 +00007940 INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
7941 INIT_WORK(&sp->set_link_task, s2io_set_link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007942
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07007943 pci_save_state(sp->pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007944
7945 /* Setting swapper control on the NIC, for proper reset operation */
7946 if (s2io_set_swapper(sp)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007947 DBG_PRINT(ERR_DBG, "%s: swapper settings are wrong\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007948 dev->name);
7949 ret = -EAGAIN;
7950 goto set_swap_failed;
7951 }
7952
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007953 /* Verify if the Herc works on the slot its placed into */
7954 if (sp->device_type & XFRAME_II_DEVICE) {
7955 mode = s2io_verify_pci_mode(sp);
7956 if (mode < 0) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00007957 DBG_PRINT(ERR_DBG, "%s: Unsupported PCI bus mode\n",
7958 __func__);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007959 ret = -EBADSLT;
7960 goto set_swap_failed;
7961 }
7962 }
7963
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007964 if (sp->config.intr_type == MSI_X) {
7965 sp->num_entries = config->rx_ring_num + 1;
7966 ret = s2io_enable_msi_x(sp);
7967
7968 if (!ret) {
7969 ret = s2io_test_msi(sp);
7970 /* rollback MSI-X, will re-enable during add_isr() */
7971 remove_msix_isr(sp);
7972 }
7973 if (ret) {
7974
7975 DBG_PRINT(ERR_DBG,
Joe Perches9e39f7c2009-08-25 08:52:00 +00007976 "MSI-X requested but failed to enable\n");
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007977 sp->config.intr_type = INTA;
7978 }
7979 }
7980
7981 if (config->intr_type == MSI_X) {
Joe Perches13d866a2009-08-24 17:29:41 +00007982 for (i = 0; i < config->rx_ring_num ; i++) {
7983 struct ring_info *ring = &mac_control->rings[i];
7984
7985 netif_napi_add(dev, &ring->napi, s2io_poll_msix, 64);
7986 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007987 } else {
7988 netif_napi_add(dev, &sp->napi, s2io_poll_inta, 64);
7989 }
7990
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007991 /* Not needed for Herc */
7992 if (sp->device_type & XFRAME_I_DEVICE) {
7993 /*
7994 * Fix for all "FFs" MAC address problems observed on
7995 * Alpha platforms
7996 */
7997 fix_mac_address(sp);
7998 s2io_reset(sp);
7999 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07008000
8001 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07008002 * MAC address initialization.
8003 * For now only one mac address will be read and used.
8004 */
8005 bar0 = sp->bar0;
8006 val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Joe Perchesd44570e2009-08-24 17:29:44 +00008007 RMAC_ADDR_CMD_MEM_OFFSET(0 + S2IO_MAC_ADDR_START_OFFSET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008008 writeq(val64, &bar0->rmac_addr_cmd_mem);
Ananda Rajuc92ca042006-04-21 19:18:03 -04008009 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Joe Perchesd44570e2009-08-24 17:29:44 +00008010 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
8011 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008012 tmp64 = readq(&bar0->rmac_addr_data0_mem);
Joe Perchesd44570e2009-08-24 17:29:44 +00008013 mac_down = (u32)tmp64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008014 mac_up = (u32) (tmp64 >> 32);
8015
Linus Torvalds1da177e2005-04-16 15:20:36 -07008016 sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
8017 sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
8018 sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
8019 sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
8020 sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
8021 sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);
8022
Linus Torvalds1da177e2005-04-16 15:20:36 -07008023 /* Set the factory defined MAC address initially */
8024 dev->addr_len = ETH_ALEN;
8025 memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04008026 memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008027
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08008028 /* initialize number of multicast & unicast MAC entries variables */
8029 if (sp->device_type == XFRAME_I_DEVICE) {
8030 config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES;
8031 config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES;
8032 config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET;
8033 } else if (sp->device_type == XFRAME_II_DEVICE) {
8034 config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES;
8035 config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES;
8036 config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET;
8037 }
8038
8039 /* store mac addresses from CAM to s2io_nic structure */
8040 do_s2io_store_unicast_mc(sp);
8041
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008042 /* Configure MSIX vector for number of rings configured plus one */
8043 if ((sp->device_type == XFRAME_II_DEVICE) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00008044 (config->intr_type == MSI_X))
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008045 sp->num_entries = config->rx_ring_num + 1;
8046
Joe Perchesd44570e2009-08-24 17:29:44 +00008047 /* Store the values of the MSIX table in the s2io_nic structure */
Sivakumar Subramanic77dd432007-08-06 05:36:28 -04008048 store_xmsi_data(sp);
Ananda Rajub41477f2006-07-24 19:52:49 -04008049 /* reset Nic and bring it to known state */
8050 s2io_reset(sp);
8051
Linus Torvalds1da177e2005-04-16 15:20:36 -07008052 /*
Sreenivasa Honnur99993af2008-04-23 13:29:42 -04008053 * Initialize link state flags
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008054 * and the card state parameter
Linus Torvalds1da177e2005-04-16 15:20:36 -07008055 */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04008056 sp->state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008057
Linus Torvalds1da177e2005-04-16 15:20:36 -07008058 /* Initialize spinlocks */
Joe Perches13d866a2009-08-24 17:29:41 +00008059 for (i = 0; i < sp->config.tx_fifo_num; i++) {
8060 struct fifo_info *fifo = &mac_control->fifos[i];
8061
8062 spin_lock_init(&fifo->tx_lock);
8063 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008064
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008065 /*
8066 * SXE-002: Configure link and activity LED to init state
8067 * on driver load.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008068 */
8069 subid = sp->pdev->subsystem_device;
8070 if ((subid & 0xFF) >= 0x07) {
8071 val64 = readq(&bar0->gpio_control);
8072 val64 |= 0x0000800000000000ULL;
8073 writeq(val64, &bar0->gpio_control);
8074 val64 = 0x0411040400000000ULL;
Joe Perchesd44570e2009-08-24 17:29:44 +00008075 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008076 val64 = readq(&bar0->gpio_control);
8077 }
8078
8079 sp->rx_csum = 1; /* Rx chksum verify enabled by default */
8080
8081 if (register_netdev(dev)) {
8082 DBG_PRINT(ERR_DBG, "Device registration failed\n");
8083 ret = -ENODEV;
8084 goto register_failed;
8085 }
Ananda Raju9dc737a2006-04-21 19:05:41 -04008086 s2io_vpd_read(sp);
Jon Mason926bd902010-07-15 08:47:26 +00008087 DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2010 Exar Corp.\n");
Joe Perchesd44570e2009-08-24 17:29:44 +00008088 DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n", dev->name,
Auke Kok44c10132007-06-08 15:46:36 -07008089 sp->product_name, pdev->revision);
Ananda Rajub41477f2006-07-24 19:52:49 -04008090 DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
8091 s2io_driver_version);
Joe Perches9e39f7c2009-08-25 08:52:00 +00008092 DBG_PRINT(ERR_DBG, "%s: MAC Address: %pM\n", dev->name, dev->dev_addr);
8093 DBG_PRINT(ERR_DBG, "Serial number: %s\n", sp->serial_num);
Ananda Raju9dc737a2006-04-21 19:05:41 -04008094 if (sp->device_type & XFRAME_II_DEVICE) {
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07008095 mode = s2io_print_pci_mode(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008096 if (mode < 0) {
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008097 ret = -EBADSLT;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008098 unregister_netdev(dev);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008099 goto set_swap_failed;
8100 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008101 }
Joe Perchesd44570e2009-08-24 17:29:44 +00008102 switch (sp->rxd_mode) {
8103 case RXD_MODE_1:
8104 DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
8105 dev->name);
8106 break;
8107 case RXD_MODE_3B:
8108 DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
8109 dev->name);
8110 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008111 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008112
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008113 switch (sp->config.napi) {
8114 case 0:
8115 DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name);
8116 break;
8117 case 1:
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008118 DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008119 break;
8120 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008121
8122 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
Joe Perchesd44570e2009-08-24 17:29:44 +00008123 sp->config.tx_fifo_num);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008124
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008125 DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name,
8126 sp->config.rx_ring_num);
8127
Joe Perchesd44570e2009-08-24 17:29:44 +00008128 switch (sp->config.intr_type) {
8129 case INTA:
8130 DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
8131 break;
8132 case MSI_X:
8133 DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
8134 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008135 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008136 if (sp->config.multiq) {
Joe Perches13d866a2009-08-24 17:29:41 +00008137 for (i = 0; i < sp->config.tx_fifo_num; i++) {
8138 struct fifo_info *fifo = &mac_control->fifos[i];
8139
8140 fifo->multiq = config->multiq;
8141 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008142 DBG_PRINT(ERR_DBG, "%s: Multiqueue support enabled\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00008143 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008144 } else
8145 DBG_PRINT(ERR_DBG, "%s: Multiqueue support disabled\n",
Joe Perchesd44570e2009-08-24 17:29:44 +00008146 dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008147
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008148 switch (sp->config.tx_steering_type) {
8149 case NO_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008150 DBG_PRINT(ERR_DBG, "%s: No steering enabled for transmit\n",
8151 dev->name);
8152 break;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008153 case TX_PRIORITY_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008154 DBG_PRINT(ERR_DBG,
8155 "%s: Priority steering enabled for transmit\n",
8156 dev->name);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008157 break;
8158 case TX_DEFAULT_STEERING:
Joe Perchesd44570e2009-08-24 17:29:44 +00008159 DBG_PRINT(ERR_DBG,
8160 "%s: Default steering enabled for transmit\n",
8161 dev->name);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008162 }
8163
Amerigo Wangf0c54ac2010-08-25 00:23:39 +00008164 DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
8165 dev->name);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008166 if (ufo)
Joe Perchesd44570e2009-08-24 17:29:44 +00008167 DBG_PRINT(ERR_DBG,
8168 "%s: UDP Fragmentation Offload(UFO) enabled\n",
8169 dev->name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008170 /* Initialize device name */
Ananda Raju9dc737a2006-04-21 19:05:41 -04008171 sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008172
Breno Leitaocd0fce02008-09-04 17:52:54 -03008173 if (vlan_tag_strip)
8174 sp->vlan_strip_flag = 1;
8175 else
8176 sp->vlan_strip_flag = 0;
8177
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008178 /*
8179 * Make Link state as off at this point, when the Link change
8180 * interrupt comes the state will be automatically changed to
Linus Torvalds1da177e2005-04-16 15:20:36 -07008181 * the right state.
8182 */
8183 netif_carrier_off(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008184
8185 return 0;
8186
Joe Perchesd44570e2009-08-24 17:29:44 +00008187register_failed:
8188set_swap_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008189 iounmap(sp->bar1);
Joe Perchesd44570e2009-08-24 17:29:44 +00008190bar1_remap_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008191 iounmap(sp->bar0);
Joe Perchesd44570e2009-08-24 17:29:44 +00008192bar0_remap_failed:
8193mem_alloc_failed:
Linus Torvalds1da177e2005-04-16 15:20:36 -07008194 free_shared_mem(sp);
8195 pci_disable_device(pdev);
Veena Parateccb8622007-07-23 02:23:54 -04008196 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008197 pci_set_drvdata(pdev, NULL);
8198 free_netdev(dev);
8199
8200 return ret;
8201}
8202
8203/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008204 * s2io_rem_nic - Free the PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -07008205 * @pdev: structure containing the PCI related information of the device.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008206 * Description: This function is called by the Pci subsystem to release a
Linus Torvalds1da177e2005-04-16 15:20:36 -07008207 * PCI device and free up all resource held up by the device. This could
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008208 * be in response to a Hot plug event or when the driver is to be removed
Linus Torvalds1da177e2005-04-16 15:20:36 -07008209 * from memory.
8210 */
8211
8212static void __devexit s2io_rem_nic(struct pci_dev *pdev)
8213{
Joe Perchesa31ff382010-11-15 10:13:57 +00008214 struct net_device *dev = pci_get_drvdata(pdev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008215 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008216
8217 if (dev == NULL) {
8218 DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
8219 return;
8220 }
8221
Wang Chen4cf16532008-11-12 23:38:14 -08008222 sp = netdev_priv(dev);
Tejun Heo23f333a2010-12-12 16:45:14 +01008223
8224 cancel_work_sync(&sp->rst_timer_task);
8225 cancel_work_sync(&sp->set_link_task);
8226
Linus Torvalds1da177e2005-04-16 15:20:36 -07008227 unregister_netdev(dev);
8228
8229 free_shared_mem(sp);
8230 iounmap(sp->bar0);
8231 iounmap(sp->bar1);
Veena Parateccb8622007-07-23 02:23:54 -04008232 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008233 pci_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008234 free_netdev(dev);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05008235 pci_disable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008236}
8237
8238/**
8239 * s2io_starter - Entry point for the driver
8240 * Description: This function is the entry point for the driver. It verifies
8241 * the module loadable parameters and initializes PCI configuration space.
8242 */
8243
Stephen Hemminger43b7c452007-10-05 12:39:21 -07008244static int __init s2io_starter(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008245{
Jeff Garzik29917622006-08-19 17:48:59 -04008246 return pci_register_driver(&s2io_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008247}
8248
8249/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008250 * s2io_closer - Cleanup routine for the driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008251 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
8252 */
8253
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008254static __exit void s2io_closer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008255{
8256 pci_unregister_driver(&s2io_driver);
8257 DBG_PRINT(INIT_DBG, "cleanup done\n");
8258}
8259
8260module_init(s2io_starter);
8261module_exit(s2io_closer);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008262
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008263static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
Joe Perchesd44570e2009-08-24 17:29:44 +00008264 struct tcphdr **tcp, struct RxD_t *rxdp,
8265 struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008266{
8267 int ip_off;
8268 u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;
8269
8270 if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
Joe Perchesd44570e2009-08-24 17:29:44 +00008271 DBG_PRINT(INIT_DBG,
8272 "%s: Non-TCP frames not supported for LRO\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008273 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008274 return -1;
8275 }
8276
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008277 /* Checking for DIX type or DIX type with VLAN */
Joe Perchesd44570e2009-08-24 17:29:44 +00008278 if ((l2_type == 0) || (l2_type == 4)) {
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008279 ip_off = HEADER_ETHERNET_II_802_3_SIZE;
8280 /*
8281 * If vlan stripping is disabled and the frame is VLAN tagged,
8282 * shift the offset by the VLAN header size bytes.
8283 */
Breno Leitaocd0fce02008-09-04 17:52:54 -03008284 if ((!sp->vlan_strip_flag) &&
Joe Perchesd44570e2009-08-24 17:29:44 +00008285 (rxdp->Control_1 & RXD_FRAME_VLAN_TAG))
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008286 ip_off += HEADER_VLAN_SIZE;
8287 } else {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008288 /* LLC, SNAP etc are considered non-mergeable */
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008289 return -1;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008290 }
8291
8292 *ip = (struct iphdr *)((u8 *)buffer + ip_off);
8293 ip_len = (u8)((*ip)->ihl);
8294 ip_len <<= 2;
8295 *tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);
8296
8297 return 0;
8298}
8299
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008300static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008301 struct tcphdr *tcp)
8302{
Joe Perchesd44570e2009-08-24 17:29:44 +00008303 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
8304 if ((lro->iph->saddr != ip->saddr) ||
8305 (lro->iph->daddr != ip->daddr) ||
8306 (lro->tcph->source != tcp->source) ||
8307 (lro->tcph->dest != tcp->dest))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008308 return -1;
8309 return 0;
8310}
8311
8312static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
8313{
Joe Perchesd44570e2009-08-24 17:29:44 +00008314 return ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008315}
8316
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008317static void initiate_new_session(struct lro *lro, u8 *l2h,
Joe Perchesd44570e2009-08-24 17:29:44 +00008318 struct iphdr *ip, struct tcphdr *tcp,
8319 u32 tcp_pyld_len, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008320{
Joe Perchesd44570e2009-08-24 17:29:44 +00008321 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008322 lro->l2h = l2h;
8323 lro->iph = ip;
8324 lro->tcph = tcp;
8325 lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
Surjit Reangc8855952008-02-03 04:27:38 -08008326 lro->tcp_ack = tcp->ack_seq;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008327 lro->sg_num = 1;
8328 lro->total_len = ntohs(ip->tot_len);
8329 lro->frags_len = 0;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008330 lro->vlan_tag = vlan_tag;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008331 /*
Joe Perchesd44570e2009-08-24 17:29:44 +00008332 * Check if we saw TCP timestamp.
8333 * Other consistency checks have already been done.
8334 */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008335 if (tcp->doff == 8) {
Surjit Reangc8855952008-02-03 04:27:38 -08008336 __be32 *ptr;
8337 ptr = (__be32 *)(tcp+1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008338 lro->saw_ts = 1;
Surjit Reangc8855952008-02-03 04:27:38 -08008339 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008340 lro->cur_tsecr = *(ptr+2);
8341 }
8342 lro->in_use = 1;
8343}
8344
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008345static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008346{
8347 struct iphdr *ip = lro->iph;
8348 struct tcphdr *tcp = lro->tcph;
Al Virobd4f3ae2007-02-09 16:40:15 +00008349 __sum16 nchk;
Joe Perchesffb5df62009-08-24 17:29:47 +00008350 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
8351
Joe Perchesd44570e2009-08-24 17:29:44 +00008352 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008353
8354 /* Update L3 header */
8355 ip->tot_len = htons(lro->total_len);
8356 ip->check = 0;
8357 nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
8358 ip->check = nchk;
8359
8360 /* Update L4 header */
8361 tcp->ack_seq = lro->tcp_ack;
8362 tcp->window = lro->window;
8363
8364 /* Update tsecr field if this session has timestamps enabled */
8365 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008366 __be32 *ptr = (__be32 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008367 *(ptr+2) = lro->cur_tsecr;
8368 }
8369
8370 /* Update counters required for calculation of
8371 * average no. of packets aggregated.
8372 */
Joe Perchesffb5df62009-08-24 17:29:47 +00008373 swstats->sum_avg_pkts_aggregated += lro->sg_num;
8374 swstats->num_aggregations++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008375}
8376
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008377static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
Joe Perchesd44570e2009-08-24 17:29:44 +00008378 struct tcphdr *tcp, u32 l4_pyld)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008379{
Joe Perchesd44570e2009-08-24 17:29:44 +00008380 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008381 lro->total_len += l4_pyld;
8382 lro->frags_len += l4_pyld;
8383 lro->tcp_next_seq += l4_pyld;
8384 lro->sg_num++;
8385
8386 /* Update ack seq no. and window ad(from this pkt) in LRO object */
8387 lro->tcp_ack = tcp->ack_seq;
8388 lro->window = tcp->window;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008389
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008390 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008391 __be32 *ptr;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008392 /* Update tsecr and tsval from this packet */
Surjit Reangc8855952008-02-03 04:27:38 -08008393 ptr = (__be32 *)(tcp+1);
8394 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008395 lro->cur_tsecr = *(ptr + 2);
8396 }
8397}
8398
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008399static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008400 struct tcphdr *tcp, u32 tcp_pyld_len)
8401{
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008402 u8 *ptr;
8403
Joe Perchesd44570e2009-08-24 17:29:44 +00008404 DBG_PRINT(INFO_DBG, "%s: Been here...\n", __func__);
Andrew Morton79dc1902006-02-03 01:45:13 -08008405
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008406 if (!tcp_pyld_len) {
8407 /* Runt frame or a pure ack */
8408 return -1;
8409 }
8410
8411 if (ip->ihl != 5) /* IP has options */
8412 return -1;
8413
Ananda Raju75c30b12006-07-24 19:55:09 -04008414 /* If we see CE codepoint in IP header, packet is not mergeable */
8415 if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
8416 return -1;
8417
8418 /* If we see ECE or CWR flags in TCP header, packet is not mergeable */
Joe Perchesd44570e2009-08-24 17:29:44 +00008419 if (tcp->urg || tcp->psh || tcp->rst ||
8420 tcp->syn || tcp->fin ||
8421 tcp->ece || tcp->cwr || !tcp->ack) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008422 /*
8423 * Currently recognize only the ack control word and
8424 * any other control field being set would result in
8425 * flushing the LRO session
8426 */
8427 return -1;
8428 }
8429
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008430 /*
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008431 * Allow only one TCP timestamp option. Don't aggregate if
8432 * any other options are detected.
8433 */
8434 if (tcp->doff != 5 && tcp->doff != 8)
8435 return -1;
8436
8437 if (tcp->doff == 8) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008438 ptr = (u8 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008439 while (*ptr == TCPOPT_NOP)
8440 ptr++;
8441 if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
8442 return -1;
8443
8444 /* Ensure timestamp value increases monotonically */
8445 if (l_lro)
Surjit Reangc8855952008-02-03 04:27:38 -08008446 if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2))))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008447 return -1;
8448
8449 /* timestamp echo reply should be non-zero */
Surjit Reangc8855952008-02-03 04:27:38 -08008450 if (*((__be32 *)(ptr+6)) == 0)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008451 return -1;
8452 }
8453
8454 return 0;
8455}
8456
Joe Perchesd44570e2009-08-24 17:29:44 +00008457static int s2io_club_tcp_session(struct ring_info *ring_data, u8 *buffer,
8458 u8 **tcp, u32 *tcp_len, struct lro **lro,
8459 struct RxD_t *rxdp, struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008460{
8461 struct iphdr *ip;
8462 struct tcphdr *tcph;
8463 int ret = 0, i;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008464 u16 vlan_tag = 0;
Joe Perchesffb5df62009-08-24 17:29:47 +00008465 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008466
Joe Perchesd44570e2009-08-24 17:29:44 +00008467 ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
8468 rxdp, sp);
8469 if (ret)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008470 return ret;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008471
Joe Perchesd44570e2009-08-24 17:29:44 +00008472 DBG_PRINT(INFO_DBG, "IP Saddr: %x Daddr: %x\n", ip->saddr, ip->daddr);
8473
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008474 vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008475 tcph = (struct tcphdr *)*tcp;
8476 *tcp_len = get_l4_pyld_length(ip, tcph);
Joe Perchesd44570e2009-08-24 17:29:44 +00008477 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008478 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008479 if (l_lro->in_use) {
8480 if (check_for_socket_match(l_lro, ip, tcph))
8481 continue;
8482 /* Sock pair matched */
8483 *lro = l_lro;
8484
8485 if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
Joe Perches9e39f7c2009-08-25 08:52:00 +00008486 DBG_PRINT(INFO_DBG, "%s: Out of sequence. "
8487 "expected 0x%x, actual 0x%x\n",
8488 __func__,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008489 (*lro)->tcp_next_seq,
8490 ntohl(tcph->seq));
8491
Joe Perchesffb5df62009-08-24 17:29:47 +00008492 swstats->outof_sequence_pkts++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008493 ret = 2;
8494 break;
8495 }
8496
Joe Perchesd44570e2009-08-24 17:29:44 +00008497 if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,
8498 *tcp_len))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008499 ret = 1; /* Aggregate */
8500 else
8501 ret = 2; /* Flush both */
8502 break;
8503 }
8504 }
8505
8506 if (ret == 0) {
8507 /* Before searching for available LRO objects,
8508 * check if the pkt is L3/L4 aggregatable. If not
8509 * don't create new LRO session. Just send this
8510 * packet up.
8511 */
Joe Perchesd44570e2009-08-24 17:29:44 +00008512 if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008513 return 5;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008514
Joe Perchesd44570e2009-08-24 17:29:44 +00008515 for (i = 0; i < MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008516 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008517 if (!(l_lro->in_use)) {
8518 *lro = l_lro;
8519 ret = 3; /* Begin anew */
8520 break;
8521 }
8522 }
8523 }
8524
8525 if (ret == 0) { /* sessions exceeded */
Joe Perches9e39f7c2009-08-25 08:52:00 +00008526 DBG_PRINT(INFO_DBG, "%s: All LRO sessions already in use\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008527 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008528 *lro = NULL;
8529 return ret;
8530 }
8531
8532 switch (ret) {
Joe Perchesd44570e2009-08-24 17:29:44 +00008533 case 3:
8534 initiate_new_session(*lro, buffer, ip, tcph, *tcp_len,
8535 vlan_tag);
8536 break;
8537 case 2:
8538 update_L3L4_header(sp, *lro);
8539 break;
8540 case 1:
8541 aggregate_new_rx(*lro, ip, tcph, *tcp_len);
8542 if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008543 update_L3L4_header(sp, *lro);
Joe Perchesd44570e2009-08-24 17:29:44 +00008544 ret = 4; /* Flush the LRO */
8545 }
8546 break;
8547 default:
Joe Perches9e39f7c2009-08-25 08:52:00 +00008548 DBG_PRINT(ERR_DBG, "%s: Don't know, can't say!!\n", __func__);
Joe Perchesd44570e2009-08-24 17:29:44 +00008549 break;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008550 }
8551
8552 return ret;
8553}
8554
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008555static void clear_lro_session(struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008556{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008557 static u16 lro_struct_size = sizeof(struct lro);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008558
8559 memset(lro, 0, lro_struct_size);
8560}
8561
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008562static void queue_rx_frame(struct sk_buff *skb, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008563{
8564 struct net_device *dev = skb->dev;
Wang Chen4cf16532008-11-12 23:38:14 -08008565 struct s2io_nic *sp = netdev_priv(dev);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008566
8567 skb->protocol = eth_type_trans(skb, dev);
Jiri Pirkob85da2c2011-07-20 04:54:24 +00008568 if (vlan_tag && sp->vlan_strip_flag)
8569 __vlan_hwaccel_put_tag(skb, vlan_tag);
8570 if (sp->config.napi)
8571 netif_receive_skb(skb);
8572 else
8573 netif_rx(skb);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008574}
8575
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008576static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
Joe Perchesd44570e2009-08-24 17:29:44 +00008577 struct sk_buff *skb, u32 tcp_len)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008578{
Ananda Raju75c30b12006-07-24 19:55:09 -04008579 struct sk_buff *first = lro->parent;
Joe Perchesffb5df62009-08-24 17:29:47 +00008580 struct swStat *swstats = &sp->mac_control.stats_info->sw_stat;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008581
8582 first->len += tcp_len;
8583 first->data_len = lro->frags_len;
8584 skb_pull(skb, (skb->len - tcp_len));
Ananda Raju75c30b12006-07-24 19:55:09 -04008585 if (skb_shinfo(first)->frag_list)
8586 lro->last_frag->next = skb;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008587 else
8588 skb_shinfo(first)->frag_list = skb;
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008589 first->truesize += skb->truesize;
Ananda Raju75c30b12006-07-24 19:55:09 -04008590 lro->last_frag = skb;
Joe Perchesffb5df62009-08-24 17:29:47 +00008591 swstats->clubbed_frms_cnt++;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008592}
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008593
8594/**
8595 * s2io_io_error_detected - called when PCI error is detected
8596 * @pdev: Pointer to PCI device
Rolf Eike Beer8453d432007-07-10 11:58:02 +02008597 * @state: The current pci connection state
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008598 *
8599 * This function is called after a PCI bus error affecting
8600 * this device has been detected.
8601 */
8602static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
Joe Perchesd44570e2009-08-24 17:29:44 +00008603 pci_channel_state_t state)
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008604{
8605 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008606 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008607
8608 netif_device_detach(netdev);
8609
Dean Nelson1e3c8bd2009-07-31 09:13:56 +00008610 if (state == pci_channel_io_perm_failure)
8611 return PCI_ERS_RESULT_DISCONNECT;
8612
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008613 if (netif_running(netdev)) {
8614 /* Bring down the card, while avoiding PCI I/O */
8615 do_s2io_card_down(sp, 0);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008616 }
8617 pci_disable_device(pdev);
8618
8619 return PCI_ERS_RESULT_NEED_RESET;
8620}
8621
8622/**
8623 * s2io_io_slot_reset - called after the pci bus has been reset.
8624 * @pdev: Pointer to PCI device
8625 *
8626 * Restart the card from scratch, as if from a cold-boot.
8627 * At this point, the card has exprienced a hard reset,
8628 * followed by fixups by BIOS, and has its config space
8629 * set up identically to what it was at cold boot.
8630 */
8631static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
8632{
8633 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008634 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008635
8636 if (pci_enable_device(pdev)) {
Joe Perches6cef2b82009-08-24 17:29:45 +00008637 pr_err("Cannot re-enable PCI device after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008638 return PCI_ERS_RESULT_DISCONNECT;
8639 }
8640
8641 pci_set_master(pdev);
8642 s2io_reset(sp);
8643
8644 return PCI_ERS_RESULT_RECOVERED;
8645}
8646
8647/**
8648 * s2io_io_resume - called when traffic can start flowing again.
8649 * @pdev: Pointer to PCI device
8650 *
8651 * This callback is called when the error recovery driver tells
8652 * us that its OK to resume normal operation.
8653 */
8654static void s2io_io_resume(struct pci_dev *pdev)
8655{
8656 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008657 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008658
8659 if (netif_running(netdev)) {
8660 if (s2io_card_up(sp)) {
Joe Perches6cef2b82009-08-24 17:29:45 +00008661 pr_err("Can't bring device back up after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008662 return;
8663 }
8664
8665 if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
8666 s2io_card_down(sp);
Joe Perches6cef2b82009-08-24 17:29:45 +00008667 pr_err("Can't restore mac addr after reset.\n");
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008668 return;
8669 }
8670 }
8671
8672 netif_device_attach(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07008673 netif_tx_wake_all_queues(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008674}