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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
Huaibin Yanga5419422011-12-08 23:52:10 -080020#include <mach/msm_memtypes.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080021#include <mach/board.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Ajay Dudani9114be72011-12-03 07:46:35 -080024#include <mach/socinfo.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080025#include "devices.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080026
27/* TODO: Remove this once PM8038 physically becomes
28 * available.
29 */
30#ifndef MSM8930_PHASE_2
31#include "board-8960.h"
32#else
Stepan Moskovchenko5a83dba2011-12-05 17:30:17 -080033#include "board-8930.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080034#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080035
36#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
37#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
38#else
39#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
40#endif
41
42#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
43#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
44#elif defined(CONFIG_FB_MSM_TVOUT)
45#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
46#else
47#define MSM_FB_EXT_BUF_SIZE 0
48#endif
49
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080050#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
51/* 4 bpp x 2 page HDMI case */
52#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
53#else
54/* Note: must be multiple of 4096 */
Huaibin Yang27634b82011-12-09 00:16:25 -080055#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080056#endif
57
Huaibin Yanga5419422011-12-08 23:52:10 -080058#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
59#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
60#else
61#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
62#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
63
64#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
65#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
66#else
67#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
68#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
69
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080070#define MDP_VSYNC_GPIO 0
71
72#define PANEL_NAME_MAX_LEN 30
73#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
74#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
75#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
76#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
77#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
78#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
79#define HDMI_PANEL_NAME "hdmi_msm"
80#define TVOUT_PANEL_NAME "tvout_msm"
81
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080082static struct resource msm_fb_resources[] = {
83 {
84 .flags = IORESOURCE_DMA,
85 }
86};
87
88static int msm_fb_detect_panel(const char *name)
89{
90 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
91 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
92 PANEL_NAME_MAX_LEN)))
93 return 0;
94
95#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
96 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
97 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
98 PANEL_NAME_MAX_LEN)))
99 return 0;
100
101 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
102 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
103 PANEL_NAME_MAX_LEN)))
104 return 0;
105
106 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
107 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
108 PANEL_NAME_MAX_LEN)))
109 return 0;
110
111 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
112 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
113 PANEL_NAME_MAX_LEN)))
114 return 0;
115#endif
116
117 if (!strncmp(name, HDMI_PANEL_NAME,
118 strnlen(HDMI_PANEL_NAME,
119 PANEL_NAME_MAX_LEN)))
120 return 0;
121
122 if (!strncmp(name, TVOUT_PANEL_NAME,
123 strnlen(TVOUT_PANEL_NAME,
124 PANEL_NAME_MAX_LEN)))
125 return 0;
126
127 pr_warning("%s: not supported '%s'", __func__, name);
128 return -ENODEV;
129}
130
131static struct msm_fb_platform_data msm_fb_pdata = {
132 .detect_client = msm_fb_detect_panel,
133};
134
135static struct platform_device msm_fb_device = {
136 .name = "msm_fb",
137 .id = 0,
138 .num_resources = ARRAY_SIZE(msm_fb_resources),
139 .resource = msm_fb_resources,
140 .dev.platform_data = &msm_fb_pdata,
141};
142
143static bool dsi_power_on;
144
Jay Chokshi06fa7542011-12-07 13:09:17 -0800145/*
146 * TODO: When physical 8930/PM8038 hardware becomes
147 * available, replace mipi_dsi_cdp_panel_power with
148 * appropriate function.
149 */
150#ifndef MSM8930_PHASE_2
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800151static int mipi_dsi_cdp_panel_power(int on)
152{
153 static struct regulator *reg_l8, *reg_l23, *reg_l2;
154 static int gpio43;
155 int rc;
156
157 pr_info("%s: state : %d\n", __func__, on);
158
159 if (!dsi_power_on) {
160
161 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
162 "dsi_vdc");
163 if (IS_ERR(reg_l8)) {
164 pr_err("could not get 8921_l8, rc = %ld\n",
165 PTR_ERR(reg_l8));
166 return -ENODEV;
167 }
168 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
169 "dsi_vddio");
170 if (IS_ERR(reg_l23)) {
171 pr_err("could not get 8921_l23, rc = %ld\n",
172 PTR_ERR(reg_l23));
173 return -ENODEV;
174 }
175 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
176 "dsi_vdda");
177 if (IS_ERR(reg_l2)) {
178 pr_err("could not get 8921_l2, rc = %ld\n",
179 PTR_ERR(reg_l2));
180 return -ENODEV;
181 }
182 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
183 if (rc) {
184 pr_err("set_voltage l8 failed, rc=%d\n", rc);
185 return -EINVAL;
186 }
187 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
188 if (rc) {
189 pr_err("set_voltage l23 failed, rc=%d\n", rc);
190 return -EINVAL;
191 }
192 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
193 if (rc) {
194 pr_err("set_voltage l2 failed, rc=%d\n", rc);
195 return -EINVAL;
196 }
197 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
198 rc = gpio_request(gpio43, "disp_rst_n");
199 if (rc) {
200 pr_err("request gpio 43 failed, rc=%d\n", rc);
201 return -ENODEV;
202 }
203 dsi_power_on = true;
204 }
205 if (on) {
206 rc = regulator_set_optimum_mode(reg_l8, 100000);
207 if (rc < 0) {
208 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
209 return -EINVAL;
210 }
211 rc = regulator_set_optimum_mode(reg_l23, 100000);
212 if (rc < 0) {
213 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
214 return -EINVAL;
215 }
216 rc = regulator_set_optimum_mode(reg_l2, 100000);
217 if (rc < 0) {
218 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
219 return -EINVAL;
220 }
221 rc = regulator_enable(reg_l8);
222 if (rc) {
223 pr_err("enable l8 failed, rc=%d\n", rc);
224 return -ENODEV;
225 }
226 rc = regulator_enable(reg_l23);
227 if (rc) {
228 pr_err("enable l8 failed, rc=%d\n", rc);
229 return -ENODEV;
230 }
231 rc = regulator_enable(reg_l2);
232 if (rc) {
233 pr_err("enable l2 failed, rc=%d\n", rc);
234 return -ENODEV;
235 }
236 gpio_set_value_cansleep(gpio43, 1);
237 } else {
238 rc = regulator_disable(reg_l2);
239 if (rc) {
240 pr_err("disable reg_l2 failed, rc=%d\n", rc);
241 return -ENODEV;
242 }
243 rc = regulator_disable(reg_l8);
244 if (rc) {
245 pr_err("disable reg_l8 failed, rc=%d\n", rc);
246 return -ENODEV;
247 }
248 rc = regulator_disable(reg_l23);
249 if (rc) {
250 pr_err("disable reg_l23 failed, rc=%d\n", rc);
251 return -ENODEV;
252 }
253 rc = regulator_set_optimum_mode(reg_l8, 100);
254 if (rc < 0) {
255 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
256 return -EINVAL;
257 }
258 rc = regulator_set_optimum_mode(reg_l23, 100);
259 if (rc < 0) {
260 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
261 return -EINVAL;
262 }
263 rc = regulator_set_optimum_mode(reg_l2, 100);
264 if (rc < 0) {
265 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
266 return -EINVAL;
267 }
268 gpio_set_value_cansleep(gpio43, 0);
269 }
270 return 0;
271}
Jay Chokshi06fa7542011-12-07 13:09:17 -0800272#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800273
274static int mipi_dsi_panel_power(int on)
275{
276 pr_info("%s: on=%d\n", __func__, on);
277
278 return mipi_dsi_cdp_panel_power(on);
279}
280
281static struct mipi_dsi_platform_data mipi_dsi_pdata = {
282 .vsync_gpio = MDP_VSYNC_GPIO,
283 .dsi_power_save = mipi_dsi_panel_power,
284};
285
286#ifdef CONFIG_MSM_BUS_SCALING
287
288static struct msm_bus_vectors mdp_init_vectors[] = {
289 {
290 .src = MSM_BUS_MASTER_MDP_PORT0,
291 .dst = MSM_BUS_SLAVE_EBI_CH0,
292 .ab = 0,
293 .ib = 0,
294 },
295};
296
297#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
298static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
299 /* If HDMI is used as primary */
300 {
301 .src = MSM_BUS_MASTER_MDP_PORT0,
302 .dst = MSM_BUS_SLAVE_EBI_CH0,
303 .ab = 2000000000,
304 .ib = 2000000000,
305 },
306};
307static struct msm_bus_paths mdp_bus_scale_usecases[] = {
308 {
309 ARRAY_SIZE(mdp_init_vectors),
310 mdp_init_vectors,
311 },
312 {
313 ARRAY_SIZE(hdmi_as_primary_vectors),
314 hdmi_as_primary_vectors,
315 },
316 {
317 ARRAY_SIZE(hdmi_as_primary_vectors),
318 hdmi_as_primary_vectors,
319 },
320 {
321 ARRAY_SIZE(hdmi_as_primary_vectors),
322 hdmi_as_primary_vectors,
323 },
324 {
325 ARRAY_SIZE(hdmi_as_primary_vectors),
326 hdmi_as_primary_vectors,
327 },
328 {
329 ARRAY_SIZE(hdmi_as_primary_vectors),
330 hdmi_as_primary_vectors,
331 },
332};
333#else
334static struct msm_bus_vectors mdp_ui_vectors[] = {
335 {
336 .src = MSM_BUS_MASTER_MDP_PORT0,
337 .dst = MSM_BUS_SLAVE_EBI_CH0,
338 .ab = 216000000 * 2,
339 .ib = 270000000 * 2,
340 },
341};
342
343static struct msm_bus_vectors mdp_vga_vectors[] = {
344 /* VGA and less video */
345 {
346 .src = MSM_BUS_MASTER_MDP_PORT0,
347 .dst = MSM_BUS_SLAVE_EBI_CH0,
348 .ab = 216000000 * 2,
349 .ib = 270000000 * 2,
350 },
351};
352
353static struct msm_bus_vectors mdp_720p_vectors[] = {
354 /* 720p and less video */
355 {
356 .src = MSM_BUS_MASTER_MDP_PORT0,
357 .dst = MSM_BUS_SLAVE_EBI_CH0,
358 .ab = 230400000 * 2,
359 .ib = 288000000 * 2,
360 },
361};
362
363static struct msm_bus_vectors mdp_1080p_vectors[] = {
364 /* 1080p and less video */
365 {
366 .src = MSM_BUS_MASTER_MDP_PORT0,
367 .dst = MSM_BUS_SLAVE_EBI_CH0,
368 .ab = 334080000 * 2,
369 .ib = 417600000 * 2,
370 },
371};
372
373static struct msm_bus_paths mdp_bus_scale_usecases[] = {
374 {
375 ARRAY_SIZE(mdp_init_vectors),
376 mdp_init_vectors,
377 },
378 {
379 ARRAY_SIZE(mdp_ui_vectors),
380 mdp_ui_vectors,
381 },
382 {
383 ARRAY_SIZE(mdp_ui_vectors),
384 mdp_ui_vectors,
385 },
386 {
387 ARRAY_SIZE(mdp_vga_vectors),
388 mdp_vga_vectors,
389 },
390 {
391 ARRAY_SIZE(mdp_720p_vectors),
392 mdp_720p_vectors,
393 },
394 {
395 ARRAY_SIZE(mdp_1080p_vectors),
396 mdp_1080p_vectors,
397 },
398};
399#endif
400
401static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
402 mdp_bus_scale_usecases,
403 ARRAY_SIZE(mdp_bus_scale_usecases),
404 .name = "mdp",
405};
406
407#endif
408
409#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
410static int mdp_core_clk_rate_table[] = {
411 200000000,
412 200000000,
413 200000000,
414 200000000,
415};
416#else
417static int mdp_core_clk_rate_table[] = {
418 85330000,
419 85330000,
420 160000000,
421 200000000,
422};
423#endif
424
425static struct msm_panel_common_pdata mdp_pdata = {
426 .gpio = MDP_VSYNC_GPIO,
427#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
428 .mdp_core_clk_rate = 200000000,
429#else
430 .mdp_core_clk_rate = 85330000,
431#endif
432 .mdp_core_clk_table = mdp_core_clk_rate_table,
433 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
434#ifdef CONFIG_MSM_BUS_SCALING
435 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
436#endif
437 .mdp_rev = MDP_REV_42,
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800438};
439
Huaibin Yanga5419422011-12-08 23:52:10 -0800440void __init msm8930_mdp_writeback(struct memtype_reserve* reserve_table)
441{
Huaibin Yanga5419422011-12-08 23:52:10 -0800442
Huaibin Yanga5419422011-12-08 23:52:10 -0800443}
444
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800445#define LPM_CHANNEL0 0
446static int toshiba_gpio[] = {LPM_CHANNEL0};
447
448static struct mipi_dsi_panel_platform_data toshiba_pdata = {
449 .gpio = toshiba_gpio,
450};
451
452static struct platform_device mipi_dsi_toshiba_panel_device = {
453 .name = "mipi_toshiba",
454 .id = 0,
455 .dev = {
456 .platform_data = &toshiba_pdata,
457 }
458};
459
460#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
461
462static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
463
464/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
465 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
466 /* timing */
467 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
468 0x0c, 0x03, 0x04, 0xa0},
469 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
470 {0xff, 0x00, 0x06, 0x00}, /* strength */
471 /* pll control */
472 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
473 0x40, 0x07, 0x03,
474 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
475};
476
477static struct mipi_dsi_panel_platform_data novatek_pdata = {
478 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
479 .fpga_ctrl_mode = FPGA_SPI_INTF,
480 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
481};
482
483static struct platform_device mipi_dsi_novatek_panel_device = {
484 .name = "mipi_novatek",
485 .id = 0,
486 .dev = {
487 .platform_data = &novatek_pdata,
488 }
489};
490
491#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
492static struct resource hdmi_msm_resources[] = {
493 {
494 .name = "hdmi_msm_qfprom_addr",
495 .start = 0x00700000,
496 .end = 0x007060FF,
497 .flags = IORESOURCE_MEM,
498 },
499 {
500 .name = "hdmi_msm_hdmi_addr",
501 .start = 0x04A00000,
502 .end = 0x04A00FFF,
503 .flags = IORESOURCE_MEM,
504 },
505 {
506 .name = "hdmi_msm_irq",
507 .start = HDMI_IRQ,
508 .end = HDMI_IRQ,
509 .flags = IORESOURCE_IRQ,
510 },
511};
512
513static int hdmi_enable_5v(int on);
514static int hdmi_core_power(int on, int show);
515static int hdmi_cec_power(int on);
516
517static struct msm_hdmi_platform_data hdmi_msm_data = {
518 .irq = HDMI_IRQ,
519 .enable_5v = hdmi_enable_5v,
520 .core_power = hdmi_core_power,
521 .cec_power = hdmi_cec_power,
522};
523
524static struct platform_device hdmi_msm_device = {
525 .name = "hdmi_msm",
526 .id = 0,
527 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
528 .resource = hdmi_msm_resources,
529 .dev.platform_data = &hdmi_msm_data,
530};
531#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
532
533#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
534static struct platform_device wfd_panel_device = {
535 .name = "wfd_panel",
536 .id = 0,
537 .dev.platform_data = NULL,
538};
539
540static struct platform_device wfd_device = {
541 .name = "msm_wfd",
542 .id = -1,
543};
544#endif
545
546#ifdef CONFIG_MSM_BUS_SCALING
547static struct msm_bus_vectors dtv_bus_init_vectors[] = {
548 {
549 .src = MSM_BUS_MASTER_MDP_PORT0,
550 .dst = MSM_BUS_SLAVE_EBI_CH0,
551 .ab = 0,
552 .ib = 0,
553 },
554};
555
556#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
557static struct msm_bus_vectors dtv_bus_def_vectors[] = {
558 {
559 .src = MSM_BUS_MASTER_MDP_PORT0,
560 .dst = MSM_BUS_SLAVE_EBI_CH0,
561 .ab = 2000000000,
562 .ib = 2000000000,
563 },
564};
565#else
566static struct msm_bus_vectors dtv_bus_def_vectors[] = {
567 {
568 .src = MSM_BUS_MASTER_MDP_PORT0,
569 .dst = MSM_BUS_SLAVE_EBI_CH0,
570 .ab = 566092800 * 2,
571 .ib = 707616000 * 2,
572 },
573};
574#endif
575
576static struct msm_bus_paths dtv_bus_scale_usecases[] = {
577 {
578 ARRAY_SIZE(dtv_bus_init_vectors),
579 dtv_bus_init_vectors,
580 },
581 {
582 ARRAY_SIZE(dtv_bus_def_vectors),
583 dtv_bus_def_vectors,
584 },
585};
586static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
587 dtv_bus_scale_usecases,
588 ARRAY_SIZE(dtv_bus_scale_usecases),
589 .name = "dtv",
590};
591
592static struct lcdc_platform_data dtv_pdata = {
593 .bus_scale_table = &dtv_bus_scale_pdata,
594};
595#endif
596
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800597#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800598static int hdmi_enable_5v(int on)
599{
600 /* TBD: PM8921 regulator instead of 8901 */
601 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
602 static int prev_on;
603 int rc;
604
605 if (on == prev_on)
606 return 0;
607
608 if (!reg_8921_hdmi_mvs)
609 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
610 "hdmi_mvs");
611
612 if (on) {
613 rc = regulator_enable(reg_8921_hdmi_mvs);
614 if (rc) {
615 pr_err("'%s' regulator enable failed, rc=%d\n",
616 "8921_hdmi_mvs", rc);
617 return rc;
618 }
619 pr_debug("%s(on): success\n", __func__);
620 } else {
621 rc = regulator_disable(reg_8921_hdmi_mvs);
622 if (rc)
623 pr_warning("'%s' regulator disable failed, rc=%d\n",
624 "8921_hdmi_mvs", rc);
625 pr_debug("%s(off): success\n", __func__);
626 }
627
628 prev_on = on;
629
630 return 0;
631}
632
633static int hdmi_core_power(int on, int show)
634{
635 static struct regulator *reg_8921_l23, *reg_8921_s4;
636 static int prev_on;
637 int rc;
638
639 if (on == prev_on)
640 return 0;
641
642 /* TBD: PM8921 regulator instead of 8901 */
643 if (!reg_8921_l23) {
644 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
645 if (IS_ERR(reg_8921_l23)) {
646 pr_err("could not get reg_8921_l23, rc = %ld\n",
647 PTR_ERR(reg_8921_l23));
648 return -ENODEV;
649 }
650 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
651 if (rc) {
652 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
653 return -EINVAL;
654 }
655 }
656 if (!reg_8921_s4) {
657 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
658 if (IS_ERR(reg_8921_s4)) {
659 pr_err("could not get reg_8921_s4, rc = %ld\n",
660 PTR_ERR(reg_8921_s4));
661 return -ENODEV;
662 }
663 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
664 if (rc) {
665 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
666 return -EINVAL;
667 }
668 }
669
670 if (on) {
671 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
672 if (rc < 0) {
673 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
674 return -EINVAL;
675 }
676 rc = regulator_enable(reg_8921_l23);
677 if (rc) {
678 pr_err("'%s' regulator enable failed, rc=%d\n",
679 "hdmi_avdd", rc);
680 return rc;
681 }
682 rc = regulator_enable(reg_8921_s4);
683 if (rc) {
684 pr_err("'%s' regulator enable failed, rc=%d\n",
685 "hdmi_vcc", rc);
686 return rc;
687 }
688 rc = gpio_request(100, "HDMI_DDC_CLK");
689 if (rc) {
690 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
691 "HDMI_DDC_CLK", 100, rc);
692 goto error1;
693 }
694 rc = gpio_request(101, "HDMI_DDC_DATA");
695 if (rc) {
696 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
697 "HDMI_DDC_DATA", 101, rc);
698 goto error2;
699 }
700 rc = gpio_request(102, "HDMI_HPD");
701 if (rc) {
702 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
703 "HDMI_HPD", 102, rc);
704 goto error3;
705 }
706 pr_debug("%s(on): success\n", __func__);
707 } else {
708 gpio_free(100);
709 gpio_free(101);
710 gpio_free(102);
711
712 rc = regulator_disable(reg_8921_l23);
713 if (rc) {
714 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
715 return -ENODEV;
716 }
717 rc = regulator_disable(reg_8921_s4);
718 if (rc) {
719 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
720 return -ENODEV;
721 }
722 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
723 if (rc < 0) {
724 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
725 return -EINVAL;
726 }
727 pr_debug("%s(off): success\n", __func__);
728 }
729
730 prev_on = on;
731
732 return 0;
733
734error3:
735 gpio_free(101);
736error2:
737 gpio_free(100);
738error1:
739 regulator_disable(reg_8921_l23);
740 regulator_disable(reg_8921_s4);
741 return rc;
742}
743
744static int hdmi_cec_power(int on)
745{
746 static int prev_on;
747 int rc;
748
749 if (on == prev_on)
750 return 0;
751
752 if (on) {
753 rc = gpio_request(99, "HDMI_CEC_VAR");
754 if (rc) {
755 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
756 "HDMI_CEC_VAR", 99, rc);
757 goto error;
758 }
759 pr_debug("%s(on): success\n", __func__);
760 } else {
761 gpio_free(99);
762 pr_debug("%s(off): success\n", __func__);
763 }
764
765 prev_on = on;
766
767 return 0;
768error:
769 return rc;
770}
771#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
772
773void __init msm8930_init_fb(void)
774{
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800775 platform_device_register(&msm_fb_device);
776
777#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
778 platform_device_register(&wfd_panel_device);
779 platform_device_register(&wfd_device);
780#endif
781
782 platform_device_register(&mipi_dsi_novatek_panel_device);
783
784#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Ajay Dudani52e88232011-12-13 13:33:10 -0800785 if (!cpu_is_msm8930())
Ajay Dudani9114be72011-12-03 07:46:35 -0800786 platform_device_register(&hdmi_msm_device);
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800787#endif
788
789 platform_device_register(&mipi_dsi_toshiba_panel_device);
790
791 msm_fb_register_device("mdp", &mdp_pdata);
792 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
793#ifdef CONFIG_MSM_BUS_SCALING
794 msm_fb_register_device("dtv", &dtv_pdata);
795#endif
796}
797
798void __init msm8930_allocate_fb_region(void)
799{
800 void *addr;
801 unsigned long size;
802
803 size = MSM_FB_SIZE;
804 addr = alloc_bootmem_align(size, 0x1000);
805 msm_fb_resources[0].start = __pa(addr);
806 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
807 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
808 size, addr, __pa(addr));
809}