blob: e716c622a17ca81660fc13819fe6f52b396440c4 [file] [log] [blame]
Eric Miaof8dec042009-01-15 16:42:56 +08001/*
2 * linux/arch/arm/plat-pxa/mfp.c
3 *
4 * Multi-Function Pin Support
5 *
6 * Copyright (C) 2007 Marvell Internation Ltd.
7 *
8 * 2007-08-21: eric miao <eric.miao@marvell.com>
9 * initial version
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21
22#include <plat/mfp.h>
23
24#define MFPR_SIZE (PAGE_SIZE)
25
26/* MFPR register bit definitions */
27#define MFPR_PULL_SEL (0x1 << 15)
28#define MFPR_PULLUP_EN (0x1 << 14)
29#define MFPR_PULLDOWN_EN (0x1 << 13)
30#define MFPR_SLEEP_SEL (0x1 << 9)
31#define MFPR_SLEEP_OE_N (0x1 << 7)
32#define MFPR_EDGE_CLEAR (0x1 << 6)
33#define MFPR_EDGE_FALL_EN (0x1 << 5)
34#define MFPR_EDGE_RISE_EN (0x1 << 4)
35
36#define MFPR_SLEEP_DATA(x) ((x) << 8)
37#define MFPR_DRIVE(x) (((x) & 0x7) << 10)
38#define MFPR_AF_SEL(x) (((x) & 0x7) << 0)
39
40#define MFPR_EDGE_NONE (0)
41#define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN)
42#define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN)
43#define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
44
45/*
46 * Table that determines the low power modes outputs, with actual settings
47 * used in parentheses for don't-care values. Except for the float output,
48 * the configured driven and pulled levels match, so if there is a need for
49 * non-LPM pulled output, the same configuration could probably be used.
50 *
51 * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
52 * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
53 *
54 * Input 0 X(0) X(0) X(0) 0
55 * Drive 0 0 0 0 X(1) 0
56 * Drive 1 0 1 X(1) 0 0
57 * Pull hi (1) 1 X(1) 1 0 0
58 * Pull lo (0) 1 X(0) 0 1 0
59 * Z (float) 1 X(0) 0 0 0
60 */
61#define MFPR_LPM_INPUT (0)
62#define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
63#define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
64#define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N)
65#define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
66#define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N)
67#define MFPR_LPM_MASK (0xe080)
68
69/*
70 * The pullup and pulldown state of the MFP pin at run mode is by default
71 * determined by the selected alternate function. In case that some buggy
72 * devices need to override this default behavior, the definitions below
73 * indicates the setting of corresponding MFPR bits
74 *
75 * Definition pull_sel pullup_en pulldown_en
76 * MFPR_PULL_NONE 0 0 0
77 * MFPR_PULL_LOW 1 0 1
78 * MFPR_PULL_HIGH 1 1 0
79 * MFPR_PULL_BOTH 1 1 1
80 */
81#define MFPR_PULL_NONE (0)
82#define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
83#define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN)
84#define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN)
85
86/* mfp_spin_lock is used to ensure that MFP register configuration
87 * (most likely a read-modify-write operation) is atomic, and that
88 * mfp_table[] is consistent
89 */
90static DEFINE_SPINLOCK(mfp_spin_lock);
91
92static void __iomem *mfpr_mmio_base;
93
94struct mfp_pin {
95 unsigned long config; /* -1 for not configured */
96 unsigned long mfpr_off; /* MFPRxx Register offset */
97 unsigned long mfpr_run; /* Run-Mode Register Value */
98 unsigned long mfpr_lpm; /* Low Power Mode Register Value */
99};
100
101static struct mfp_pin mfp_table[MFP_PIN_MAX];
102
103/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
104static const unsigned long mfpr_lpm[] = {
105 MFPR_LPM_INPUT,
106 MFPR_LPM_DRIVE_LOW,
107 MFPR_LPM_DRIVE_HIGH,
108 MFPR_LPM_PULL_LOW,
109 MFPR_LPM_PULL_HIGH,
110 MFPR_LPM_FLOAT,
111};
112
113/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
114static const unsigned long mfpr_pull[] = {
115 MFPR_PULL_NONE,
116 MFPR_PULL_LOW,
117 MFPR_PULL_HIGH,
118 MFPR_PULL_BOTH,
119};
120
121/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
122static const unsigned long mfpr_edge[] = {
123 MFPR_EDGE_NONE,
124 MFPR_EDGE_RISE,
125 MFPR_EDGE_FALL,
126 MFPR_EDGE_BOTH,
127};
128
129#define mfpr_readl(off) \
130 __raw_readl(mfpr_mmio_base + (off))
131
132#define mfpr_writel(off, val) \
133 __raw_writel(val, mfpr_mmio_base + (off))
134
135#define mfp_configured(p) ((p)->config != -1)
136
137/*
138 * perform a read-back of any MFPR register to make sure the
139 * previous writings are finished
140 */
141#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
142
143static inline void __mfp_config_run(struct mfp_pin *p)
144{
145 if (mfp_configured(p))
146 mfpr_writel(p->mfpr_off, p->mfpr_run);
147}
148
149static inline void __mfp_config_lpm(struct mfp_pin *p)
150{
151 if (mfp_configured(p)) {
152 unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
153 if (mfpr_clr != p->mfpr_run)
154 mfpr_writel(p->mfpr_off, mfpr_clr);
155 if (p->mfpr_lpm != mfpr_clr)
156 mfpr_writel(p->mfpr_off, p->mfpr_lpm);
157 }
158}
159
160void mfp_config(unsigned long *mfp_cfgs, int num)
161{
162 unsigned long flags;
163 int i;
164
165 spin_lock_irqsave(&mfp_spin_lock, flags);
166
167 for (i = 0; i < num; i++, mfp_cfgs++) {
168 unsigned long tmp, c = *mfp_cfgs;
169 struct mfp_pin *p;
170 int pin, af, drv, lpm, edge, pull;
171
172 pin = MFP_PIN(c);
173 BUG_ON(pin >= MFP_PIN_MAX);
174 p = &mfp_table[pin];
175
176 af = MFP_AF(c);
177 drv = MFP_DS(c);
178 lpm = MFP_LPM_STATE(c);
179 edge = MFP_LPM_EDGE(c);
180 pull = MFP_PULL(c);
181
182 /* run-mode pull settings will conflict with MFPR bits of
183 * low power mode state, calculate mfpr_run and mfpr_lpm
184 * individually if pull != MFP_PULL_NONE
185 */
186 tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
187
188 if (likely(pull == MFP_PULL_NONE)) {
189 p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
190 p->mfpr_lpm = p->mfpr_run;
191 } else {
192 p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
193 p->mfpr_run = tmp | mfpr_pull[pull];
194 }
195
196 p->config = c; __mfp_config_run(p);
197 }
198
199 mfpr_sync();
200 spin_unlock_irqrestore(&mfp_spin_lock, flags);
201}
202
203unsigned long mfp_read(int mfp)
204{
205 unsigned long val, flags;
206
207 BUG_ON(mfp >= MFP_PIN_MAX);
208
209 spin_lock_irqsave(&mfp_spin_lock, flags);
210 val = mfpr_readl(mfp_table[mfp].mfpr_off);
211 spin_unlock_irqrestore(&mfp_spin_lock, flags);
212
213 return val;
214}
215
216void mfp_write(int mfp, unsigned long val)
217{
218 unsigned long flags;
219
220 BUG_ON(mfp >= MFP_PIN_MAX);
221
222 spin_lock_irqsave(&mfp_spin_lock, flags);
223 mfpr_writel(mfp_table[mfp].mfpr_off, val);
224 mfpr_sync();
225 spin_unlock_irqrestore(&mfp_spin_lock, flags);
226}
227
228void __init mfp_init_base(unsigned long mfpr_base)
229{
230 int i;
231
232 /* initialize the table with default - unconfigured */
233 for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
234 mfp_table[i].config = -1;
235
236 mfpr_mmio_base = (void __iomem *)mfpr_base;
237}
238
239void __init mfp_init_addr(struct mfp_addr_map *map)
240{
241 struct mfp_addr_map *p;
242 unsigned long offset, flags;
243 int i;
244
245 spin_lock_irqsave(&mfp_spin_lock, flags);
246
247 for (p = map; p->start != MFP_PIN_INVALID; p++) {
248 offset = p->offset;
249 i = p->start;
250
251 do {
252 mfp_table[i].mfpr_off = offset;
253 mfp_table[i].mfpr_run = 0;
254 mfp_table[i].mfpr_lpm = 0;
255 offset += 4; i++;
256 } while ((i <= p->end) && (p->end != -1));
257 }
258
259 spin_unlock_irqrestore(&mfp_spin_lock, flags);
260}
261
262void mfp_config_lpm(void)
263{
264 struct mfp_pin *p = &mfp_table[0];
265 int pin;
266
267 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
268 __mfp_config_lpm(p);
269}
270
271void mfp_config_run(void)
272{
273 struct mfp_pin *p = &mfp_table[0];
274 int pin;
275
276 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
277 __mfp_config_run(p);
278}