Gilad Avidov | 289d0fc | 2012-08-08 14:06:24 -0600 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/platform_device.h> |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/spmi.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/of_spmi.h> |
Steve Muckle | f132c6c | 2012-06-06 18:30:57 -0700 | [diff] [blame] | 25 | #include <linux/module.h> |
Kenneth Heitke | 6a3ef9a | 2013-01-22 16:22:14 -0700 | [diff] [blame] | 26 | #include <linux/seq_file.h> |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 27 | #include <linux/syscore_ops.h> |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 28 | #include <mach/qpnp-int.h> |
Kenneth Heitke | 6a3ef9a | 2013-01-22 16:22:14 -0700 | [diff] [blame] | 29 | #include "spmi-dbgfs.h" |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 30 | |
| 31 | #define SPMI_PMIC_ARB_NAME "spmi_pmic_arb" |
| 32 | |
| 33 | /* PMIC Arbiter configuration registers */ |
| 34 | #define PMIC_ARB_VERSION 0x0000 |
| 35 | #define PMIC_ARB_INT_EN 0x0004 |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 36 | #define PMIC_ARB_PROTOCOL_IRQ_STATUS (0x700 + 0x820) |
| 37 | #define PMIC_ARB_GENI_CTRL 0x0024 |
| 38 | #define PMIC_ARB_GENI_STATUS 0x0028 |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 39 | /* PMIC Arbiter channel registers */ |
| 40 | #define PMIC_ARB_CMD(N) (0x0800 + (0x80 * (N))) |
| 41 | #define PMIC_ARB_CONFIG(N) (0x0804 + (0x80 * (N))) |
| 42 | #define PMIC_ARB_STATUS(N) (0x0808 + (0x80 * (N))) |
| 43 | #define PMIC_ARB_WDATA0(N) (0x0810 + (0x80 * (N))) |
| 44 | #define PMIC_ARB_WDATA1(N) (0x0814 + (0x80 * (N))) |
| 45 | #define PMIC_ARB_RDATA0(N) (0x0818 + (0x80 * (N))) |
| 46 | #define PMIC_ARB_RDATA1(N) (0x081C + (0x80 * (N))) |
| 47 | |
| 48 | /* Interrupt Controller */ |
| 49 | #define SPMI_PIC_OWNER_ACC_STATUS(M, N) (0x0000 + ((32 * (M)) + (4 * (N)))) |
| 50 | #define SPMI_PIC_ACC_ENABLE(N) (0x0200 + (4 * (N))) |
| 51 | #define SPMI_PIC_IRQ_STATUS(N) (0x0600 + (4 * (N))) |
| 52 | #define SPMI_PIC_IRQ_CLEAR(N) (0x0A00 + (4 * (N))) |
| 53 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 54 | /* Mapping Table */ |
| 55 | #define SPMI_MAPPING_TABLE_REG(N) (0x0B00 + (4 * (N))) |
| 56 | #define SPMI_MAPPING_BIT_INDEX(X) (((X) >> 18) & 0xF) |
| 57 | #define SPMI_MAPPING_BIT_IS_0_FLAG(X) (((X) >> 17) & 0x1) |
| 58 | #define SPMI_MAPPING_BIT_IS_0_RESULT(X) (((X) >> 9) & 0xFF) |
| 59 | #define SPMI_MAPPING_BIT_IS_1_FLAG(X) (((X) >> 8) & 0x1) |
| 60 | #define SPMI_MAPPING_BIT_IS_1_RESULT(X) (((X) >> 0) & 0xFF) |
| 61 | |
| 62 | #define SPMI_MAPPING_TABLE_LEN 255 |
| 63 | #define SPMI_MAPPING_TABLE_TREE_DEPTH 16 /* Maximum of 16-bits */ |
| 64 | |
| 65 | /* Ownership Table */ |
| 66 | #define SPMI_OWNERSHIP_TABLE_REG(N) (0x0700 + (4 * (N))) |
| 67 | #define SPMI_OWNERSHIP_PERIPH2OWNER(X) ((X) & 0x7) |
| 68 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 69 | /* Channel Status fields */ |
| 70 | enum pmic_arb_chnl_status { |
| 71 | PMIC_ARB_STATUS_DONE = (1 << 0), |
| 72 | PMIC_ARB_STATUS_FAILURE = (1 << 1), |
| 73 | PMIC_ARB_STATUS_DENIED = (1 << 2), |
| 74 | PMIC_ARB_STATUS_DROPPED = (1 << 3), |
| 75 | }; |
| 76 | |
| 77 | /* Command register fields */ |
| 78 | #define PMIC_ARB_CMD_MAX_BYTE_COUNT 8 |
| 79 | |
| 80 | /* Command Opcodes */ |
| 81 | enum pmic_arb_cmd_op_code { |
| 82 | PMIC_ARB_OP_EXT_WRITEL = 0, |
| 83 | PMIC_ARB_OP_EXT_READL = 1, |
| 84 | PMIC_ARB_OP_EXT_WRITE = 2, |
| 85 | PMIC_ARB_OP_RESET = 3, |
| 86 | PMIC_ARB_OP_SLEEP = 4, |
| 87 | PMIC_ARB_OP_SHUTDOWN = 5, |
| 88 | PMIC_ARB_OP_WAKEUP = 6, |
| 89 | PMIC_ARB_OP_AUTHENTICATE = 7, |
| 90 | PMIC_ARB_OP_MSTR_READ = 8, |
| 91 | PMIC_ARB_OP_MSTR_WRITE = 9, |
| 92 | PMIC_ARB_OP_EXT_READ = 13, |
| 93 | PMIC_ARB_OP_WRITE = 14, |
| 94 | PMIC_ARB_OP_READ = 15, |
| 95 | PMIC_ARB_OP_ZERO_WRITE = 16, |
| 96 | }; |
| 97 | |
| 98 | /* Maximum number of support PMIC peripherals */ |
| 99 | #define PMIC_ARB_MAX_PERIPHS 256 |
| 100 | #define PMIC_ARB_PERIPH_ID_VALID (1 << 15) |
| 101 | #define PMIC_ARB_TIMEOUT_US 100 |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 102 | #define PMIC_ARB_MAX_TRANS_BYTES (8) |
Gilad Avidov | a11c0b5 | 2012-02-15 15:30:49 -0700 | [diff] [blame] | 103 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 104 | #define PMIC_ARB_APID_MASK 0xFF |
| 105 | #define PMIC_ARB_PPID_MASK 0xFFF |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 106 | |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 107 | /* interrupt enable bit */ |
| 108 | #define SPMI_PIC_ACC_ENABLE_BIT BIT(0) |
| 109 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 110 | /** |
| 111 | * base - base address of the PMIC Arbiter core registers. |
| 112 | * intr - base address of the SPMI interrupt control registers |
| 113 | */ |
| 114 | struct spmi_pmic_arb_dev { |
| 115 | struct spmi_controller controller; |
| 116 | struct device *dev; |
| 117 | struct device *slave; |
| 118 | void __iomem *base; |
| 119 | void __iomem *intr; |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 120 | void __iomem *cnfg; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 121 | int pic_irq; |
David Collins | beff3ca | 2012-09-24 16:21:34 -0700 | [diff] [blame] | 122 | bool allow_wakeup; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 123 | spinlock_t lock; |
| 124 | u8 owner; |
| 125 | u8 channel; |
| 126 | u8 min_apid; |
| 127 | u8 max_apid; |
| 128 | u16 periph_id_map[PMIC_ARB_MAX_PERIPHS]; |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 129 | u32 mapping_table[SPMI_MAPPING_TABLE_LEN]; |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 130 | u32 prev_prtcl_irq_stat; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 131 | }; |
| 132 | |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 133 | static struct spmi_pmic_arb_dev *the_pmic_arb; |
| 134 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 135 | static u32 pmic_arb_read(struct spmi_pmic_arb_dev *dev, u32 offset) |
| 136 | { |
| 137 | u32 val = readl_relaxed(dev->base + offset); |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 138 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 139 | pr_debug("address 0x%p, val 0x%x\n", dev->base + offset, val); |
| 140 | return val; |
| 141 | } |
| 142 | |
| 143 | static void pmic_arb_write(struct spmi_pmic_arb_dev *dev, u32 offset, u32 val) |
| 144 | { |
| 145 | pr_debug("address 0x%p, val 0x%x\n", dev->base + offset, val); |
| 146 | writel_relaxed(val, dev->base + offset); |
| 147 | } |
| 148 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 149 | static void pmic_arb_save_stat_before_txn(struct spmi_pmic_arb_dev *dev) |
| 150 | { |
| 151 | dev->prev_prtcl_irq_stat = |
| 152 | readl_relaxed(dev->cnfg + PMIC_ARB_PROTOCOL_IRQ_STATUS); |
| 153 | } |
| 154 | |
| 155 | static int pmic_arb_diagnosis(struct spmi_pmic_arb_dev *dev, u32 status) |
| 156 | { |
| 157 | if (status & PMIC_ARB_STATUS_DENIED) { |
| 158 | dev_err(dev->dev, |
| 159 | "wait_for_done: transaction denied by SPMI master (0x%x)\n", |
| 160 | status); |
| 161 | return -EPERM; |
| 162 | } |
| 163 | |
| 164 | if (status & PMIC_ARB_STATUS_FAILURE) { |
| 165 | dev_err(dev->dev, |
| 166 | "wait_for_done: transaction failed (0x%x)\n", status); |
| 167 | return -EIO; |
| 168 | } |
| 169 | |
| 170 | if (status & PMIC_ARB_STATUS_DROPPED) { |
| 171 | dev_err(dev->dev, |
| 172 | "wait_for_done: transaction dropped pmic-arb busy (0x%x)\n", |
| 173 | status); |
| 174 | return -EAGAIN; |
| 175 | } |
| 176 | |
| 177 | return 0; |
| 178 | } |
| 179 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 180 | static int pmic_arb_wait_for_done(struct spmi_pmic_arb_dev *dev) |
| 181 | { |
| 182 | u32 status = 0; |
| 183 | u32 timeout = PMIC_ARB_TIMEOUT_US; |
| 184 | u32 offset = PMIC_ARB_STATUS(dev->channel); |
| 185 | |
| 186 | while (timeout--) { |
| 187 | status = pmic_arb_read(dev, offset); |
| 188 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 189 | if (status & PMIC_ARB_STATUS_DONE) |
| 190 | return pmic_arb_diagnosis(dev, status); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 191 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 192 | udelay(1); |
| 193 | } |
| 194 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 195 | dev_err(dev->dev, "wait_for_done:: timeout, status 0x%x\n", status); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 196 | return -ETIMEDOUT; |
| 197 | } |
| 198 | |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 199 | /** |
| 200 | * pa_read_data: reads pmic-arb's register and copy 1..4 bytes to buf |
| 201 | * @bc byte count -1. range: 0..3 |
| 202 | * @reg register's address |
| 203 | * @buf output parameter, length must be bc+1 |
| 204 | */ |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 205 | static void pa_read_data(struct spmi_pmic_arb_dev *dev, u8 *buf, u32 reg, u8 bc) |
| 206 | { |
| 207 | u32 data = pmic_arb_read(dev, reg); |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 208 | memcpy(buf, &data, (bc & 3) + 1); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 209 | } |
| 210 | |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 211 | /** |
| 212 | * pa_write_data: write 1..4 bytes from buf to pmic-arb's register |
| 213 | * @bc byte-count -1. range: 0..3 |
| 214 | * @reg register's address |
| 215 | * @buf buffer to write. length must be bc+1 |
| 216 | */ |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 217 | static void |
| 218 | pa_write_data(struct spmi_pmic_arb_dev *dev, u8 *buf, u32 reg, u8 bc) |
| 219 | { |
| 220 | u32 data = 0; |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 221 | memcpy(&data, buf, (bc & 3) + 1); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 222 | pmic_arb_write(dev, reg, data); |
| 223 | } |
| 224 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 225 | static void pmic_arb_dbg_err_dump(struct spmi_pmic_arb_dev *pmic_arb, int ret, |
| 226 | const char *msg, u8 opc, u8 sid, u16 addr, u8 bc, u8 *buf) |
| 227 | { |
| 228 | u32 irq_stat = readl_relaxed(pmic_arb->cnfg |
| 229 | + PMIC_ARB_PROTOCOL_IRQ_STATUS); |
| 230 | u32 geni_stat = readl_relaxed(pmic_arb->cnfg + PMIC_ARB_GENI_STATUS); |
| 231 | u32 geni_ctrl = readl_relaxed(pmic_arb->cnfg + PMIC_ARB_GENI_CTRL); |
| 232 | |
| 233 | bc += 1; /* actual byte count */ |
| 234 | |
| 235 | if (buf) |
| 236 | dev_err(pmic_arb->dev, |
| 237 | "error:%d on data %s opcode:0x%x sid:%d addr:0x%x bc:%d buf:%*phC\n", |
| 238 | ret, msg, opc, sid, addr, bc, bc, buf); |
| 239 | else |
| 240 | dev_err(pmic_arb->dev, |
| 241 | "error:%d on non-data-cmd opcode:0x%x sid:%d\n", |
| 242 | ret, opc, sid); |
| 243 | dev_err(pmic_arb->dev, |
| 244 | "PROTOCOL_IRQ_STATUS before:0x%x after:0x%x GENI_STATUS:0x%x GENI_CTRL:0x%x\n", |
| 245 | irq_stat, pmic_arb->prev_prtcl_irq_stat, geni_stat, geni_ctrl); |
| 246 | } |
| 247 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 248 | /* Non-data command */ |
| 249 | static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) |
| 250 | { |
| 251 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 252 | unsigned long flags; |
| 253 | u32 cmd; |
| 254 | int rc; |
| 255 | |
| 256 | pr_debug("op:0x%x sid:%d\n", opc, sid); |
| 257 | |
| 258 | /* Check for valid non-data command */ |
| 259 | if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) |
| 260 | return -EINVAL; |
| 261 | |
Wu Fenglin | f0694c3 | 2013-12-24 11:21:58 +0800 | [diff] [blame] | 262 | opc -= SPMI_CMD_RESET - PMIC_ARB_OP_RESET; |
| 263 | |
| 264 | cmd = (opc << 27) | ((sid & 0xf) << 20); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 265 | |
| 266 | spin_lock_irqsave(&pmic_arb->lock, flags); |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 267 | pmic_arb_save_stat_before_txn(pmic_arb); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 268 | pmic_arb_write(pmic_arb, PMIC_ARB_CMD(pmic_arb->channel), cmd); |
| 269 | rc = pmic_arb_wait_for_done(pmic_arb); |
| 270 | spin_unlock_irqrestore(&pmic_arb->lock, flags); |
| 271 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 272 | if (rc) |
| 273 | pmic_arb_dbg_err_dump(pmic_arb, rc, "cmd", opc, sid, 0, 0, 0); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 274 | return rc; |
| 275 | } |
| 276 | |
| 277 | static int pmic_arb_read_cmd(struct spmi_controller *ctrl, |
| 278 | u8 opc, u8 sid, u16 addr, u8 bc, u8 *buf) |
| 279 | { |
| 280 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 281 | unsigned long flags; |
| 282 | u32 cmd; |
| 283 | int rc; |
| 284 | |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 285 | if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { |
| 286 | dev_err(pmic_arb->dev |
| 287 | , "pmic-arb supports 1..%d bytes per trans, but:%d requested" |
| 288 | , PMIC_ARB_MAX_TRANS_BYTES, bc+1); |
| 289 | return -EINVAL; |
| 290 | } |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 291 | dev_dbg(pmic_arb->dev, "client-rd op:0x%x sid:%d addr:0x%x bc:%d\n", |
| 292 | opc, sid, addr, bc + 1); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 293 | |
| 294 | /* Check the opcode */ |
| 295 | if (opc >= 0x60 && opc <= 0x7F) |
| 296 | opc = PMIC_ARB_OP_READ; |
| 297 | else if (opc >= 0x20 && opc <= 0x2F) |
| 298 | opc = PMIC_ARB_OP_EXT_READ; |
| 299 | else if (opc >= 0x38 && opc <= 0x3F) |
| 300 | opc = PMIC_ARB_OP_EXT_READL; |
| 301 | else |
| 302 | return -EINVAL; |
| 303 | |
| 304 | cmd = (opc << 27) | ((sid & 0xf) << 20) | (addr << 4) | (bc & 0x7); |
| 305 | |
| 306 | spin_lock_irqsave(&pmic_arb->lock, flags); |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 307 | pmic_arb_save_stat_before_txn(pmic_arb); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 308 | pmic_arb_write(pmic_arb, PMIC_ARB_CMD(pmic_arb->channel), cmd); |
| 309 | rc = pmic_arb_wait_for_done(pmic_arb); |
| 310 | if (rc) |
| 311 | goto done; |
| 312 | |
| 313 | /* Read from FIFO, note 'bc' is actually number of bytes minus 1 */ |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 314 | pa_read_data(pmic_arb, buf, PMIC_ARB_RDATA0(pmic_arb->channel) |
| 315 | , min_t(u8, bc, 3)); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 316 | |
| 317 | if (bc > 3) |
| 318 | pa_read_data(pmic_arb, buf + 4, |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 319 | PMIC_ARB_RDATA1(pmic_arb->channel), bc - 4); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 320 | |
| 321 | done: |
| 322 | spin_unlock_irqrestore(&pmic_arb->lock, flags); |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 323 | if (rc) |
| 324 | pmic_arb_dbg_err_dump(pmic_arb, rc, "read", opc, sid, addr, bc, |
| 325 | buf); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 326 | return rc; |
| 327 | } |
| 328 | |
| 329 | static int pmic_arb_write_cmd(struct spmi_controller *ctrl, |
| 330 | u8 opc, u8 sid, u16 addr, u8 bc, u8 *buf) |
| 331 | { |
| 332 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 333 | unsigned long flags; |
| 334 | u32 cmd; |
| 335 | int rc; |
| 336 | |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 337 | if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { |
| 338 | dev_err(pmic_arb->dev |
| 339 | , "pmic-arb supports 1..%d bytes per trans, but:%d requested" |
| 340 | , PMIC_ARB_MAX_TRANS_BYTES, bc+1); |
| 341 | return -EINVAL; |
| 342 | } |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 343 | dev_dbg(pmic_arb->dev, "client-wr op:0x%x sid:%d addr:0x%x bc:%d\n", |
| 344 | opc, sid, addr, bc + 1); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 345 | |
| 346 | /* Check the opcode */ |
| 347 | if (opc >= 0x40 && opc <= 0x5F) |
| 348 | opc = PMIC_ARB_OP_WRITE; |
| 349 | else if (opc >= 0x00 && opc <= 0x0F) |
| 350 | opc = PMIC_ARB_OP_EXT_WRITE; |
| 351 | else if (opc >= 0x30 && opc <= 0x37) |
| 352 | opc = PMIC_ARB_OP_EXT_WRITEL; |
| 353 | else if (opc >= 0x80 && opc <= 0xFF) |
| 354 | opc = PMIC_ARB_OP_ZERO_WRITE; |
| 355 | else |
| 356 | return -EINVAL; |
| 357 | |
| 358 | cmd = (opc << 27) | ((sid & 0xf) << 20) | (addr << 4) | (bc & 0x7); |
| 359 | |
| 360 | /* Write data to FIFOs */ |
| 361 | spin_lock_irqsave(&pmic_arb->lock, flags); |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 362 | pmic_arb_save_stat_before_txn(pmic_arb); |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 363 | pa_write_data(pmic_arb, buf, PMIC_ARB_WDATA0(pmic_arb->channel) |
| 364 | , min_t(u8, bc, 3)); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 365 | if (bc > 3) |
| 366 | pa_write_data(pmic_arb, buf + 4, |
Gilad Avidov | e0c3f70 | 2012-07-12 13:19:12 -0600 | [diff] [blame] | 367 | PMIC_ARB_WDATA1(pmic_arb->channel), bc - 4); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 368 | |
| 369 | /* Start the transaction */ |
| 370 | pmic_arb_write(pmic_arb, PMIC_ARB_CMD(pmic_arb->channel), cmd); |
| 371 | rc = pmic_arb_wait_for_done(pmic_arb); |
| 372 | spin_unlock_irqrestore(&pmic_arb->lock, flags); |
| 373 | |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 374 | if (rc) |
| 375 | pmic_arb_dbg_err_dump(pmic_arb, rc, "write", opc, sid, addr, bc, |
| 376 | buf); |
| 377 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 378 | return rc; |
| 379 | } |
| 380 | |
| 381 | /* APID to PPID */ |
| 382 | static u16 get_peripheral_id(struct spmi_pmic_arb_dev *pmic_arb, u8 apid) |
| 383 | { |
| 384 | return pmic_arb->periph_id_map[apid] & PMIC_ARB_PPID_MASK; |
| 385 | } |
| 386 | |
| 387 | /* APID to PPID, returns valid flag */ |
| 388 | static int is_apid_valid(struct spmi_pmic_arb_dev *pmic_arb, u8 apid) |
| 389 | { |
| 390 | return pmic_arb->periph_id_map[apid] & PMIC_ARB_PERIPH_ID_VALID; |
| 391 | } |
| 392 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 393 | static u32 search_mapping_table(struct spmi_pmic_arb_dev *pmic_arb, u16 ppid) |
| 394 | { |
| 395 | u32 *mapping_table = pmic_arb->mapping_table; |
| 396 | u32 apid = PMIC_ARB_MAX_PERIPHS; |
| 397 | int index = 0; |
| 398 | u32 data; |
| 399 | int i; |
| 400 | |
| 401 | for (i = 0; i < SPMI_MAPPING_TABLE_TREE_DEPTH; ++i) { |
| 402 | data = mapping_table[index]; |
| 403 | |
| 404 | if (ppid & (1 << SPMI_MAPPING_BIT_INDEX(data))) { |
| 405 | if (SPMI_MAPPING_BIT_IS_1_FLAG(data)) { |
| 406 | index = SPMI_MAPPING_BIT_IS_1_RESULT(data); |
| 407 | } else { |
| 408 | apid = SPMI_MAPPING_BIT_IS_1_RESULT(data); |
| 409 | break; |
| 410 | } |
| 411 | } else { |
| 412 | if (SPMI_MAPPING_BIT_IS_0_FLAG(data)) { |
| 413 | index = SPMI_MAPPING_BIT_IS_0_RESULT(data); |
| 414 | } else { |
| 415 | apid = SPMI_MAPPING_BIT_IS_0_RESULT(data); |
| 416 | break; |
| 417 | } |
| 418 | } |
| 419 | } |
| 420 | |
| 421 | return apid; |
| 422 | } |
| 423 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 424 | /* PPID to APID */ |
| 425 | static uint32_t map_peripheral_id(struct spmi_pmic_arb_dev *pmic_arb, u16 ppid) |
| 426 | { |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 427 | u32 apid = search_mapping_table(pmic_arb, ppid); |
| 428 | u32 old_ppid; |
| 429 | u32 owner; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 430 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 431 | /* If the apid was found, add it to the lookup table */ |
| 432 | if (apid < PMIC_ARB_MAX_PERIPHS) { |
| 433 | old_ppid = get_peripheral_id(pmic_arb, apid); |
| 434 | |
| 435 | owner = SPMI_OWNERSHIP_PERIPH2OWNER( |
| 436 | readl_relaxed(pmic_arb->cnfg + |
| 437 | SPMI_OWNERSHIP_TABLE_REG(apid))); |
| 438 | |
| 439 | /* Check ownership */ |
| 440 | if (owner != pmic_arb->owner) { |
| 441 | dev_err(pmic_arb->dev, "PPID 0x%x incorrect owner %d\n", |
| 442 | ppid, owner); |
| 443 | return PMIC_ARB_MAX_PERIPHS; |
| 444 | } |
| 445 | |
| 446 | /* Check if already mapped */ |
| 447 | if (pmic_arb->periph_id_map[apid] & PMIC_ARB_PERIPH_ID_VALID) { |
| 448 | if (ppid != old_ppid) { |
| 449 | dev_err(pmic_arb->dev, |
| 450 | "PPID 0x%x: APID 0x%x already mapped\n", |
| 451 | ppid, apid); |
| 452 | return PMIC_ARB_MAX_PERIPHS; |
| 453 | } |
| 454 | return apid; |
| 455 | } |
| 456 | |
| 457 | pmic_arb->periph_id_map[apid] = ppid | PMIC_ARB_PERIPH_ID_VALID; |
| 458 | |
| 459 | if (apid > pmic_arb->max_apid) |
| 460 | pmic_arb->max_apid = apid; |
| 461 | |
| 462 | if (apid < pmic_arb->min_apid) |
| 463 | pmic_arb->min_apid = apid; |
| 464 | |
| 465 | return apid; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | dev_err(pmic_arb->dev, "Unknown ppid 0x%x\n", ppid); |
| 469 | return PMIC_ARB_MAX_PERIPHS; |
| 470 | } |
| 471 | |
| 472 | /* Enable interrupt at the PMIC Arbiter PIC */ |
| 473 | static int pmic_arb_pic_enable(struct spmi_controller *ctrl, |
| 474 | struct qpnp_irq_spec *spec, uint32_t data) |
| 475 | { |
| 476 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 477 | u8 apid = data & PMIC_ARB_APID_MASK; |
| 478 | unsigned long flags; |
| 479 | u32 status; |
| 480 | |
| 481 | dev_dbg(pmic_arb->dev, "PIC enable, apid:0x%x, sid:0x%x, pid:0x%x\n", |
| 482 | apid, spec->slave, spec->per); |
| 483 | |
| 484 | if (data < pmic_arb->min_apid || data > pmic_arb->max_apid) { |
| 485 | dev_err(pmic_arb->dev, "int enable: invalid APID %d\n", data); |
| 486 | return -EINVAL; |
| 487 | } |
| 488 | |
| 489 | if (!is_apid_valid(pmic_arb, apid)) { |
| 490 | dev_err(pmic_arb->dev, "int enable: int not supported\n"); |
| 491 | return -EINVAL; |
| 492 | } |
| 493 | |
| 494 | spin_lock_irqsave(&pmic_arb->lock, flags); |
| 495 | status = readl_relaxed(pmic_arb->intr + SPMI_PIC_ACC_ENABLE(apid)); |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 496 | if (!(status & SPMI_PIC_ACC_ENABLE_BIT)) { |
| 497 | status = status | SPMI_PIC_ACC_ENABLE_BIT; |
| 498 | writel_relaxed(status, |
| 499 | pmic_arb->intr + SPMI_PIC_ACC_ENABLE(apid)); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 500 | /* Interrupt needs to be enabled before returning to caller */ |
| 501 | wmb(); |
| 502 | } |
| 503 | spin_unlock_irqrestore(&pmic_arb->lock, flags); |
| 504 | return 0; |
| 505 | } |
| 506 | |
| 507 | /* Disable interrupt at the PMIC Arbiter PIC */ |
| 508 | static int pmic_arb_pic_disable(struct spmi_controller *ctrl, |
| 509 | struct qpnp_irq_spec *spec, uint32_t data) |
| 510 | { |
| 511 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 512 | u8 apid = data & PMIC_ARB_APID_MASK; |
| 513 | unsigned long flags; |
| 514 | u32 status; |
| 515 | |
| 516 | dev_dbg(pmic_arb->dev, "PIC disable, apid:0x%x, sid:0x%x, pid:0x%x\n", |
| 517 | apid, spec->slave, spec->per); |
| 518 | |
| 519 | if (data < pmic_arb->min_apid || data > pmic_arb->max_apid) { |
| 520 | dev_err(pmic_arb->dev, "int disable: invalid APID %d\n", data); |
| 521 | return -EINVAL; |
| 522 | } |
| 523 | |
| 524 | if (!is_apid_valid(pmic_arb, apid)) { |
| 525 | dev_err(pmic_arb->dev, "int disable: int not supported\n"); |
| 526 | return -EINVAL; |
| 527 | } |
| 528 | |
| 529 | spin_lock_irqsave(&pmic_arb->lock, flags); |
| 530 | status = readl_relaxed(pmic_arb->intr + SPMI_PIC_ACC_ENABLE(apid)); |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 531 | if (status & SPMI_PIC_ACC_ENABLE_BIT) { |
| 532 | /* clear the enable bit and write */ |
| 533 | status = status & ~SPMI_PIC_ACC_ENABLE_BIT; |
| 534 | writel_relaxed(status, |
| 535 | pmic_arb->intr + SPMI_PIC_ACC_ENABLE(apid)); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 536 | /* Interrupt needs to be disabled before returning to caller */ |
| 537 | wmb(); |
| 538 | } |
| 539 | spin_unlock_irqrestore(&pmic_arb->lock, flags); |
| 540 | return 0; |
| 541 | } |
| 542 | |
| 543 | static irqreturn_t |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 544 | periph_interrupt(struct spmi_pmic_arb_dev *pmic_arb, u8 apid, bool show) |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 545 | { |
| 546 | u16 ppid = get_peripheral_id(pmic_arb, apid); |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 547 | void __iomem *intr = pmic_arb->intr; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 548 | u8 sid = (ppid >> 8) & 0x0F; |
| 549 | u8 pid = ppid & 0xFF; |
| 550 | u32 status; |
| 551 | int i; |
| 552 | |
| 553 | if (!is_apid_valid(pmic_arb, apid)) { |
Gilad Avidov | db1faf0 | 2014-05-13 17:40:30 -0600 | [diff] [blame] | 554 | dev_err(pmic_arb->dev, |
| 555 | "periph_interrupt(apid:0x%x sid:0x%x pid:0x%x) unknown peripheral\n", |
| 556 | apid, sid, pid); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 557 | /* return IRQ_NONE; */ |
| 558 | } |
| 559 | |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 560 | status = readl_relaxed(intr + SPMI_PIC_ACC_ENABLE(apid)); |
| 561 | if (!(status & SPMI_PIC_ACC_ENABLE_BIT)) { |
| 562 | /* |
| 563 | * All interrupts from this peripheral are disabled |
| 564 | * don't bother calling the qpnpint handler |
| 565 | */ |
| 566 | return IRQ_HANDLED; |
| 567 | } |
| 568 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 569 | /* Read the peripheral specific interrupt bits */ |
Abhijeet Dharmapurikar | 546804b | 2013-07-24 20:15:36 -0700 | [diff] [blame] | 570 | status = readl_relaxed(intr + SPMI_PIC_IRQ_STATUS(apid)); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 571 | |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 572 | if (!show) { |
| 573 | /* Clear the peripheral interrupts */ |
| 574 | writel_relaxed(status, intr + SPMI_PIC_IRQ_CLEAR(apid)); |
| 575 | /* Irq needs to be cleared/acknowledged before exiting ISR */ |
| 576 | mb(); |
| 577 | } |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 578 | |
| 579 | dev_dbg(pmic_arb->dev, |
| 580 | "interrupt, apid:0x%x, sid:0x%x, pid:0x%x, intr:0x%x\n", |
| 581 | apid, sid, pid, status); |
| 582 | |
| 583 | /* Send interrupt notification */ |
| 584 | for (i = 0; status && i < 8; ++i, status >>= 1) { |
| 585 | if (status & 0x1) { |
| 586 | struct qpnp_irq_spec irq_spec = { |
| 587 | .slave = sid, |
| 588 | .per = pid, |
| 589 | .irq = i, |
| 590 | }; |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 591 | if (show) |
| 592 | qpnpint_show_irq(&pmic_arb->controller, |
| 593 | &irq_spec); |
| 594 | else |
| 595 | qpnpint_handle_irq(&pmic_arb->controller, |
| 596 | &irq_spec); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 597 | } |
| 598 | } |
| 599 | return IRQ_HANDLED; |
| 600 | } |
| 601 | |
| 602 | /* Peripheral interrupt handler */ |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 603 | static irqreturn_t |
| 604 | __pmic_arb_periph_irq(int irq, void *dev_id, bool show) |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 605 | { |
| 606 | struct spmi_pmic_arb_dev *pmic_arb = dev_id; |
| 607 | void __iomem *intr = pmic_arb->intr; |
| 608 | u8 ee = pmic_arb->owner; |
| 609 | u32 ret = IRQ_NONE; |
| 610 | u32 status; |
| 611 | |
| 612 | int first = pmic_arb->min_apid >> 5; |
| 613 | int last = pmic_arb->max_apid >> 5; |
| 614 | int i, j; |
| 615 | |
| 616 | dev_dbg(pmic_arb->dev, "Peripheral interrupt detected\n"); |
| 617 | |
| 618 | /* Check the accumulated interrupt status */ |
| 619 | for (i = first; i <= last; ++i) { |
| 620 | status = readl_relaxed(intr + SPMI_PIC_OWNER_ACC_STATUS(ee, i)); |
| 621 | |
| 622 | for (j = 0; status && j < 32; ++j, status >>= 1) { |
| 623 | if (status & 0x1) { |
| 624 | u8 id = (i * 32) + j; |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 625 | |
| 626 | ret |= periph_interrupt(pmic_arb, id, show); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 627 | } |
| 628 | } |
| 629 | } |
| 630 | |
| 631 | return ret; |
| 632 | } |
| 633 | |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 634 | static irqreturn_t pmic_arb_periph_irq(int irq, void *dev_id) |
| 635 | { |
| 636 | return __pmic_arb_periph_irq(irq, dev_id, false); |
| 637 | } |
| 638 | |
| 639 | static void spmi_pmic_arb_resume(void) |
| 640 | { |
| 641 | if (qpnpint_show_resume_irq()) |
| 642 | __pmic_arb_periph_irq(the_pmic_arb->pic_irq, |
| 643 | the_pmic_arb, true); |
| 644 | } |
| 645 | |
| 646 | static struct syscore_ops spmi_pmic_arb_syscore_ops = { |
| 647 | .resume = spmi_pmic_arb_resume, |
| 648 | }; |
| 649 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 650 | /* Callback to register an APID for specific slave/peripheral */ |
| 651 | static int pmic_arb_intr_priv_data(struct spmi_controller *ctrl, |
| 652 | struct qpnp_irq_spec *spec, uint32_t *data) |
| 653 | { |
| 654 | struct spmi_pmic_arb_dev *pmic_arb = spmi_get_ctrldata(ctrl); |
| 655 | u16 ppid = ((spec->slave & 0x0F) << 8) | (spec->per & 0xFF); |
| 656 | *data = map_peripheral_id(pmic_arb, ppid); |
| 657 | return 0; |
| 658 | } |
| 659 | |
Kenneth Heitke | 6a3ef9a | 2013-01-22 16:22:14 -0700 | [diff] [blame] | 660 | static int pmic_arb_mapping_data_show(struct seq_file *file, void *unused) |
| 661 | { |
| 662 | struct spmi_pmic_arb_dev *pmic_arb = file->private; |
| 663 | int first = pmic_arb->min_apid; |
| 664 | int last = pmic_arb->max_apid; |
| 665 | int i; |
| 666 | |
| 667 | for (i = first; i <= last; ++i) { |
| 668 | if (!is_apid_valid(pmic_arb, i)) |
| 669 | continue; |
| 670 | |
| 671 | seq_printf(file, "APID 0x%.2x = PPID 0x%.3x. Enabled:%d\n", |
| 672 | i, get_peripheral_id(pmic_arb, i), |
| 673 | readl_relaxed(pmic_arb->intr + SPMI_PIC_ACC_ENABLE(i))); |
| 674 | } |
| 675 | |
| 676 | return 0; |
| 677 | } |
| 678 | |
| 679 | static int pmic_arb_mapping_data_open(struct inode *inode, struct file *file) |
| 680 | { |
| 681 | return single_open(file, pmic_arb_mapping_data_show, inode->i_private); |
| 682 | } |
| 683 | |
| 684 | static const struct file_operations pmic_arb_dfs_fops = { |
| 685 | .open = pmic_arb_mapping_data_open, |
| 686 | .read = seq_read, |
| 687 | .llseek = seq_lseek, |
| 688 | .release = seq_release, |
| 689 | }; |
| 690 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 691 | static int __devinit |
| 692 | spmi_pmic_arb_get_property(struct platform_device *pdev, char *pname, u32 *prop) |
| 693 | { |
| 694 | int ret = of_property_read_u32(pdev->dev.of_node, pname, prop); |
| 695 | |
| 696 | if (ret) |
| 697 | dev_err(&pdev->dev, "missing property: %s\n", pname); |
| 698 | else |
| 699 | pr_debug("%s = 0x%x\n", pname, *prop); |
| 700 | |
| 701 | return ret; |
| 702 | } |
| 703 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 704 | static struct qpnp_local_int spmi_pmic_arb_intr_cb = { |
| 705 | .mask = pmic_arb_pic_disable, |
| 706 | .unmask = pmic_arb_pic_enable, |
| 707 | .register_priv_data = pmic_arb_intr_priv_data, |
| 708 | }; |
| 709 | |
| 710 | static int __devinit spmi_pmic_arb_probe(struct platform_device *pdev) |
| 711 | { |
| 712 | struct spmi_pmic_arb_dev *pmic_arb; |
| 713 | struct resource *mem_res; |
| 714 | u32 cell_index; |
| 715 | u32 prop; |
| 716 | int ret = 0; |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 717 | int i; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 718 | |
| 719 | pr_debug("SPMI PMIC Arbiter\n"); |
| 720 | |
| 721 | pmic_arb = devm_kzalloc(&pdev->dev, |
| 722 | sizeof(struct spmi_pmic_arb_dev), GFP_KERNEL); |
| 723 | if (!pmic_arb) { |
| 724 | dev_err(&pdev->dev, "can not allocate pmic_arb data\n"); |
| 725 | return -ENOMEM; |
| 726 | } |
| 727 | |
Gilad Avidov | 289d0fc | 2012-08-08 14:06:24 -0600 | [diff] [blame] | 728 | mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core"); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 729 | if (!mem_res) { |
| 730 | dev_err(&pdev->dev, "missing base memory resource\n"); |
| 731 | return -ENODEV; |
| 732 | } |
| 733 | |
| 734 | pmic_arb->base = devm_ioremap(&pdev->dev, |
| 735 | mem_res->start, resource_size(mem_res)); |
| 736 | if (!pmic_arb->base) { |
| 737 | dev_err(&pdev->dev, "ioremap of 'base' failed\n"); |
| 738 | return -ENOMEM; |
| 739 | } |
| 740 | |
Gilad Avidov | 289d0fc | 2012-08-08 14:06:24 -0600 | [diff] [blame] | 741 | mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr"); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 742 | if (!mem_res) { |
| 743 | dev_err(&pdev->dev, "missing mem resource (interrupts)\n"); |
| 744 | return -ENODEV; |
| 745 | } |
| 746 | |
| 747 | pmic_arb->intr = devm_ioremap(&pdev->dev, |
| 748 | mem_res->start, resource_size(mem_res)); |
| 749 | if (!pmic_arb->intr) { |
| 750 | dev_err(&pdev->dev, "ioremap of 'intr' failed\n"); |
| 751 | return -ENOMEM; |
| 752 | } |
| 753 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 754 | mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cnfg"); |
| 755 | if (!mem_res) { |
| 756 | dev_err(&pdev->dev, "missing mem resource (configuration)\n"); |
| 757 | return -ENODEV; |
| 758 | } |
| 759 | |
| 760 | pmic_arb->cnfg = devm_ioremap(&pdev->dev, |
| 761 | mem_res->start, resource_size(mem_res)); |
| 762 | if (!pmic_arb->cnfg) { |
| 763 | dev_err(&pdev->dev, "ioremap of 'cnfg' failed\n"); |
| 764 | return -ENOMEM; |
| 765 | } |
| 766 | |
| 767 | for (i = 0; i < ARRAY_SIZE(pmic_arb->mapping_table); ++i) |
| 768 | pmic_arb->mapping_table[i] = readl_relaxed( |
| 769 | pmic_arb->cnfg + SPMI_MAPPING_TABLE_REG(i)); |
| 770 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 771 | pmic_arb->pic_irq = platform_get_irq(pdev, 0); |
| 772 | if (!pmic_arb->pic_irq) { |
| 773 | dev_err(&pdev->dev, "missing IRQ resource\n"); |
| 774 | return -ENODEV; |
| 775 | } |
| 776 | |
| 777 | ret = devm_request_irq(&pdev->dev, pmic_arb->pic_irq, |
| 778 | pmic_arb_periph_irq, IRQF_TRIGGER_HIGH, pdev->name, pmic_arb); |
| 779 | if (ret) { |
| 780 | dev_err(&pdev->dev, "request IRQ failed\n"); |
| 781 | return ret; |
| 782 | } |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 783 | |
| 784 | /* Get properties from the device tree */ |
| 785 | ret = spmi_pmic_arb_get_property(pdev, "cell-index", &cell_index); |
| 786 | if (ret) |
| 787 | return -ENODEV; |
| 788 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 789 | ret = spmi_pmic_arb_get_property(pdev, "qcom,pmic-arb-ee", &prop); |
| 790 | if (ret) |
| 791 | return -ENODEV; |
| 792 | pmic_arb->owner = (u8)prop; |
| 793 | |
| 794 | ret = spmi_pmic_arb_get_property(pdev, "qcom,pmic-arb-channel", &prop); |
| 795 | if (ret) |
| 796 | return -ENODEV; |
| 797 | pmic_arb->channel = (u8)prop; |
| 798 | |
David Collins | beff3ca | 2012-09-24 16:21:34 -0700 | [diff] [blame] | 799 | pmic_arb->allow_wakeup = !of_property_read_bool(pdev->dev.of_node, |
| 800 | "qcom,not-wakeup"); |
| 801 | if (pmic_arb->allow_wakeup) { |
| 802 | ret = irq_set_irq_wake(pmic_arb->pic_irq, 1); |
| 803 | if (unlikely(ret)) { |
| 804 | pr_err("Unable to set wakeup irq, err=%d\n", ret); |
| 805 | return -ENODEV; |
| 806 | } |
Kenneth Heitke | 71f3d5d | 2012-09-07 13:54:38 -0600 | [diff] [blame] | 807 | } |
| 808 | |
Kenneth Heitke | 366b8a4 | 2012-12-18 13:51:37 -0700 | [diff] [blame] | 809 | pmic_arb->max_apid = 0; |
| 810 | pmic_arb->min_apid = PMIC_ARB_MAX_PERIPHS - 1; |
| 811 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 812 | pmic_arb->dev = &pdev->dev; |
| 813 | platform_set_drvdata(pdev, pmic_arb); |
| 814 | spmi_set_ctrldata(&pmic_arb->controller, pmic_arb); |
| 815 | |
| 816 | spin_lock_init(&pmic_arb->lock); |
| 817 | |
| 818 | pmic_arb->controller.nr = cell_index; |
| 819 | pmic_arb->controller.dev.parent = pdev->dev.parent; |
| 820 | pmic_arb->controller.dev.of_node = of_node_get(pdev->dev.of_node); |
| 821 | |
| 822 | /* Callbacks */ |
| 823 | pmic_arb->controller.cmd = pmic_arb_cmd; |
| 824 | pmic_arb->controller.read_cmd = pmic_arb_read_cmd; |
| 825 | pmic_arb->controller.write_cmd = pmic_arb_write_cmd; |
| 826 | |
| 827 | ret = spmi_add_controller(&pmic_arb->controller); |
| 828 | if (ret) |
| 829 | goto err_add_controller; |
| 830 | |
| 831 | /* Register the interrupt enable/disable functions */ |
Michael Bohan | bb6b30f | 2012-06-01 13:33:51 -0700 | [diff] [blame] | 832 | ret = qpnpint_register_controller(pmic_arb->controller.dev.of_node, |
| 833 | &pmic_arb->controller, |
| 834 | &spmi_pmic_arb_intr_cb); |
| 835 | if (ret) { |
| 836 | dev_err(&pdev->dev, "Unable to register controller %d\n", |
| 837 | cell_index); |
| 838 | goto err_reg_controller; |
| 839 | } |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 840 | |
| 841 | /* Register device(s) from the device tree */ |
| 842 | of_spmi_register_devices(&pmic_arb->controller); |
| 843 | |
Kenneth Heitke | 6a3ef9a | 2013-01-22 16:22:14 -0700 | [diff] [blame] | 844 | /* Add debugfs file for mapping data */ |
| 845 | if (spmi_dfs_create_file(&pmic_arb->controller, "mapping", |
| 846 | pmic_arb, &pmic_arb_dfs_fops) == NULL) |
| 847 | dev_err(&pdev->dev, "error creating 'mapping' debugfs file\n"); |
| 848 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 849 | pr_debug("PMIC Arb Version 0x%x\n", |
| 850 | pmic_arb_read(pmic_arb, PMIC_ARB_VERSION)); |
| 851 | |
Abhijeet Dharmapurikar | ed34f4b | 2013-08-09 18:44:13 -0700 | [diff] [blame] | 852 | the_pmic_arb = pmic_arb; |
| 853 | register_syscore_ops(&spmi_pmic_arb_syscore_ops); |
| 854 | |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 855 | return 0; |
| 856 | |
Michael Bohan | bb6b30f | 2012-06-01 13:33:51 -0700 | [diff] [blame] | 857 | err_reg_controller: |
| 858 | spmi_del_controller(&pmic_arb->controller); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 859 | err_add_controller: |
| 860 | platform_set_drvdata(pdev, NULL); |
David Collins | beff3ca | 2012-09-24 16:21:34 -0700 | [diff] [blame] | 861 | if (pmic_arb->allow_wakeup) |
| 862 | irq_set_irq_wake(pmic_arb->pic_irq, 0); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 863 | return ret; |
| 864 | } |
| 865 | |
| 866 | static int __devexit spmi_pmic_arb_remove(struct platform_device *pdev) |
| 867 | { |
| 868 | struct spmi_pmic_arb_dev *pmic_arb = platform_get_drvdata(pdev); |
Michael Bohan | 6ca52b6 | 2013-02-27 18:45:14 -0800 | [diff] [blame] | 869 | int ret; |
| 870 | |
| 871 | ret = qpnpint_unregister_controller(pmic_arb->controller.dev.of_node); |
| 872 | if (ret) |
| 873 | dev_err(&pdev->dev, "Unable to unregister controller %d\n", |
| 874 | pmic_arb->controller.nr); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 875 | |
David Collins | beff3ca | 2012-09-24 16:21:34 -0700 | [diff] [blame] | 876 | if (pmic_arb->allow_wakeup) |
| 877 | irq_set_irq_wake(pmic_arb->pic_irq, 0); |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 878 | platform_set_drvdata(pdev, NULL); |
| 879 | spmi_del_controller(&pmic_arb->controller); |
Michael Bohan | 6ca52b6 | 2013-02-27 18:45:14 -0800 | [diff] [blame] | 880 | return ret; |
Kenneth Heitke | 65a5ad2 | 2012-02-08 14:00:04 -0700 | [diff] [blame] | 881 | } |
| 882 | |
| 883 | static struct of_device_id spmi_pmic_arb_match_table[] = { |
| 884 | { .compatible = "qcom,spmi-pmic-arb", |
| 885 | }, |
| 886 | {} |
| 887 | }; |
| 888 | |
| 889 | static struct platform_driver spmi_pmic_arb_driver = { |
| 890 | .probe = spmi_pmic_arb_probe, |
| 891 | .remove = __exit_p(spmi_pmic_arb_remove), |
| 892 | .driver = { |
| 893 | .name = SPMI_PMIC_ARB_NAME, |
| 894 | .owner = THIS_MODULE, |
| 895 | .of_match_table = spmi_pmic_arb_match_table, |
| 896 | }, |
| 897 | }; |
| 898 | |
| 899 | static int __init spmi_pmic_arb_init(void) |
| 900 | { |
| 901 | return platform_driver_register(&spmi_pmic_arb_driver); |
| 902 | } |
| 903 | postcore_initcall(spmi_pmic_arb_init); |
| 904 | |
| 905 | static void __exit spmi_pmic_arb_exit(void) |
| 906 | { |
| 907 | platform_driver_unregister(&spmi_pmic_arb_driver); |
| 908 | } |
| 909 | module_exit(spmi_pmic_arb_exit); |
| 910 | |
| 911 | MODULE_LICENSE("GPL v2"); |
| 912 | MODULE_VERSION("1.0"); |
| 913 | MODULE_ALIAS("platform:spmi_pmic_arb"); |