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Roy Huang24a07a12007-07-12 22:41:45 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Roy Huang24a07a12007-07-12 22:41:45 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Roy Huang24a07a12007-07-12 22:41:45 +08007 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080013#include <linux/mtd/physmap.h>
Roy Huang24a07a12007-07-12 22:41:45 +080014#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080016#include <linux/irq.h>
Bryan Wu81d9c7f2008-03-26 10:02:13 +080017#include <linux/i2c.h>
Roy Huang24a07a12007-07-12 22:41:45 +080018#include <linux/interrupt.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080019#include <linux/usb/musb.h>
Roy Huang24a07a12007-07-12 22:41:45 +080020#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080021#include <asm/dma.h>
22#include <asm/gpio.h>
23#include <asm/nand.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080024#include <asm/dpmc.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080025#include <asm/portmux.h>
Cliff Cai501674a2009-01-07 23:14:38 +080026#include <asm/bfin_sdh.h>
Bryan Wu639f6572008-08-27 10:51:02 +080027#include <mach/bf54x_keys.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080028#include <linux/input.h>
29#include <linux/spi/ad7877.h>
Roy Huang24a07a12007-07-12 22:41:45 +080030
31/*
32 * Name the Board for the /proc/cpuinfo
33 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080034const char bfin_board_name[] = "ADI BF548-EZKIT";
Roy Huang24a07a12007-07-12 22:41:45 +080035
36/*
37 * Driver needs to know address, irq and flag pin.
38 */
39
Michael Hennerich0a6304a2008-07-26 16:14:57 +080040#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080041#include <linux/usb/isp1760.h>
42static struct resource bfin_isp1760_resources[] = {
Michael Hennerich0a6304a2008-07-26 16:14:57 +080043 [0] = {
Michael Hennerich0a6304a2008-07-26 16:14:57 +080044 .start = 0x2C0C0000,
45 .end = 0x2C0C0000 + 0xfffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PG7,
50 .end = IRQ_PG7,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
Michael Hennerich3f375692008-11-18 17:48:22 +080055static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080057 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
62};
63
64static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb7682009-10-15 10:37:33 +000065 .name = "isp1760",
Michael Hennerich0a6304a2008-07-26 16:14:57 +080066 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080067 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
Michael Hennerich0a6304a2008-07-26 16:14:57 +080072};
Michael Hennerich0a6304a2008-07-26 16:14:57 +080073#endif
74
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080075#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
76
Bryan Wu639f6572008-08-27 10:51:02 +080077#include <mach/bf54x-lq043.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080078
79static struct bfin_bf54xfb_mach_info bf54x_lq043_data = {
Stefan Pledl0e101ec2009-07-29 08:09:45 +000080 .width = 95,
81 .height = 54,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080082 .xres = {480, 480, 480},
83 .yres = {272, 272, 272},
84 .bpp = {24, 24, 24},
85 .disp = GPIO_PE3,
86};
87
88static struct resource bf54x_lq043_resources[] = {
89 {
90 .start = IRQ_EPPI0_ERR,
91 .end = IRQ_EPPI0_ERR,
92 .flags = IORESOURCE_IRQ,
93 },
94};
95
96static struct platform_device bf54x_lq043_device = {
97 .name = "bf54x-lq043",
98 .id = -1,
99 .num_resources = ARRAY_SIZE(bf54x_lq043_resources),
100 .resource = bf54x_lq043_resources,
101 .dev = {
102 .platform_data = &bf54x_lq043_data,
103 },
104};
105#endif
106
107#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
Michael Hennerich8f740ef2007-10-13 00:36:46 -0400108static const unsigned int bf548_keymap[] = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800109 KEYVAL(0, 0, KEY_ENTER),
110 KEYVAL(0, 1, KEY_HELP),
111 KEYVAL(0, 2, KEY_0),
112 KEYVAL(0, 3, KEY_BACKSPACE),
113 KEYVAL(1, 0, KEY_TAB),
114 KEYVAL(1, 1, KEY_9),
115 KEYVAL(1, 2, KEY_8),
116 KEYVAL(1, 3, KEY_7),
117 KEYVAL(2, 0, KEY_DOWN),
118 KEYVAL(2, 1, KEY_6),
119 KEYVAL(2, 2, KEY_5),
120 KEYVAL(2, 3, KEY_4),
121 KEYVAL(3, 0, KEY_UP),
122 KEYVAL(3, 1, KEY_3),
123 KEYVAL(3, 2, KEY_2),
124 KEYVAL(3, 3, KEY_1),
125};
126
127static struct bfin_kpad_platform_data bf54x_kpad_data = {
128 .rows = 4,
129 .cols = 4,
Michael Hennerich8f740ef2007-10-13 00:36:46 -0400130 .keymap = bf548_keymap,
131 .keymapsize = ARRAY_SIZE(bf548_keymap),
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800132 .repeat = 0,
133 .debounce_time = 5000, /* ns (5ms) */
134 .coldrive_time = 1000, /* ns (1ms) */
135 .keyup_test_interval = 50, /* ms (50ms) */
136};
137
138static struct resource bf54x_kpad_resources[] = {
139 {
140 .start = IRQ_KEY,
141 .end = IRQ_KEY,
142 .flags = IORESOURCE_IRQ,
143 },
144};
145
146static struct platform_device bf54x_kpad_device = {
147 .name = "bf54x-keys",
148 .id = -1,
149 .num_resources = ARRAY_SIZE(bf54x_kpad_resources),
150 .resource = bf54x_kpad_resources,
151 .dev = {
152 .platform_data = &bf54x_kpad_data,
153 },
154};
155#endif
156
Michael Hennerichadfc0462009-10-09 07:37:03 +0000157#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
Michael Hennerichaca5e4a2008-10-08 14:27:59 +0800158#include <asm/bfin_rotary.h>
159
160static struct bfin_rotary_platform_data bfin_rotary_data = {
161 /*.rotary_up_key = KEY_UP,*/
162 /*.rotary_down_key = KEY_DOWN,*/
163 .rotary_rel_code = REL_WHEEL,
164 .rotary_button_key = KEY_ENTER,
165 .debounce = 10, /* 0..17 */
166 .mode = ROT_QUAD_ENC | ROT_DEBE,
167};
168
169static struct resource bfin_rotary_resources[] = {
170 {
171 .start = IRQ_CNT,
172 .end = IRQ_CNT,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static struct platform_device bfin_rotary_device = {
178 .name = "bfin-rotary",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
181 .resource = bfin_rotary_resources,
182 .dev = {
183 .platform_data = &bfin_rotary_data,
184 },
185};
186#endif
187
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000188#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000189#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000190static const struct adxl34x_platform_data adxl34x_info = {
191 .x_axis_offset = 0,
192 .y_axis_offset = 0,
193 .z_axis_offset = 0,
194 .tap_threshold = 0x31,
195 .tap_duration = 0x10,
196 .tap_latency = 0x60,
197 .tap_window = 0xF0,
198 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
199 .act_axis_control = 0xFF,
200 .activity_threshold = 5,
201 .inactivity_threshold = 3,
202 .inactivity_time = 4,
203 .free_fall_threshold = 0x7,
204 .free_fall_time = 0x20,
205 .data_rate = 0x8,
206 .data_range = ADXL_FULL_RES,
207
208 .ev_type = EV_ABS,
209 .ev_code_x = ABS_X, /* EV_REL */
210 .ev_code_y = ABS_Y, /* EV_REL */
211 .ev_code_z = ABS_Z, /* EV_REL */
212
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000213 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000214
215/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
216/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
217 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
218 .fifo_mode = ADXL_FIFO_STREAM,
Michael Hennerich5db40362009-10-29 13:48:10 +0000219 .orientation_enable = ADXL_EN_ORIENTATION_3D,
220 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
221 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
222 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
223 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000224};
225#endif
226
Roy Huang24a07a12007-07-12 22:41:45 +0800227#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
228static struct platform_device rtc_device = {
229 .name = "rtc-bfin",
230 .id = -1,
231};
232#endif
233
234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Roy Huang24a07a12007-07-12 22:41:45 +0800235#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000236static struct resource bfin_uart0_resources[] = {
Roy Huang24a07a12007-07-12 22:41:45 +0800237 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000238 .start = UART0_DLL,
239 .end = UART0_RBR+2,
Roy Huang24a07a12007-07-12 22:41:45 +0800240 .flags = IORESOURCE_MEM,
241 },
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000242 {
243 .start = IRQ_UART0_RX,
244 .end = IRQ_UART0_RX+1,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_ERROR,
249 .end = IRQ_UART0_ERROR,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = CH_UART0_TX,
254 .end = CH_UART0_TX,
255 .flags = IORESOURCE_DMA,
256 },
257 {
258 .start = CH_UART0_RX,
259 .end = CH_UART0_RX,
260 .flags = IORESOURCE_DMA,
261 },
262};
263
264unsigned short bfin_uart0_peripherals[] = {
265 P_UART0_TX, P_UART0_RX, 0
266};
267
268static struct platform_device bfin_uart0_device = {
269 .name = "bfin-uart",
270 .id = 0,
271 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
272 .resource = bfin_uart0_resources,
273 .dev = {
274 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
275 },
276};
Roy Huang24a07a12007-07-12 22:41:45 +0800277#endif
278#ifdef CONFIG_SERIAL_BFIN_UART1
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000279static struct resource bfin_uart1_resources[] = {
Roy Huang24a07a12007-07-12 22:41:45 +0800280 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000281 .start = UART1_DLL,
282 .end = UART1_RBR+2,
Roy Huang24a07a12007-07-12 22:41:45 +0800283 .flags = IORESOURCE_MEM,
284 },
Roy Huang24a07a12007-07-12 22:41:45 +0800285 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000286 .start = IRQ_UART1_RX,
287 .end = IRQ_UART1_RX+1,
288 .flags = IORESOURCE_IRQ,
Roy Huang24a07a12007-07-12 22:41:45 +0800289 },
Roy Huang24a07a12007-07-12 22:41:45 +0800290 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000291 .start = IRQ_UART1_ERROR,
292 .end = IRQ_UART1_ERROR,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = CH_UART1_TX,
297 .end = CH_UART1_TX,
298 .flags = IORESOURCE_DMA,
299 },
300 {
301 .start = CH_UART1_RX,
302 .end = CH_UART1_RX,
303 .flags = IORESOURCE_DMA,
304 },
305#ifdef CONFIG_BFIN_UART1_CTSRTS
306 { /* CTS pin -- 0 means not supported */
307 .start = GPIO_PE10,
308 .end = GPIO_PE10,
309 .flags = IORESOURCE_IO,
310 },
311 { /* RTS pin -- 0 means not supported */
312 .start = GPIO_PE9,
313 .end = GPIO_PE9,
314 .flags = IORESOURCE_IO,
Roy Huang24a07a12007-07-12 22:41:45 +0800315 },
316#endif
317};
318
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000319unsigned short bfin_uart1_peripherals[] = {
320 P_UART1_TX, P_UART1_RX,
321#ifdef CONFIG_BFIN_UART1_CTSRTS
322 P_UART1_RTS, P_UART1_CTS,
323#endif
324 0
325};
326
327static struct platform_device bfin_uart1_device = {
Roy Huang24a07a12007-07-12 22:41:45 +0800328 .name = "bfin-uart",
329 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000330 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
331 .resource = bfin_uart1_resources,
332 .dev = {
333 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
334 },
Roy Huang24a07a12007-07-12 22:41:45 +0800335};
336#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000337#ifdef CONFIG_SERIAL_BFIN_UART2
338static struct resource bfin_uart2_resources[] = {
339 {
340 .start = UART2_DLL,
341 .end = UART2_RBR+2,
342 .flags = IORESOURCE_MEM,
343 },
344 {
345 .start = IRQ_UART2_RX,
346 .end = IRQ_UART2_RX+1,
347 .flags = IORESOURCE_IRQ,
348 },
349 {
350 .start = IRQ_UART2_ERROR,
351 .end = IRQ_UART2_ERROR,
352 .flags = IORESOURCE_IRQ,
353 },
354 {
355 .start = CH_UART2_TX,
356 .end = CH_UART2_TX,
357 .flags = IORESOURCE_DMA,
358 },
359 {
360 .start = CH_UART2_RX,
361 .end = CH_UART2_RX,
362 .flags = IORESOURCE_DMA,
363 },
364};
365
366unsigned short bfin_uart2_peripherals[] = {
367 P_UART2_TX, P_UART2_RX, 0
368};
369
370static struct platform_device bfin_uart2_device = {
371 .name = "bfin-uart",
372 .id = 2,
373 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
374 .resource = bfin_uart2_resources,
375 .dev = {
376 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
377 },
378};
379#endif
380#ifdef CONFIG_SERIAL_BFIN_UART3
381static struct resource bfin_uart3_resources[] = {
382 {
383 .start = UART3_DLL,
384 .end = UART3_RBR+2,
385 .flags = IORESOURCE_MEM,
386 },
387 {
388 .start = IRQ_UART3_RX,
389 .end = IRQ_UART3_RX+1,
390 .flags = IORESOURCE_IRQ,
391 },
392 {
393 .start = IRQ_UART3_ERROR,
394 .end = IRQ_UART3_ERROR,
395 .flags = IORESOURCE_IRQ,
396 },
397 {
398 .start = CH_UART3_TX,
399 .end = CH_UART3_TX,
400 .flags = IORESOURCE_DMA,
401 },
402 {
403 .start = CH_UART3_RX,
404 .end = CH_UART3_RX,
405 .flags = IORESOURCE_DMA,
406 },
407#ifdef CONFIG_BFIN_UART3_CTSRTS
408 { /* CTS pin -- 0 means not supported */
409 .start = GPIO_PB3,
410 .end = GPIO_PB3,
411 .flags = IORESOURCE_IO,
412 },
413 { /* RTS pin -- 0 means not supported */
414 .start = GPIO_PB2,
415 .end = GPIO_PB2,
416 .flags = IORESOURCE_IO,
417 },
418#endif
419};
420
421unsigned short bfin_uart3_peripherals[] = {
422 P_UART3_TX, P_UART3_RX,
423#ifdef CONFIG_BFIN_UART3_CTSRTS
424 P_UART3_RTS, P_UART3_CTS,
425#endif
426 0
427};
428
429static struct platform_device bfin_uart3_device = {
430 .name = "bfin-uart",
431 .id = 3,
432 .num_resources = ARRAY_SIZE(bfin_uart3_resources),
433 .resource = bfin_uart3_resources,
434 .dev = {
435 .platform_data = &bfin_uart3_peripherals, /* Passed to driver */
436 },
437};
438#endif
439#endif
Roy Huang24a07a12007-07-12 22:41:45 +0800440
Graf Yang5be36d22008-04-25 03:09:15 +0800441#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +0800442#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800443static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800444 {
445 .start = 0xFFC00400,
446 .end = 0xFFC004FF,
447 .flags = IORESOURCE_MEM,
448 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800449 {
450 .start = IRQ_UART0_RX,
451 .end = IRQ_UART0_RX+1,
452 .flags = IORESOURCE_IRQ,
453 },
454 {
455 .start = CH_UART0_RX,
456 .end = CH_UART0_RX+1,
457 .flags = IORESOURCE_DMA,
458 },
459};
460static struct platform_device bfin_sir0_device = {
461 .name = "bfin_sir",
462 .id = 0,
463 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
464 .resource = bfin_sir0_resources,
465};
Graf Yang5be36d22008-04-25 03:09:15 +0800466#endif
467#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800468static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800469 {
470 .start = 0xFFC02000,
471 .end = 0xFFC020FF,
472 .flags = IORESOURCE_MEM,
473 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800474 {
475 .start = IRQ_UART1_RX,
476 .end = IRQ_UART1_RX+1,
477 .flags = IORESOURCE_IRQ,
478 },
479 {
480 .start = CH_UART1_RX,
481 .end = CH_UART1_RX+1,
482 .flags = IORESOURCE_DMA,
483 },
484};
485static struct platform_device bfin_sir1_device = {
486 .name = "bfin_sir",
487 .id = 1,
488 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
489 .resource = bfin_sir1_resources,
490};
Graf Yang5be36d22008-04-25 03:09:15 +0800491#endif
492#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800493static struct resource bfin_sir2_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800494 {
495 .start = 0xFFC02100,
496 .end = 0xFFC021FF,
497 .flags = IORESOURCE_MEM,
498 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800499 {
500 .start = IRQ_UART2_RX,
501 .end = IRQ_UART2_RX+1,
502 .flags = IORESOURCE_IRQ,
503 },
504 {
505 .start = CH_UART2_RX,
506 .end = CH_UART2_RX+1,
507 .flags = IORESOURCE_DMA,
508 },
509};
510static struct platform_device bfin_sir2_device = {
511 .name = "bfin_sir",
512 .id = 2,
513 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
514 .resource = bfin_sir2_resources,
515};
Graf Yang5be36d22008-04-25 03:09:15 +0800516#endif
517#ifdef CONFIG_BFIN_SIR3
Graf Yang42bd8bc2009-01-07 23:14:39 +0800518static struct resource bfin_sir3_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +0800519 {
520 .start = 0xFFC03100,
521 .end = 0xFFC031FF,
522 .flags = IORESOURCE_MEM,
523 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800524 {
525 .start = IRQ_UART3_RX,
526 .end = IRQ_UART3_RX+1,
527 .flags = IORESOURCE_IRQ,
528 },
529 {
530 .start = CH_UART3_RX,
531 .end = CH_UART3_RX+1,
532 .flags = IORESOURCE_DMA,
533 },
Graf Yang5be36d22008-04-25 03:09:15 +0800534};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800535static struct platform_device bfin_sir3_device = {
Graf Yang5be36d22008-04-25 03:09:15 +0800536 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800537 .id = 3,
538 .num_resources = ARRAY_SIZE(bfin_sir3_resources),
539 .resource = bfin_sir3_resources,
Graf Yang5be36d22008-04-25 03:09:15 +0800540};
541#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800542#endif
Graf Yang5be36d22008-04-25 03:09:15 +0800543
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800544#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400545#include <linux/smsc911x.h>
546
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800547static struct resource smsc911x_resources[] = {
548 {
549 .name = "smsc911x-memory",
550 .start = 0x24000000,
551 .end = 0x24000000 + 0xFF,
552 .flags = IORESOURCE_MEM,
553 },
554 {
555 .start = IRQ_PE8,
556 .end = IRQ_PE8,
557 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
558 },
559};
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400560
561static struct smsc911x_platform_config smsc911x_config = {
562 .flags = SMSC911X_USE_32BIT,
563 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
564 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
565 .phy_interface = PHY_INTERFACE_MODE_MII,
566};
567
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800568static struct platform_device smsc911x_device = {
569 .name = "smsc911x",
570 .id = 0,
571 .num_resources = ARRAY_SIZE(smsc911x_resources),
572 .resource = smsc911x_resources,
Mike Frysinger7a8b71d2009-06-05 20:41:17 -0400573 .dev = {
574 .platform_data = &smsc911x_config,
575 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800576};
577#endif
578
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800579#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
580static struct resource musb_resources[] = {
581 [0] = {
582 .start = 0xFFC03C00,
583 .end = 0xFFC040FF,
584 .flags = IORESOURCE_MEM,
585 },
586 [1] = { /* general IRQ */
587 .start = IRQ_USB_INT0,
588 .end = IRQ_USB_INT0,
589 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
590 },
591 [2] = { /* DMA IRQ */
592 .start = IRQ_USB_DMA,
593 .end = IRQ_USB_DMA,
594 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
595 },
596};
597
Bryan Wu50041ac2008-10-08 13:39:40 +0800598static struct musb_hdrc_config musb_config = {
599 .multipoint = 0,
600 .dyn_fifo = 0,
601 .soft_con = 1,
602 .dma = 1,
Bryan Wufea05da2009-01-07 23:14:39 +0800603 .num_eps = 8,
604 .dma_channels = 8,
Bryan Wu50041ac2008-10-08 13:39:40 +0800605 .gpio_vrsel = GPIO_PE7,
Cliff Cai85eb0e42010-01-22 04:02:46 +0000606 /* Some custom boards need to be active low, just set it to "0"
607 * if it is the case.
608 */
609 .gpio_vrsel_active = 1,
Bryan Wu50041ac2008-10-08 13:39:40 +0800610};
611
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800612static struct musb_hdrc_platform_data musb_plat = {
Bryan Wu29350772007-12-24 12:20:19 +0800613#if defined(CONFIG_USB_MUSB_OTG)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800614 .mode = MUSB_OTG,
Bryan Wu29350772007-12-24 12:20:19 +0800615#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800616 .mode = MUSB_HOST,
Bryan Wu29350772007-12-24 12:20:19 +0800617#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800618 .mode = MUSB_PERIPHERAL,
619#endif
Bryan Wu50041ac2008-10-08 13:39:40 +0800620 .config = &musb_config,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800621};
622
623static u64 musb_dmamask = ~(u32)0;
624
625static struct platform_device musb_device = {
626 .name = "musb_hdrc",
627 .id = 0,
628 .dev = {
629 .dma_mask = &musb_dmamask,
630 .coherent_dma_mask = 0xffffffff,
631 .platform_data = &musb_plat,
632 },
633 .num_resources = ARRAY_SIZE(musb_resources),
634 .resource = musb_resources,
635};
636#endif
637
Sonic Zhangdf5de262009-09-23 05:01:56 +0000638#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
639#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
640static struct resource bfin_sport0_uart_resources[] = {
641 {
642 .start = SPORT0_TCR1,
643 .end = SPORT0_MRCS3+4,
644 .flags = IORESOURCE_MEM,
645 },
646 {
647 .start = IRQ_SPORT0_RX,
648 .end = IRQ_SPORT0_RX+1,
649 .flags = IORESOURCE_IRQ,
650 },
651 {
652 .start = IRQ_SPORT0_ERROR,
653 .end = IRQ_SPORT0_ERROR,
654 .flags = IORESOURCE_IRQ,
655 },
656};
657
658unsigned short bfin_sport0_peripherals[] = {
659 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
660 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
661};
662
663static struct platform_device bfin_sport0_uart_device = {
664 .name = "bfin-sport-uart",
665 .id = 0,
666 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
667 .resource = bfin_sport0_uart_resources,
668 .dev = {
669 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
670 },
671};
672#endif
673#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
674static struct resource bfin_sport1_uart_resources[] = {
675 {
676 .start = SPORT1_TCR1,
677 .end = SPORT1_MRCS3+4,
678 .flags = IORESOURCE_MEM,
679 },
680 {
681 .start = IRQ_SPORT1_RX,
682 .end = IRQ_SPORT1_RX+1,
683 .flags = IORESOURCE_IRQ,
684 },
685 {
686 .start = IRQ_SPORT1_ERROR,
687 .end = IRQ_SPORT1_ERROR,
688 .flags = IORESOURCE_IRQ,
689 },
690};
691
692unsigned short bfin_sport1_peripherals[] = {
693 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
694 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
695};
696
697static struct platform_device bfin_sport1_uart_device = {
698 .name = "bfin-sport-uart",
699 .id = 1,
700 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
701 .resource = bfin_sport1_uart_resources,
702 .dev = {
703 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
704 },
705};
706#endif
707#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
708static struct resource bfin_sport2_uart_resources[] = {
709 {
710 .start = SPORT2_TCR1,
711 .end = SPORT2_MRCS3+4,
712 .flags = IORESOURCE_MEM,
713 },
714 {
715 .start = IRQ_SPORT2_RX,
716 .end = IRQ_SPORT2_RX+1,
717 .flags = IORESOURCE_IRQ,
718 },
719 {
720 .start = IRQ_SPORT2_ERROR,
721 .end = IRQ_SPORT2_ERROR,
722 .flags = IORESOURCE_IRQ,
723 },
724};
725
726unsigned short bfin_sport2_peripherals[] = {
727 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
728 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
729};
730
731static struct platform_device bfin_sport2_uart_device = {
732 .name = "bfin-sport-uart",
733 .id = 2,
734 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
735 .resource = bfin_sport2_uart_resources,
736 .dev = {
737 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
738 },
739};
740#endif
741#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
742static struct resource bfin_sport3_uart_resources[] = {
743 {
744 .start = SPORT3_TCR1,
745 .end = SPORT3_MRCS3+4,
746 .flags = IORESOURCE_MEM,
747 },
748 {
749 .start = IRQ_SPORT3_RX,
750 .end = IRQ_SPORT3_RX+1,
751 .flags = IORESOURCE_IRQ,
752 },
753 {
754 .start = IRQ_SPORT3_ERROR,
755 .end = IRQ_SPORT3_ERROR,
756 .flags = IORESOURCE_IRQ,
757 },
758};
759
760unsigned short bfin_sport3_peripherals[] = {
761 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
762 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
763};
764
765static struct platform_device bfin_sport3_uart_device = {
766 .name = "bfin-sport-uart",
767 .id = 3,
768 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
769 .resource = bfin_sport3_uart_resources,
770 .dev = {
771 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
772 },
773};
774#endif
775#endif
776
Barry Song706a01b2009-11-02 07:29:07 +0000777#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
778unsigned short bfin_can_peripherals[] = {
779 P_CAN0_RX, P_CAN0_TX, 0
780};
781
782static struct resource bfin_can_resources[] = {
783 {
784 .start = 0xFFC02A00,
785 .end = 0xFFC02FFF,
786 .flags = IORESOURCE_MEM,
787 },
788 {
789 .start = IRQ_CAN0_RX,
790 .end = IRQ_CAN0_RX,
791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .start = IRQ_CAN0_TX,
795 .end = IRQ_CAN0_TX,
796 .flags = IORESOURCE_IRQ,
797 },
798 {
799 .start = IRQ_CAN0_ERROR,
800 .end = IRQ_CAN0_ERROR,
801 .flags = IORESOURCE_IRQ,
802 },
803};
804
805static struct platform_device bfin_can_device = {
806 .name = "bfin_can",
807 .num_resources = ARRAY_SIZE(bfin_can_resources),
808 .resource = bfin_can_resources,
809 .dev = {
810 .platform_data = &bfin_can_peripherals, /* Passed to driver */
811 },
812};
813#endif
814
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800815#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
816static struct resource bfin_atapi_resources[] = {
817 {
818 .start = 0xFFC03800,
819 .end = 0xFFC0386F,
820 .flags = IORESOURCE_MEM,
821 },
822 {
823 .start = IRQ_ATAPI_ERR,
824 .end = IRQ_ATAPI_ERR,
825 .flags = IORESOURCE_IRQ,
826 },
827};
828
829static struct platform_device bfin_atapi_device = {
830 .name = "pata-bf54x",
831 .id = -1,
832 .num_resources = ARRAY_SIZE(bfin_atapi_resources),
833 .resource = bfin_atapi_resources,
834};
835#endif
836
837#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
838static struct mtd_partition partition_info[] = {
839 {
Mike Frysinger73775b82010-08-27 20:43:39 +0000840 .name = "bootloader(nand)",
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800841 .offset = 0,
Mike Frysinger73775b82010-08-27 20:43:39 +0000842 .size = 0x80000,
843 }, {
844 .name = "linux kernel(nand)",
845 .offset = MTDPART_OFS_APPEND,
Mike Frysingerf4585a02008-10-13 14:45:21 +0800846 .size = 4 * 1024 * 1024,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800847 },
848 {
Robin Getzaa582972008-08-05 17:47:29 +0800849 .name = "file system(nand)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800850 .offset = MTDPART_OFS_APPEND,
851 .size = MTDPART_SIZ_FULL,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800852 },
853};
854
855static struct bf5xx_nand_platform bf5xx_nand_platform = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800856 .data_width = NFC_NWIDTH_8,
857 .partitions = partition_info,
858 .nr_partitions = ARRAY_SIZE(partition_info),
859 .rd_dly = 3,
860 .wr_dly = 3,
861};
862
863static struct resource bf5xx_nand_resources[] = {
864 {
865 .start = 0xFFC03B00,
866 .end = 0xFFC03B4F,
867 .flags = IORESOURCE_MEM,
868 },
869 {
870 .start = CH_NFC,
871 .end = CH_NFC,
872 .flags = IORESOURCE_IRQ,
873 },
874};
875
876static struct platform_device bf5xx_nand_device = {
877 .name = "bf5xx-nand",
878 .id = 0,
879 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
880 .resource = bf5xx_nand_resources,
881 .dev = {
882 .platform_data = &bf5xx_nand_platform,
883 },
884};
885#endif
886
Michael Hennerich3d7e6cf2008-03-03 17:40:28 -0700887#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
Cliff Cai501674a2009-01-07 23:14:38 +0800888
889static struct bfin_sd_host bfin_sdh_data = {
890 .dma_chan = CH_SDH,
891 .irq_int0 = IRQ_SDH_MASK0,
892 .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0},
893};
894
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800895static struct platform_device bf54x_sdh_device = {
896 .name = "bfin-sdh",
897 .id = 0,
Cliff Cai501674a2009-01-07 23:14:38 +0800898 .dev = {
899 .platform_data = &bfin_sdh_data,
900 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800901};
902#endif
903
Mike Frysinger793dc272008-03-26 08:09:12 +0800904#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800905static struct mtd_partition ezkit_partitions[] = {
906 {
Robin Getzaa582972008-08-05 17:47:29 +0800907 .name = "bootloader(nor)",
Mike Frysinger73775b82010-08-27 20:43:39 +0000908 .size = 0x80000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800909 .offset = 0,
910 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800911 .name = "linux kernel(nor)",
Mike Frysinger664d0402008-10-09 17:28:36 +0800912 .size = 0x400000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800913 .offset = MTDPART_OFS_APPEND,
914 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800915 .name = "file system(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800916 .size = MTDPART_SIZ_FULL,
917 .offset = MTDPART_OFS_APPEND,
918 }
919};
920
921static struct physmap_flash_data ezkit_flash_data = {
922 .width = 2,
923 .parts = ezkit_partitions,
924 .nr_parts = ARRAY_SIZE(ezkit_partitions),
925};
926
927static struct resource ezkit_flash_resource = {
928 .start = 0x20000000,
Mike Frysinger664d0402008-10-09 17:28:36 +0800929 .end = 0x21ffffff,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800930 .flags = IORESOURCE_MEM,
931};
932
933static struct platform_device ezkit_flash_device = {
934 .name = "physmap-flash",
935 .id = 0,
936 .dev = {
937 .platform_data = &ezkit_flash_data,
938 },
939 .num_resources = 1,
940 .resource = &ezkit_flash_resource,
941};
Mike Frysinger793dc272008-03-26 08:09:12 +0800942#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800943
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800944#if defined(CONFIG_MTD_M25P80) \
945 || defined(CONFIG_MTD_M25P80_MODULE)
946/* SPI flash chip (m25p16) */
947static struct mtd_partition bfin_spi_flash_partitions[] = {
948 {
Robin Getzaa582972008-08-05 17:47:29 +0800949 .name = "bootloader(spi)",
Mike Frysinger73775b82010-08-27 20:43:39 +0000950 .size = 0x00080000,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800951 .offset = 0,
952 .mask_flags = MTD_CAP_ROM
953 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800954 .name = "linux kernel(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800955 .size = MTDPART_SIZ_FULL,
956 .offset = MTDPART_OFS_APPEND,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800957 }
958};
959
960static struct flash_platform_data bfin_spi_flash_data = {
961 .name = "m25p80",
962 .parts = bfin_spi_flash_partitions,
963 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
964 .type = "m25p16",
965};
966
967static struct bfin5xx_spi_chip spi_flash_chip_info = {
968 .enable_dma = 0, /* use dma transfer with this chip*/
969 .bits_per_word = 8,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800970};
971#endif
972
Barry Song7ba80062010-01-28 09:37:21 +0000973#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
974 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bernd Schmidt37fa2422008-04-24 05:19:02 +0800975static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
976 .enable_dma = 0,
977 .bits_per_word = 16,
978};
979#endif
980
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800981#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
982static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800983 .enable_dma = 0,
984 .bits_per_word = 16,
985};
986
987static const struct ad7877_platform_data bfin_ad7877_ts_info = {
988 .model = 7877,
989 .vref_delay_usecs = 50, /* internal, no capacitor */
990 .x_plate_ohms = 419,
991 .y_plate_ohms = 486,
992 .pressure_max = 1000,
993 .pressure_min = 0,
994 .stopacq_polarity = 1,
995 .first_conversion_delay = 3,
996 .acquisition_time = 1,
997 .averaging = 1,
998 .pen_down_acc_interval = 1,
999};
1000#endif
1001
Michael Hennerich6e668932008-02-09 01:54:09 +08001002#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1003static struct bfin5xx_spi_chip spidev_chip_info = {
1004 .enable_dma = 0,
1005 .bits_per_word = 8,
1006};
1007#endif
1008
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001009#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1010static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
1011 .enable_dma = 0, /* use dma transfer with this chip*/
1012 .bits_per_word = 8,
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001013};
1014#endif
1015
Mike Frysinger5bda2722008-06-07 15:03:01 +08001016static struct spi_board_info bfin_spi_board_info[] __initdata = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001017#if defined(CONFIG_MTD_M25P80) \
1018 || defined(CONFIG_MTD_M25P80_MODULE)
1019 {
1020 /* the modalias must be the same as spi device driver name */
1021 .modalias = "m25p80", /* Name of spi_driver for this device */
1022 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1023 .bus_num = 0, /* Framework bus number */
1024 .chip_select = 1, /* SPI_SSEL1*/
1025 .platform_data = &bfin_spi_flash_data,
1026 .controller_data = &spi_flash_chip_info,
1027 .mode = SPI_MODE_3,
1028 },
1029#endif
Barry Song7ba80062010-01-28 09:37:21 +00001030#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1031 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
Bernd Schmidt37fa2422008-04-24 05:19:02 +08001032 {
Barry Song7ba80062010-01-28 09:37:21 +00001033 .modalias = "ad183x",
Bernd Schmidt37fa2422008-04-24 05:19:02 +08001034 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1035 .bus_num = 1,
Barry Song7ba80062010-01-28 09:37:21 +00001036 .chip_select = 4,
Bernd Schmidt37fa2422008-04-24 05:19:02 +08001037 .controller_data = &ad1836_spi_chip_info,
1038 },
1039#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001040#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001041 {
1042 .modalias = "ad7877",
1043 .platform_data = &bfin_ad7877_ts_info,
1044 .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
1045 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1046 .bus_num = 0,
1047 .chip_select = 2,
1048 .controller_data = &spi_ad7877_chip_info,
1049 },
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001050#endif
Michael Hennerich6e668932008-02-09 01:54:09 +08001051#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1052 {
1053 .modalias = "spidev",
1054 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1055 .bus_num = 0,
1056 .chip_select = 1,
1057 .controller_data = &spidev_chip_info,
1058 },
1059#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001060#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1061 {
1062 .modalias = "adxl34x",
1063 .platform_data = &adxl34x_info,
1064 .irq = IRQ_PC5,
1065 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1066 .bus_num = 1,
1067 .chip_select = 2,
1068 .controller_data = &spi_adxl34x_chip_info,
1069 .mode = SPI_MODE_3,
1070 },
1071#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001072};
Mike Frysinger5bda2722008-06-07 15:03:01 +08001073#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001074/* SPI (0) */
1075static struct resource bfin_spi0_resource[] = {
1076 [0] = {
1077 .start = SPI0_REGBASE,
1078 .end = SPI0_REGBASE + 0xFF,
1079 .flags = IORESOURCE_MEM,
1080 },
1081 [1] = {
1082 .start = CH_SPI0,
1083 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +00001084 .flags = IORESOURCE_DMA,
1085 },
1086 [2] = {
1087 .start = IRQ_SPI0,
1088 .end = IRQ_SPI0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001089 .flags = IORESOURCE_IRQ,
1090 }
1091};
1092
1093/* SPI (1) */
1094static struct resource bfin_spi1_resource[] = {
1095 [0] = {
1096 .start = SPI1_REGBASE,
1097 .end = SPI1_REGBASE + 0xFF,
1098 .flags = IORESOURCE_MEM,
1099 },
1100 [1] = {
1101 .start = CH_SPI1,
1102 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +00001103 .flags = IORESOURCE_DMA,
1104 },
1105 [2] = {
1106 .start = IRQ_SPI1,
1107 .end = IRQ_SPI1,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001108 .flags = IORESOURCE_IRQ,
1109 }
1110};
1111
1112/* SPI controller data */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001113static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
Mike Frysingerc5af5452010-06-16 19:29:51 +00001114 .num_chipselect = 4,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001115 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001116 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001117};
1118
1119static struct platform_device bf54x_spi_master0 = {
1120 .name = "bfin-spi",
1121 .id = 0, /* Bus number */
1122 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1123 .resource = bfin_spi0_resource,
1124 .dev = {
Bryan Wu5d448dd2007-11-12 23:24:42 +08001125 .platform_data = &bf54x_spi_master_info0, /* Passed to driver */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001126 },
1127};
1128
Bryan Wu5d448dd2007-11-12 23:24:42 +08001129static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
Mike Frysingerc5af5452010-06-16 19:29:51 +00001130 .num_chipselect = 4,
Bryan Wu5d448dd2007-11-12 23:24:42 +08001131 .enable_dma = 1, /* master has the ability to do dma transfer */
1132 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1133};
1134
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001135static struct platform_device bf54x_spi_master1 = {
1136 .name = "bfin-spi",
1137 .id = 1, /* Bus number */
1138 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1139 .resource = bfin_spi1_resource,
1140 .dev = {
Bryan Wu5d448dd2007-11-12 23:24:42 +08001141 .platform_data = &bf54x_spi_master_info1, /* Passed to driver */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001142 },
1143};
1144#endif /* spi master and devices */
1145
1146#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1147static struct resource bfin_twi0_resource[] = {
1148 [0] = {
1149 .start = TWI0_REGBASE,
1150 .end = TWI0_REGBASE + 0xFF,
1151 .flags = IORESOURCE_MEM,
1152 },
1153 [1] = {
1154 .start = IRQ_TWI0,
1155 .end = IRQ_TWI0,
1156 .flags = IORESOURCE_IRQ,
1157 },
1158};
1159
1160static struct platform_device i2c_bfin_twi0_device = {
1161 .name = "i2c-bfin-twi",
1162 .id = 0,
1163 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1164 .resource = bfin_twi0_resource,
1165};
1166
Mike Frysinger7160e952007-11-21 16:03:07 +08001167#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001168static struct resource bfin_twi1_resource[] = {
1169 [0] = {
1170 .start = TWI1_REGBASE,
1171 .end = TWI1_REGBASE + 0xFF,
1172 .flags = IORESOURCE_MEM,
1173 },
1174 [1] = {
1175 .start = IRQ_TWI1,
1176 .end = IRQ_TWI1,
1177 .flags = IORESOURCE_IRQ,
1178 },
1179};
1180
1181static struct platform_device i2c_bfin_twi1_device = {
1182 .name = "i2c-bfin-twi",
1183 .id = 1,
1184 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1185 .resource = bfin_twi1_resource,
1186};
1187#endif
Mike Frysinger7160e952007-11-21 16:03:07 +08001188#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001189
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001190static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1191};
1192
1193#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1194static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
Michael Hennerichebd58332009-07-02 11:00:38 +00001195#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001196 {
1197 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001198 },
1199#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00001200#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001201 {
1202 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001203 .irq = 212,
1204 },
1205#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001206#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1207 {
1208 I2C_BOARD_INFO("adxl34x", 0x53),
1209 .irq = IRQ_PC5,
1210 .platform_data = (void *)&adxl34x_info,
1211 },
1212#endif
steven miao39d3c1c2010-08-26 08:25:13 +00001213#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1214 {
1215 I2C_BOARD_INFO("ad5252", 0x2f),
1216 },
1217#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001218};
1219#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001220
Michael Hennerich2463ef22008-01-27 16:49:48 +08001221#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1222#include <linux/gpio_keys.h>
1223
1224static struct gpio_keys_button bfin_gpio_keys_table[] = {
1225 {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"},
1226 {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"},
1227 {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"},
1228 {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"},
1229};
1230
1231static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1232 .buttons = bfin_gpio_keys_table,
1233 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1234};
1235
1236static struct platform_device bfin_device_gpiokeys = {
1237 .name = "gpio-keys",
1238 .dev = {
1239 .platform_data = &bfin_gpio_keys_data,
1240 },
1241};
1242#endif
1243
Michael Hennerich14b03202008-05-07 11:41:26 +08001244static const unsigned int cclk_vlev_datasheet[] =
1245{
1246/*
1247 * Internal VLEV BF54XSBBC1533
1248 ****temporarily using these values until data sheet is updated
1249 */
1250 VRPAIR(VLEV_085, 150000000),
1251 VRPAIR(VLEV_090, 250000000),
1252 VRPAIR(VLEV_110, 276000000),
1253 VRPAIR(VLEV_115, 301000000),
1254 VRPAIR(VLEV_120, 525000000),
1255 VRPAIR(VLEV_125, 550000000),
1256 VRPAIR(VLEV_130, 600000000),
1257};
1258
1259static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1260 .tuple_tab = cclk_vlev_datasheet,
1261 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1262 .vr_settling_time = 25 /* us */,
1263};
1264
1265static struct platform_device bfin_dpmc = {
1266 .name = "bfin dpmc",
1267 .dev = {
1268 .platform_data = &bfin_dmpc_vreg_data,
1269 },
1270};
1271
Barry Song439b4862009-11-13 02:41:07 +00001272#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1273static struct platform_device bfin_i2s = {
1274 .name = "bfin-i2s",
1275 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1276 /* TODO: add platform data here */
1277};
1278#endif
1279
1280#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1281static struct platform_device bfin_tdm = {
1282 .name = "bfin-tdm",
1283 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1284 /* TODO: add platform data here */
1285};
1286#endif
1287
1288#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1289static struct platform_device bfin_ac97 = {
1290 .name = "bfin-ac97",
1291 .id = CONFIG_SND_BF5XX_SPORT_NUM,
1292 /* TODO: add platform data here */
1293};
1294#endif
1295
Roy Huang24a07a12007-07-12 22:41:45 +08001296static struct platform_device *ezkit_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08001297
1298 &bfin_dpmc,
1299
Roy Huang24a07a12007-07-12 22:41:45 +08001300#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1301 &rtc_device,
1302#endif
1303
1304#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001305#ifdef CONFIG_SERIAL_BFIN_UART0
1306 &bfin_uart0_device,
1307#endif
1308#ifdef CONFIG_SERIAL_BFIN_UART1
1309 &bfin_uart1_device,
1310#endif
1311#ifdef CONFIG_SERIAL_BFIN_UART2
1312 &bfin_uart2_device,
1313#endif
1314#ifdef CONFIG_SERIAL_BFIN_UART3
1315 &bfin_uart3_device,
1316#endif
Roy Huang24a07a12007-07-12 22:41:45 +08001317#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001318
Graf Yang5be36d22008-04-25 03:09:15 +08001319#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08001320#ifdef CONFIG_BFIN_SIR0
1321 &bfin_sir0_device,
1322#endif
1323#ifdef CONFIG_BFIN_SIR1
1324 &bfin_sir1_device,
1325#endif
1326#ifdef CONFIG_BFIN_SIR2
1327 &bfin_sir2_device,
1328#endif
1329#ifdef CONFIG_BFIN_SIR3
1330 &bfin_sir3_device,
1331#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001332#endif
1333
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001334#if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
1335 &bf54x_lq043_device,
1336#endif
1337
1338#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
1339 &smsc911x_device,
1340#endif
1341
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001342#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1343 &musb_device,
1344#endif
1345
Michael Hennerich3f375692008-11-18 17:48:22 +08001346#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1347 &bfin_isp1760_device,
1348#endif
1349
Sonic Zhangdf5de262009-09-23 05:01:56 +00001350#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1351#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1352 &bfin_sport0_uart_device,
1353#endif
1354#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1355 &bfin_sport1_uart_device,
1356#endif
1357#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1358 &bfin_sport2_uart_device,
1359#endif
1360#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1361 &bfin_sport3_uart_device,
1362#endif
1363#endif
1364
Barry Song706a01b2009-11-02 07:29:07 +00001365#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1366 &bfin_can_device,
1367#endif
1368
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001369#if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
1370 &bfin_atapi_device,
1371#endif
1372
1373#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1374 &bf5xx_nand_device,
1375#endif
1376
Michael Hennerich3d7e6cf2008-03-03 17:40:28 -07001377#if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001378 &bf54x_sdh_device,
1379#endif
1380
1381#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
1382 &bf54x_spi_master0,
Bryan Wud4b1d272007-10-21 17:03:55 +08001383 &bf54x_spi_master1,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001384#endif
1385
1386#if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
1387 &bf54x_kpad_device,
1388#endif
1389
Michael Hennerichadfc0462009-10-09 07:37:03 +00001390#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
Michael Hennerichaca5e4a2008-10-08 14:27:59 +08001391 &bfin_rotary_device,
1392#endif
1393
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001394#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1395 &i2c_bfin_twi0_device,
Mike Frysinger7160e952007-11-21 16:03:07 +08001396#if !defined(CONFIG_BF542)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001397 &i2c_bfin_twi1_device,
1398#endif
Mike Frysinger7160e952007-11-21 16:03:07 +08001399#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08001400
1401#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1402 &bfin_device_gpiokeys,
1403#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08001404
Mike Frysinger793dc272008-03-26 08:09:12 +08001405#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08001406 &ezkit_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08001407#endif
Barry Song439b4862009-11-13 02:41:07 +00001408
1409#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1410 &bfin_i2s,
1411#endif
1412
1413#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1414 &bfin_tdm,
1415#endif
1416
1417#if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1418 &bfin_ac97,
1419#endif
Roy Huang24a07a12007-07-12 22:41:45 +08001420};
1421
Mike Frysingera01d7a72008-02-02 15:34:56 +08001422static int __init ezkit_init(void)
Roy Huang24a07a12007-07-12 22:41:45 +08001423{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08001424 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001425
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001426 i2c_register_board_info(0, bfin_i2c_board_info0,
1427 ARRAY_SIZE(bfin_i2c_board_info0));
1428#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1429 i2c_register_board_info(1, bfin_i2c_board_info1,
1430 ARRAY_SIZE(bfin_i2c_board_info1));
1431#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001432
Roy Huang24a07a12007-07-12 22:41:45 +08001433 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001434
Mike Frysinger5bda2722008-06-07 15:03:01 +08001435 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001436
Roy Huang24a07a12007-07-12 22:41:45 +08001437 return 0;
1438}
1439
Mike Frysingera01d7a72008-02-02 15:34:56 +08001440arch_initcall(ezkit_init);
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00001441
1442static struct platform_device *ezkit_early_devices[] __initdata = {
1443#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1444#ifdef CONFIG_SERIAL_BFIN_UART0
1445 &bfin_uart0_device,
1446#endif
1447#ifdef CONFIG_SERIAL_BFIN_UART1
1448 &bfin_uart1_device,
1449#endif
1450#ifdef CONFIG_SERIAL_BFIN_UART2
1451 &bfin_uart2_device,
1452#endif
1453#ifdef CONFIG_SERIAL_BFIN_UART3
1454 &bfin_uart3_device,
1455#endif
1456#endif
1457
1458#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1459#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1460 &bfin_sport0_uart_device,
1461#endif
1462#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1463 &bfin_sport1_uart_device,
1464#endif
1465#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1466 &bfin_sport2_uart_device,
1467#endif
1468#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
1469 &bfin_sport3_uart_device,
1470#endif
1471#endif
1472};
1473
1474void __init native_machine_early_platform_add_devices(void)
1475{
1476 printk(KERN_INFO "register early platform devices\n");
1477 early_platform_add_devices(ezkit_early_devices,
1478 ARRAY_SIZE(ezkit_early_devices));
1479}