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Divy Le Ray4d22de32007-01-18 22:04:14 -05001/*
Divy Le Raya02d44a2008-10-13 18:47:30 -07002 * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
Divy Le Ray4d22de32007-01-18 22:04:14 -05003 *
Divy Le Ray1d68e932007-01-30 19:44:35 -08004 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
Divy Le Ray4d22de32007-01-18 22:04:14 -05009 *
Divy Le Ray1d68e932007-01-30 19:44:35 -080010 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
Divy Le Ray4d22de32007-01-18 22:04:14 -050031 */
Divy Le Ray4d22de32007-01-18 22:04:14 -050032#include <linux/module.h>
33#include <linux/moduleparam.h>
34#include <linux/init.h>
35#include <linux/pci.h>
36#include <linux/dma-mapping.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/if_vlan.h>
Ben Hutchings0f07c4e2009-04-29 08:07:20 +000040#include <linux/mdio.h>
Divy Le Ray4d22de32007-01-18 22:04:14 -050041#include <linux/sockios.h>
42#include <linux/workqueue.h>
43#include <linux/proc_fs.h>
44#include <linux/rtnetlink.h>
Divy Le Ray2e283962007-03-18 13:10:06 -070045#include <linux/firmware.h>
vignesh babud9da4662007-07-09 11:50:22 -070046#include <linux/log2.h>
Divy Le Ray4d22de32007-01-18 22:04:14 -050047#include <asm/uaccess.h>
48
49#include "common.h"
50#include "cxgb3_ioctl.h"
51#include "regs.h"
52#include "cxgb3_offload.h"
53#include "version.h"
54
55#include "cxgb3_ctl_defs.h"
56#include "t3_cpl.h"
57#include "firmware_exports.h"
58
59enum {
60 MAX_TXQ_ENTRIES = 16384,
61 MAX_CTRL_TXQ_ENTRIES = 1024,
62 MAX_RSPQ_ENTRIES = 16384,
63 MAX_RX_BUFFERS = 16384,
64 MAX_RX_JUMBO_BUFFERS = 16384,
65 MIN_TXQ_ENTRIES = 4,
66 MIN_CTRL_TXQ_ENTRIES = 4,
67 MIN_RSPQ_ENTRIES = 32,
68 MIN_FL_ENTRIES = 32
69};
70
71#define PORT_MASK ((1 << MAX_NPORTS) - 1)
72
73#define DFLT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | \
74 NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP |\
75 NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR)
76
77#define EEPROM_MAGIC 0x38E2F10C
78
Divy Le Ray678771d2007-11-16 14:26:44 -080079#define CH_DEVICE(devid, idx) \
80 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx }
Divy Le Ray4d22de32007-01-18 22:04:14 -050081
82static const struct pci_device_id cxgb3_pci_tbl[] = {
Divy Le Ray678771d2007-11-16 14:26:44 -080083 CH_DEVICE(0x20, 0), /* PE9000 */
84 CH_DEVICE(0x21, 1), /* T302E */
85 CH_DEVICE(0x22, 2), /* T310E */
86 CH_DEVICE(0x23, 3), /* T320X */
87 CH_DEVICE(0x24, 1), /* T302X */
88 CH_DEVICE(0x25, 3), /* T320E */
89 CH_DEVICE(0x26, 2), /* T310X */
90 CH_DEVICE(0x30, 2), /* T3B10 */
91 CH_DEVICE(0x31, 3), /* T3B20 */
92 CH_DEVICE(0x32, 1), /* T3B02 */
Divy Le Rayce03aad2009-02-18 17:47:57 -080093 CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */
Divy Le Ray74451422009-05-29 12:52:44 +000094 CH_DEVICE(0x36, 3), /* S320E-CR */
95 CH_DEVICE(0x37, 7), /* N320E-G2 */
Divy Le Ray4d22de32007-01-18 22:04:14 -050096 {0,}
97};
98
99MODULE_DESCRIPTION(DRV_DESC);
100MODULE_AUTHOR("Chelsio Communications");
Divy Le Ray1d68e932007-01-30 19:44:35 -0800101MODULE_LICENSE("Dual BSD/GPL");
Divy Le Ray4d22de32007-01-18 22:04:14 -0500102MODULE_VERSION(DRV_VERSION);
103MODULE_DEVICE_TABLE(pci, cxgb3_pci_tbl);
104
105static int dflt_msg_enable = DFLT_MSG_ENABLE;
106
107module_param(dflt_msg_enable, int, 0644);
108MODULE_PARM_DESC(dflt_msg_enable, "Chelsio T3 default message enable bitmap");
109
110/*
111 * The driver uses the best interrupt scheme available on a platform in the
112 * order MSI-X, MSI, legacy pin interrupts. This parameter determines which
113 * of these schemes the driver may consider as follows:
114 *
115 * msi = 2: choose from among all three options
116 * msi = 1: only consider MSI and pin interrupts
117 * msi = 0: force pin interrupts
118 */
119static int msi = 2;
120
121module_param(msi, int, 0644);
122MODULE_PARM_DESC(msi, "whether to use MSI or MSI-X");
123
124/*
125 * The driver enables offload as a default.
126 * To disable it, use ofld_disable = 1.
127 */
128
129static int ofld_disable = 0;
130
131module_param(ofld_disable, int, 0644);
132MODULE_PARM_DESC(ofld_disable, "whether to enable offload at init time or not");
133
134/*
135 * We have work elements that we need to cancel when an interface is taken
136 * down. Normally the work elements would be executed by keventd but that
137 * can deadlock because of linkwatch. If our close method takes the rtnl
138 * lock and linkwatch is ahead of our work elements in keventd, linkwatch
139 * will block keventd as it needs the rtnl lock, and we'll deadlock waiting
140 * for our work to complete. Get our own work queue to solve this.
141 */
142static struct workqueue_struct *cxgb3_wq;
143
144/**
145 * link_report - show link status and link speed/duplex
146 * @p: the port whose settings are to be reported
147 *
148 * Shows the link status, speed, and duplex of a port.
149 */
150static void link_report(struct net_device *dev)
151{
152 if (!netif_carrier_ok(dev))
153 printk(KERN_INFO "%s: link down\n", dev->name);
154 else {
155 const char *s = "10Mbps";
156 const struct port_info *p = netdev_priv(dev);
157
158 switch (p->link_config.speed) {
159 case SPEED_10000:
160 s = "10Gbps";
161 break;
162 case SPEED_1000:
163 s = "1000Mbps";
164 break;
165 case SPEED_100:
166 s = "100Mbps";
167 break;
168 }
169
170 printk(KERN_INFO "%s: link up, %s, %s-duplex\n", dev->name, s,
171 p->link_config.duplex == DUPLEX_FULL ? "full" : "half");
172 }
173}
174
Divy Le Raybf792092009-03-12 21:14:19 +0000175void t3_os_link_fault(struct adapter *adap, int port_id, int state)
176{
177 struct net_device *dev = adap->port[port_id];
178 struct port_info *pi = netdev_priv(dev);
179
180 if (state == netif_carrier_ok(dev))
181 return;
182
183 if (state) {
184 struct cmac *mac = &pi->mac;
185
186 netif_carrier_on(dev);
187
188 /* Clear local faults */
189 t3_xgm_intr_disable(adap, pi->port_id);
190 t3_read_reg(adap, A_XGM_INT_STATUS +
191 pi->mac.offset);
192 t3_write_reg(adap,
193 A_XGM_INT_CAUSE + pi->mac.offset,
194 F_XGM_INT);
195
196 t3_set_reg_field(adap,
197 A_XGM_INT_ENABLE +
198 pi->mac.offset,
199 F_XGM_INT, F_XGM_INT);
200 t3_xgm_intr_enable(adap, pi->port_id);
201
202 t3_mac_enable(mac, MAC_DIRECTION_TX);
203 } else
204 netif_carrier_off(dev);
205
206 link_report(dev);
207}
208
Divy Le Ray4d22de32007-01-18 22:04:14 -0500209/**
210 * t3_os_link_changed - handle link status changes
211 * @adapter: the adapter associated with the link change
212 * @port_id: the port index whose limk status has changed
213 * @link_stat: the new status of the link
214 * @speed: the new speed setting
215 * @duplex: the new duplex setting
216 * @pause: the new flow-control setting
217 *
218 * This is the OS-dependent handler for link status changes. The OS
219 * neutral handler takes care of most of the processing for these events,
220 * then calls this handler for any OS-specific processing.
221 */
222void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat,
223 int speed, int duplex, int pause)
224{
225 struct net_device *dev = adapter->port[port_id];
Divy Le Ray6d6daba2007-03-31 00:23:24 -0700226 struct port_info *pi = netdev_priv(dev);
227 struct cmac *mac = &pi->mac;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500228
229 /* Skip changes from disabled ports. */
230 if (!netif_running(dev))
231 return;
232
233 if (link_stat != netif_carrier_ok(dev)) {
Divy Le Ray6d6daba2007-03-31 00:23:24 -0700234 if (link_stat) {
Divy Le Ray59cf8102007-04-09 20:10:27 -0700235 t3_mac_enable(mac, MAC_DIRECTION_RX);
Divy Le Raybf792092009-03-12 21:14:19 +0000236
237 /* Clear local faults */
238 t3_xgm_intr_disable(adapter, pi->port_id);
239 t3_read_reg(adapter, A_XGM_INT_STATUS +
240 pi->mac.offset);
241 t3_write_reg(adapter,
242 A_XGM_INT_CAUSE + pi->mac.offset,
243 F_XGM_INT);
244
245 t3_set_reg_field(adapter,
246 A_XGM_INT_ENABLE + pi->mac.offset,
247 F_XGM_INT, F_XGM_INT);
248 t3_xgm_intr_enable(adapter, pi->port_id);
249
Divy Le Ray4d22de32007-01-18 22:04:14 -0500250 netif_carrier_on(dev);
Divy Le Ray6d6daba2007-03-31 00:23:24 -0700251 } else {
Divy Le Ray4d22de32007-01-18 22:04:14 -0500252 netif_carrier_off(dev);
Divy Le Raybf792092009-03-12 21:14:19 +0000253
254 t3_xgm_intr_disable(adapter, pi->port_id);
255 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
256 t3_set_reg_field(adapter,
257 A_XGM_INT_ENABLE + pi->mac.offset,
258 F_XGM_INT, 0);
259
260 if (is_10G(adapter))
261 pi->phy.ops->power_down(&pi->phy, 1);
262
263 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
Divy Le Ray59cf8102007-04-09 20:10:27 -0700264 t3_mac_disable(mac, MAC_DIRECTION_RX);
265 t3_link_start(&pi->phy, mac, &pi->link_config);
Divy Le Ray6d6daba2007-03-31 00:23:24 -0700266 }
267
Divy Le Ray4d22de32007-01-18 22:04:14 -0500268 link_report(dev);
269 }
270}
271
Divy Le Ray1e882022008-10-08 17:40:07 -0700272/**
273 * t3_os_phymod_changed - handle PHY module changes
274 * @phy: the PHY reporting the module change
275 * @mod_type: new module type
276 *
277 * This is the OS-dependent handler for PHY module changes. It is
278 * invoked when a PHY module is removed or inserted for any OS-specific
279 * processing.
280 */
281void t3_os_phymod_changed(struct adapter *adap, int port_id)
282{
283 static const char *mod_str[] = {
284 NULL, "SR", "LR", "LRM", "TWINAX", "TWINAX", "unknown"
285 };
286
287 const struct net_device *dev = adap->port[port_id];
288 const struct port_info *pi = netdev_priv(dev);
289
290 if (pi->phy.modtype == phy_modtype_none)
291 printk(KERN_INFO "%s: PHY module unplugged\n", dev->name);
292 else
293 printk(KERN_INFO "%s: %s PHY module inserted\n", dev->name,
294 mod_str[pi->phy.modtype]);
295}
296
Divy Le Ray4d22de32007-01-18 22:04:14 -0500297static void cxgb_set_rxmode(struct net_device *dev)
298{
299 struct t3_rx_mode rm;
300 struct port_info *pi = netdev_priv(dev);
301
302 init_rx_mode(&rm, dev, dev->mc_list);
303 t3_mac_set_rx_mode(&pi->mac, &rm);
304}
305
306/**
307 * link_start - enable a port
308 * @dev: the device to enable
309 *
310 * Performs the MAC and PHY actions needed to enable a port.
311 */
312static void link_start(struct net_device *dev)
313{
314 struct t3_rx_mode rm;
315 struct port_info *pi = netdev_priv(dev);
316 struct cmac *mac = &pi->mac;
317
318 init_rx_mode(&rm, dev, dev->mc_list);
319 t3_mac_reset(mac);
320 t3_mac_set_mtu(mac, dev->mtu);
321 t3_mac_set_address(mac, 0, dev->dev_addr);
322 t3_mac_set_rx_mode(mac, &rm);
323 t3_link_start(&pi->phy, mac, &pi->link_config);
324 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
325}
326
327static inline void cxgb_disable_msi(struct adapter *adapter)
328{
329 if (adapter->flags & USING_MSIX) {
330 pci_disable_msix(adapter->pdev);
331 adapter->flags &= ~USING_MSIX;
332 } else if (adapter->flags & USING_MSI) {
333 pci_disable_msi(adapter->pdev);
334 adapter->flags &= ~USING_MSI;
335 }
336}
337
338/*
339 * Interrupt handler for asynchronous events used with MSI-X.
340 */
341static irqreturn_t t3_async_intr_handler(int irq, void *cookie)
342{
343 t3_slow_intr_handler(cookie);
344 return IRQ_HANDLED;
345}
346
347/*
348 * Name the MSI-X interrupts.
349 */
350static void name_msix_vecs(struct adapter *adap)
351{
352 int i, j, msi_idx = 1, n = sizeof(adap->msix_info[0].desc) - 1;
353
354 snprintf(adap->msix_info[0].desc, n, "%s", adap->name);
355 adap->msix_info[0].desc[n] = 0;
356
357 for_each_port(adap, j) {
358 struct net_device *d = adap->port[j];
359 const struct port_info *pi = netdev_priv(d);
360
361 for (i = 0; i < pi->nqsets; i++, msi_idx++) {
362 snprintf(adap->msix_info[msi_idx].desc, n,
Divy Le Ray8c263762008-10-08 17:37:33 -0700363 "%s-%d", d->name, pi->first_qset + i);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500364 adap->msix_info[msi_idx].desc[n] = 0;
365 }
Divy Le Ray8c263762008-10-08 17:37:33 -0700366 }
Divy Le Ray4d22de32007-01-18 22:04:14 -0500367}
368
369static int request_msix_data_irqs(struct adapter *adap)
370{
371 int i, j, err, qidx = 0;
372
373 for_each_port(adap, i) {
374 int nqsets = adap2pinfo(adap, i)->nqsets;
375
376 for (j = 0; j < nqsets; ++j) {
377 err = request_irq(adap->msix_info[qidx + 1].vec,
378 t3_intr_handler(adap,
379 adap->sge.qs[qidx].
380 rspq.polling), 0,
381 adap->msix_info[qidx + 1].desc,
382 &adap->sge.qs[qidx]);
383 if (err) {
384 while (--qidx >= 0)
385 free_irq(adap->msix_info[qidx + 1].vec,
386 &adap->sge.qs[qidx]);
387 return err;
388 }
389 qidx++;
390 }
391 }
392 return 0;
393}
394
Divy Le Ray8c263762008-10-08 17:37:33 -0700395static void free_irq_resources(struct adapter *adapter)
396{
397 if (adapter->flags & USING_MSIX) {
398 int i, n = 0;
399
400 free_irq(adapter->msix_info[0].vec, adapter);
401 for_each_port(adapter, i)
Divy Le Ray5cda9362009-01-18 21:29:40 -0800402 n += adap2pinfo(adapter, i)->nqsets;
Divy Le Ray8c263762008-10-08 17:37:33 -0700403
404 for (i = 0; i < n; ++i)
405 free_irq(adapter->msix_info[i + 1].vec,
406 &adapter->sge.qs[i]);
407 } else
408 free_irq(adapter->pdev->irq, adapter);
409}
410
Divy Le Rayb8819552007-12-17 18:47:31 -0800411static int await_mgmt_replies(struct adapter *adap, unsigned long init_cnt,
412 unsigned long n)
413{
414 int attempts = 5;
415
416 while (adap->sge.qs[0].rspq.offload_pkts < init_cnt + n) {
417 if (!--attempts)
418 return -ETIMEDOUT;
419 msleep(10);
420 }
421 return 0;
422}
423
424static int init_tp_parity(struct adapter *adap)
425{
426 int i;
427 struct sk_buff *skb;
428 struct cpl_set_tcb_field *greq;
429 unsigned long cnt = adap->sge.qs[0].rspq.offload_pkts;
430
431 t3_tp_set_offload_mode(adap, 1);
432
433 for (i = 0; i < 16; i++) {
434 struct cpl_smt_write_req *req;
435
436 skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
437 req = (struct cpl_smt_write_req *)__skb_put(skb, sizeof(*req));
438 memset(req, 0, sizeof(*req));
439 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
440 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, i));
441 req->iff = i;
442 t3_mgmt_tx(adap, skb);
443 }
444
445 for (i = 0; i < 2048; i++) {
446 struct cpl_l2t_write_req *req;
447
448 skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
449 req = (struct cpl_l2t_write_req *)__skb_put(skb, sizeof(*req));
450 memset(req, 0, sizeof(*req));
451 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
452 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, i));
453 req->params = htonl(V_L2T_W_IDX(i));
454 t3_mgmt_tx(adap, skb);
455 }
456
457 for (i = 0; i < 2048; i++) {
458 struct cpl_rte_write_req *req;
459
460 skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
461 req = (struct cpl_rte_write_req *)__skb_put(skb, sizeof(*req));
462 memset(req, 0, sizeof(*req));
463 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
464 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_RTE_WRITE_REQ, i));
465 req->l2t_idx = htonl(V_L2T_W_IDX(i));
466 t3_mgmt_tx(adap, skb);
467 }
468
469 skb = alloc_skb(sizeof(*greq), GFP_KERNEL | __GFP_NOFAIL);
470 greq = (struct cpl_set_tcb_field *)__skb_put(skb, sizeof(*greq));
471 memset(greq, 0, sizeof(*greq));
472 greq->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
473 OPCODE_TID(greq) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, 0));
474 greq->mask = cpu_to_be64(1);
475 t3_mgmt_tx(adap, skb);
476
477 i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1);
478 t3_tp_set_offload_mode(adap, 0);
479 return i;
480}
481
Divy Le Ray4d22de32007-01-18 22:04:14 -0500482/**
483 * setup_rss - configure RSS
484 * @adap: the adapter
485 *
486 * Sets up RSS to distribute packets to multiple receive queues. We
487 * configure the RSS CPU lookup table to distribute to the number of HW
488 * receive queues, and the response queue lookup table to narrow that
489 * down to the response queues actually configured for each port.
490 * We always configure the RSS mapping for two ports since the mapping
491 * table has plenty of entries.
492 */
493static void setup_rss(struct adapter *adap)
494{
495 int i;
496 unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
497 unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
498 u8 cpus[SGE_QSETS + 1];
499 u16 rspq_map[RSS_TABLE_SIZE];
500
501 for (i = 0; i < SGE_QSETS; ++i)
502 cpus[i] = i;
503 cpus[SGE_QSETS] = 0xff; /* terminator */
504
505 for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) {
506 rspq_map[i] = i % nq0;
507 rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
508 }
509
510 t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
511 F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |
Divy Le Raya2604be2007-11-16 11:22:16 -0800512 V_RRCPLCPUSIZE(6) | F_HASHTOEPLITZ, cpus, rspq_map);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500513}
514
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700515static void init_napi(struct adapter *adap)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500516{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700517 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500518
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700519 for (i = 0; i < SGE_QSETS; i++) {
520 struct sge_qset *qs = &adap->sge.qs[i];
Divy Le Ray4d22de32007-01-18 22:04:14 -0500521
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700522 if (qs->adap)
523 netif_napi_add(qs->netdev, &qs->napi, qs->napi.poll,
524 64);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500525 }
Divy Le Ray48c4b6d2008-05-06 19:25:56 -0700526
527 /*
528 * netif_napi_add() can be called only once per napi_struct because it
529 * adds each new napi_struct to a list. Be careful not to call it a
530 * second time, e.g., during EEH recovery, by making a note of it.
531 */
532 adap->flags |= NAPI_INIT;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500533}
534
535/*
536 * Wait until all NAPI handlers are descheduled. This includes the handlers of
537 * both netdevices representing interfaces and the dummy ones for the extra
538 * queues.
539 */
540static void quiesce_rx(struct adapter *adap)
541{
542 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500543
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700544 for (i = 0; i < SGE_QSETS; i++)
545 if (adap->sge.qs[i].adap)
546 napi_disable(&adap->sge.qs[i].napi);
547}
Divy Le Ray4d22de32007-01-18 22:04:14 -0500548
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700549static void enable_all_napi(struct adapter *adap)
550{
551 int i;
552 for (i = 0; i < SGE_QSETS; i++)
553 if (adap->sge.qs[i].adap)
554 napi_enable(&adap->sge.qs[i].napi);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500555}
556
557/**
Divy Le Ray04ecb072008-10-28 22:40:32 -0700558 * set_qset_lro - Turn a queue set's LRO capability on and off
559 * @dev: the device the qset is attached to
560 * @qset_idx: the queue set index
561 * @val: the LRO switch
562 *
563 * Sets LRO on or off for a particular queue set.
564 * the device's features flag is updated to reflect the LRO
565 * capability when all queues belonging to the device are
566 * in the same state.
567 */
568static void set_qset_lro(struct net_device *dev, int qset_idx, int val)
569{
570 struct port_info *pi = netdev_priv(dev);
571 struct adapter *adapter = pi->adapter;
Divy Le Ray04ecb072008-10-28 22:40:32 -0700572
573 adapter->params.sge.qset[qset_idx].lro = !!val;
574 adapter->sge.qs[qset_idx].lro_enabled = !!val;
Divy Le Ray04ecb072008-10-28 22:40:32 -0700575}
576
577/**
Divy Le Ray4d22de32007-01-18 22:04:14 -0500578 * setup_sge_qsets - configure SGE Tx/Rx/response queues
579 * @adap: the adapter
580 *
581 * Determines how many sets of SGE queues to use and initializes them.
582 * We support multiple queue sets per port if we have MSI-X, otherwise
583 * just one queue set per port.
584 */
585static int setup_sge_qsets(struct adapter *adap)
586{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700587 int i, j, err, irq_idx = 0, qset_idx = 0;
Divy Le Ray8ac3ba62007-03-31 00:23:19 -0700588 unsigned int ntxq = SGE_TXQ_PER_SET;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500589
590 if (adap->params.rev > 0 && !(adap->flags & USING_MSI))
591 irq_idx = -1;
592
593 for_each_port(adap, i) {
594 struct net_device *dev = adap->port[i];
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700595 struct port_info *pi = netdev_priv(dev);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500596
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700597 pi->qs = &adap->sge.qs[pi->first_qset];
Divy Le Ray8c263762008-10-08 17:37:33 -0700598 for (j = pi->first_qset; j < pi->first_qset + pi->nqsets;
599 ++j, ++qset_idx) {
Roland Dreier47fd23f2009-01-11 00:19:36 -0800600 set_qset_lro(dev, qset_idx, pi->rx_offload & T3_LRO);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500601 err = t3_sge_alloc_qset(adap, qset_idx, 1,
602 (adap->flags & USING_MSIX) ? qset_idx + 1 :
603 irq_idx,
Divy Le Ray82ad3322008-12-16 01:09:39 -0800604 &adap->params.sge.qset[qset_idx], ntxq, dev,
605 netdev_get_tx_queue(dev, j));
Divy Le Ray4d22de32007-01-18 22:04:14 -0500606 if (err) {
607 t3_free_sge_resources(adap);
608 return err;
609 }
610 }
611 }
612
613 return 0;
614}
615
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800616static ssize_t attr_show(struct device *d, char *buf,
Divy Le Ray896392e2007-02-24 16:43:50 -0800617 ssize_t(*format) (struct net_device *, char *))
Divy Le Ray4d22de32007-01-18 22:04:14 -0500618{
619 ssize_t len;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500620
621 /* Synchronize with ioctls that may shut down the device */
622 rtnl_lock();
Divy Le Ray896392e2007-02-24 16:43:50 -0800623 len = (*format) (to_net_dev(d), buf);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500624 rtnl_unlock();
625 return len;
626}
627
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800628static ssize_t attr_store(struct device *d,
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800629 const char *buf, size_t len,
Divy Le Ray896392e2007-02-24 16:43:50 -0800630 ssize_t(*set) (struct net_device *, unsigned int),
Divy Le Ray4d22de32007-01-18 22:04:14 -0500631 unsigned int min_val, unsigned int max_val)
632{
633 char *endp;
634 ssize_t ret;
635 unsigned int val;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500636
637 if (!capable(CAP_NET_ADMIN))
638 return -EPERM;
639
640 val = simple_strtoul(buf, &endp, 0);
641 if (endp == buf || val < min_val || val > max_val)
642 return -EINVAL;
643
644 rtnl_lock();
Divy Le Ray896392e2007-02-24 16:43:50 -0800645 ret = (*set) (to_net_dev(d), val);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500646 if (!ret)
647 ret = len;
648 rtnl_unlock();
649 return ret;
650}
651
652#define CXGB3_SHOW(name, val_expr) \
Divy Le Ray896392e2007-02-24 16:43:50 -0800653static ssize_t format_##name(struct net_device *dev, char *buf) \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500654{ \
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700655 struct port_info *pi = netdev_priv(dev); \
656 struct adapter *adap = pi->adapter; \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500657 return sprintf(buf, "%u\n", val_expr); \
658} \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800659static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
660 char *buf) \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500661{ \
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800662 return attr_show(d, buf, format_##name); \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500663}
664
Divy Le Ray896392e2007-02-24 16:43:50 -0800665static ssize_t set_nfilters(struct net_device *dev, unsigned int val)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500666{
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700667 struct port_info *pi = netdev_priv(dev);
668 struct adapter *adap = pi->adapter;
Divy Le Ray9f238482007-03-31 00:23:13 -0700669 int min_tids = is_offload(adap) ? MC5_MIN_TIDS : 0;
Divy Le Ray896392e2007-02-24 16:43:50 -0800670
Divy Le Ray4d22de32007-01-18 22:04:14 -0500671 if (adap->flags & FULL_INIT_DONE)
672 return -EBUSY;
673 if (val && adap->params.rev == 0)
674 return -EINVAL;
Divy Le Ray9f238482007-03-31 00:23:13 -0700675 if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nservers -
676 min_tids)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500677 return -EINVAL;
678 adap->params.mc5.nfilters = val;
679 return 0;
680}
681
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800682static ssize_t store_nfilters(struct device *d, struct device_attribute *attr,
683 const char *buf, size_t len)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500684{
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800685 return attr_store(d, buf, len, set_nfilters, 0, ~0);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500686}
687
Divy Le Ray896392e2007-02-24 16:43:50 -0800688static ssize_t set_nservers(struct net_device *dev, unsigned int val)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500689{
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700690 struct port_info *pi = netdev_priv(dev);
691 struct adapter *adap = pi->adapter;
Divy Le Ray896392e2007-02-24 16:43:50 -0800692
Divy Le Ray4d22de32007-01-18 22:04:14 -0500693 if (adap->flags & FULL_INIT_DONE)
694 return -EBUSY;
Divy Le Ray9f238482007-03-31 00:23:13 -0700695 if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nfilters -
696 MC5_MIN_TIDS)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500697 return -EINVAL;
698 adap->params.mc5.nservers = val;
699 return 0;
700}
701
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800702static ssize_t store_nservers(struct device *d, struct device_attribute *attr,
703 const char *buf, size_t len)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500704{
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800705 return attr_store(d, buf, len, set_nservers, 0, ~0);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500706}
707
708#define CXGB3_ATTR_R(name, val_expr) \
709CXGB3_SHOW(name, val_expr) \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800710static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500711
712#define CXGB3_ATTR_RW(name, val_expr, store_method) \
713CXGB3_SHOW(name, val_expr) \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800714static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, show_##name, store_method)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500715
716CXGB3_ATTR_R(cam_size, t3_mc5_size(&adap->mc5));
717CXGB3_ATTR_RW(nfilters, adap->params.mc5.nfilters, store_nfilters);
718CXGB3_ATTR_RW(nservers, adap->params.mc5.nservers, store_nservers);
719
720static struct attribute *cxgb3_attrs[] = {
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800721 &dev_attr_cam_size.attr,
722 &dev_attr_nfilters.attr,
723 &dev_attr_nservers.attr,
Divy Le Ray4d22de32007-01-18 22:04:14 -0500724 NULL
725};
726
727static struct attribute_group cxgb3_attr_group = {.attrs = cxgb3_attrs };
728
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800729static ssize_t tm_attr_show(struct device *d,
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800730 char *buf, int sched)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500731{
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700732 struct port_info *pi = netdev_priv(to_net_dev(d));
733 struct adapter *adap = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500734 unsigned int v, addr, bpt, cpt;
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700735 ssize_t len;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500736
737 addr = A_TP_TX_MOD_Q1_Q0_RATE_LIMIT - sched / 2;
738 rtnl_lock();
739 t3_write_reg(adap, A_TP_TM_PIO_ADDR, addr);
740 v = t3_read_reg(adap, A_TP_TM_PIO_DATA);
741 if (sched & 1)
742 v >>= 16;
743 bpt = (v >> 8) & 0xff;
744 cpt = v & 0xff;
745 if (!cpt)
746 len = sprintf(buf, "disabled\n");
747 else {
748 v = (adap->params.vpd.cclk * 1000) / cpt;
749 len = sprintf(buf, "%u Kbps\n", (v * bpt) / 125);
750 }
751 rtnl_unlock();
752 return len;
753}
754
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800755static ssize_t tm_attr_store(struct device *d,
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800756 const char *buf, size_t len, int sched)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500757{
Divy Le Ray5fbf8162007-08-29 19:15:47 -0700758 struct port_info *pi = netdev_priv(to_net_dev(d));
759 struct adapter *adap = pi->adapter;
760 unsigned int val;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500761 char *endp;
762 ssize_t ret;
Divy Le Ray4d22de32007-01-18 22:04:14 -0500763
764 if (!capable(CAP_NET_ADMIN))
765 return -EPERM;
766
767 val = simple_strtoul(buf, &endp, 0);
768 if (endp == buf || val > 10000000)
769 return -EINVAL;
770
771 rtnl_lock();
772 ret = t3_config_sched(adap, val, sched);
773 if (!ret)
774 ret = len;
775 rtnl_unlock();
776 return ret;
777}
778
779#define TM_ATTR(name, sched) \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800780static ssize_t show_##name(struct device *d, struct device_attribute *attr, \
781 char *buf) \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500782{ \
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800783 return tm_attr_show(d, buf, sched); \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500784} \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800785static ssize_t store_##name(struct device *d, struct device_attribute *attr, \
786 const char *buf, size_t len) \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500787{ \
Divy Le Ray3e5192e2007-11-16 11:22:10 -0800788 return tm_attr_store(d, buf, len, sched); \
Divy Le Ray4d22de32007-01-18 22:04:14 -0500789} \
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800790static DEVICE_ATTR(name, S_IRUGO | S_IWUSR, show_##name, store_##name)
Divy Le Ray4d22de32007-01-18 22:04:14 -0500791
792TM_ATTR(sched0, 0);
793TM_ATTR(sched1, 1);
794TM_ATTR(sched2, 2);
795TM_ATTR(sched3, 3);
796TM_ATTR(sched4, 4);
797TM_ATTR(sched5, 5);
798TM_ATTR(sched6, 6);
799TM_ATTR(sched7, 7);
800
801static struct attribute *offload_attrs[] = {
Divy Le Ray0ee8d332007-02-08 16:55:59 -0800802 &dev_attr_sched0.attr,
803 &dev_attr_sched1.attr,
804 &dev_attr_sched2.attr,
805 &dev_attr_sched3.attr,
806 &dev_attr_sched4.attr,
807 &dev_attr_sched5.attr,
808 &dev_attr_sched6.attr,
809 &dev_attr_sched7.attr,
Divy Le Ray4d22de32007-01-18 22:04:14 -0500810 NULL
811};
812
813static struct attribute_group offload_attr_group = {.attrs = offload_attrs };
814
815/*
816 * Sends an sk_buff to an offload queue driver
817 * after dealing with any active network taps.
818 */
819static inline int offload_tx(struct t3cdev *tdev, struct sk_buff *skb)
820{
821 int ret;
822
823 local_bh_disable();
824 ret = t3_offload_tx(tdev, skb);
825 local_bh_enable();
826 return ret;
827}
828
829static int write_smt_entry(struct adapter *adapter, int idx)
830{
831 struct cpl_smt_write_req *req;
832 struct sk_buff *skb = alloc_skb(sizeof(*req), GFP_KERNEL);
833
834 if (!skb)
835 return -ENOMEM;
836
837 req = (struct cpl_smt_write_req *)__skb_put(skb, sizeof(*req));
838 req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD));
839 OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, idx));
840 req->mtu_idx = NMTUS - 1; /* should be 0 but there's a T3 bug */
841 req->iff = idx;
842 memset(req->src_mac1, 0, sizeof(req->src_mac1));
843 memcpy(req->src_mac0, adapter->port[idx]->dev_addr, ETH_ALEN);
844 skb->priority = 1;
845 offload_tx(&adapter->tdev, skb);
846 return 0;
847}
848
849static int init_smt(struct adapter *adapter)
850{
851 int i;
852
853 for_each_port(adapter, i)
854 write_smt_entry(adapter, i);
855 return 0;
856}
857
858static void init_port_mtus(struct adapter *adapter)
859{
860 unsigned int mtus = adapter->port[0]->mtu;
861
862 if (adapter->port[1])
863 mtus |= adapter->port[1]->mtu << 16;
864 t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus);
865}
866
Divy Le Ray8c263762008-10-08 17:37:33 -0700867static int send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
Divy Le Ray14ab9892007-01-30 19:43:50 -0800868 int hi, int port)
869{
870 struct sk_buff *skb;
871 struct mngt_pktsched_wr *req;
Divy Le Ray8c263762008-10-08 17:37:33 -0700872 int ret;
Divy Le Ray14ab9892007-01-30 19:43:50 -0800873
874 skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
875 req = (struct mngt_pktsched_wr *)skb_put(skb, sizeof(*req));
876 req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT));
877 req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET;
878 req->sched = sched;
879 req->idx = qidx;
880 req->min = lo;
881 req->max = hi;
882 req->binding = port;
Divy Le Ray8c263762008-10-08 17:37:33 -0700883 ret = t3_mgmt_tx(adap, skb);
884
885 return ret;
Divy Le Ray14ab9892007-01-30 19:43:50 -0800886}
887
Divy Le Ray8c263762008-10-08 17:37:33 -0700888static int bind_qsets(struct adapter *adap)
Divy Le Ray14ab9892007-01-30 19:43:50 -0800889{
Divy Le Ray8c263762008-10-08 17:37:33 -0700890 int i, j, err = 0;
Divy Le Ray14ab9892007-01-30 19:43:50 -0800891
892 for_each_port(adap, i) {
893 const struct port_info *pi = adap2pinfo(adap, i);
894
Divy Le Ray8c263762008-10-08 17:37:33 -0700895 for (j = 0; j < pi->nqsets; ++j) {
896 int ret = send_pktsched_cmd(adap, 1,
897 pi->first_qset + j, -1,
898 -1, i);
899 if (ret)
900 err = ret;
901 }
Divy Le Ray14ab9892007-01-30 19:43:50 -0800902 }
Divy Le Ray8c263762008-10-08 17:37:33 -0700903
904 return err;
Divy Le Ray14ab9892007-01-30 19:43:50 -0800905}
906
Divy Le Ray851fd7b2008-11-26 15:38:36 -0800907#define FW_FNAME "cxgb3/t3fw-%d.%d.%d.bin"
908#define TPSRAM_NAME "cxgb3/t3%c_psram-%d.%d.%d.bin"
Divy Le Ray2e283962007-03-18 13:10:06 -0700909
910static int upgrade_fw(struct adapter *adap)
911{
912 int ret;
913 char buf[64];
914 const struct firmware *fw;
915 struct device *dev = &adap->pdev->dev;
916
917 snprintf(buf, sizeof(buf), FW_FNAME, FW_VERSION_MAJOR,
Divy Le Ray7f672cf2007-03-31 00:23:30 -0700918 FW_VERSION_MINOR, FW_VERSION_MICRO);
Divy Le Ray2e283962007-03-18 13:10:06 -0700919 ret = request_firmware(&fw, buf, dev);
920 if (ret < 0) {
921 dev_err(dev, "could not upgrade firmware: unable to load %s\n",
922 buf);
923 return ret;
924 }
925 ret = t3_load_fw(adap, fw->data, fw->size);
926 release_firmware(fw);
Divy Le Ray47330072007-08-29 19:15:52 -0700927
928 if (ret == 0)
929 dev_info(dev, "successful upgrade to firmware %d.%d.%d\n",
930 FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
931 else
932 dev_err(dev, "failed to upgrade to firmware %d.%d.%d\n",
933 FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO);
Jeff Garzik2eab17a2007-11-23 21:59:45 -0500934
Divy Le Ray47330072007-08-29 19:15:52 -0700935 return ret;
936}
937
938static inline char t3rev2char(struct adapter *adapter)
939{
940 char rev = 0;
941
942 switch(adapter->params.rev) {
943 case T3_REV_B:
944 case T3_REV_B2:
945 rev = 'b';
946 break;
Divy Le Ray1aafee22007-09-05 15:58:36 -0700947 case T3_REV_C:
948 rev = 'c';
949 break;
Divy Le Ray47330072007-08-29 19:15:52 -0700950 }
951 return rev;
952}
953
Stephen Hemminger9265fab2007-10-08 16:22:29 -0700954static int update_tpsram(struct adapter *adap)
Divy Le Ray47330072007-08-29 19:15:52 -0700955{
956 const struct firmware *tpsram;
957 char buf[64];
958 struct device *dev = &adap->pdev->dev;
959 int ret;
960 char rev;
Jeff Garzik2eab17a2007-11-23 21:59:45 -0500961
Divy Le Ray47330072007-08-29 19:15:52 -0700962 rev = t3rev2char(adap);
963 if (!rev)
964 return 0;
965
966 snprintf(buf, sizeof(buf), TPSRAM_NAME, rev,
967 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
968
969 ret = request_firmware(&tpsram, buf, dev);
970 if (ret < 0) {
971 dev_err(dev, "could not load TP SRAM: unable to load %s\n",
972 buf);
973 return ret;
974 }
Jeff Garzik2eab17a2007-11-23 21:59:45 -0500975
Divy Le Ray47330072007-08-29 19:15:52 -0700976 ret = t3_check_tpsram(adap, tpsram->data, tpsram->size);
977 if (ret)
Jeff Garzik2eab17a2007-11-23 21:59:45 -0500978 goto release_tpsram;
Divy Le Ray47330072007-08-29 19:15:52 -0700979
980 ret = t3_set_proto_sram(adap, tpsram->data);
981 if (ret == 0)
982 dev_info(dev,
983 "successful update of protocol engine "
984 "to %d.%d.%d\n",
985 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
986 else
987 dev_err(dev, "failed to update of protocol engine %d.%d.%d\n",
988 TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
989 if (ret)
990 dev_err(dev, "loading protocol SRAM failed\n");
991
992release_tpsram:
993 release_firmware(tpsram);
Jeff Garzik2eab17a2007-11-23 21:59:45 -0500994
Divy Le Ray2e283962007-03-18 13:10:06 -0700995 return ret;
996}
997
Divy Le Ray4d22de32007-01-18 22:04:14 -0500998/**
999 * cxgb_up - enable the adapter
1000 * @adapter: adapter being enabled
1001 *
1002 * Called when the first port is enabled, this function performs the
1003 * actions necessary to make an adapter operational, such as completing
1004 * the initialization of HW modules, and enabling interrupts.
1005 *
1006 * Must be called with the rtnl lock held.
1007 */
1008static int cxgb_up(struct adapter *adap)
1009{
Denis Chengc54f5c22007-07-18 15:24:49 +08001010 int err;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001011
1012 if (!(adap->flags & FULL_INIT_DONE)) {
Divy Le Ray8207bef2008-12-16 01:51:47 -08001013 err = t3_check_fw_version(adap);
Divy Le Raya5a3b462007-09-05 15:58:09 -07001014 if (err == -EINVAL) {
Divy Le Ray2e283962007-03-18 13:10:06 -07001015 err = upgrade_fw(adap);
Divy Le Ray8207bef2008-12-16 01:51:47 -08001016 CH_WARN(adap, "FW upgrade to %d.%d.%d %s\n",
1017 FW_VERSION_MAJOR, FW_VERSION_MINOR,
1018 FW_VERSION_MICRO, err ? "failed" : "succeeded");
Divy Le Raya5a3b462007-09-05 15:58:09 -07001019 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05001020
Divy Le Ray8207bef2008-12-16 01:51:47 -08001021 err = t3_check_tpsram_version(adap);
Divy Le Ray47330072007-08-29 19:15:52 -07001022 if (err == -EINVAL) {
1023 err = update_tpsram(adap);
Divy Le Ray8207bef2008-12-16 01:51:47 -08001024 CH_WARN(adap, "TP upgrade to %d.%d.%d %s\n",
1025 TP_VERSION_MAJOR, TP_VERSION_MINOR,
1026 TP_VERSION_MICRO, err ? "failed" : "succeeded");
Divy Le Ray47330072007-08-29 19:15:52 -07001027 }
1028
Divy Le Ray20d3fc12008-10-08 17:36:03 -07001029 /*
1030 * Clear interrupts now to catch errors if t3_init_hw fails.
1031 * We clear them again later as initialization may trigger
1032 * conditions that can interrupt.
1033 */
1034 t3_intr_clear(adap);
1035
Divy Le Ray4d22de32007-01-18 22:04:14 -05001036 err = t3_init_hw(adap, 0);
1037 if (err)
1038 goto out;
1039
Divy Le Rayb8819552007-12-17 18:47:31 -08001040 t3_set_reg_field(adap, A_TP_PARA_REG5, 0, F_RXDDPOFFINIT);
Divy Le Ray6cdbd772007-04-09 20:10:33 -07001041 t3_write_reg(adap, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12));
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001042
Divy Le Ray4d22de32007-01-18 22:04:14 -05001043 err = setup_sge_qsets(adap);
1044 if (err)
1045 goto out;
1046
1047 setup_rss(adap);
Divy Le Ray48c4b6d2008-05-06 19:25:56 -07001048 if (!(adap->flags & NAPI_INIT))
1049 init_napi(adap);
Divy Le Ray31563782009-03-26 16:39:09 +00001050
1051 t3_start_sge_timers(adap);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001052 adap->flags |= FULL_INIT_DONE;
1053 }
1054
1055 t3_intr_clear(adap);
1056
1057 if (adap->flags & USING_MSIX) {
1058 name_msix_vecs(adap);
1059 err = request_irq(adap->msix_info[0].vec,
1060 t3_async_intr_handler, 0,
1061 adap->msix_info[0].desc, adap);
1062 if (err)
1063 goto irq_err;
1064
Divy Le Ray42256f52007-11-16 11:21:39 -08001065 err = request_msix_data_irqs(adap);
1066 if (err) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001067 free_irq(adap->msix_info[0].vec, adap);
1068 goto irq_err;
1069 }
1070 } else if ((err = request_irq(adap->pdev->irq,
1071 t3_intr_handler(adap,
1072 adap->sge.qs[0].rspq.
1073 polling),
Thomas Gleixner2db63462007-02-14 00:33:20 -08001074 (adap->flags & USING_MSI) ?
1075 0 : IRQF_SHARED,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001076 adap->name, adap)))
1077 goto irq_err;
1078
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001079 enable_all_napi(adap);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001080 t3_sge_start(adap);
1081 t3_intr_enable(adap);
Divy Le Ray14ab9892007-01-30 19:43:50 -08001082
Divy Le Rayb8819552007-12-17 18:47:31 -08001083 if (adap->params.rev >= T3_REV_C && !(adap->flags & TP_PARITY_INIT) &&
1084 is_offload(adap) && init_tp_parity(adap) == 0)
1085 adap->flags |= TP_PARITY_INIT;
1086
1087 if (adap->flags & TP_PARITY_INIT) {
1088 t3_write_reg(adap, A_TP_INT_CAUSE,
1089 F_CMCACHEPERR | F_ARPLUTPERR);
1090 t3_write_reg(adap, A_TP_INT_ENABLE, 0x7fbfffff);
1091 }
1092
Divy Le Ray8c263762008-10-08 17:37:33 -07001093 if (!(adap->flags & QUEUES_BOUND)) {
1094 err = bind_qsets(adap);
1095 if (err) {
1096 CH_ERR(adap, "failed to bind qsets, err %d\n", err);
1097 t3_intr_disable(adap);
1098 free_irq_resources(adap);
1099 goto out;
1100 }
1101 adap->flags |= QUEUES_BOUND;
1102 }
Divy Le Ray14ab9892007-01-30 19:43:50 -08001103
Divy Le Ray4d22de32007-01-18 22:04:14 -05001104out:
1105 return err;
1106irq_err:
1107 CH_ERR(adap, "request_irq failed, err %d\n", err);
1108 goto out;
1109}
1110
1111/*
1112 * Release resources when all the ports and offloading have been stopped.
1113 */
1114static void cxgb_down(struct adapter *adapter)
1115{
1116 t3_sge_stop(adapter);
1117 spin_lock_irq(&adapter->work_lock); /* sync with PHY intr task */
1118 t3_intr_disable(adapter);
1119 spin_unlock_irq(&adapter->work_lock);
1120
Divy Le Ray8c263762008-10-08 17:37:33 -07001121 free_irq_resources(adapter);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001122 quiesce_rx(adapter);
Divy Le Rayc80b0c22009-04-17 12:21:17 +00001123 flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */
Divy Le Ray4d22de32007-01-18 22:04:14 -05001124}
1125
1126static void schedule_chk_task(struct adapter *adap)
1127{
1128 unsigned int timeo;
1129
1130 timeo = adap->params.linkpoll_period ?
1131 (HZ * adap->params.linkpoll_period) / 10 :
1132 adap->params.stats_update_period * HZ;
1133 if (timeo)
1134 queue_delayed_work(cxgb3_wq, &adap->adap_check_task, timeo);
1135}
1136
1137static int offload_open(struct net_device *dev)
1138{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001139 struct port_info *pi = netdev_priv(dev);
1140 struct adapter *adapter = pi->adapter;
1141 struct t3cdev *tdev = dev2t3cdev(dev);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001142 int adap_up = adapter->open_device_map & PORT_MASK;
Denis Chengc54f5c22007-07-18 15:24:49 +08001143 int err;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001144
1145 if (test_and_set_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1146 return 0;
1147
1148 if (!adap_up && (err = cxgb_up(adapter)) < 0)
Divy Le Ray48c4b6d2008-05-06 19:25:56 -07001149 goto out;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001150
1151 t3_tp_set_offload_mode(adapter, 1);
1152 tdev->lldev = adapter->port[0];
1153 err = cxgb3_offload_activate(adapter);
1154 if (err)
1155 goto out;
1156
1157 init_port_mtus(adapter);
1158 t3_load_mtus(adapter, adapter->params.mtus, adapter->params.a_wnd,
1159 adapter->params.b_wnd,
1160 adapter->params.rev == 0 ?
1161 adapter->port[0]->mtu : 0xffff);
1162 init_smt(adapter);
1163
Dan Noed96a51f2008-04-12 22:34:38 -04001164 if (sysfs_create_group(&tdev->lldev->dev.kobj, &offload_attr_group))
1165 dev_dbg(&dev->dev, "cannot create sysfs group\n");
Divy Le Ray4d22de32007-01-18 22:04:14 -05001166
1167 /* Call back all registered clients */
1168 cxgb3_add_clients(tdev);
1169
1170out:
1171 /* restore them in case the offload module has changed them */
1172 if (err) {
1173 t3_tp_set_offload_mode(adapter, 0);
1174 clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1175 cxgb3_set_dummy_ops(tdev);
1176 }
1177 return err;
1178}
1179
1180static int offload_close(struct t3cdev *tdev)
1181{
1182 struct adapter *adapter = tdev2adap(tdev);
1183
1184 if (!test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
1185 return 0;
1186
1187 /* Call back all registered clients */
1188 cxgb3_remove_clients(tdev);
1189
Divy Le Ray0ee8d332007-02-08 16:55:59 -08001190 sysfs_remove_group(&tdev->lldev->dev.kobj, &offload_attr_group);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001191
Divy Le Rayc80b0c22009-04-17 12:21:17 +00001192 /* Flush work scheduled while releasing TIDs */
1193 flush_scheduled_work();
1194
Divy Le Ray4d22de32007-01-18 22:04:14 -05001195 tdev->lldev = NULL;
1196 cxgb3_set_dummy_ops(tdev);
1197 t3_tp_set_offload_mode(adapter, 0);
1198 clear_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
1199
1200 if (!adapter->open_device_map)
1201 cxgb_down(adapter);
1202
1203 cxgb3_offload_deactivate(adapter);
1204 return 0;
1205}
1206
1207static int cxgb_open(struct net_device *dev)
1208{
Divy Le Ray4d22de32007-01-18 22:04:14 -05001209 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001210 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001211 int other_ports = adapter->open_device_map & PORT_MASK;
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001212 int err;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001213
Divy Le Ray48c4b6d2008-05-06 19:25:56 -07001214 if (!adapter->open_device_map && (err = cxgb_up(adapter)) < 0)
Divy Le Ray4d22de32007-01-18 22:04:14 -05001215 return err;
1216
1217 set_bit(pi->port_id, &adapter->open_device_map);
Divy Le Ray8ac3ba62007-03-31 00:23:19 -07001218 if (is_offload(adapter) && !ofld_disable) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001219 err = offload_open(dev);
1220 if (err)
1221 printk(KERN_WARNING
1222 "Could not initialize offload capabilities\n");
1223 }
1224
Divy Le Ray82ad3322008-12-16 01:09:39 -08001225 dev->real_num_tx_queues = pi->nqsets;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001226 link_start(dev);
1227 t3_port_intr_enable(adapter, pi->port_id);
Divy Le Ray82ad3322008-12-16 01:09:39 -08001228 netif_tx_start_all_queues(dev);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001229 if (!other_ports)
1230 schedule_chk_task(adapter);
1231
1232 return 0;
1233}
1234
1235static int cxgb_close(struct net_device *dev)
1236{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001237 struct port_info *pi = netdev_priv(dev);
1238 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001239
Divy Le Raye8d19372009-04-17 12:21:27 +00001240
1241 if (!adapter->open_device_map)
1242 return 0;
1243
Divy Le Raybf792092009-03-12 21:14:19 +00001244 /* Stop link fault interrupts */
1245 t3_xgm_intr_disable(adapter, pi->port_id);
1246 t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
1247
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001248 t3_port_intr_disable(adapter, pi->port_id);
Divy Le Ray82ad3322008-12-16 01:09:39 -08001249 netif_tx_stop_all_queues(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001250 pi->phy.ops->power_down(&pi->phy, 1);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001251 netif_carrier_off(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001252 t3_mac_disable(&pi->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001253
Divy Le Ray20d3fc12008-10-08 17:36:03 -07001254 spin_lock_irq(&adapter->work_lock); /* sync with update task */
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001255 clear_bit(pi->port_id, &adapter->open_device_map);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07001256 spin_unlock_irq(&adapter->work_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001257
1258 if (!(adapter->open_device_map & PORT_MASK))
Divy Le Rayc80b0c22009-04-17 12:21:17 +00001259 cancel_delayed_work_sync(&adapter->adap_check_task);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001260
1261 if (!adapter->open_device_map)
1262 cxgb_down(adapter);
1263
1264 return 0;
1265}
1266
1267static struct net_device_stats *cxgb_get_stats(struct net_device *dev)
1268{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001269 struct port_info *pi = netdev_priv(dev);
1270 struct adapter *adapter = pi->adapter;
1271 struct net_device_stats *ns = &pi->netstats;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001272 const struct mac_stats *pstats;
1273
1274 spin_lock(&adapter->stats_lock);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001275 pstats = t3_mac_update_stats(&pi->mac);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001276 spin_unlock(&adapter->stats_lock);
1277
1278 ns->tx_bytes = pstats->tx_octets;
1279 ns->tx_packets = pstats->tx_frames;
1280 ns->rx_bytes = pstats->rx_octets;
1281 ns->rx_packets = pstats->rx_frames;
1282 ns->multicast = pstats->rx_mcast_frames;
1283
1284 ns->tx_errors = pstats->tx_underrun;
1285 ns->rx_errors = pstats->rx_symbol_errs + pstats->rx_fcs_errs +
1286 pstats->rx_too_long + pstats->rx_jabber + pstats->rx_short +
1287 pstats->rx_fifo_ovfl;
1288
1289 /* detailed rx_errors */
1290 ns->rx_length_errors = pstats->rx_jabber + pstats->rx_too_long;
1291 ns->rx_over_errors = 0;
1292 ns->rx_crc_errors = pstats->rx_fcs_errs;
1293 ns->rx_frame_errors = pstats->rx_symbol_errs;
1294 ns->rx_fifo_errors = pstats->rx_fifo_ovfl;
1295 ns->rx_missed_errors = pstats->rx_cong_drops;
1296
1297 /* detailed tx_errors */
1298 ns->tx_aborted_errors = 0;
1299 ns->tx_carrier_errors = 0;
1300 ns->tx_fifo_errors = pstats->tx_underrun;
1301 ns->tx_heartbeat_errors = 0;
1302 ns->tx_window_errors = 0;
1303 return ns;
1304}
1305
1306static u32 get_msglevel(struct net_device *dev)
1307{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001308 struct port_info *pi = netdev_priv(dev);
1309 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001310
1311 return adapter->msg_enable;
1312}
1313
1314static void set_msglevel(struct net_device *dev, u32 val)
1315{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001316 struct port_info *pi = netdev_priv(dev);
1317 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001318
1319 adapter->msg_enable = val;
1320}
1321
1322static char stats_strings[][ETH_GSTRING_LEN] = {
1323 "TxOctetsOK ",
1324 "TxFramesOK ",
1325 "TxMulticastFramesOK",
1326 "TxBroadcastFramesOK",
1327 "TxPauseFrames ",
1328 "TxUnderrun ",
1329 "TxExtUnderrun ",
1330
1331 "TxFrames64 ",
1332 "TxFrames65To127 ",
1333 "TxFrames128To255 ",
1334 "TxFrames256To511 ",
1335 "TxFrames512To1023 ",
1336 "TxFrames1024To1518 ",
1337 "TxFrames1519ToMax ",
1338
1339 "RxOctetsOK ",
1340 "RxFramesOK ",
1341 "RxMulticastFramesOK",
1342 "RxBroadcastFramesOK",
1343 "RxPauseFrames ",
1344 "RxFCSErrors ",
1345 "RxSymbolErrors ",
1346 "RxShortErrors ",
1347 "RxJabberErrors ",
1348 "RxLengthErrors ",
1349 "RxFIFOoverflow ",
1350
1351 "RxFrames64 ",
1352 "RxFrames65To127 ",
1353 "RxFrames128To255 ",
1354 "RxFrames256To511 ",
1355 "RxFrames512To1023 ",
1356 "RxFrames1024To1518 ",
1357 "RxFrames1519ToMax ",
1358
1359 "PhyFIFOErrors ",
1360 "TSO ",
1361 "VLANextractions ",
1362 "VLANinsertions ",
1363 "TxCsumOffload ",
1364 "RxCsumGood ",
Divy Le Rayb47385b2008-05-21 18:56:26 -07001365 "LroAggregated ",
1366 "LroFlushed ",
1367 "LroNoDesc ",
Divy Le Rayfc906642007-03-18 13:10:12 -07001368 "RxDrops ",
1369
1370 "CheckTXEnToggled ",
1371 "CheckResets ",
1372
Divy Le Raybf792092009-03-12 21:14:19 +00001373 "LinkFaults ",
Divy Le Ray4d22de32007-01-18 22:04:14 -05001374};
1375
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001376static int get_sset_count(struct net_device *dev, int sset)
Divy Le Ray4d22de32007-01-18 22:04:14 -05001377{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001378 switch (sset) {
1379 case ETH_SS_STATS:
1380 return ARRAY_SIZE(stats_strings);
1381 default:
1382 return -EOPNOTSUPP;
1383 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05001384}
1385
1386#define T3_REGMAP_SIZE (3 * 1024)
1387
1388static int get_regs_len(struct net_device *dev)
1389{
1390 return T3_REGMAP_SIZE;
1391}
1392
1393static int get_eeprom_len(struct net_device *dev)
1394{
1395 return EEPROMSIZE;
1396}
1397
1398static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1399{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001400 struct port_info *pi = netdev_priv(dev);
1401 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001402 u32 fw_vers = 0;
Divy Le Ray47330072007-08-29 19:15:52 -07001403 u32 tp_vers = 0;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001404
Steve Wisecf3760d2008-11-06 17:06:42 -06001405 spin_lock(&adapter->stats_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001406 t3_get_fw_version(adapter, &fw_vers);
Divy Le Ray47330072007-08-29 19:15:52 -07001407 t3_get_tp_version(adapter, &tp_vers);
Steve Wisecf3760d2008-11-06 17:06:42 -06001408 spin_unlock(&adapter->stats_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001409
1410 strcpy(info->driver, DRV_NAME);
1411 strcpy(info->version, DRV_VERSION);
1412 strcpy(info->bus_info, pci_name(adapter->pdev));
1413 if (!fw_vers)
1414 strcpy(info->fw_version, "N/A");
Divy Le Ray4aac3892007-01-30 19:43:45 -08001415 else {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001416 snprintf(info->fw_version, sizeof(info->fw_version),
Divy Le Ray47330072007-08-29 19:15:52 -07001417 "%s %u.%u.%u TP %u.%u.%u",
Divy Le Ray4aac3892007-01-30 19:43:45 -08001418 G_FW_VERSION_TYPE(fw_vers) ? "T" : "N",
1419 G_FW_VERSION_MAJOR(fw_vers),
1420 G_FW_VERSION_MINOR(fw_vers),
Divy Le Ray47330072007-08-29 19:15:52 -07001421 G_FW_VERSION_MICRO(fw_vers),
1422 G_TP_VERSION_MAJOR(tp_vers),
1423 G_TP_VERSION_MINOR(tp_vers),
1424 G_TP_VERSION_MICRO(tp_vers));
Divy Le Ray4aac3892007-01-30 19:43:45 -08001425 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05001426}
1427
1428static void get_strings(struct net_device *dev, u32 stringset, u8 * data)
1429{
1430 if (stringset == ETH_SS_STATS)
1431 memcpy(data, stats_strings, sizeof(stats_strings));
1432}
1433
1434static unsigned long collect_sge_port_stats(struct adapter *adapter,
1435 struct port_info *p, int idx)
1436{
1437 int i;
1438 unsigned long tot = 0;
1439
Divy Le Ray8c263762008-10-08 17:37:33 -07001440 for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
1441 tot += adapter->sge.qs[i].port_stats[idx];
Divy Le Ray4d22de32007-01-18 22:04:14 -05001442 return tot;
1443}
1444
1445static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
1446 u64 *data)
1447{
Divy Le Ray4d22de32007-01-18 22:04:14 -05001448 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001449 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001450 const struct mac_stats *s;
1451
1452 spin_lock(&adapter->stats_lock);
1453 s = t3_mac_update_stats(&pi->mac);
1454 spin_unlock(&adapter->stats_lock);
1455
1456 *data++ = s->tx_octets;
1457 *data++ = s->tx_frames;
1458 *data++ = s->tx_mcast_frames;
1459 *data++ = s->tx_bcast_frames;
1460 *data++ = s->tx_pause;
1461 *data++ = s->tx_underrun;
1462 *data++ = s->tx_fifo_urun;
1463
1464 *data++ = s->tx_frames_64;
1465 *data++ = s->tx_frames_65_127;
1466 *data++ = s->tx_frames_128_255;
1467 *data++ = s->tx_frames_256_511;
1468 *data++ = s->tx_frames_512_1023;
1469 *data++ = s->tx_frames_1024_1518;
1470 *data++ = s->tx_frames_1519_max;
1471
1472 *data++ = s->rx_octets;
1473 *data++ = s->rx_frames;
1474 *data++ = s->rx_mcast_frames;
1475 *data++ = s->rx_bcast_frames;
1476 *data++ = s->rx_pause;
1477 *data++ = s->rx_fcs_errs;
1478 *data++ = s->rx_symbol_errs;
1479 *data++ = s->rx_short;
1480 *data++ = s->rx_jabber;
1481 *data++ = s->rx_too_long;
1482 *data++ = s->rx_fifo_ovfl;
1483
1484 *data++ = s->rx_frames_64;
1485 *data++ = s->rx_frames_65_127;
1486 *data++ = s->rx_frames_128_255;
1487 *data++ = s->rx_frames_256_511;
1488 *data++ = s->rx_frames_512_1023;
1489 *data++ = s->rx_frames_1024_1518;
1490 *data++ = s->rx_frames_1519_max;
1491
1492 *data++ = pi->phy.fifo_errors;
1493
1494 *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TSO);
1495 *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANEX);
1496 *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANINS);
1497 *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM);
1498 *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD);
Herbert Xu7be2df42009-01-21 14:39:13 -08001499 *data++ = 0;
1500 *data++ = 0;
1501 *data++ = 0;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001502 *data++ = s->rx_cong_drops;
Divy Le Rayfc906642007-03-18 13:10:12 -07001503
1504 *data++ = s->num_toggled;
1505 *data++ = s->num_resets;
Divy Le Raybf792092009-03-12 21:14:19 +00001506
1507 *data++ = s->link_faults;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001508}
1509
1510static inline void reg_block_dump(struct adapter *ap, void *buf,
1511 unsigned int start, unsigned int end)
1512{
1513 u32 *p = buf + start;
1514
1515 for (; start <= end; start += sizeof(u32))
1516 *p++ = t3_read_reg(ap, start);
1517}
1518
1519static void get_regs(struct net_device *dev, struct ethtool_regs *regs,
1520 void *buf)
1521{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001522 struct port_info *pi = netdev_priv(dev);
1523 struct adapter *ap = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001524
1525 /*
1526 * Version scheme:
1527 * bits 0..9: chip version
1528 * bits 10..15: chip revision
1529 * bit 31: set for PCIe cards
1530 */
1531 regs->version = 3 | (ap->params.rev << 10) | (is_pcie(ap) << 31);
1532
1533 /*
1534 * We skip the MAC statistics registers because they are clear-on-read.
1535 * Also reading multi-register stats would need to synchronize with the
1536 * periodic mac stats accumulation. Hard to justify the complexity.
1537 */
1538 memset(buf, 0, T3_REGMAP_SIZE);
1539 reg_block_dump(ap, buf, 0, A_SG_RSPQ_CREDIT_RETURN);
1540 reg_block_dump(ap, buf, A_SG_HI_DRB_HI_THRSH, A_ULPRX_PBL_ULIMIT);
1541 reg_block_dump(ap, buf, A_ULPTX_CONFIG, A_MPS_INT_CAUSE);
1542 reg_block_dump(ap, buf, A_CPL_SWITCH_CNTRL, A_CPL_MAP_TBL_DATA);
1543 reg_block_dump(ap, buf, A_SMB_GLOBAL_TIME_CFG, A_XGM_SERDES_STAT3);
1544 reg_block_dump(ap, buf, A_XGM_SERDES_STATUS0,
1545 XGM_REG(A_XGM_SERDES_STAT3, 1));
1546 reg_block_dump(ap, buf, XGM_REG(A_XGM_SERDES_STATUS0, 1),
1547 XGM_REG(A_XGM_RX_SPI4_SOP_EOP_CNT, 1));
1548}
1549
1550static int restart_autoneg(struct net_device *dev)
1551{
1552 struct port_info *p = netdev_priv(dev);
1553
1554 if (!netif_running(dev))
1555 return -EAGAIN;
1556 if (p->link_config.autoneg != AUTONEG_ENABLE)
1557 return -EINVAL;
1558 p->phy.ops->autoneg_restart(&p->phy);
1559 return 0;
1560}
1561
1562static int cxgb3_phys_id(struct net_device *dev, u32 data)
1563{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001564 struct port_info *pi = netdev_priv(dev);
1565 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001566 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001567
1568 if (data == 0)
1569 data = 2;
1570
1571 for (i = 0; i < data * 2; i++) {
1572 t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
1573 (i & 1) ? F_GPIO0_OUT_VAL : 0);
1574 if (msleep_interruptible(500))
1575 break;
1576 }
1577 t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
1578 F_GPIO0_OUT_VAL);
1579 return 0;
1580}
1581
1582static int get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1583{
1584 struct port_info *p = netdev_priv(dev);
1585
1586 cmd->supported = p->link_config.supported;
1587 cmd->advertising = p->link_config.advertising;
1588
1589 if (netif_carrier_ok(dev)) {
1590 cmd->speed = p->link_config.speed;
1591 cmd->duplex = p->link_config.duplex;
1592 } else {
1593 cmd->speed = -1;
1594 cmd->duplex = -1;
1595 }
1596
1597 cmd->port = (cmd->supported & SUPPORTED_TP) ? PORT_TP : PORT_FIBRE;
Ben Hutchings0f07c4e2009-04-29 08:07:20 +00001598 cmd->phy_address = p->phy.mdio.prtad;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001599 cmd->transceiver = XCVR_EXTERNAL;
1600 cmd->autoneg = p->link_config.autoneg;
1601 cmd->maxtxpkt = 0;
1602 cmd->maxrxpkt = 0;
1603 return 0;
1604}
1605
1606static int speed_duplex_to_caps(int speed, int duplex)
1607{
1608 int cap = 0;
1609
1610 switch (speed) {
1611 case SPEED_10:
1612 if (duplex == DUPLEX_FULL)
1613 cap = SUPPORTED_10baseT_Full;
1614 else
1615 cap = SUPPORTED_10baseT_Half;
1616 break;
1617 case SPEED_100:
1618 if (duplex == DUPLEX_FULL)
1619 cap = SUPPORTED_100baseT_Full;
1620 else
1621 cap = SUPPORTED_100baseT_Half;
1622 break;
1623 case SPEED_1000:
1624 if (duplex == DUPLEX_FULL)
1625 cap = SUPPORTED_1000baseT_Full;
1626 else
1627 cap = SUPPORTED_1000baseT_Half;
1628 break;
1629 case SPEED_10000:
1630 if (duplex == DUPLEX_FULL)
1631 cap = SUPPORTED_10000baseT_Full;
1632 }
1633 return cap;
1634}
1635
1636#define ADVERTISED_MASK (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | \
1637 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | \
1638 ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full | \
1639 ADVERTISED_10000baseT_Full)
1640
1641static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1642{
1643 struct port_info *p = netdev_priv(dev);
1644 struct link_config *lc = &p->link_config;
1645
Divy Le Ray9b1e3652008-10-08 17:39:31 -07001646 if (!(lc->supported & SUPPORTED_Autoneg)) {
1647 /*
1648 * PHY offers a single speed/duplex. See if that's what's
1649 * being requested.
1650 */
1651 if (cmd->autoneg == AUTONEG_DISABLE) {
Hannes Eder97915b52009-02-14 11:16:04 +00001652 int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
Divy Le Ray9b1e3652008-10-08 17:39:31 -07001653 if (lc->supported & cap)
1654 return 0;
1655 }
1656 return -EINVAL;
1657 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05001658
1659 if (cmd->autoneg == AUTONEG_DISABLE) {
1660 int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
1661
1662 if (!(lc->supported & cap) || cmd->speed == SPEED_1000)
1663 return -EINVAL;
1664 lc->requested_speed = cmd->speed;
1665 lc->requested_duplex = cmd->duplex;
1666 lc->advertising = 0;
1667 } else {
1668 cmd->advertising &= ADVERTISED_MASK;
1669 cmd->advertising &= lc->supported;
1670 if (!cmd->advertising)
1671 return -EINVAL;
1672 lc->requested_speed = SPEED_INVALID;
1673 lc->requested_duplex = DUPLEX_INVALID;
1674 lc->advertising = cmd->advertising | ADVERTISED_Autoneg;
1675 }
1676 lc->autoneg = cmd->autoneg;
1677 if (netif_running(dev))
1678 t3_link_start(&p->phy, &p->mac, lc);
1679 return 0;
1680}
1681
1682static void get_pauseparam(struct net_device *dev,
1683 struct ethtool_pauseparam *epause)
1684{
1685 struct port_info *p = netdev_priv(dev);
1686
1687 epause->autoneg = (p->link_config.requested_fc & PAUSE_AUTONEG) != 0;
1688 epause->rx_pause = (p->link_config.fc & PAUSE_RX) != 0;
1689 epause->tx_pause = (p->link_config.fc & PAUSE_TX) != 0;
1690}
1691
1692static int set_pauseparam(struct net_device *dev,
1693 struct ethtool_pauseparam *epause)
1694{
1695 struct port_info *p = netdev_priv(dev);
1696 struct link_config *lc = &p->link_config;
1697
1698 if (epause->autoneg == AUTONEG_DISABLE)
1699 lc->requested_fc = 0;
1700 else if (lc->supported & SUPPORTED_Autoneg)
1701 lc->requested_fc = PAUSE_AUTONEG;
1702 else
1703 return -EINVAL;
1704
1705 if (epause->rx_pause)
1706 lc->requested_fc |= PAUSE_RX;
1707 if (epause->tx_pause)
1708 lc->requested_fc |= PAUSE_TX;
1709 if (lc->autoneg == AUTONEG_ENABLE) {
1710 if (netif_running(dev))
1711 t3_link_start(&p->phy, &p->mac, lc);
1712 } else {
1713 lc->fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
1714 if (netif_running(dev))
1715 t3_mac_set_speed_duplex_fc(&p->mac, -1, -1, lc->fc);
1716 }
1717 return 0;
1718}
1719
1720static u32 get_rx_csum(struct net_device *dev)
1721{
1722 struct port_info *p = netdev_priv(dev);
1723
Roland Dreier47fd23f2009-01-11 00:19:36 -08001724 return p->rx_offload & T3_RX_CSUM;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001725}
1726
1727static int set_rx_csum(struct net_device *dev, u32 data)
1728{
1729 struct port_info *p = netdev_priv(dev);
1730
Roland Dreier47fd23f2009-01-11 00:19:36 -08001731 if (data) {
1732 p->rx_offload |= T3_RX_CSUM;
1733 } else {
Divy Le Rayb47385b2008-05-21 18:56:26 -07001734 int i;
1735
Roland Dreier47fd23f2009-01-11 00:19:36 -08001736 p->rx_offload &= ~(T3_RX_CSUM | T3_LRO);
Divy Le Ray04ecb072008-10-28 22:40:32 -07001737 for (i = p->first_qset; i < p->first_qset + p->nqsets; i++)
1738 set_qset_lro(dev, i, 0);
Divy Le Rayb47385b2008-05-21 18:56:26 -07001739 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05001740 return 0;
1741}
1742
1743static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1744{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001745 struct port_info *pi = netdev_priv(dev);
1746 struct adapter *adapter = pi->adapter;
Divy Le Ray05b97b32007-03-18 13:10:01 -07001747 const struct qset_params *q = &adapter->params.sge.qset[pi->first_qset];
Divy Le Ray4d22de32007-01-18 22:04:14 -05001748
1749 e->rx_max_pending = MAX_RX_BUFFERS;
1750 e->rx_mini_max_pending = 0;
1751 e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS;
1752 e->tx_max_pending = MAX_TXQ_ENTRIES;
1753
Divy Le Ray05b97b32007-03-18 13:10:01 -07001754 e->rx_pending = q->fl_size;
1755 e->rx_mini_pending = q->rspq_size;
1756 e->rx_jumbo_pending = q->jumbo_size;
1757 e->tx_pending = q->txq_size[0];
Divy Le Ray4d22de32007-01-18 22:04:14 -05001758}
1759
1760static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e)
1761{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001762 struct port_info *pi = netdev_priv(dev);
1763 struct adapter *adapter = pi->adapter;
Divy Le Ray05b97b32007-03-18 13:10:01 -07001764 struct qset_params *q;
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001765 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001766
1767 if (e->rx_pending > MAX_RX_BUFFERS ||
1768 e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS ||
1769 e->tx_pending > MAX_TXQ_ENTRIES ||
1770 e->rx_mini_pending > MAX_RSPQ_ENTRIES ||
1771 e->rx_mini_pending < MIN_RSPQ_ENTRIES ||
1772 e->rx_pending < MIN_FL_ENTRIES ||
1773 e->rx_jumbo_pending < MIN_FL_ENTRIES ||
1774 e->tx_pending < adapter->params.nports * MIN_TXQ_ENTRIES)
1775 return -EINVAL;
1776
1777 if (adapter->flags & FULL_INIT_DONE)
1778 return -EBUSY;
1779
Divy Le Ray05b97b32007-03-18 13:10:01 -07001780 q = &adapter->params.sge.qset[pi->first_qset];
1781 for (i = 0; i < pi->nqsets; ++i, ++q) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001782 q->rspq_size = e->rx_mini_pending;
1783 q->fl_size = e->rx_pending;
1784 q->jumbo_size = e->rx_jumbo_pending;
1785 q->txq_size[0] = e->tx_pending;
1786 q->txq_size[1] = e->tx_pending;
1787 q->txq_size[2] = e->tx_pending;
1788 }
1789 return 0;
1790}
1791
1792static int set_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1793{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001794 struct port_info *pi = netdev_priv(dev);
1795 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001796 struct qset_params *qsp = &adapter->params.sge.qset[0];
1797 struct sge_qset *qs = &adapter->sge.qs[0];
1798
1799 if (c->rx_coalesce_usecs * 10 > M_NEWTIMER)
1800 return -EINVAL;
1801
1802 qsp->coalesce_usecs = c->rx_coalesce_usecs;
1803 t3_update_qset_coalesce(qs, qsp);
1804 return 0;
1805}
1806
1807static int get_coalesce(struct net_device *dev, struct ethtool_coalesce *c)
1808{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001809 struct port_info *pi = netdev_priv(dev);
1810 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001811 struct qset_params *q = adapter->params.sge.qset;
1812
1813 c->rx_coalesce_usecs = q->coalesce_usecs;
1814 return 0;
1815}
1816
1817static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *e,
1818 u8 * data)
1819{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001820 struct port_info *pi = netdev_priv(dev);
1821 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001822 int i, err = 0;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001823
1824 u8 *buf = kmalloc(EEPROMSIZE, GFP_KERNEL);
1825 if (!buf)
1826 return -ENOMEM;
1827
1828 e->magic = EEPROM_MAGIC;
1829 for (i = e->offset & ~3; !err && i < e->offset + e->len; i += 4)
Al Viro05e5c112007-12-22 18:56:23 +00001830 err = t3_seeprom_read(adapter, i, (__le32 *) & buf[i]);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001831
1832 if (!err)
1833 memcpy(data, buf + e->offset, e->len);
1834 kfree(buf);
1835 return err;
1836}
1837
1838static int set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
1839 u8 * data)
1840{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001841 struct port_info *pi = netdev_priv(dev);
1842 struct adapter *adapter = pi->adapter;
Al Viro05e5c112007-12-22 18:56:23 +00001843 u32 aligned_offset, aligned_len;
1844 __le32 *p;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001845 u8 *buf;
Denis Chengc54f5c22007-07-18 15:24:49 +08001846 int err;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001847
1848 if (eeprom->magic != EEPROM_MAGIC)
1849 return -EINVAL;
1850
1851 aligned_offset = eeprom->offset & ~3;
1852 aligned_len = (eeprom->len + (eeprom->offset & 3) + 3) & ~3;
1853
1854 if (aligned_offset != eeprom->offset || aligned_len != eeprom->len) {
1855 buf = kmalloc(aligned_len, GFP_KERNEL);
1856 if (!buf)
1857 return -ENOMEM;
Al Viro05e5c112007-12-22 18:56:23 +00001858 err = t3_seeprom_read(adapter, aligned_offset, (__le32 *) buf);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001859 if (!err && aligned_len > 4)
1860 err = t3_seeprom_read(adapter,
1861 aligned_offset + aligned_len - 4,
Al Viro05e5c112007-12-22 18:56:23 +00001862 (__le32 *) & buf[aligned_len - 4]);
Divy Le Ray4d22de32007-01-18 22:04:14 -05001863 if (err)
1864 goto out;
1865 memcpy(buf + (eeprom->offset & 3), data, eeprom->len);
1866 } else
1867 buf = data;
1868
1869 err = t3_seeprom_wp(adapter, 0);
1870 if (err)
1871 goto out;
1872
Al Viro05e5c112007-12-22 18:56:23 +00001873 for (p = (__le32 *) buf; !err && aligned_len; aligned_len -= 4, p++) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001874 err = t3_seeprom_write(adapter, aligned_offset, *p);
1875 aligned_offset += 4;
1876 }
1877
1878 if (!err)
1879 err = t3_seeprom_wp(adapter, 1);
1880out:
1881 if (buf != data)
1882 kfree(buf);
1883 return err;
1884}
1885
1886static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
1887{
1888 wol->supported = 0;
1889 wol->wolopts = 0;
1890 memset(&wol->sopass, 0, sizeof(wol->sopass));
1891}
1892
1893static const struct ethtool_ops cxgb_ethtool_ops = {
1894 .get_settings = get_settings,
1895 .set_settings = set_settings,
1896 .get_drvinfo = get_drvinfo,
1897 .get_msglevel = get_msglevel,
1898 .set_msglevel = set_msglevel,
1899 .get_ringparam = get_sge_param,
1900 .set_ringparam = set_sge_param,
1901 .get_coalesce = get_coalesce,
1902 .set_coalesce = set_coalesce,
1903 .get_eeprom_len = get_eeprom_len,
1904 .get_eeprom = get_eeprom,
1905 .set_eeprom = set_eeprom,
1906 .get_pauseparam = get_pauseparam,
1907 .set_pauseparam = set_pauseparam,
1908 .get_rx_csum = get_rx_csum,
1909 .set_rx_csum = set_rx_csum,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001910 .set_tx_csum = ethtool_op_set_tx_csum,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001911 .set_sg = ethtool_op_set_sg,
1912 .get_link = ethtool_op_get_link,
1913 .get_strings = get_strings,
1914 .phys_id = cxgb3_phys_id,
1915 .nway_reset = restart_autoneg,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001916 .get_sset_count = get_sset_count,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001917 .get_ethtool_stats = get_stats,
1918 .get_regs_len = get_regs_len,
1919 .get_regs = get_regs,
1920 .get_wol = get_wol,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001921 .set_tso = ethtool_op_set_tso,
Divy Le Ray4d22de32007-01-18 22:04:14 -05001922};
1923
1924static int in_range(int val, int lo, int hi)
1925{
1926 return val < 0 || (val <= hi && val >= lo);
1927}
1928
1929static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
1930{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001931 struct port_info *pi = netdev_priv(dev);
1932 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001933 u32 cmd;
Divy Le Ray5fbf8162007-08-29 19:15:47 -07001934 int ret;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001935
1936 if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
1937 return -EFAULT;
1938
1939 switch (cmd) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05001940 case CHELSIO_SET_QSET_PARAMS:{
1941 int i;
1942 struct qset_params *q;
1943 struct ch_qset_params t;
Divy Le Ray8c263762008-10-08 17:37:33 -07001944 int q1 = pi->first_qset;
1945 int nqsets = pi->nqsets;
Divy Le Ray4d22de32007-01-18 22:04:14 -05001946
1947 if (!capable(CAP_NET_ADMIN))
1948 return -EPERM;
1949 if (copy_from_user(&t, useraddr, sizeof(t)))
1950 return -EFAULT;
1951 if (t.qset_idx >= SGE_QSETS)
1952 return -EINVAL;
1953 if (!in_range(t.intr_lat, 0, M_NEWTIMER) ||
1954 !in_range(t.cong_thres, 0, 255) ||
1955 !in_range(t.txq_size[0], MIN_TXQ_ENTRIES,
1956 MAX_TXQ_ENTRIES) ||
1957 !in_range(t.txq_size[1], MIN_TXQ_ENTRIES,
1958 MAX_TXQ_ENTRIES) ||
1959 !in_range(t.txq_size[2], MIN_CTRL_TXQ_ENTRIES,
1960 MAX_CTRL_TXQ_ENTRIES) ||
1961 !in_range(t.fl_size[0], MIN_FL_ENTRIES,
1962 MAX_RX_BUFFERS)
1963 || !in_range(t.fl_size[1], MIN_FL_ENTRIES,
1964 MAX_RX_JUMBO_BUFFERS)
1965 || !in_range(t.rspq_size, MIN_RSPQ_ENTRIES,
1966 MAX_RSPQ_ENTRIES))
1967 return -EINVAL;
Divy Le Ray8c263762008-10-08 17:37:33 -07001968
1969 if ((adapter->flags & FULL_INIT_DONE) && t.lro > 0)
1970 for_each_port(adapter, i) {
1971 pi = adap2pinfo(adapter, i);
1972 if (t.qset_idx >= pi->first_qset &&
1973 t.qset_idx < pi->first_qset + pi->nqsets &&
Roland Dreier47fd23f2009-01-11 00:19:36 -08001974 !(pi->rx_offload & T3_RX_CSUM))
Divy Le Ray8c263762008-10-08 17:37:33 -07001975 return -EINVAL;
1976 }
1977
Divy Le Ray4d22de32007-01-18 22:04:14 -05001978 if ((adapter->flags & FULL_INIT_DONE) &&
1979 (t.rspq_size >= 0 || t.fl_size[0] >= 0 ||
1980 t.fl_size[1] >= 0 || t.txq_size[0] >= 0 ||
1981 t.txq_size[1] >= 0 || t.txq_size[2] >= 0 ||
1982 t.polling >= 0 || t.cong_thres >= 0))
1983 return -EBUSY;
1984
Divy Le Ray8c263762008-10-08 17:37:33 -07001985 /* Allow setting of any available qset when offload enabled */
1986 if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
1987 q1 = 0;
1988 for_each_port(adapter, i) {
1989 pi = adap2pinfo(adapter, i);
1990 nqsets += pi->first_qset + pi->nqsets;
1991 }
1992 }
1993
1994 if (t.qset_idx < q1)
1995 return -EINVAL;
1996 if (t.qset_idx > q1 + nqsets - 1)
1997 return -EINVAL;
1998
Divy Le Ray4d22de32007-01-18 22:04:14 -05001999 q = &adapter->params.sge.qset[t.qset_idx];
2000
2001 if (t.rspq_size >= 0)
2002 q->rspq_size = t.rspq_size;
2003 if (t.fl_size[0] >= 0)
2004 q->fl_size = t.fl_size[0];
2005 if (t.fl_size[1] >= 0)
2006 q->jumbo_size = t.fl_size[1];
2007 if (t.txq_size[0] >= 0)
2008 q->txq_size[0] = t.txq_size[0];
2009 if (t.txq_size[1] >= 0)
2010 q->txq_size[1] = t.txq_size[1];
2011 if (t.txq_size[2] >= 0)
2012 q->txq_size[2] = t.txq_size[2];
2013 if (t.cong_thres >= 0)
2014 q->cong_thres = t.cong_thres;
2015 if (t.intr_lat >= 0) {
2016 struct sge_qset *qs =
2017 &adapter->sge.qs[t.qset_idx];
2018
2019 q->coalesce_usecs = t.intr_lat;
2020 t3_update_qset_coalesce(qs, q);
2021 }
2022 if (t.polling >= 0) {
2023 if (adapter->flags & USING_MSIX)
2024 q->polling = t.polling;
2025 else {
2026 /* No polling with INTx for T3A */
2027 if (adapter->params.rev == 0 &&
2028 !(adapter->flags & USING_MSI))
2029 t.polling = 0;
2030
2031 for (i = 0; i < SGE_QSETS; i++) {
2032 q = &adapter->params.sge.
2033 qset[i];
2034 q->polling = t.polling;
2035 }
2036 }
2037 }
Divy Le Ray04ecb072008-10-28 22:40:32 -07002038 if (t.lro >= 0)
2039 set_qset_lro(dev, t.qset_idx, t.lro);
2040
Divy Le Ray4d22de32007-01-18 22:04:14 -05002041 break;
2042 }
2043 case CHELSIO_GET_QSET_PARAMS:{
2044 struct qset_params *q;
2045 struct ch_qset_params t;
Divy Le Ray8c263762008-10-08 17:37:33 -07002046 int q1 = pi->first_qset;
2047 int nqsets = pi->nqsets;
2048 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002049
2050 if (copy_from_user(&t, useraddr, sizeof(t)))
2051 return -EFAULT;
Divy Le Ray8c263762008-10-08 17:37:33 -07002052
2053 /* Display qsets for all ports when offload enabled */
2054 if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2055 q1 = 0;
2056 for_each_port(adapter, i) {
2057 pi = adap2pinfo(adapter, i);
2058 nqsets = pi->first_qset + pi->nqsets;
2059 }
2060 }
2061
2062 if (t.qset_idx >= nqsets)
Divy Le Ray4d22de32007-01-18 22:04:14 -05002063 return -EINVAL;
2064
Divy Le Ray8c263762008-10-08 17:37:33 -07002065 q = &adapter->params.sge.qset[q1 + t.qset_idx];
Divy Le Ray4d22de32007-01-18 22:04:14 -05002066 t.rspq_size = q->rspq_size;
2067 t.txq_size[0] = q->txq_size[0];
2068 t.txq_size[1] = q->txq_size[1];
2069 t.txq_size[2] = q->txq_size[2];
2070 t.fl_size[0] = q->fl_size;
2071 t.fl_size[1] = q->jumbo_size;
2072 t.polling = q->polling;
Divy Le Rayb47385b2008-05-21 18:56:26 -07002073 t.lro = q->lro;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002074 t.intr_lat = q->coalesce_usecs;
2075 t.cong_thres = q->cong_thres;
Divy Le Ray8c263762008-10-08 17:37:33 -07002076 t.qnum = q1;
2077
2078 if (adapter->flags & USING_MSIX)
2079 t.vector = adapter->msix_info[q1 + t.qset_idx + 1].vec;
2080 else
2081 t.vector = adapter->pdev->irq;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002082
2083 if (copy_to_user(useraddr, &t, sizeof(t)))
2084 return -EFAULT;
2085 break;
2086 }
2087 case CHELSIO_SET_QSET_NUM:{
2088 struct ch_reg edata;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002089 unsigned int i, first_qset = 0, other_qsets = 0;
2090
2091 if (!capable(CAP_NET_ADMIN))
2092 return -EPERM;
2093 if (adapter->flags & FULL_INIT_DONE)
2094 return -EBUSY;
2095 if (copy_from_user(&edata, useraddr, sizeof(edata)))
2096 return -EFAULT;
2097 if (edata.val < 1 ||
2098 (edata.val > 1 && !(adapter->flags & USING_MSIX)))
2099 return -EINVAL;
2100
2101 for_each_port(adapter, i)
2102 if (adapter->port[i] && adapter->port[i] != dev)
2103 other_qsets += adap2pinfo(adapter, i)->nqsets;
2104
2105 if (edata.val + other_qsets > SGE_QSETS)
2106 return -EINVAL;
2107
2108 pi->nqsets = edata.val;
2109
2110 for_each_port(adapter, i)
2111 if (adapter->port[i]) {
2112 pi = adap2pinfo(adapter, i);
2113 pi->first_qset = first_qset;
2114 first_qset += pi->nqsets;
2115 }
2116 break;
2117 }
2118 case CHELSIO_GET_QSET_NUM:{
2119 struct ch_reg edata;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002120
2121 edata.cmd = CHELSIO_GET_QSET_NUM;
2122 edata.val = pi->nqsets;
2123 if (copy_to_user(useraddr, &edata, sizeof(edata)))
2124 return -EFAULT;
2125 break;
2126 }
2127 case CHELSIO_LOAD_FW:{
2128 u8 *fw_data;
2129 struct ch_mem_range t;
2130
Alan Cox1b3aa7a2008-04-29 14:29:30 +01002131 if (!capable(CAP_SYS_RAWIO))
Divy Le Ray4d22de32007-01-18 22:04:14 -05002132 return -EPERM;
2133 if (copy_from_user(&t, useraddr, sizeof(t)))
2134 return -EFAULT;
Alan Cox1b3aa7a2008-04-29 14:29:30 +01002135 /* Check t.len sanity ? */
Divy Le Ray4d22de32007-01-18 22:04:14 -05002136 fw_data = kmalloc(t.len, GFP_KERNEL);
2137 if (!fw_data)
2138 return -ENOMEM;
2139
2140 if (copy_from_user
2141 (fw_data, useraddr + sizeof(t), t.len)) {
2142 kfree(fw_data);
2143 return -EFAULT;
2144 }
2145
2146 ret = t3_load_fw(adapter, fw_data, t.len);
2147 kfree(fw_data);
2148 if (ret)
2149 return ret;
2150 break;
2151 }
2152 case CHELSIO_SETMTUTAB:{
2153 struct ch_mtus m;
2154 int i;
2155
2156 if (!is_offload(adapter))
2157 return -EOPNOTSUPP;
2158 if (!capable(CAP_NET_ADMIN))
2159 return -EPERM;
2160 if (offload_running(adapter))
2161 return -EBUSY;
2162 if (copy_from_user(&m, useraddr, sizeof(m)))
2163 return -EFAULT;
2164 if (m.nmtus != NMTUS)
2165 return -EINVAL;
2166 if (m.mtus[0] < 81) /* accommodate SACK */
2167 return -EINVAL;
2168
2169 /* MTUs must be in ascending order */
2170 for (i = 1; i < NMTUS; ++i)
2171 if (m.mtus[i] < m.mtus[i - 1])
2172 return -EINVAL;
2173
2174 memcpy(adapter->params.mtus, m.mtus,
2175 sizeof(adapter->params.mtus));
2176 break;
2177 }
2178 case CHELSIO_GET_PM:{
2179 struct tp_params *p = &adapter->params.tp;
2180 struct ch_pm m = {.cmd = CHELSIO_GET_PM };
2181
2182 if (!is_offload(adapter))
2183 return -EOPNOTSUPP;
2184 m.tx_pg_sz = p->tx_pg_size;
2185 m.tx_num_pg = p->tx_num_pgs;
2186 m.rx_pg_sz = p->rx_pg_size;
2187 m.rx_num_pg = p->rx_num_pgs;
2188 m.pm_total = p->pmtx_size + p->chan_rx_size * p->nchan;
2189 if (copy_to_user(useraddr, &m, sizeof(m)))
2190 return -EFAULT;
2191 break;
2192 }
2193 case CHELSIO_SET_PM:{
2194 struct ch_pm m;
2195 struct tp_params *p = &adapter->params.tp;
2196
2197 if (!is_offload(adapter))
2198 return -EOPNOTSUPP;
2199 if (!capable(CAP_NET_ADMIN))
2200 return -EPERM;
2201 if (adapter->flags & FULL_INIT_DONE)
2202 return -EBUSY;
2203 if (copy_from_user(&m, useraddr, sizeof(m)))
2204 return -EFAULT;
vignesh babud9da4662007-07-09 11:50:22 -07002205 if (!is_power_of_2(m.rx_pg_sz) ||
2206 !is_power_of_2(m.tx_pg_sz))
Divy Le Ray4d22de32007-01-18 22:04:14 -05002207 return -EINVAL; /* not power of 2 */
2208 if (!(m.rx_pg_sz & 0x14000))
2209 return -EINVAL; /* not 16KB or 64KB */
2210 if (!(m.tx_pg_sz & 0x1554000))
2211 return -EINVAL;
2212 if (m.tx_num_pg == -1)
2213 m.tx_num_pg = p->tx_num_pgs;
2214 if (m.rx_num_pg == -1)
2215 m.rx_num_pg = p->rx_num_pgs;
2216 if (m.tx_num_pg % 24 || m.rx_num_pg % 24)
2217 return -EINVAL;
2218 if (m.rx_num_pg * m.rx_pg_sz > p->chan_rx_size ||
2219 m.tx_num_pg * m.tx_pg_sz > p->chan_tx_size)
2220 return -EINVAL;
2221 p->rx_pg_size = m.rx_pg_sz;
2222 p->tx_pg_size = m.tx_pg_sz;
2223 p->rx_num_pgs = m.rx_num_pg;
2224 p->tx_num_pgs = m.tx_num_pg;
2225 break;
2226 }
2227 case CHELSIO_GET_MEM:{
2228 struct ch_mem_range t;
2229 struct mc7 *mem;
2230 u64 buf[32];
2231
2232 if (!is_offload(adapter))
2233 return -EOPNOTSUPP;
2234 if (!(adapter->flags & FULL_INIT_DONE))
2235 return -EIO; /* need the memory controllers */
2236 if (copy_from_user(&t, useraddr, sizeof(t)))
2237 return -EFAULT;
2238 if ((t.addr & 7) || (t.len & 7))
2239 return -EINVAL;
2240 if (t.mem_id == MEM_CM)
2241 mem = &adapter->cm;
2242 else if (t.mem_id == MEM_PMRX)
2243 mem = &adapter->pmrx;
2244 else if (t.mem_id == MEM_PMTX)
2245 mem = &adapter->pmtx;
2246 else
2247 return -EINVAL;
2248
2249 /*
Divy Le Ray18254942007-02-24 16:43:56 -08002250 * Version scheme:
2251 * bits 0..9: chip version
2252 * bits 10..15: chip revision
2253 */
Divy Le Ray4d22de32007-01-18 22:04:14 -05002254 t.version = 3 | (adapter->params.rev << 10);
2255 if (copy_to_user(useraddr, &t, sizeof(t)))
2256 return -EFAULT;
2257
2258 /*
2259 * Read 256 bytes at a time as len can be large and we don't
2260 * want to use huge intermediate buffers.
2261 */
2262 useraddr += sizeof(t); /* advance to start of buffer */
2263 while (t.len) {
2264 unsigned int chunk =
2265 min_t(unsigned int, t.len, sizeof(buf));
2266
2267 ret =
2268 t3_mc7_bd_read(mem, t.addr / 8, chunk / 8,
2269 buf);
2270 if (ret)
2271 return ret;
2272 if (copy_to_user(useraddr, buf, chunk))
2273 return -EFAULT;
2274 useraddr += chunk;
2275 t.addr += chunk;
2276 t.len -= chunk;
2277 }
2278 break;
2279 }
2280 case CHELSIO_SET_TRACE_FILTER:{
2281 struct ch_trace t;
2282 const struct trace_params *tp;
2283
2284 if (!capable(CAP_NET_ADMIN))
2285 return -EPERM;
2286 if (!offload_running(adapter))
2287 return -EAGAIN;
2288 if (copy_from_user(&t, useraddr, sizeof(t)))
2289 return -EFAULT;
2290
2291 tp = (const struct trace_params *)&t.sip;
2292 if (t.config_tx)
2293 t3_config_trace_filter(adapter, tp, 0,
2294 t.invert_match,
2295 t.trace_tx);
2296 if (t.config_rx)
2297 t3_config_trace_filter(adapter, tp, 1,
2298 t.invert_match,
2299 t.trace_rx);
2300 break;
2301 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05002302 default:
2303 return -EOPNOTSUPP;
2304 }
2305 return 0;
2306}
2307
2308static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
2309{
Divy Le Ray4d22de32007-01-18 22:04:14 -05002310 struct mii_ioctl_data *data = if_mii(req);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07002311 struct port_info *pi = netdev_priv(dev);
2312 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002313
2314 switch (cmd) {
Ben Hutchings0f07c4e2009-04-29 08:07:20 +00002315 case SIOCGMIIREG:
2316 case SIOCSMIIREG:
2317 /* Convert phy_id from older PRTAD/DEVAD format */
2318 if (is_10G(adapter) &&
2319 !mdio_phy_id_is_c45(data->phy_id) &&
2320 (data->phy_id & 0x1f00) &&
2321 !(data->phy_id & 0xe0e0))
2322 data->phy_id = mdio_phy_id_c45(data->phy_id >> 8,
2323 data->phy_id & 0x1f);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002324 /* FALLTHRU */
Ben Hutchings0f07c4e2009-04-29 08:07:20 +00002325 case SIOCGMIIPHY:
2326 return mdio_mii_ioctl(&pi->phy.mdio, data, cmd);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002327 case SIOCCHIOCTL:
2328 return cxgb_extension_ioctl(dev, req->ifr_data);
2329 default:
2330 return -EOPNOTSUPP;
2331 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05002332}
2333
2334static int cxgb_change_mtu(struct net_device *dev, int new_mtu)
2335{
Divy Le Ray4d22de32007-01-18 22:04:14 -05002336 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07002337 struct adapter *adapter = pi->adapter;
2338 int ret;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002339
2340 if (new_mtu < 81) /* accommodate SACK */
2341 return -EINVAL;
2342 if ((ret = t3_mac_set_mtu(&pi->mac, new_mtu)))
2343 return ret;
2344 dev->mtu = new_mtu;
2345 init_port_mtus(adapter);
2346 if (adapter->params.rev == 0 && offload_running(adapter))
2347 t3_load_mtus(adapter, adapter->params.mtus,
2348 adapter->params.a_wnd, adapter->params.b_wnd,
2349 adapter->port[0]->mtu);
2350 return 0;
2351}
2352
2353static int cxgb_set_mac_addr(struct net_device *dev, void *p)
2354{
Divy Le Ray4d22de32007-01-18 22:04:14 -05002355 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07002356 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002357 struct sockaddr *addr = p;
2358
2359 if (!is_valid_ether_addr(addr->sa_data))
2360 return -EINVAL;
2361
2362 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2363 t3_mac_set_address(&pi->mac, 0, dev->dev_addr);
2364 if (offload_running(adapter))
2365 write_smt_entry(adapter, pi->port_id);
2366 return 0;
2367}
2368
2369/**
2370 * t3_synchronize_rx - wait for current Rx processing on a port to complete
2371 * @adap: the adapter
2372 * @p: the port
2373 *
2374 * Ensures that current Rx processing on any of the queues associated with
2375 * the given port completes before returning. We do this by acquiring and
2376 * releasing the locks of the response queues associated with the port.
2377 */
2378static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)
2379{
2380 int i;
2381
Divy Le Ray8c263762008-10-08 17:37:33 -07002382 for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
2383 struct sge_rspq *q = &adap->sge.qs[i].rspq;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002384
2385 spin_lock_irq(&q->lock);
2386 spin_unlock_irq(&q->lock);
2387 }
2388}
2389
2390static void vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2391{
Divy Le Ray4d22de32007-01-18 22:04:14 -05002392 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07002393 struct adapter *adapter = pi->adapter;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002394
2395 pi->vlan_grp = grp;
2396 if (adapter->params.rev > 0)
2397 t3_set_vlan_accel(adapter, 1 << pi->port_id, grp != NULL);
2398 else {
2399 /* single control for all ports */
2400 unsigned int i, have_vlans = 0;
2401 for_each_port(adapter, i)
2402 have_vlans |= adap2pinfo(adapter, i)->vlan_grp != NULL;
2403
2404 t3_set_vlan_accel(adapter, 1, have_vlans);
2405 }
2406 t3_synchronize_rx(adapter, pi);
2407}
2408
Divy Le Ray4d22de32007-01-18 22:04:14 -05002409#ifdef CONFIG_NET_POLL_CONTROLLER
2410static void cxgb_netpoll(struct net_device *dev)
2411{
Divy Le Ray890de332007-05-30 10:01:34 -07002412 struct port_info *pi = netdev_priv(dev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07002413 struct adapter *adapter = pi->adapter;
Divy Le Ray890de332007-05-30 10:01:34 -07002414 int qidx;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002415
Divy Le Ray890de332007-05-30 10:01:34 -07002416 for (qidx = pi->first_qset; qidx < pi->first_qset + pi->nqsets; qidx++) {
2417 struct sge_qset *qs = &adapter->sge.qs[qidx];
2418 void *source;
Jeff Garzik2eab17a2007-11-23 21:59:45 -05002419
Divy Le Ray890de332007-05-30 10:01:34 -07002420 if (adapter->flags & USING_MSIX)
2421 source = qs;
2422 else
2423 source = adapter;
2424
2425 t3_intr_handler(adapter, qs->rspq.polling) (0, source);
2426 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05002427}
2428#endif
2429
2430/*
2431 * Periodic accumulation of MAC statistics.
2432 */
2433static void mac_stats_update(struct adapter *adapter)
2434{
2435 int i;
2436
2437 for_each_port(adapter, i) {
2438 struct net_device *dev = adapter->port[i];
2439 struct port_info *p = netdev_priv(dev);
2440
2441 if (netif_running(dev)) {
2442 spin_lock(&adapter->stats_lock);
2443 t3_mac_update_stats(&p->mac);
2444 spin_unlock(&adapter->stats_lock);
2445 }
2446 }
2447}
2448
2449static void check_link_status(struct adapter *adapter)
2450{
2451 int i;
2452
2453 for_each_port(adapter, i) {
2454 struct net_device *dev = adapter->port[i];
2455 struct port_info *p = netdev_priv(dev);
2456
Divy Le Raybf792092009-03-12 21:14:19 +00002457 spin_lock_irq(&adapter->work_lock);
2458 if (p->link_fault) {
Divy Le Ray3851c662009-04-17 12:21:11 +00002459 t3_link_fault(adapter, i);
Divy Le Raybf792092009-03-12 21:14:19 +00002460 spin_unlock_irq(&adapter->work_lock);
2461 continue;
2462 }
2463 spin_unlock_irq(&adapter->work_lock);
2464
2465 if (!(p->phy.caps & SUPPORTED_IRQ) && netif_running(dev)) {
2466 t3_xgm_intr_disable(adapter, i);
2467 t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2468
Divy Le Ray4d22de32007-01-18 22:04:14 -05002469 t3_link_changed(adapter, i);
Divy Le Raybf792092009-03-12 21:14:19 +00002470 t3_xgm_intr_enable(adapter, i);
2471 }
Divy Le Ray4d22de32007-01-18 22:04:14 -05002472 }
2473}
2474
Divy Le Rayfc906642007-03-18 13:10:12 -07002475static void check_t3b2_mac(struct adapter *adapter)
2476{
2477 int i;
2478
Divy Le Rayf2d961c2007-04-09 20:10:22 -07002479 if (!rtnl_trylock()) /* synchronize with ifdown */
2480 return;
2481
Divy Le Rayfc906642007-03-18 13:10:12 -07002482 for_each_port(adapter, i) {
2483 struct net_device *dev = adapter->port[i];
2484 struct port_info *p = netdev_priv(dev);
2485 int status;
2486
2487 if (!netif_running(dev))
2488 continue;
2489
2490 status = 0;
Divy Le Ray6d6daba2007-03-31 00:23:24 -07002491 if (netif_running(dev) && netif_carrier_ok(dev))
Divy Le Rayfc906642007-03-18 13:10:12 -07002492 status = t3b2_mac_watchdog_task(&p->mac);
2493 if (status == 1)
2494 p->mac.stats.num_toggled++;
2495 else if (status == 2) {
2496 struct cmac *mac = &p->mac;
2497
2498 t3_mac_set_mtu(mac, dev->mtu);
2499 t3_mac_set_address(mac, 0, dev->dev_addr);
2500 cxgb_set_rxmode(dev);
2501 t3_link_start(&p->phy, mac, &p->link_config);
2502 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
2503 t3_port_intr_enable(adapter, p->port_id);
2504 p->mac.stats.num_resets++;
2505 }
2506 }
2507 rtnl_unlock();
2508}
2509
2510
Divy Le Ray4d22de32007-01-18 22:04:14 -05002511static void t3_adap_check_task(struct work_struct *work)
2512{
2513 struct adapter *adapter = container_of(work, struct adapter,
2514 adap_check_task.work);
2515 const struct adapter_params *p = &adapter->params;
Divy Le Rayfc882192009-03-12 21:14:09 +00002516 int port;
2517 unsigned int v, status, reset;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002518
2519 adapter->check_task_cnt++;
2520
Divy Le Ray3851c662009-04-17 12:21:11 +00002521 check_link_status(adapter);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002522
2523 /* Accumulate MAC stats if needed */
2524 if (!p->linkpoll_period ||
2525 (adapter->check_task_cnt * p->linkpoll_period) / 10 >=
2526 p->stats_update_period) {
2527 mac_stats_update(adapter);
2528 adapter->check_task_cnt = 0;
2529 }
2530
Divy Le Rayfc906642007-03-18 13:10:12 -07002531 if (p->rev == T3_REV_B2)
2532 check_t3b2_mac(adapter);
2533
Divy Le Rayfc882192009-03-12 21:14:09 +00002534 /*
2535 * Scan the XGMAC's to check for various conditions which we want to
2536 * monitor in a periodic polling manner rather than via an interrupt
2537 * condition. This is used for conditions which would otherwise flood
2538 * the system with interrupts and we only really need to know that the
2539 * conditions are "happening" ... For each condition we count the
2540 * detection of the condition and reset it for the next polling loop.
2541 */
2542 for_each_port(adapter, port) {
2543 struct cmac *mac = &adap2pinfo(adapter, port)->mac;
2544 u32 cause;
2545
2546 cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset);
2547 reset = 0;
2548 if (cause & F_RXFIFO_OVERFLOW) {
2549 mac->stats.rx_fifo_ovfl++;
2550 reset |= F_RXFIFO_OVERFLOW;
2551 }
2552
2553 t3_write_reg(adapter, A_XGM_INT_CAUSE + mac->offset, reset);
2554 }
2555
2556 /*
2557 * We do the same as above for FL_EMPTY interrupts.
2558 */
2559 status = t3_read_reg(adapter, A_SG_INT_CAUSE);
2560 reset = 0;
2561
2562 if (status & F_FLEMPTY) {
2563 struct sge_qset *qs = &adapter->sge.qs[0];
2564 int i = 0;
2565
2566 reset |= F_FLEMPTY;
2567
2568 v = (t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS) >> S_FL0EMPTY) &
2569 0xffff;
2570
2571 while (v) {
2572 qs->fl[i].empty += (v & 1);
2573 if (i)
2574 qs++;
2575 i ^= 1;
2576 v >>= 1;
2577 }
2578 }
2579
2580 t3_write_reg(adapter, A_SG_INT_CAUSE, reset);
2581
Divy Le Ray4d22de32007-01-18 22:04:14 -05002582 /* Schedule the next check update if any port is active. */
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002583 spin_lock_irq(&adapter->work_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002584 if (adapter->open_device_map & PORT_MASK)
2585 schedule_chk_task(adapter);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002586 spin_unlock_irq(&adapter->work_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002587}
2588
2589/*
2590 * Processes external (PHY) interrupts in process context.
2591 */
2592static void ext_intr_task(struct work_struct *work)
2593{
2594 struct adapter *adapter = container_of(work, struct adapter,
2595 ext_intr_handler_task);
Divy Le Raybf792092009-03-12 21:14:19 +00002596 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002597
Divy Le Raybf792092009-03-12 21:14:19 +00002598 /* Disable link fault interrupts */
2599 for_each_port(adapter, i) {
2600 struct net_device *dev = adapter->port[i];
2601 struct port_info *p = netdev_priv(dev);
2602
2603 t3_xgm_intr_disable(adapter, i);
2604 t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
2605 }
2606
2607 /* Re-enable link fault interrupts */
Divy Le Ray4d22de32007-01-18 22:04:14 -05002608 t3_phy_intr_handler(adapter);
2609
Divy Le Raybf792092009-03-12 21:14:19 +00002610 for_each_port(adapter, i)
2611 t3_xgm_intr_enable(adapter, i);
2612
Divy Le Ray4d22de32007-01-18 22:04:14 -05002613 /* Now reenable external interrupts */
2614 spin_lock_irq(&adapter->work_lock);
2615 if (adapter->slow_intr_mask) {
2616 adapter->slow_intr_mask |= F_T3DBG;
2617 t3_write_reg(adapter, A_PL_INT_CAUSE0, F_T3DBG);
2618 t3_write_reg(adapter, A_PL_INT_ENABLE0,
2619 adapter->slow_intr_mask);
2620 }
2621 spin_unlock_irq(&adapter->work_lock);
2622}
2623
2624/*
2625 * Interrupt-context handler for external (PHY) interrupts.
2626 */
2627void t3_os_ext_intr_handler(struct adapter *adapter)
2628{
2629 /*
2630 * Schedule a task to handle external interrupts as they may be slow
2631 * and we use a mutex to protect MDIO registers. We disable PHY
2632 * interrupts in the meantime and let the task reenable them when
2633 * it's done.
2634 */
2635 spin_lock(&adapter->work_lock);
2636 if (adapter->slow_intr_mask) {
2637 adapter->slow_intr_mask &= ~F_T3DBG;
2638 t3_write_reg(adapter, A_PL_INT_ENABLE0,
2639 adapter->slow_intr_mask);
2640 queue_work(cxgb3_wq, &adapter->ext_intr_handler_task);
2641 }
2642 spin_unlock(&adapter->work_lock);
2643}
2644
Divy Le Raybf792092009-03-12 21:14:19 +00002645void t3_os_link_fault_handler(struct adapter *adapter, int port_id)
2646{
2647 struct net_device *netdev = adapter->port[port_id];
2648 struct port_info *pi = netdev_priv(netdev);
2649
2650 spin_lock(&adapter->work_lock);
2651 pi->link_fault = 1;
Divy Le Raybf792092009-03-12 21:14:19 +00002652 spin_unlock(&adapter->work_lock);
2653}
2654
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002655static int t3_adapter_error(struct adapter *adapter, int reset)
2656{
2657 int i, ret = 0;
2658
Divy Le Raycb0bc202009-01-26 22:21:59 -08002659 if (is_offload(adapter) &&
2660 test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
2661 cxgb3_err_notify(&adapter->tdev, OFFLOAD_STATUS_DOWN, 0);
2662 offload_close(&adapter->tdev);
2663 }
2664
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002665 /* Stop all ports */
2666 for_each_port(adapter, i) {
2667 struct net_device *netdev = adapter->port[i];
2668
2669 if (netif_running(netdev))
2670 cxgb_close(netdev);
2671 }
2672
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002673 /* Stop SGE timers */
2674 t3_stop_sge_timers(adapter);
2675
2676 adapter->flags &= ~FULL_INIT_DONE;
2677
2678 if (reset)
2679 ret = t3_reset_adapter(adapter);
2680
2681 pci_disable_device(adapter->pdev);
2682
2683 return ret;
2684}
2685
2686static int t3_reenable_adapter(struct adapter *adapter)
2687{
2688 if (pci_enable_device(adapter->pdev)) {
2689 dev_err(&adapter->pdev->dev,
2690 "Cannot re-enable PCI device after reset.\n");
2691 goto err;
2692 }
2693 pci_set_master(adapter->pdev);
2694 pci_restore_state(adapter->pdev);
2695
2696 /* Free sge resources */
2697 t3_free_sge_resources(adapter);
2698
2699 if (t3_replay_prep_adapter(adapter))
2700 goto err;
2701
2702 return 0;
2703err:
2704 return -1;
2705}
2706
2707static void t3_resume_ports(struct adapter *adapter)
2708{
2709 int i;
2710
2711 /* Restart the ports */
2712 for_each_port(adapter, i) {
2713 struct net_device *netdev = adapter->port[i];
2714
2715 if (netif_running(netdev)) {
2716 if (cxgb_open(netdev)) {
2717 dev_err(&adapter->pdev->dev,
2718 "can't bring device back up"
2719 " after reset\n");
2720 continue;
2721 }
2722 }
2723 }
Divy Le Raycb0bc202009-01-26 22:21:59 -08002724
2725 if (is_offload(adapter) && !ofld_disable)
2726 cxgb3_err_notify(&adapter->tdev, OFFLOAD_STATUS_UP, 0);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002727}
2728
2729/*
2730 * processes a fatal error.
2731 * Bring the ports down, reset the chip, bring the ports back up.
2732 */
2733static void fatal_error_task(struct work_struct *work)
2734{
2735 struct adapter *adapter = container_of(work, struct adapter,
2736 fatal_error_handler_task);
2737 int err = 0;
2738
2739 rtnl_lock();
2740 err = t3_adapter_error(adapter, 1);
2741 if (!err)
2742 err = t3_reenable_adapter(adapter);
2743 if (!err)
2744 t3_resume_ports(adapter);
2745
2746 CH_ALERT(adapter, "adapter reset %s\n", err ? "failed" : "succeeded");
2747 rtnl_unlock();
2748}
2749
Divy Le Ray4d22de32007-01-18 22:04:14 -05002750void t3_fatal_err(struct adapter *adapter)
2751{
2752 unsigned int fw_status[4];
2753
2754 if (adapter->flags & FULL_INIT_DONE) {
2755 t3_sge_stop(adapter);
Divy Le Rayc64c2ea2007-08-21 20:49:31 -07002756 t3_write_reg(adapter, A_XGM_TX_CTRL, 0);
2757 t3_write_reg(adapter, A_XGM_RX_CTRL, 0);
2758 t3_write_reg(adapter, XGM_REG(A_XGM_TX_CTRL, 1), 0);
2759 t3_write_reg(adapter, XGM_REG(A_XGM_RX_CTRL, 1), 0);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002760
2761 spin_lock(&adapter->work_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002762 t3_intr_disable(adapter);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002763 queue_work(cxgb3_wq, &adapter->fatal_error_handler_task);
2764 spin_unlock(&adapter->work_lock);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002765 }
2766 CH_ALERT(adapter, "encountered fatal error, operation suspended\n");
2767 if (!t3_cim_ctl_blk_read(adapter, 0xa0, 4, fw_status))
2768 CH_ALERT(adapter, "FW status: 0x%x, 0x%x, 0x%x, 0x%x\n",
2769 fw_status[0], fw_status[1],
2770 fw_status[2], fw_status[3]);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002771}
2772
Divy Le Ray91a6b502007-11-16 11:21:55 -08002773/**
2774 * t3_io_error_detected - called when PCI error is detected
2775 * @pdev: Pointer to PCI device
2776 * @state: The current pci connection state
2777 *
2778 * This function is called after a PCI bus error affecting
2779 * this device has been detected.
2780 */
2781static pci_ers_result_t t3_io_error_detected(struct pci_dev *pdev,
2782 pci_channel_state_t state)
2783{
Divy Le Raybc4b6b52007-12-17 18:47:41 -08002784 struct adapter *adapter = pci_get_drvdata(pdev);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002785 int ret;
Divy Le Ray91a6b502007-11-16 11:21:55 -08002786
Divy Le Raye8d19372009-04-17 12:21:27 +00002787 if (state == pci_channel_io_perm_failure)
2788 return PCI_ERS_RESULT_DISCONNECT;
2789
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002790 ret = t3_adapter_error(adapter, 0);
Divy Le Ray91a6b502007-11-16 11:21:55 -08002791
Divy Le Ray48c4b6d2008-05-06 19:25:56 -07002792 /* Request a slot reset. */
Divy Le Ray91a6b502007-11-16 11:21:55 -08002793 return PCI_ERS_RESULT_NEED_RESET;
2794}
2795
2796/**
2797 * t3_io_slot_reset - called after the pci bus has been reset.
2798 * @pdev: Pointer to PCI device
2799 *
2800 * Restart the card from scratch, as if from a cold-boot.
2801 */
2802static pci_ers_result_t t3_io_slot_reset(struct pci_dev *pdev)
2803{
Divy Le Raybc4b6b52007-12-17 18:47:41 -08002804 struct adapter *adapter = pci_get_drvdata(pdev);
Divy Le Ray91a6b502007-11-16 11:21:55 -08002805
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002806 if (!t3_reenable_adapter(adapter))
2807 return PCI_ERS_RESULT_RECOVERED;
Divy Le Ray91a6b502007-11-16 11:21:55 -08002808
Divy Le Ray48c4b6d2008-05-06 19:25:56 -07002809 return PCI_ERS_RESULT_DISCONNECT;
Divy Le Ray91a6b502007-11-16 11:21:55 -08002810}
2811
2812/**
2813 * t3_io_resume - called when traffic can start flowing again.
2814 * @pdev: Pointer to PCI device
2815 *
2816 * This callback is called when the error recovery driver tells us that
2817 * its OK to resume normal operation.
2818 */
2819static void t3_io_resume(struct pci_dev *pdev)
2820{
Divy Le Raybc4b6b52007-12-17 18:47:41 -08002821 struct adapter *adapter = pci_get_drvdata(pdev);
Divy Le Ray91a6b502007-11-16 11:21:55 -08002822
Divy Le Ray68f40c12009-03-26 16:39:19 +00002823 CH_ALERT(adapter, "adapter recovering, PEX ERR 0x%x\n",
2824 t3_read_reg(adapter, A_PCIE_PEX_ERR));
2825
Divy Le Ray20d3fc12008-10-08 17:36:03 -07002826 t3_resume_ports(adapter);
Divy Le Ray91a6b502007-11-16 11:21:55 -08002827}
2828
2829static struct pci_error_handlers t3_err_handler = {
2830 .error_detected = t3_io_error_detected,
2831 .slot_reset = t3_io_slot_reset,
2832 .resume = t3_io_resume,
2833};
2834
Divy Le Ray8c263762008-10-08 17:37:33 -07002835/*
2836 * Set the number of qsets based on the number of CPUs and the number of ports,
2837 * not to exceed the number of available qsets, assuming there are enough qsets
2838 * per port in HW.
2839 */
2840static void set_nqsets(struct adapter *adap)
2841{
2842 int i, j = 0;
2843 int num_cpus = num_online_cpus();
2844 int hwports = adap->params.nports;
Divy Le Ray5cda9362009-01-18 21:29:40 -08002845 int nqsets = adap->msix_nvectors - 1;
Divy Le Ray8c263762008-10-08 17:37:33 -07002846
Divy Le Rayf9ee3882008-11-09 00:55:33 -08002847 if (adap->params.rev > 0 && adap->flags & USING_MSIX) {
Divy Le Ray8c263762008-10-08 17:37:33 -07002848 if (hwports == 2 &&
2849 (hwports * nqsets > SGE_QSETS ||
2850 num_cpus >= nqsets / hwports))
2851 nqsets /= hwports;
2852 if (nqsets > num_cpus)
2853 nqsets = num_cpus;
2854 if (nqsets < 1 || hwports == 4)
2855 nqsets = 1;
2856 } else
2857 nqsets = 1;
2858
2859 for_each_port(adap, i) {
2860 struct port_info *pi = adap2pinfo(adap, i);
2861
2862 pi->first_qset = j;
2863 pi->nqsets = nqsets;
2864 j = pi->first_qset + nqsets;
2865
2866 dev_info(&adap->pdev->dev,
2867 "Port %d using %d queue sets.\n", i, nqsets);
2868 }
2869}
2870
Divy Le Ray4d22de32007-01-18 22:04:14 -05002871static int __devinit cxgb_enable_msix(struct adapter *adap)
2872{
2873 struct msix_entry entries[SGE_QSETS + 1];
Divy Le Ray5cda9362009-01-18 21:29:40 -08002874 int vectors;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002875 int i, err;
2876
Divy Le Ray5cda9362009-01-18 21:29:40 -08002877 vectors = ARRAY_SIZE(entries);
2878 for (i = 0; i < vectors; ++i)
Divy Le Ray4d22de32007-01-18 22:04:14 -05002879 entries[i].entry = i;
2880
Divy Le Ray5cda9362009-01-18 21:29:40 -08002881 while ((err = pci_enable_msix(adap->pdev, entries, vectors)) > 0)
2882 vectors = err;
2883
Divy Le Ray2c2f4092009-04-17 12:21:22 +00002884 if (err < 0)
2885 pci_disable_msix(adap->pdev);
2886
2887 if (!err && vectors < (adap->params.nports + 1)) {
2888 pci_disable_msix(adap->pdev);
Divy Le Ray5cda9362009-01-18 21:29:40 -08002889 err = -1;
Divy Le Ray2c2f4092009-04-17 12:21:22 +00002890 }
Divy Le Ray5cda9362009-01-18 21:29:40 -08002891
Divy Le Ray4d22de32007-01-18 22:04:14 -05002892 if (!err) {
Divy Le Ray5cda9362009-01-18 21:29:40 -08002893 for (i = 0; i < vectors; ++i)
Divy Le Ray4d22de32007-01-18 22:04:14 -05002894 adap->msix_info[i].vec = entries[i].vector;
Divy Le Ray5cda9362009-01-18 21:29:40 -08002895 adap->msix_nvectors = vectors;
2896 }
2897
Divy Le Ray4d22de32007-01-18 22:04:14 -05002898 return err;
2899}
2900
2901static void __devinit print_port_info(struct adapter *adap,
2902 const struct adapter_info *ai)
2903{
2904 static const char *pci_variant[] = {
2905 "PCI", "PCI-X", "PCI-X ECC", "PCI-X 266", "PCI Express"
2906 };
2907
2908 int i;
2909 char buf[80];
2910
2911 if (is_pcie(adap))
2912 snprintf(buf, sizeof(buf), "%s x%d",
2913 pci_variant[adap->params.pci.variant],
2914 adap->params.pci.width);
2915 else
2916 snprintf(buf, sizeof(buf), "%s %dMHz/%d-bit",
2917 pci_variant[adap->params.pci.variant],
2918 adap->params.pci.speed, adap->params.pci.width);
2919
2920 for_each_port(adap, i) {
2921 struct net_device *dev = adap->port[i];
2922 const struct port_info *pi = netdev_priv(dev);
2923
2924 if (!test_bit(i, &adap->registered_device_map))
2925 continue;
Divy Le Ray8ac3ba62007-03-31 00:23:19 -07002926 printk(KERN_INFO "%s: %s %s %sNIC (rev %d) %s%s\n",
Divy Le Ray04497982008-10-08 17:38:29 -07002927 dev->name, ai->desc, pi->phy.desc,
Divy Le Ray8ac3ba62007-03-31 00:23:19 -07002928 is_offload(adap) ? "R" : "", adap->params.rev, buf,
Divy Le Ray4d22de32007-01-18 22:04:14 -05002929 (adap->flags & USING_MSIX) ? " MSI-X" :
2930 (adap->flags & USING_MSI) ? " MSI" : "");
2931 if (adap->name == dev->name && adap->params.vpd.mclk)
Divy Le Ray167cdf52007-08-21 20:49:36 -07002932 printk(KERN_INFO
2933 "%s: %uMB CM, %uMB PMTX, %uMB PMRX, S/N: %s\n",
Divy Le Ray4d22de32007-01-18 22:04:14 -05002934 adap->name, t3_mc7_size(&adap->cm) >> 20,
2935 t3_mc7_size(&adap->pmtx) >> 20,
Divy Le Ray167cdf52007-08-21 20:49:36 -07002936 t3_mc7_size(&adap->pmrx) >> 20,
2937 adap->params.vpd.sn);
Divy Le Ray4d22de32007-01-18 22:04:14 -05002938 }
2939}
2940
Stephen Hemmingerdd752692008-11-19 22:15:39 -08002941static const struct net_device_ops cxgb_netdev_ops = {
2942 .ndo_open = cxgb_open,
2943 .ndo_stop = cxgb_close,
Divy Le Ray43a944f2008-11-26 15:35:26 -08002944 .ndo_start_xmit = t3_eth_xmit,
Stephen Hemmingerdd752692008-11-19 22:15:39 -08002945 .ndo_get_stats = cxgb_get_stats,
2946 .ndo_validate_addr = eth_validate_addr,
2947 .ndo_set_multicast_list = cxgb_set_rxmode,
2948 .ndo_do_ioctl = cxgb_ioctl,
2949 .ndo_change_mtu = cxgb_change_mtu,
2950 .ndo_set_mac_address = cxgb_set_mac_addr,
2951 .ndo_vlan_rx_register = vlan_rx_register,
2952#ifdef CONFIG_NET_POLL_CONTROLLER
2953 .ndo_poll_controller = cxgb_netpoll,
2954#endif
2955};
2956
Divy Le Ray4d22de32007-01-18 22:04:14 -05002957static int __devinit init_one(struct pci_dev *pdev,
2958 const struct pci_device_id *ent)
2959{
2960 static int version_printed;
2961
2962 int i, err, pci_using_dac = 0;
Divy Le Ray68f40c12009-03-26 16:39:19 +00002963 resource_size_t mmio_start, mmio_len;
Divy Le Ray4d22de32007-01-18 22:04:14 -05002964 const struct adapter_info *ai;
2965 struct adapter *adapter = NULL;
2966 struct port_info *pi;
2967
2968 if (!version_printed) {
2969 printk(KERN_INFO "%s - version %s\n", DRV_DESC, DRV_VERSION);
2970 ++version_printed;
2971 }
2972
2973 if (!cxgb3_wq) {
2974 cxgb3_wq = create_singlethread_workqueue(DRV_NAME);
2975 if (!cxgb3_wq) {
2976 printk(KERN_ERR DRV_NAME
2977 ": cannot initialize work queue\n");
2978 return -ENOMEM;
2979 }
2980 }
2981
2982 err = pci_request_regions(pdev, DRV_NAME);
2983 if (err) {
2984 /* Just info, some other driver may have claimed the device. */
2985 dev_info(&pdev->dev, "cannot obtain PCI resources\n");
2986 return err;
2987 }
2988
2989 err = pci_enable_device(pdev);
2990 if (err) {
2991 dev_err(&pdev->dev, "cannot enable PCI device\n");
2992 goto out_release_regions;
2993 }
2994
Yang Hongyang6a355282009-04-06 19:01:13 -07002995 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05002996 pci_using_dac = 1;
Yang Hongyang6a355282009-04-06 19:01:13 -07002997 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
Divy Le Ray4d22de32007-01-18 22:04:14 -05002998 if (err) {
2999 dev_err(&pdev->dev, "unable to obtain 64-bit DMA for "
3000 "coherent allocations\n");
3001 goto out_disable_device;
3002 }
Yang Hongyang284901a2009-04-06 19:01:15 -07003003 } else if ((err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) != 0) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05003004 dev_err(&pdev->dev, "no usable DMA configuration\n");
3005 goto out_disable_device;
3006 }
3007
3008 pci_set_master(pdev);
Divy Le Ray204e2f92008-05-06 19:26:01 -07003009 pci_save_state(pdev);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003010
3011 mmio_start = pci_resource_start(pdev, 0);
3012 mmio_len = pci_resource_len(pdev, 0);
3013 ai = t3_get_adapter_info(ent->driver_data);
3014
3015 adapter = kzalloc(sizeof(*adapter), GFP_KERNEL);
3016 if (!adapter) {
3017 err = -ENOMEM;
3018 goto out_disable_device;
3019 }
3020
3021 adapter->regs = ioremap_nocache(mmio_start, mmio_len);
3022 if (!adapter->regs) {
3023 dev_err(&pdev->dev, "cannot map device registers\n");
3024 err = -ENOMEM;
3025 goto out_free_adapter;
3026 }
3027
3028 adapter->pdev = pdev;
3029 adapter->name = pci_name(pdev);
3030 adapter->msg_enable = dflt_msg_enable;
3031 adapter->mmio_len = mmio_len;
3032
3033 mutex_init(&adapter->mdio_lock);
3034 spin_lock_init(&adapter->work_lock);
3035 spin_lock_init(&adapter->stats_lock);
3036
3037 INIT_LIST_HEAD(&adapter->adapter_list);
3038 INIT_WORK(&adapter->ext_intr_handler_task, ext_intr_task);
Divy Le Ray20d3fc12008-10-08 17:36:03 -07003039 INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003040 INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task);
3041
Divy Le Ray952cdf32009-03-26 16:39:24 +00003042 for (i = 0; i < ai->nports0 + ai->nports1; ++i) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05003043 struct net_device *netdev;
3044
Divy Le Ray82ad3322008-12-16 01:09:39 -08003045 netdev = alloc_etherdev_mq(sizeof(struct port_info), SGE_QSETS);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003046 if (!netdev) {
3047 err = -ENOMEM;
3048 goto out_free_dev;
3049 }
3050
Divy Le Ray4d22de32007-01-18 22:04:14 -05003051 SET_NETDEV_DEV(netdev, &pdev->dev);
3052
3053 adapter->port[i] = netdev;
3054 pi = netdev_priv(netdev);
Divy Le Ray5fbf8162007-08-29 19:15:47 -07003055 pi->adapter = adapter;
Roland Dreier47fd23f2009-01-11 00:19:36 -08003056 pi->rx_offload = T3_RX_CSUM | T3_LRO;
Divy Le Ray4d22de32007-01-18 22:04:14 -05003057 pi->port_id = i;
3058 netif_carrier_off(netdev);
Divy Le Ray82ad3322008-12-16 01:09:39 -08003059 netif_tx_stop_all_queues(netdev);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003060 netdev->irq = pdev->irq;
3061 netdev->mem_start = mmio_start;
3062 netdev->mem_end = mmio_start + mmio_len - 1;
Divy Le Ray4d22de32007-01-18 22:04:14 -05003063 netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
Herbert Xu7be2df42009-01-21 14:39:13 -08003064 netdev->features |= NETIF_F_GRO;
Divy Le Ray4d22de32007-01-18 22:04:14 -05003065 if (pci_using_dac)
3066 netdev->features |= NETIF_F_HIGHDMA;
3067
3068 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Stephen Hemmingerdd752692008-11-19 22:15:39 -08003069 netdev->netdev_ops = &cxgb_netdev_ops;
Divy Le Ray4d22de32007-01-18 22:04:14 -05003070 SET_ETHTOOL_OPS(netdev, &cxgb_ethtool_ops);
3071 }
3072
Divy Le Ray5fbf8162007-08-29 19:15:47 -07003073 pci_set_drvdata(pdev, adapter);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003074 if (t3_prep_adapter(adapter, ai, 1) < 0) {
3075 err = -ENODEV;
3076 goto out_free_dev;
3077 }
Jeff Garzik2eab17a2007-11-23 21:59:45 -05003078
Divy Le Ray4d22de32007-01-18 22:04:14 -05003079 /*
3080 * The card is now ready to go. If any errors occur during device
3081 * registration we do not fail the whole card but rather proceed only
3082 * with the ports we manage to register successfully. However we must
3083 * register at least one net device.
3084 */
3085 for_each_port(adapter, i) {
3086 err = register_netdev(adapter->port[i]);
3087 if (err)
3088 dev_warn(&pdev->dev,
3089 "cannot register net device %s, skipping\n",
3090 adapter->port[i]->name);
3091 else {
3092 /*
3093 * Change the name we use for messages to the name of
3094 * the first successfully registered interface.
3095 */
3096 if (!adapter->registered_device_map)
3097 adapter->name = adapter->port[i]->name;
3098
3099 __set_bit(i, &adapter->registered_device_map);
3100 }
3101 }
3102 if (!adapter->registered_device_map) {
3103 dev_err(&pdev->dev, "could not register any net devices\n");
3104 goto out_free_dev;
3105 }
3106
3107 /* Driver's ready. Reflect it on LEDs */
3108 t3_led_ready(adapter);
3109
3110 if (is_offload(adapter)) {
3111 __set_bit(OFFLOAD_DEVMAP_BIT, &adapter->registered_device_map);
3112 cxgb3_adapter_ofld(adapter);
3113 }
3114
3115 /* See what interrupts we'll be using */
3116 if (msi > 1 && cxgb_enable_msix(adapter) == 0)
3117 adapter->flags |= USING_MSIX;
3118 else if (msi > 0 && pci_enable_msi(pdev) == 0)
3119 adapter->flags |= USING_MSI;
3120
Divy Le Ray8c263762008-10-08 17:37:33 -07003121 set_nqsets(adapter);
3122
Divy Le Ray0ee8d332007-02-08 16:55:59 -08003123 err = sysfs_create_group(&adapter->port[0]->dev.kobj,
Divy Le Ray4d22de32007-01-18 22:04:14 -05003124 &cxgb3_attr_group);
3125
3126 print_port_info(adapter, ai);
3127 return 0;
3128
3129out_free_dev:
3130 iounmap(adapter->regs);
Divy Le Ray952cdf32009-03-26 16:39:24 +00003131 for (i = ai->nports0 + ai->nports1 - 1; i >= 0; --i)
Divy Le Ray4d22de32007-01-18 22:04:14 -05003132 if (adapter->port[i])
3133 free_netdev(adapter->port[i]);
3134
3135out_free_adapter:
3136 kfree(adapter);
3137
3138out_disable_device:
3139 pci_disable_device(pdev);
3140out_release_regions:
3141 pci_release_regions(pdev);
3142 pci_set_drvdata(pdev, NULL);
3143 return err;
3144}
3145
3146static void __devexit remove_one(struct pci_dev *pdev)
3147{
Divy Le Ray5fbf8162007-08-29 19:15:47 -07003148 struct adapter *adapter = pci_get_drvdata(pdev);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003149
Divy Le Ray5fbf8162007-08-29 19:15:47 -07003150 if (adapter) {
Divy Le Ray4d22de32007-01-18 22:04:14 -05003151 int i;
Divy Le Ray4d22de32007-01-18 22:04:14 -05003152
3153 t3_sge_stop(adapter);
Divy Le Ray0ee8d332007-02-08 16:55:59 -08003154 sysfs_remove_group(&adapter->port[0]->dev.kobj,
Divy Le Ray4d22de32007-01-18 22:04:14 -05003155 &cxgb3_attr_group);
3156
Divy Le Ray4d22de32007-01-18 22:04:14 -05003157 if (is_offload(adapter)) {
3158 cxgb3_adapter_unofld(adapter);
3159 if (test_bit(OFFLOAD_DEVMAP_BIT,
3160 &adapter->open_device_map))
3161 offload_close(&adapter->tdev);
3162 }
3163
Divy Le Ray67d92ab2007-11-16 11:21:50 -08003164 for_each_port(adapter, i)
3165 if (test_bit(i, &adapter->registered_device_map))
3166 unregister_netdev(adapter->port[i]);
3167
Divy Le Ray0ca41c02008-09-25 14:05:28 +00003168 t3_stop_sge_timers(adapter);
Divy Le Ray4d22de32007-01-18 22:04:14 -05003169 t3_free_sge_resources(adapter);
3170 cxgb_disable_msi(adapter);
3171
Divy Le Ray4d22de32007-01-18 22:04:14 -05003172 for_each_port(adapter, i)
3173 if (adapter->port[i])
3174 free_netdev(adapter->port[i]);
3175
3176 iounmap(adapter->regs);
3177 kfree(adapter);
3178 pci_release_regions(pdev);
3179 pci_disable_device(pdev);
3180 pci_set_drvdata(pdev, NULL);
3181 }
3182}
3183
3184static struct pci_driver driver = {
3185 .name = DRV_NAME,
3186 .id_table = cxgb3_pci_tbl,
3187 .probe = init_one,
3188 .remove = __devexit_p(remove_one),
Divy Le Ray91a6b502007-11-16 11:21:55 -08003189 .err_handler = &t3_err_handler,
Divy Le Ray4d22de32007-01-18 22:04:14 -05003190};
3191
3192static int __init cxgb3_init_module(void)
3193{
3194 int ret;
3195
3196 cxgb3_offload_init();
3197
3198 ret = pci_register_driver(&driver);
3199 return ret;
3200}
3201
3202static void __exit cxgb3_cleanup_module(void)
3203{
3204 pci_unregister_driver(&driver);
3205 if (cxgb3_wq)
3206 destroy_workqueue(cxgb3_wq);
3207}
3208
3209module_init(cxgb3_init_module);
3210module_exit(cxgb3_cleanup_module);