David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 1 | Overview of Linux kernel SPI support |
| 2 | ==================================== |
| 3 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 4 | 21-May-2007 |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 5 | |
| 6 | What is SPI? |
| 7 | ------------ |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 8 | The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial |
| 9 | link used to connect microcontrollers to sensors, memory, and peripherals. |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 10 | It's a simple "de facto" standard, not complicated enough to acquire a |
| 11 | standardization body. SPI uses a master/slave configuration. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 12 | |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 13 | The three signal wires hold a clock (SCK, often on the order of 10 MHz), |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 14 | and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In, |
| 15 | Slave Out" (MISO) signals. (Other names are also used.) There are four |
| 16 | clocking modes through which data is exchanged; mode-0 and mode-3 are most |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 17 | commonly used. Each clock cycle shifts data out and data in; the clock |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 18 | doesn't cycle except when there is a data bit to shift. Not all data bits |
| 19 | are used though; not every protocol uses those full duplex capabilities. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 20 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 21 | SPI masters use a fourth "chip select" line to activate a given SPI slave |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 22 | device, so those three signal wires may be connected to several chips |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 23 | in parallel. All SPI slaves support chipselects; they are usually active |
| 24 | low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 25 | other signals, often including an interrupt to the master. |
| 26 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 27 | Unlike serial busses like USB or SMBus, even low level protocols for |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 28 | SPI slave functions are usually not interoperable between vendors |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 29 | (except for commodities like SPI memory chips). |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 30 | |
| 31 | - SPI may be used for request/response style device protocols, as with |
| 32 | touchscreen sensors and memory chips. |
| 33 | |
| 34 | - It may also be used to stream data in either direction (half duplex), |
| 35 | or both of them at the same time (full duplex). |
| 36 | |
| 37 | - Some devices may use eight bit words. Others may different word |
| 38 | lengths, such as streams of 12-bit or 20-bit digital samples. |
| 39 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 40 | - Words are usually sent with their most significant bit (MSB) first, |
| 41 | but sometimes the least significant bit (LSB) goes first instead. |
| 42 | |
| 43 | - Sometimes SPI is used to daisy-chain devices, like shift registers. |
| 44 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 45 | In the same way, SPI slaves will only rarely support any kind of automatic |
| 46 | discovery/enumeration protocol. The tree of slave devices accessible from |
| 47 | a given SPI master will normally be set up manually, with configuration |
| 48 | tables. |
| 49 | |
| 50 | SPI is only one of the names used by such four-wire protocols, and |
| 51 | most controllers have no problem handling "MicroWire" (think of it as |
| 52 | half-duplex SPI, for request/response protocols), SSP ("Synchronous |
| 53 | Serial Protocol"), PSP ("Programmable Serial Protocol"), and other |
| 54 | related protocols. |
| 55 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 56 | Some chips eliminate a signal line by combining MOSI and MISO, and |
| 57 | limiting themselves to half-duplex at the hardware level. In fact |
| 58 | some SPI chips have this signal mode as a strapping option. These |
| 59 | can be accessed using the same programming interface as SPI, but of |
| 60 | course they won't handle full duplex transfers. You may find such |
| 61 | chips described as using "three wire" signaling: SCK, data, nCSx. |
| 62 | (That data line is sometimes called MOMI or SISO.) |
| 63 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 64 | Microcontrollers often support both master and slave sides of the SPI |
| 65 | protocol. This document (and Linux) currently only supports the master |
| 66 | side of SPI interactions. |
| 67 | |
| 68 | |
| 69 | Who uses it? On what kinds of systems? |
| 70 | --------------------------------------- |
| 71 | Linux developers using SPI are probably writing device drivers for embedded |
| 72 | systems boards. SPI is used to control external chips, and it is also a |
| 73 | protocol supported by every MMC or SD memory card. (The older "DataFlash" |
| 74 | cards, predating MMC cards but using the same connectors and card shape, |
| 75 | support only SPI.) Some PC hardware uses SPI flash for BIOS code. |
| 76 | |
| 77 | SPI slave chips range from digital/analog converters used for analog |
| 78 | sensors and codecs, to memory, to peripherals like USB controllers |
| 79 | or Ethernet adapters; and more. |
| 80 | |
| 81 | Most systems using SPI will integrate a few devices on a mainboard. |
| 82 | Some provide SPI links on expansion connectors; in cases where no |
| 83 | dedicated SPI controller exists, GPIO pins can be used to create a |
| 84 | low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI |
| 85 | controller; the reasons to use SPI focus on low cost and simple operation, |
| 86 | and if dynamic reconfiguration is important, USB will often be a more |
| 87 | appropriate low-pincount peripheral bus. |
| 88 | |
| 89 | Many microcontrollers that can run Linux integrate one or more I/O |
| 90 | interfaces with SPI modes. Given SPI support, they could use MMC or SD |
| 91 | cards without needing a special purpose MMC/SD/SDIO controller. |
| 92 | |
| 93 | |
David Brownell | 43d4f96 | 2007-05-23 13:57:36 -0700 | [diff] [blame] | 94 | I'm confused. What are these four SPI "clock modes"? |
| 95 | ----------------------------------------------------- |
| 96 | It's easy to be confused here, and the vendor documentation you'll |
| 97 | find isn't necessarily helpful. The four modes combine two mode bits: |
| 98 | |
| 99 | - CPOL indicates the initial clock polarity. CPOL=0 means the |
| 100 | clock starts low, so the first (leading) edge is rising, and |
| 101 | the second (trailing) edge is falling. CPOL=1 means the clock |
| 102 | starts high, so the first (leading) edge is falling. |
| 103 | |
| 104 | - CPHA indicates the clock phase used to sample data; CPHA=0 says |
| 105 | sample on the leading edge, CPHA=1 means the trailing edge. |
| 106 | |
| 107 | Since the signal needs to stablize before it's sampled, CPHA=0 |
| 108 | implies that its data is written half a clock before the first |
| 109 | clock edge. The chipselect may have made it become available. |
| 110 | |
| 111 | Chip specs won't always say "uses SPI mode X" in as many words, |
| 112 | but their timing diagrams will make the CPOL and CPHA modes clear. |
| 113 | |
| 114 | In the SPI mode number, CPOL is the high order bit and CPHA is the |
| 115 | low order bit. So when a chip's timing diagram shows the clock |
| 116 | starting low (CPOL=0) and data stabilized for sampling during the |
| 117 | trailing clock edge (CPHA=1), that's SPI mode 1. |
| 118 | |
| 119 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 120 | How do these driver programming interfaces work? |
| 121 | ------------------------------------------------ |
| 122 | The <linux/spi/spi.h> header file includes kerneldoc, as does the |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 123 | main source code, and you should certainly read that chapter of the |
| 124 | kernel API document. This is just an overview, so you get the big |
| 125 | picture before those details. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 126 | |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 127 | SPI requests always go into I/O queues. Requests for a given SPI device |
| 128 | are always executed in FIFO order, and complete asynchronously through |
| 129 | completion callbacks. There are also some simple synchronous wrappers |
| 130 | for those calls, including ones for common transaction types like writing |
| 131 | a command and then reading its response. |
| 132 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 133 | There are two types of SPI driver, here called: |
| 134 | |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 135 | Controller drivers ... controllers may be built in to System-On-Chip |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 136 | processors, and often support both Master and Slave roles. |
| 137 | These drivers touch hardware registers and may use DMA. |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 138 | Or they can be PIO bitbangers, needing just GPIO pins. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 139 | |
| 140 | Protocol drivers ... these pass messages through the controller |
| 141 | driver to communicate with a Slave or Master device on the |
| 142 | other side of an SPI link. |
| 143 | |
| 144 | So for example one protocol driver might talk to the MTD layer to export |
| 145 | data to filesystems stored on SPI flash like DataFlash; and others might |
| 146 | control audio interfaces, present touchscreen sensors as input interfaces, |
| 147 | or monitor temperature and voltage levels during industrial processing. |
| 148 | And those might all be sharing the same controller driver. |
| 149 | |
| 150 | A "struct spi_device" encapsulates the master-side interface between |
| 151 | those two types of driver. At this writing, Linux has no slave side |
| 152 | programming interface. |
| 153 | |
| 154 | There is a minimal core of SPI programming interfaces, focussing on |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 155 | using the driver model to connect controller and protocol drivers using |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 156 | device tables provided by board specific initialization code. SPI |
| 157 | shows up in sysfs in several locations: |
| 158 | |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 159 | /sys/devices/.../CTLR ... physical node for a given SPI controller |
| 160 | |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 161 | /sys/devices/.../CTLR/spiB.C ... spi_device on bus "B", |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 162 | chipselect C, accessed through CTLR. |
| 163 | |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 164 | /sys/bus/spi/devices/spiB.C ... symlink to that physical |
| 165 | .../CTLR/spiB.C device |
| 166 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 167 | /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver |
| 168 | that should be used with this device (for hotplug/coldplug) |
| 169 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 170 | /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices |
| 171 | |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 172 | /sys/class/spi_master/spiB ... symlink (or actual device node) to |
| 173 | a logical node which could hold class related state for the |
| 174 | controller managing bus "B". All spiB.* devices share one |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 175 | physical SPI bus segment, with SCLK, MOSI, and MISO. |
| 176 | |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 177 | Note that the actual location of the controller's class state depends |
| 178 | on whether you enabled CONFIG_SYSFS_DEPRECATED or not. At this time, |
| 179 | the only class-specific state is the bus number ("B" in "spiB"), so |
| 180 | those /sys/class entries are only useful to quickly identify busses. |
| 181 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 182 | |
| 183 | How does board-specific init code declare SPI devices? |
| 184 | ------------------------------------------------------ |
| 185 | Linux needs several kinds of information to properly configure SPI devices. |
| 186 | That information is normally provided by board-specific code, even for |
| 187 | chips that do support some of automated discovery/enumeration. |
| 188 | |
| 189 | DECLARE CONTROLLERS |
| 190 | |
| 191 | The first kind of information is a list of what SPI controllers exist. |
| 192 | For System-on-Chip (SOC) based boards, these will usually be platform |
| 193 | devices, and the controller may need some platform_data in order to |
| 194 | operate properly. The "struct platform_device" will include resources |
| 195 | like the physical address of the controller's first register and its IRQ. |
| 196 | |
| 197 | Platforms will often abstract the "register SPI controller" operation, |
| 198 | maybe coupling it with code to initialize pin configurations, so that |
| 199 | the arch/.../mach-*/board-*.c files for several boards can all share the |
| 200 | same basic controller setup code. This is because most SOCs have several |
| 201 | SPI-capable controllers, and only the ones actually usable on a given |
| 202 | board should normally be set up and registered. |
| 203 | |
| 204 | So for example arch/.../mach-*/board-*.c files might have code like: |
| 205 | |
| 206 | #include <asm/arch/spi.h> /* for mysoc_spi_data */ |
| 207 | |
| 208 | /* if your mach-* infrastructure doesn't support kernels that can |
| 209 | * run on multiple boards, pdata wouldn't benefit from "__init". |
| 210 | */ |
| 211 | static struct mysoc_spi_data __init pdata = { ... }; |
| 212 | |
| 213 | static __init board_init(void) |
| 214 | { |
| 215 | ... |
| 216 | /* this board only uses SPI controller #2 */ |
| 217 | mysoc_register_spi(2, &pdata); |
| 218 | ... |
| 219 | } |
| 220 | |
| 221 | And SOC-specific utility code might look something like: |
| 222 | |
| 223 | #include <asm/arch/spi.h> |
| 224 | |
| 225 | static struct platform_device spi2 = { ... }; |
| 226 | |
| 227 | void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata) |
| 228 | { |
| 229 | struct mysoc_spi_data *pdata2; |
| 230 | |
| 231 | pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL); |
| 232 | *pdata2 = pdata; |
| 233 | ... |
| 234 | if (n == 2) { |
| 235 | spi2->dev.platform_data = pdata2; |
| 236 | register_platform_device(&spi2); |
| 237 | |
| 238 | /* also: set up pin modes so the spi2 signals are |
| 239 | * visible on the relevant pins ... bootloaders on |
| 240 | * production boards may already have done this, but |
| 241 | * developer boards will often need Linux to do it. |
| 242 | */ |
| 243 | } |
| 244 | ... |
| 245 | } |
| 246 | |
| 247 | Notice how the platform_data for boards may be different, even if the |
| 248 | same SOC controller is used. For example, on one board SPI might use |
| 249 | an external clock, where another derives the SPI clock from current |
| 250 | settings of some master clock. |
| 251 | |
| 252 | |
| 253 | DECLARE SLAVE DEVICES |
| 254 | |
| 255 | The second kind of information is a list of what SPI slave devices exist |
| 256 | on the target board, often with some board-specific data needed for the |
| 257 | driver to work correctly. |
| 258 | |
| 259 | Normally your arch/.../mach-*/board-*.c files would provide a small table |
| 260 | listing the SPI devices on each board. (This would typically be only a |
| 261 | small handful.) That might look like: |
| 262 | |
| 263 | static struct ads7846_platform_data ads_info = { |
| 264 | .vref_delay_usecs = 100, |
| 265 | .x_plate_ohms = 580, |
| 266 | .y_plate_ohms = 410, |
| 267 | }; |
| 268 | |
| 269 | static struct spi_board_info spi_board_info[] __initdata = { |
| 270 | { |
| 271 | .modalias = "ads7846", |
| 272 | .platform_data = &ads_info, |
| 273 | .mode = SPI_MODE_0, |
| 274 | .irq = GPIO_IRQ(31), |
| 275 | .max_speed_hz = 120000 /* max sample rate at 3V */ * 16, |
| 276 | .bus_num = 1, |
| 277 | .chip_select = 0, |
| 278 | }, |
| 279 | }; |
| 280 | |
| 281 | Again, notice how board-specific information is provided; each chip may need |
| 282 | several types. This example shows generic constraints like the fastest SPI |
| 283 | clock to allow (a function of board voltage in this case) or how an IRQ pin |
| 284 | is wired, plus chip-specific constraints like an important delay that's |
| 285 | changed by the capacitance at one pin. |
| 286 | |
| 287 | (There's also "controller_data", information that may be useful to the |
| 288 | controller driver. An example would be peripheral-specific DMA tuning |
| 289 | data or chipselect callbacks. This is stored in spi_device later.) |
| 290 | |
| 291 | The board_info should provide enough information to let the system work |
| 292 | without the chip's driver being loaded. The most troublesome aspect of |
| 293 | that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since |
| 294 | sharing a bus with a device that interprets chipselect "backwards" is |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 295 | not possible until the infrastructure knows how to deselect it. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 296 | |
| 297 | Then your board initialization code would register that table with the SPI |
| 298 | infrastructure, so that it's available later when the SPI master controller |
| 299 | driver is registered: |
| 300 | |
| 301 | spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); |
| 302 | |
| 303 | Like with other static board-specific setup, you won't unregister those. |
| 304 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 305 | The widely used "card" style computers bundle memory, cpu, and little else |
| 306 | onto a card that's maybe just thirty square centimeters. On such systems, |
| 307 | your arch/.../mach-.../board-*.c file would primarily provide information |
| 308 | about the devices on the mainboard into which such a card is plugged. That |
| 309 | certainly includes SPI devices hooked up through the card connectors! |
| 310 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 311 | |
| 312 | NON-STATIC CONFIGURATIONS |
| 313 | |
| 314 | Developer boards often play by different rules than product boards, and one |
| 315 | example is the potential need to hotplug SPI devices and/or controllers. |
| 316 | |
Paolo Ornati | 670e9f3 | 2006-10-03 22:57:56 +0200 | [diff] [blame] | 317 | For those cases you might need to use spi_busnum_to_master() to look |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 318 | up the spi bus master, and will likely need spi_new_device() to provide the |
| 319 | board info based on the board that was hotplugged. Of course, you'd later |
| 320 | call at least spi_unregister_device() when that board is removed. |
| 321 | |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 322 | When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 323 | configurations will also be dynamic. Fortunately, such devices all support |
| 324 | basic device identification probes, so they should hotplug normally. |
David Brownell | 7111763 | 2006-01-08 13:34:29 -0800 | [diff] [blame] | 325 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 326 | |
| 327 | How do I write an "SPI Protocol Driver"? |
| 328 | ---------------------------------------- |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 329 | Most SPI drivers are currently kernel drivers, but there's also support |
| 330 | for userspace drivers. Here we talk only about kernel drivers. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 331 | |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 332 | SPI protocol drivers somewhat resemble platform device drivers: |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 333 | |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 334 | static struct spi_driver CHIP_driver = { |
| 335 | .driver = { |
| 336 | .name = "CHIP", |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 337 | .owner = THIS_MODULE, |
| 338 | }, |
| 339 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 340 | .probe = CHIP_probe, |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 341 | .remove = __devexit_p(CHIP_remove), |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 342 | .suspend = CHIP_suspend, |
| 343 | .resume = CHIP_resume, |
| 344 | }; |
| 345 | |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 346 | The driver core will autmatically attempt to bind this driver to any SPI |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 347 | device whose board_info gave a modalias of "CHIP". Your probe() code |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 348 | might look like this unless you're creating a device which is managing |
| 349 | a bus (appearing under /sys/class/spi_master). |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 350 | |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 351 | static int __devinit CHIP_probe(struct spi_device *spi) |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 352 | { |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 353 | struct CHIP *chip; |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 354 | struct CHIP_platform_data *pdata; |
| 355 | |
| 356 | /* assuming the driver requires board-specific data: */ |
| 357 | pdata = &spi->dev.platform_data; |
| 358 | if (!pdata) |
| 359 | return -ENODEV; |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 360 | |
| 361 | /* get memory for driver's per-chip state */ |
| 362 | chip = kzalloc(sizeof *chip, GFP_KERNEL); |
| 363 | if (!chip) |
| 364 | return -ENOMEM; |
Ben Dooks | 9b40ff4 | 2007-02-12 00:52:41 -0800 | [diff] [blame] | 365 | spi_set_drvdata(spi, chip); |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 366 | |
| 367 | ... etc |
| 368 | return 0; |
| 369 | } |
| 370 | |
| 371 | As soon as it enters probe(), the driver may issue I/O requests to |
| 372 | the SPI device using "struct spi_message". When remove() returns, |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 373 | or after probe() fails, the driver guarantees that it won't submit |
| 374 | any more such messages. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 375 | |
Paolo Ornati | 670e9f3 | 2006-10-03 22:57:56 +0200 | [diff] [blame] | 376 | - An spi_message is a sequence of protocol operations, executed |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 377 | as one atomic sequence. SPI driver controls include: |
| 378 | |
| 379 | + when bidirectional reads and writes start ... by how its |
| 380 | sequence of spi_transfer requests is arranged; |
| 381 | |
| 382 | + optionally defining short delays after transfers ... using |
| 383 | the spi_transfer.delay_usecs setting; |
| 384 | |
| 385 | + whether the chipselect becomes inactive after a transfer and |
| 386 | any delay ... by using the spi_transfer.cs_change flag; |
| 387 | |
| 388 | + hinting whether the next message is likely to go to this same |
| 389 | device ... using the spi_transfer.cs_change flag on the last |
| 390 | transfer in that atomic group, and potentially saving costs |
| 391 | for chip deselect and select operations. |
| 392 | |
| 393 | - Follow standard kernel rules, and provide DMA-safe buffers in |
| 394 | your messages. That way controller drivers using DMA aren't forced |
| 395 | to make extra copies unless the hardware requires it (e.g. working |
| 396 | around hardware errata that force the use of bounce buffering). |
| 397 | |
| 398 | If standard dma_map_single() handling of these buffers is inappropriate, |
| 399 | you can use spi_message.is_dma_mapped to tell the controller driver |
| 400 | that you've already provided the relevant DMA addresses. |
| 401 | |
| 402 | - The basic I/O primitive is spi_async(). Async requests may be |
| 403 | issued in any context (irq handler, task, etc) and completion |
| 404 | is reported using a callback provided with the message. |
David Brownell | b885244 | 2006-01-08 13:34:23 -0800 | [diff] [blame] | 405 | After any detected error, the chip is deselected and processing |
| 406 | of that spi_message is aborted. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 407 | |
| 408 | - There are also synchronous wrappers like spi_sync(), and wrappers |
| 409 | like spi_read(), spi_write(), and spi_write_then_read(). These |
| 410 | may be issued only in contexts that may sleep, and they're all |
| 411 | clean (and small, and "optional") layers over spi_async(). |
| 412 | |
| 413 | - The spi_write_then_read() call, and convenience wrappers around |
| 414 | it, should only be used with small amounts of data where the |
| 415 | cost of an extra copy may be ignored. It's designed to support |
| 416 | common RPC-style requests, such as writing an eight bit command |
| 417 | and reading a sixteen bit response -- spi_w8r16() being one its |
| 418 | wrappers, doing exactly that. |
| 419 | |
| 420 | Some drivers may need to modify spi_device characteristics like the |
| 421 | transfer mode, wordsize, or clock rate. This is done with spi_setup(), |
| 422 | which would normally be called from probe() before the first I/O is |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 423 | done to the device. However, that can also be called at any time |
| 424 | that no message is pending for that device. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 425 | |
| 426 | While "spi_device" would be the bottom boundary of the driver, the |
| 427 | upper boundaries might include sysfs (especially for sensor readings), |
| 428 | the input layer, ALSA, networking, MTD, the character device framework, |
| 429 | or other Linux subsystems. |
| 430 | |
David Brownell | 0c86846 | 2006-01-08 13:34:25 -0800 | [diff] [blame] | 431 | Note that there are two types of memory your driver must manage as part |
| 432 | of interacting with SPI devices. |
| 433 | |
| 434 | - I/O buffers use the usual Linux rules, and must be DMA-safe. |
| 435 | You'd normally allocate them from the heap or free page pool. |
| 436 | Don't use the stack, or anything that's declared "static". |
| 437 | |
| 438 | - The spi_message and spi_transfer metadata used to glue those |
| 439 | I/O buffers into a group of protocol transactions. These can |
| 440 | be allocated anywhere it's convenient, including as part of |
| 441 | other allocate-once driver data structures. Zero-init these. |
| 442 | |
| 443 | If you like, spi_message_alloc() and spi_message_free() convenience |
| 444 | routines are available to allocate and zero-initialize an spi_message |
| 445 | with several transfers. |
| 446 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 447 | |
| 448 | How do I write an "SPI Master Controller Driver"? |
| 449 | ------------------------------------------------- |
| 450 | An SPI controller will probably be registered on the platform_bus; write |
| 451 | a driver to bind to the device, whichever bus is involved. |
| 452 | |
| 453 | The main task of this type of driver is to provide an "spi_master". |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 454 | Use spi_alloc_master() to allocate the master, and spi_master_get_devdata() |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 455 | to get the driver-private data allocated for that device. |
| 456 | |
| 457 | struct spi_master *master; |
| 458 | struct CONTROLLER *c; |
| 459 | |
| 460 | master = spi_alloc_master(dev, sizeof *c); |
| 461 | if (!master) |
| 462 | return -ENODEV; |
| 463 | |
Tony Jones | 49dce68 | 2007-10-16 01:27:48 -0700 | [diff] [blame] | 464 | c = spi_master_get_devdata(master); |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 465 | |
| 466 | The driver will initialize the fields of that spi_master, including the |
| 467 | bus number (maybe the same as the platform device ID) and three methods |
| 468 | used to interact with the SPI core and SPI protocol drivers. It will |
David Brownell | a020ed7 | 2006-04-03 15:49:04 -0700 | [diff] [blame] | 469 | also initialize its own internal state. (See below about bus numbering |
| 470 | and those methods.) |
| 471 | |
| 472 | After you initialize the spi_master, then use spi_register_master() to |
| 473 | publish it to the rest of the system. At that time, device nodes for |
| 474 | the controller and any predeclared spi devices will be made available, |
| 475 | and the driver model core will take care of binding them to drivers. |
| 476 | |
| 477 | If you need to remove your SPI controller driver, spi_unregister_master() |
| 478 | will reverse the effect of spi_register_master(). |
| 479 | |
| 480 | |
| 481 | BUS NUMBERING |
| 482 | |
| 483 | Bus numbering is important, since that's how Linux identifies a given |
| 484 | SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On |
| 485 | SOC systems, the bus numbers should match the numbers defined by the chip |
| 486 | manufacturer. For example, hardware controller SPI2 would be bus number 2, |
| 487 | and spi_board_info for devices connected to it would use that number. |
| 488 | |
| 489 | If you don't have such hardware-assigned bus number, and for some reason |
| 490 | you can't just assign them, then provide a negative bus number. That will |
| 491 | then be replaced by a dynamically assigned number. You'd then need to treat |
| 492 | this as a non-static configuration (see above). |
| 493 | |
| 494 | |
| 495 | SPI MASTER METHODS |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 496 | |
| 497 | master->setup(struct spi_device *spi) |
| 498 | This sets up the device clock rate, SPI mode, and word sizes. |
| 499 | Drivers may change the defaults provided by board_info, and then |
| 500 | call spi_setup(spi) to invoke this routine. It may sleep. |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 501 | Unless each SPI slave has its own configuration registers, don't |
| 502 | change them right away ... otherwise drivers could corrupt I/O |
| 503 | that's in progress for other SPI devices. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 504 | |
| 505 | master->transfer(struct spi_device *spi, struct spi_message *message) |
| 506 | This must not sleep. Its responsibility is arrange that the |
David Brownell | 33e34dc | 2007-05-08 00:32:21 -0700 | [diff] [blame] | 507 | transfer happens and its complete() callback is issued. The two |
| 508 | will normally happen later, after other transfers complete, and |
| 509 | if the controller is idle it will need to be kickstarted. |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 510 | |
| 511 | master->cleanup(struct spi_device *spi) |
| 512 | Your controller driver may use spi_device.controller_state to hold |
| 513 | state it dynamically associates with that device. If you do that, |
| 514 | be sure to provide the cleanup() method to free that state. |
| 515 | |
David Brownell | a020ed7 | 2006-04-03 15:49:04 -0700 | [diff] [blame] | 516 | |
| 517 | SPI MESSAGE QUEUE |
| 518 | |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 519 | The bulk of the driver will be managing the I/O queue fed by transfer(). |
| 520 | |
| 521 | That queue could be purely conceptual. For example, a driver used only |
| 522 | for low-frequency sensor acess might be fine using synchronous PIO. |
| 523 | |
| 524 | But the queue will probably be very real, using message->queue, PIO, |
| 525 | often DMA (especially if the root filesystem is in SPI flash), and |
| 526 | execution contexts like IRQ handlers, tasklets, or workqueues (such |
| 527 | as keventd). Your driver can be as fancy, or as simple, as you need. |
David Brownell | a020ed7 | 2006-04-03 15:49:04 -0700 | [diff] [blame] | 528 | Such a transfer() method would normally just add the message to a |
| 529 | queue, and then start some asynchronous transfer engine (unless it's |
| 530 | already running). |
David Brownell | 8ae12a0 | 2006-01-08 13:34:19 -0800 | [diff] [blame] | 531 | |
| 532 | |
| 533 | THANKS TO |
| 534 | --------- |
| 535 | Contributors to Linux-SPI discussions include (in alphabetical order, |
| 536 | by last name): |
| 537 | |
| 538 | David Brownell |
| 539 | Russell King |
| 540 | Dmitry Pervushin |
| 541 | Stephen Street |
| 542 | Mark Underwood |
| 543 | Andrew Victor |
| 544 | Vitaly Wool |
| 545 | |